2 * Copyright 2015 Advanced Micro Devices, Inc.
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the
7 * "Software"), to deal in the Software without restriction, including
8 * without limitation the rights to use, copy, modify, merge, publish,
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10 * permit persons to whom the Software is furnished to do so, subject to
11 * the following conditions:
13 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
14 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
15 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
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21 * The above copyright notice and this permission notice (including the
22 * next paragraph) shall be included in all copies or substantial portions
34 static int amdgpu_bo_list_create(struct amdgpu_fpriv *fpriv,
35 struct amdgpu_bo_list **result,
40 *result = kzalloc(sizeof(struct amdgpu_bo_list), GFP_KERNEL);
44 mutex_lock(&fpriv->bo_list_lock);
45 r = idr_alloc(&fpriv->bo_list_handles, *result,
48 mutex_unlock(&fpriv->bo_list_lock);
54 mutex_init(&(*result)->lock);
55 (*result)->num_entries = 0;
56 (*result)->array = NULL;
58 mutex_lock(&(*result)->lock);
59 mutex_unlock(&fpriv->bo_list_lock);
64 static void amdgpu_bo_list_destroy(struct amdgpu_fpriv *fpriv, int id)
66 struct amdgpu_bo_list *list;
68 mutex_lock(&fpriv->bo_list_lock);
69 list = idr_find(&fpriv->bo_list_handles, id);
71 mutex_lock(&list->lock);
72 idr_remove(&fpriv->bo_list_handles, id);
73 mutex_unlock(&list->lock);
74 amdgpu_bo_list_free(list);
76 mutex_unlock(&fpriv->bo_list_lock);
79 static int amdgpu_bo_list_set(struct amdgpu_device *adev,
80 struct drm_file *filp,
81 struct amdgpu_bo_list *list,
82 struct drm_amdgpu_bo_list_entry *info,
85 struct amdgpu_bo_list_entry *array;
86 struct amdgpu_bo *gds_obj = adev->gds.gds_gfx_bo;
87 struct amdgpu_bo *gws_obj = adev->gds.gws_gfx_bo;
88 struct amdgpu_bo *oa_obj = adev->gds.oa_gfx_bo;
90 bool has_userptr = false;
93 array = drm_malloc_ab(num_entries, sizeof(struct amdgpu_bo_list_entry));
96 memset(array, 0, num_entries * sizeof(struct amdgpu_bo_list_entry));
98 for (i = 0; i < num_entries; ++i) {
99 struct amdgpu_bo_list_entry *entry = &array[i];
100 struct drm_gem_object *gobj;
102 gobj = drm_gem_object_lookup(adev->ddev, filp, info[i].bo_handle);
106 entry->robj = amdgpu_bo_ref(gem_to_amdgpu_bo(gobj));
107 drm_gem_object_unreference_unlocked(gobj);
108 entry->priority = info[i].bo_priority;
109 entry->prefered_domains = entry->robj->initial_domain;
110 entry->allowed_domains = entry->prefered_domains;
111 if (entry->allowed_domains == AMDGPU_GEM_DOMAIN_VRAM)
112 entry->allowed_domains |= AMDGPU_GEM_DOMAIN_GTT;
113 if (amdgpu_ttm_tt_has_userptr(entry->robj->tbo.ttm)) {
115 entry->prefered_domains = AMDGPU_GEM_DOMAIN_GTT;
116 entry->allowed_domains = AMDGPU_GEM_DOMAIN_GTT;
118 entry->tv.bo = &entry->robj->tbo;
119 entry->tv.shared = true;
121 if (entry->prefered_domains == AMDGPU_GEM_DOMAIN_GDS)
122 gds_obj = entry->robj;
123 if (entry->prefered_domains == AMDGPU_GEM_DOMAIN_GWS)
124 gws_obj = entry->robj;
125 if (entry->prefered_domains == AMDGPU_GEM_DOMAIN_OA)
126 oa_obj = entry->robj;
129 for (i = 0; i < list->num_entries; ++i)
130 amdgpu_bo_unref(&list->array[i].robj);
132 drm_free_large(list->array);
134 list->gds_obj = gds_obj;
135 list->gws_obj = gws_obj;
136 list->oa_obj = oa_obj;
137 list->has_userptr = has_userptr;
139 list->num_entries = num_entries;
144 drm_free_large(array);
148 struct amdgpu_bo_list *
149 amdgpu_bo_list_get(struct amdgpu_fpriv *fpriv, int id)
151 struct amdgpu_bo_list *result;
153 mutex_lock(&fpriv->bo_list_lock);
154 result = idr_find(&fpriv->bo_list_handles, id);
156 mutex_lock(&result->lock);
157 mutex_unlock(&fpriv->bo_list_lock);
161 void amdgpu_bo_list_put(struct amdgpu_bo_list *list)
163 mutex_unlock(&list->lock);
166 void amdgpu_bo_list_free(struct amdgpu_bo_list *list)
170 for (i = 0; i < list->num_entries; ++i)
171 amdgpu_bo_unref(&list->array[i].robj);
173 mutex_destroy(&list->lock);
174 drm_free_large(list->array);
178 int amdgpu_bo_list_ioctl(struct drm_device *dev, void *data,
179 struct drm_file *filp)
181 const uint32_t info_size = sizeof(struct drm_amdgpu_bo_list_entry);
183 struct amdgpu_device *adev = dev->dev_private;
184 struct amdgpu_fpriv *fpriv = filp->driver_priv;
185 union drm_amdgpu_bo_list *args = data;
186 uint32_t handle = args->in.list_handle;
187 const void __user *uptr = (const void*)(long)args->in.bo_info_ptr;
189 struct drm_amdgpu_bo_list_entry *info;
190 struct amdgpu_bo_list *list;
194 info = drm_malloc_ab(args->in.bo_number,
195 sizeof(struct drm_amdgpu_bo_list_entry));
199 /* copy the handle array from userspace to a kernel buffer */
201 if (likely(info_size == args->in.bo_info_size)) {
202 unsigned long bytes = args->in.bo_number *
203 args->in.bo_info_size;
205 if (copy_from_user(info, uptr, bytes))
209 unsigned long bytes = min(args->in.bo_info_size, info_size);
212 memset(info, 0, args->in.bo_number * info_size);
213 for (i = 0; i < args->in.bo_number; ++i) {
214 if (copy_from_user(&info[i], uptr, bytes))
217 uptr += args->in.bo_info_size;
221 switch (args->in.operation) {
222 case AMDGPU_BO_LIST_OP_CREATE:
223 r = amdgpu_bo_list_create(fpriv, &list, &handle);
227 r = amdgpu_bo_list_set(adev, filp, list, info,
229 amdgpu_bo_list_put(list);
235 case AMDGPU_BO_LIST_OP_DESTROY:
236 amdgpu_bo_list_destroy(fpriv, handle);
240 case AMDGPU_BO_LIST_OP_UPDATE:
242 list = amdgpu_bo_list_get(fpriv, handle);
246 r = amdgpu_bo_list_set(adev, filp, list, info,
248 amdgpu_bo_list_put(list);
259 memset(args, 0, sizeof(*args));
260 args->out.list_handle = handle;
261 drm_free_large(info);
266 drm_free_large(info);