arch/x86/kvm/x86.c

   1 /*
   2  * Kernel-based Virtual Machine driver for Linux
   3  *
   4  * derived from drivers/kvm/kvm_main.c
   5  *
   6  * Copyright (C) 2006 Qumranet, Inc.
   7  * Copyright (C) 2008 Qumranet, Inc.
   8  * Copyright IBM Corporation, 2008
   9  * Copyright 2010 Red Hat, Inc. and/or its affiliates.
  10  *
  11  * Authors:
  12  *   Avi Kivity   <[email protected]>
  13  *   Yaniv Kamay  <[email protected]>
  14  *   Amit Shah    <[email protected]>
  15  *   Ben-Ami Yassour <[email protected]>
  16  *
  17  * This work is licensed under the terms of the GNU GPL, version 2.  See
  18  * the COPYING file in the top-level directory.
  19  *
  20  */
  21
  22 #include <linux/kvm_host.h>
  23 #include "irq.h"
  24 #include "mmu.h"
  25 #include "i8254.h"
  26 #include "tss.h"
  27 #include "kvm_cache_regs.h"
  28 #include "x86.h"
  29 #include "cpuid.h"
  30
  31 #include <linux/clocksource.h>
  32 #include <linux/interrupt.h>
  33 #include <linux/kvm.h>
  34 #include <linux/fs.h>
  35 #include <linux/vmalloc.h>
  36 #include <linux/module.h>
  37 #include <linux/mman.h>
  38 #include <linux/highmem.h>
  39 #include <linux/iommu.h>
  40 #include <linux/intel-iommu.h>
  41 #include <linux/cpufreq.h>
  42 #include <linux/user-return-notifier.h>
  43 #include <linux/srcu.h>
  44 #include <linux/slab.h>
  45 #include <linux/perf_event.h>
  46 #include <linux/uaccess.h>
  47 #include <linux/hash.h>
  48 #include <linux/pci.h>
  49 #include <linux/timekeeper_internal.h>
  50 #include <linux/pvclock_gtod.h>
  51 #include <trace/events/kvm.h>
  52
  53 #define CREATE_TRACE_POINTS
  54 #include "trace.h"
  55
  56 #include <asm/debugreg.h>
  57 #include <asm/msr.h>
  58 #include <asm/desc.h>
  59 #include <asm/mtrr.h>
  60 #include <asm/mce.h>
  61 #include <asm/i387.h>
  62 #include <asm/fpu-internal.h> /* Ugh! */
  63 #include <asm/xcr.h>
  64 #include <asm/pvclock.h>
  65 #include <asm/div64.h>
  66
  67 #define MAX_IO_MSRS 256
  68 #define KVM_MAX_MCE_BANKS 32
  69 #define KVM_MCE_CAP_SUPPORTED (MCG_CTL_P | MCG_SER_P)
  70
  71 #define emul_to_vcpu(ctxt) \
  72         container_of(ctxt, struct kvm_vcpu, arch.emulate_ctxt)
  73
  74 /* EFER defaults:
  75  * - enable syscall per default because its emulated by KVM
  76  * - enable LME and LMA per default on 64 bit KVM
  77  */
  78 #ifdef CONFIG_X86_64
  79 static
  80 u64 __read_mostly efer_reserved_bits = ~((u64)(EFER_SCE | EFER_LME | EFER_LMA));
  81 #else
  82 static u64 __read_mostly efer_reserved_bits = ~((u64)EFER_SCE);
  83 #endif
  84
  85 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
  86 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
  87
  88 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
  89 static void process_nmi(struct kvm_vcpu *vcpu);
  90
  91 struct kvm_x86_ops *kvm_x86_ops;
  92 EXPORT_SYMBOL_GPL(kvm_x86_ops);
  93
  94 static bool ignore_msrs = 0;
  95 module_param(ignore_msrs, bool, S_IRUGO | S_IWUSR);
  96
  97 bool kvm_has_tsc_control;
  98 EXPORT_SYMBOL_GPL(kvm_has_tsc_control);
  99 u32  kvm_max_guest_tsc_khz;
 100 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz);
 101
 102 /* tsc tolerance in parts per million - default to 1/2 of the NTP threshold */
 103 static u32 tsc_tolerance_ppm = 250;
 104 module_param(tsc_tolerance_ppm, uint, S_IRUGO | S_IWUSR);
 105
 106 #define KVM_NR_SHARED_MSRS 16
 107
 108 struct kvm_shared_msrs_global {
 109         int nr;
 110         u32 msrs[KVM_NR_SHARED_MSRS];
 111 };
 112
 113 struct kvm_shared_msrs {
 114         struct user_return_notifier urn;
 115         bool registered;
 116         struct kvm_shared_msr_values {
 117                 u64 host;
 118                 u64 curr;
 119         } values[KVM_NR_SHARED_MSRS];
 120 };
 121
 122 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global;
 123 static struct kvm_shared_msrs __percpu *shared_msrs;
 124
 125 struct kvm_stats_debugfs_item debugfs_entries[] = {
 126         { "pf_fixed", VCPU_STAT(pf_fixed) },
 127         { "pf_guest", VCPU_STAT(pf_guest) },
 128         { "tlb_flush", VCPU_STAT(tlb_flush) },
 129         { "invlpg", VCPU_STAT(invlpg) },
 130         { "exits", VCPU_STAT(exits) },
 131         { "io_exits", VCPU_STAT(io_exits) },
 132         { "mmio_exits", VCPU_STAT(mmio_exits) },
 133         { "signal_exits", VCPU_STAT(signal_exits) },
 134         { "irq_window", VCPU_STAT(irq_window_exits) },
 135         { "nmi_window", VCPU_STAT(nmi_window_exits) },
 136         { "halt_exits", VCPU_STAT(halt_exits) },
 137         { "halt_wakeup", VCPU_STAT(halt_wakeup) },
 138         { "hypercalls", VCPU_STAT(hypercalls) },
 139         { "request_irq", VCPU_STAT(request_irq_exits) },
 140         { "irq_exits", VCPU_STAT(irq_exits) },
 141         { "host_state_reload", VCPU_STAT(host_state_reload) },
 142         { "efer_reload", VCPU_STAT(efer_reload) },
 143         { "fpu_reload", VCPU_STAT(fpu_reload) },
 144         { "insn_emulation", VCPU_STAT(insn_emulation) },
 145         { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
 146         { "irq_injections", VCPU_STAT(irq_injections) },
 147         { "nmi_injections", VCPU_STAT(nmi_injections) },
 148         { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
 149         { "mmu_pte_write", VM_STAT(mmu_pte_write) },
 150         { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
 151         { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
 152         { "mmu_flooded", VM_STAT(mmu_flooded) },
 153         { "mmu_recycled", VM_STAT(mmu_recycled) },
 154         { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
 155         { "mmu_unsync", VM_STAT(mmu_unsync) },
 156         { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
 157         { "largepages", VM_STAT(lpages) },
 158         { NULL }
 159 };
 160
 161 u64 __read_mostly host_xcr0;
 162
 163 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt);
 164
 165 static int kvm_vcpu_reset(struct kvm_vcpu *vcpu);
 166
 167 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu *vcpu)
 168 {
 169         int i;
 170         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU); i++)
 171                 vcpu->arch.apf.gfns[i] = ~0;
 172 }
 173
 174 static void kvm_on_user_return(struct user_return_notifier *urn)
 175 {
 176         unsigned slot;
 177         struct kvm_shared_msrs *locals
 178                 = container_of(urn, struct kvm_shared_msrs, urn);
 179         struct kvm_shared_msr_values *values;
 180
 181         for (slot = 0; slot < shared_msrs_global.nr; ++slot) {
 182                 values = &locals->values[slot];
 183                 if (values->host != values->curr) {
 184                         wrmsrl(shared_msrs_global.msrs[slot], values->host);
 185                         values->curr = values->host;
 186                 }
 187         }
 188         locals->registered = false;
 189         user_return_notifier_unregister(urn);
 190 }
 191
 192 static void shared_msr_update(unsigned slot, u32 msr)
 193 {
 194         u64 value;
 195         unsigned int cpu = smp_processor_id();
 196         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 197
 198         /* only read, and nobody should modify it at this time,
 199          * so don't need lock */
 200         if (slot >= shared_msrs_global.nr) {
 201                 printk(KERN_ERR "kvm: invalid MSR slot!");
 202                 return;
 203         }
 204         rdmsrl_safe(msr, &value);
 205         smsr->values[slot].host = value;
 206         smsr->values[slot].curr = value;
 207 }
 208
 209 void kvm_define_shared_msr(unsigned slot, u32 msr)
 210 {
 211         if (slot >= shared_msrs_global.nr)
 212                 shared_msrs_global.nr = slot + 1;
 213         shared_msrs_global.msrs[slot] = msr;
 214         /* we need ensured the shared_msr_global have been updated */
 215         smp_wmb();
 216 }
 217 EXPORT_SYMBOL_GPL(kvm_define_shared_msr);
 218
 219 static void kvm_shared_msr_cpu_online(void)
 220 {
 221         unsigned i;
 222
 223         for (i = 0; i < shared_msrs_global.nr; ++i)
 224                 shared_msr_update(i, shared_msrs_global.msrs[i]);
 225 }
 226
 227 void kvm_set_shared_msr(unsigned slot, u64 value, u64 mask)
 228 {
 229         unsigned int cpu = smp_processor_id();
 230         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 231
 232         if (((value ^ smsr->values[slot].curr) & mask) == 0)
 233                 return;
 234         smsr->values[slot].curr = value;
 235         wrmsrl(shared_msrs_global.msrs[slot], value);
 236         if (!smsr->registered) {
 237                 smsr->urn.on_user_return = kvm_on_user_return;
 238                 user_return_notifier_register(&smsr->urn);
 239                 smsr->registered = true;
 240         }
 241 }
 242 EXPORT_SYMBOL_GPL(kvm_set_shared_msr);
 243
 244 static void drop_user_return_notifiers(void *ignore)
 245 {
 246         unsigned int cpu = smp_processor_id();
 247         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 248
 249         if (smsr->registered)
 250                 kvm_on_user_return(&smsr->urn);
 251 }
 252
 253 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
 254 {
 255         return vcpu->arch.apic_base;
 256 }
 257 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
 258
 259 void kvm_set_apic_base(struct kvm_vcpu *vcpu, u64 data)
 260 {
 261         /* TODO: reserve bits check */
 262         kvm_lapic_set_base(vcpu, data);
 263 }
 264 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
 265
 266 #define EXCPT_BENIGN            0
 267 #define EXCPT_CONTRIBUTORY      1
 268 #define EXCPT_PF                2
 269
 270 static int exception_class(int vector)
 271 {
 272         switch (vector) {
 273         case PF_VECTOR:
 274                 return EXCPT_PF;
 275         case DE_VECTOR:
 276         case TS_VECTOR:
 277         case NP_VECTOR:
 278         case SS_VECTOR:
 279         case GP_VECTOR:
 280                 return EXCPT_CONTRIBUTORY;
 281         default:
 282                 break;
 283         }
 284         return EXCPT_BENIGN;
 285 }
 286
 287 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
 288                 unsigned nr, bool has_error, u32 error_code,
 289                 bool reinject)
 290 {
 291         u32 prev_nr;
 292         int class1, class2;
 293
 294         kvm_make_request(KVM_REQ_EVENT, vcpu);
 295
 296         if (!vcpu->arch.exception.pending) {
 297         queue:
 298                 vcpu->arch.exception.pending = true;
 299                 vcpu->arch.exception.has_error_code = has_error;
 300                 vcpu->arch.exception.nr = nr;
 301                 vcpu->arch.exception.error_code = error_code;
 302                 vcpu->arch.exception.reinject = reinject;
 303                 return;
 304         }
 305
 306         /* to check exception */
 307         prev_nr = vcpu->arch.exception.nr;
 308         if (prev_nr == DF_VECTOR) {
 309                 /* triple fault -> shutdown */
 310                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
 311                 return;
 312         }
 313         class1 = exception_class(prev_nr);
 314         class2 = exception_class(nr);
 315         if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
 316                 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
 317                 /* generate double fault per SDM Table 5-5 */
 318                 vcpu->arch.exception.pending = true;
 319                 vcpu->arch.exception.has_error_code = true;
 320                 vcpu->arch.exception.nr = DF_VECTOR;
 321                 vcpu->arch.exception.error_code = 0;
 322         } else
 323                 /* replace previous exception with a new one in a hope
 324                    that instruction re-execution will regenerate lost
 325                    exception */
 326                 goto queue;
 327 }
 328
 329 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 330 {
 331         kvm_multiple_exception(vcpu, nr, false, 0, false);
 332 }
 333 EXPORT_SYMBOL_GPL(kvm_queue_exception);
 334
 335 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 336 {
 337         kvm_multiple_exception(vcpu, nr, false, 0, true);
 338 }
 339 EXPORT_SYMBOL_GPL(kvm_requeue_exception);
 340
 341 void kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err)
 342 {
 343         if (err)
 344                 kvm_inject_gp(vcpu, 0);
 345         else
 346                 kvm_x86_ops->skip_emulated_instruction(vcpu);
 347 }
 348 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp);
 349
 350 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 351 {
 352         ++vcpu->stat.pf_guest;
 353         vcpu->arch.cr2 = fault->address;
 354         kvm_queue_exception_e(vcpu, PF_VECTOR, fault->error_code);
 355 }
 356 EXPORT_SYMBOL_GPL(kvm_inject_page_fault);
 357
 358 void kvm_propagate_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 359 {
 360         if (mmu_is_nested(vcpu) && !fault->nested_page_fault)
 361                 vcpu->arch.nested_mmu.inject_page_fault(vcpu, fault);
 362         else
 363                 vcpu->arch.mmu.inject_page_fault(vcpu, fault);
 364 }
 365
 366 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
 367 {
 368         atomic_inc(&vcpu->arch.nmi_queued);
 369         kvm_make_request(KVM_REQ_NMI, vcpu);
 370 }
 371 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
 372
 373 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 374 {
 375         kvm_multiple_exception(vcpu, nr, true, error_code, false);
 376 }
 377 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
 378
 379 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 380 {
 381         kvm_multiple_exception(vcpu, nr, true, error_code, true);
 382 }
 383 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e);
 384
 385 /*
 386  * Checks if cpl <= required_cpl; if true, return true.  Otherwise queue
 387  * a #GP and return false.
 388  */
 389 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
 390 {
 391         if (kvm_x86_ops->get_cpl(vcpu) <= required_cpl)
 392                 return true;
 393         kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
 394         return false;
 395 }
 396 EXPORT_SYMBOL_GPL(kvm_require_cpl);
 397
 398 /*
 399  * This function will be used to read from the physical memory of the currently
 400  * running guest. The difference to kvm_read_guest_page is that this function
 401  * can read from guest physical or from the guest's guest physical memory.
 402  */
 403 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
 404                             gfn_t ngfn, void *data, int offset, int len,
 405                             u32 access)
 406 {
 407         gfn_t real_gfn;
 408         gpa_t ngpa;
 409
 410         ngpa     = gfn_to_gpa(ngfn);
 411         real_gfn = mmu->translate_gpa(vcpu, ngpa, access);
 412         if (real_gfn == UNMAPPED_GVA)
 413                 return -EFAULT;
 414
 415         real_gfn = gpa_to_gfn(real_gfn);
 416
 417         return kvm_read_guest_page(vcpu->kvm, real_gfn, data, offset, len);
 418 }
 419 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu);
 420
 421 int kvm_read_nested_guest_page(struct kvm_vcpu *vcpu, gfn_t gfn,
 422                                void *data, int offset, int len, u32 access)
 423 {
 424         return kvm_read_guest_page_mmu(vcpu, vcpu->arch.walk_mmu, gfn,
 425                                        data, offset, len, access);
 426 }
 427
 428 /*
 429  * Load the pae pdptrs.  Return true is they are all valid.
 430  */
 431 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3)
 432 {
 433         gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
 434         unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
 435         int i;
 436         int ret;
 437         u64 pdpte[ARRAY_SIZE(mmu->pdptrs)];
 438
 439         ret = kvm_read_guest_page_mmu(vcpu, mmu, pdpt_gfn, pdpte,
 440                                       offset * sizeof(u64), sizeof(pdpte),
 441                                       PFERR_USER_MASK|PFERR_WRITE_MASK);
 442         if (ret < 0) {
 443                 ret = 0;
 444                 goto out;
 445         }
 446         for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
 447                 if (is_present_gpte(pdpte[i]) &&
 448                     (pdpte[i] & vcpu->arch.mmu.rsvd_bits_mask[0][2])) {
 449                         ret = 0;
 450                         goto out;
 451                 }
 452         }
 453         ret = 1;
 454
 455         memcpy(mmu->pdptrs, pdpte, sizeof(mmu->pdptrs));
 456         __set_bit(VCPU_EXREG_PDPTR,
 457                   (unsigned long *)&vcpu->arch.regs_avail);
 458         __set_bit(VCPU_EXREG_PDPTR,
 459                   (unsigned long *)&vcpu->arch.regs_dirty);
 460 out:
 461
 462         return ret;
 463 }
 464 EXPORT_SYMBOL_GPL(load_pdptrs);
 465
 466 static bool pdptrs_changed(struct kvm_vcpu *vcpu)
 467 {
 468         u64 pdpte[ARRAY_SIZE(vcpu->arch.walk_mmu->pdptrs)];
 469         bool changed = true;
 470         int offset;
 471         gfn_t gfn;
 472         int r;
 473
 474         if (is_long_mode(vcpu) || !is_pae(vcpu))
 475                 return false;
 476
 477         if (!test_bit(VCPU_EXREG_PDPTR,
 478                       (unsigned long *)&vcpu->arch.regs_avail))
 479                 return true;
 480
 481         gfn = (kvm_read_cr3(vcpu) & ~31u) >> PAGE_SHIFT;
 482         offset = (kvm_read_cr3(vcpu) & ~31u) & (PAGE_SIZE - 1);
 483         r = kvm_read_nested_guest_page(vcpu, gfn, pdpte, offset, sizeof(pdpte),
 484                                        PFERR_USER_MASK | PFERR_WRITE_MASK);
 485         if (r < 0)
 486                 goto out;
 487         changed = memcmp(pdpte, vcpu->arch.walk_mmu->pdptrs, sizeof(pdpte)) != 0;
 488 out:
 489
 490         return changed;
 491 }
 492
 493 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
 494 {
 495         unsigned long old_cr0 = kvm_read_cr0(vcpu);
 496         unsigned long update_bits = X86_CR0_PG | X86_CR0_WP |
 497                                     X86_CR0_CD | X86_CR0_NW;
 498
 499         cr0 |= X86_CR0_ET;
 500
 501 #ifdef CONFIG_X86_64
 502         if (cr0 & 0xffffffff00000000UL)
 503                 return 1;
 504 #endif
 505
 506         cr0 &= ~CR0_RESERVED_BITS;
 507
 508         if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD))
 509                 return 1;
 510
 511         if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE))
 512                 return 1;
 513
 514         if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
 515 #ifdef CONFIG_X86_64
 516                 if ((vcpu->arch.efer & EFER_LME)) {
 517                         int cs_db, cs_l;
 518
 519                         if (!is_pae(vcpu))
 520                                 return 1;
 521                         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
 522                         if (cs_l)
 523                                 return 1;
 524                 } else
 525 #endif
 526                 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 527                                                  kvm_read_cr3(vcpu)))
 528                         return 1;
 529         }
 530
 531         if (!(cr0 & X86_CR0_PG) && kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE))
 532                 return 1;
 533
 534         kvm_x86_ops->set_cr0(vcpu, cr0);
 535
 536         if ((cr0 ^ old_cr0) & X86_CR0_PG) {
 537                 kvm_clear_async_pf_completion_queue(vcpu);
 538                 kvm_async_pf_hash_reset(vcpu);
 539         }
 540
 541         if ((cr0 ^ old_cr0) & update_bits)
 542                 kvm_mmu_reset_context(vcpu);
 543         return 0;
 544 }
 545 EXPORT_SYMBOL_GPL(kvm_set_cr0);
 546
 547 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
 548 {
 549         (void)kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0eul) | (msw & 0x0f));
 550 }
 551 EXPORT_SYMBOL_GPL(kvm_lmsw);
 552
 553 int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 554 {
 555         u64 xcr0;
 556
 557         /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now  */
 558         if (index != XCR_XFEATURE_ENABLED_MASK)
 559                 return 1;
 560         xcr0 = xcr;
 561         if (kvm_x86_ops->get_cpl(vcpu) != 0)
 562                 return 1;
 563         if (!(xcr0 & XSTATE_FP))
 564                 return 1;
 565         if ((xcr0 & XSTATE_YMM) && !(xcr0 & XSTATE_SSE))
 566                 return 1;
 567         if (xcr0 & ~host_xcr0)
 568                 return 1;
 569         vcpu->arch.xcr0 = xcr0;
 570         vcpu->guest_xcr0_loaded = 0;
 571         return 0;
 572 }
 573
 574 int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 575 {
 576         if (__kvm_set_xcr(vcpu, index, xcr)) {
 577                 kvm_inject_gp(vcpu, 0);
 578                 return 1;
 579         }
 580         return 0;
 581 }
 582 EXPORT_SYMBOL_GPL(kvm_set_xcr);
 583
 584 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
 585 {
 586         unsigned long old_cr4 = kvm_read_cr4(vcpu);
 587         unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE |
 588                                    X86_CR4_PAE | X86_CR4_SMEP;
 589         if (cr4 & CR4_RESERVED_BITS)
 590                 return 1;
 591
 592         if (!guest_cpuid_has_xsave(vcpu) && (cr4 & X86_CR4_OSXSAVE))
 593                 return 1;
 594
 595         if (!guest_cpuid_has_smep(vcpu) && (cr4 & X86_CR4_SMEP))
 596                 return 1;
 597
 598         if (!guest_cpuid_has_fsgsbase(vcpu) && (cr4 & X86_CR4_RDWRGSFS))
 599                 return 1;
 600
 601         if (is_long_mode(vcpu)) {
 602                 if (!(cr4 & X86_CR4_PAE))
 603                         return 1;
 604         } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
 605                    && ((cr4 ^ old_cr4) & pdptr_bits)
 606                    && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 607                                    kvm_read_cr3(vcpu)))
 608                 return 1;
 609
 610         if ((cr4 & X86_CR4_PCIDE) && !(old_cr4 & X86_CR4_PCIDE)) {
 611                 if (!guest_cpuid_has_pcid(vcpu))
 612                         return 1;
 613
 614                 /* PCID can not be enabled when cr3[11:0]!=000H or EFER.LMA=0 */
 615                 if ((kvm_read_cr3(vcpu) & X86_CR3_PCID_MASK) || !is_long_mode(vcpu))
 616                         return 1;
 617         }
 618
 619         if (kvm_x86_ops->set_cr4(vcpu, cr4))
 620                 return 1;
 621
 622         if (((cr4 ^ old_cr4) & pdptr_bits) ||
 623             (!(cr4 & X86_CR4_PCIDE) && (old_cr4 & X86_CR4_PCIDE)))
 624                 kvm_mmu_reset_context(vcpu);
 625
 626         if ((cr4 ^ old_cr4) & X86_CR4_OSXSAVE)
 627                 kvm_update_cpuid(vcpu);
 628
 629         return 0;
 630 }
 631 EXPORT_SYMBOL_GPL(kvm_set_cr4);
 632
 633 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
 634 {
 635         if (cr3 == kvm_read_cr3(vcpu) && !pdptrs_changed(vcpu)) {
 636                 kvm_mmu_sync_roots(vcpu);
 637                 kvm_mmu_flush_tlb(vcpu);
 638                 return 0;
 639         }
 640
 641         if (is_long_mode(vcpu)) {
 642                 if (kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE)) {
 643                         if (cr3 & CR3_PCID_ENABLED_RESERVED_BITS)
 644                                 return 1;
 645                 } else
 646                         if (cr3 & CR3_L_MODE_RESERVED_BITS)
 647                                 return 1;
 648         } else {
 649                 if (is_pae(vcpu)) {
 650                         if (cr3 & CR3_PAE_RESERVED_BITS)
 651                                 return 1;
 652                         if (is_paging(vcpu) &&
 653                             !load_pdptrs(vcpu, vcpu->arch.walk_mmu, cr3))
 654                                 return 1;
 655                 }
 656                 /*
 657                  * We don't check reserved bits in nonpae mode, because
 658                  * this isn't enforced, and VMware depends on this.
 659                  */
 660         }
 661
 662         /*
 663          * Does the new cr3 value map to physical memory? (Note, we
 664          * catch an invalid cr3 even in real-mode, because it would
 665          * cause trouble later on when we turn on paging anyway.)
 666          *
 667          * A real CPU would silently accept an invalid cr3 and would
 668          * attempt to use it - with largely undefined (and often hard
 669          * to debug) behavior on the guest side.
 670          */
 671         if (unlikely(!gfn_to_memslot(vcpu->kvm, cr3 >> PAGE_SHIFT)))
 672                 return 1;
 673         vcpu->arch.cr3 = cr3;
 674         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
 675         vcpu->arch.mmu.new_cr3(vcpu);
 676         return 0;
 677 }
 678 EXPORT_SYMBOL_GPL(kvm_set_cr3);
 679
 680 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
 681 {
 682         if (cr8 & CR8_RESERVED_BITS)
 683                 return 1;
 684         if (irqchip_in_kernel(vcpu->kvm))
 685                 kvm_lapic_set_tpr(vcpu, cr8);
 686         else
 687                 vcpu->arch.cr8 = cr8;
 688         return 0;
 689 }
 690 EXPORT_SYMBOL_GPL(kvm_set_cr8);
 691
 692 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
 693 {
 694         if (irqchip_in_kernel(vcpu->kvm))
 695                 return kvm_lapic_get_cr8(vcpu);
 696         else
 697                 return vcpu->arch.cr8;
 698 }
 699 EXPORT_SYMBOL_GPL(kvm_get_cr8);
 700
 701 static void kvm_update_dr7(struct kvm_vcpu *vcpu)
 702 {
 703         unsigned long dr7;
 704
 705         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
 706                 dr7 = vcpu->arch.guest_debug_dr7;
 707         else
 708                 dr7 = vcpu->arch.dr7;
 709         kvm_x86_ops->set_dr7(vcpu, dr7);
 710         vcpu->arch.switch_db_regs = (dr7 & DR7_BP_EN_MASK);
 711 }
 712
 713 static int __kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
 714 {
 715         switch (dr) {
 716         case 0 ... 3:
 717                 vcpu->arch.db[dr] = val;
 718                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
 719                         vcpu->arch.eff_db[dr] = val;
 720                 break;
 721         case 4:
 722                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 723                         return 1; /* #UD */
 724                 /* fall through */
 725         case 6:
 726                 if (val & 0xffffffff00000000ULL)
 727                         return -1; /* #GP */
 728                 vcpu->arch.dr6 = (val & DR6_VOLATILE) | DR6_FIXED_1;
 729                 break;
 730         case 5:
 731                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 732                         return 1; /* #UD */
 733                 /* fall through */
 734         default: /* 7 */
 735                 if (val & 0xffffffff00000000ULL)
 736                         return -1; /* #GP */
 737                 vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
 738                 kvm_update_dr7(vcpu);
 739                 break;
 740         }
 741
 742         return 0;
 743 }
 744
 745 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
 746 {
 747         int res;
 748
 749         res = __kvm_set_dr(vcpu, dr, val);
 750         if (res > 0)
 751                 kvm_queue_exception(vcpu, UD_VECTOR);
 752         else if (res < 0)
 753                 kvm_inject_gp(vcpu, 0);
 754
 755         return res;
 756 }
 757 EXPORT_SYMBOL_GPL(kvm_set_dr);
 758
 759 static int _kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
 760 {
 761         switch (dr) {
 762         case 0 ... 3:
 763                 *val = vcpu->arch.db[dr];
 764                 break;
 765         case 4:
 766                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 767                         return 1;
 768                 /* fall through */
 769         case 6:
 770                 *val = vcpu->arch.dr6;
 771                 break;
 772         case 5:
 773                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 774                         return 1;
 775                 /* fall through */
 776         default: /* 7 */
 777                 *val = vcpu->arch.dr7;
 778                 break;
 779         }
 780
 781         return 0;
 782 }
 783
 784 int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
 785 {
 786         if (_kvm_get_dr(vcpu, dr, val)) {
 787                 kvm_queue_exception(vcpu, UD_VECTOR);
 788                 return 1;
 789         }
 790         return 0;
 791 }
 792 EXPORT_SYMBOL_GPL(kvm_get_dr);
 793
 794 bool kvm_rdpmc(struct kvm_vcpu *vcpu)
 795 {
 796         u32 ecx = kvm_register_read(vcpu, VCPU_REGS_RCX);
 797         u64 data;
 798         int err;
 799
 800         err = kvm_pmu_read_pmc(vcpu, ecx, &data);
 801         if (err)
 802                 return err;
 803         kvm_register_write(vcpu, VCPU_REGS_RAX, (u32)data);
 804         kvm_register_write(vcpu, VCPU_REGS_RDX, data >> 32);
 805         return err;
 806 }
 807 EXPORT_SYMBOL_GPL(kvm_rdpmc);
 808
 809 /*
 810  * List of msr numbers which we expose to userspace through KVM_GET_MSRS
 811  * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
 812  *
 813  * This list is modified at module load time to reflect the
 814  * capabilities of the host cpu. This capabilities test skips MSRs that are
 815  * kvm-specific. Those are put in the beginning of the list.
 816  */
 817
 818 #define KVM_SAVE_MSRS_BEGIN     10
 819 static u32 msrs_to_save[] = {
 820         MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
 821         MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
 822         HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
 823         HV_X64_MSR_APIC_ASSIST_PAGE, MSR_KVM_ASYNC_PF_EN, MSR_KVM_STEAL_TIME,
 824         MSR_KVM_PV_EOI_EN,
 825         MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
 826         MSR_STAR,
 827 #ifdef CONFIG_X86_64
 828         MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
 829 #endif
 830         MSR_IA32_TSC, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA
 831 };
 832
 833 static unsigned num_msrs_to_save;
 834
 835 static const u32 emulated_msrs[] = {
 836         MSR_IA32_TSC_ADJUST,
 837         MSR_IA32_TSCDEADLINE,
 838         MSR_IA32_MISC_ENABLE,
 839         MSR_IA32_MCG_STATUS,
 840         MSR_IA32_MCG_CTL,
 841 };
 842
 843 static int set_efer(struct kvm_vcpu *vcpu, u64 efer)
 844 {
 845         u64 old_efer = vcpu->arch.efer;
 846
 847         if (efer & efer_reserved_bits)
 848                 return 1;
 849
 850         if (is_paging(vcpu)
 851             && (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME))
 852                 return 1;
 853
 854         if (efer & EFER_FFXSR) {
 855                 struct kvm_cpuid_entry2 *feat;
 856
 857                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
 858                 if (!feat || !(feat->edx & bit(X86_FEATURE_FXSR_OPT)))
 859                         return 1;
 860         }
 861
 862         if (efer & EFER_SVME) {
 863                 struct kvm_cpuid_entry2 *feat;
 864
 865                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
 866                 if (!feat || !(feat->ecx & bit(X86_FEATURE_SVM)))
 867                         return 1;
 868         }
 869
 870         efer &= ~EFER_LMA;
 871         efer |= vcpu->arch.efer & EFER_LMA;
 872
 873         kvm_x86_ops->set_efer(vcpu, efer);
 874
 875         vcpu->arch.mmu.base_role.nxe = (efer & EFER_NX) && !tdp_enabled;
 876
 877         /* Update reserved bits */
 878         if ((efer ^ old_efer) & EFER_NX)
 879                 kvm_mmu_reset_context(vcpu);
 880
 881         return 0;
 882 }
 883
 884 void kvm_enable_efer_bits(u64 mask)
 885 {
 886        efer_reserved_bits &= ~mask;
 887 }
 888 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
 889
 890
 891 /*
 892  * Writes msr value into into the appropriate "register".
 893  * Returns 0 on success, non-0 otherwise.
 894  * Assumes vcpu_load() was already called.
 895  */
 896 int kvm_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr)
 897 {
 898         return kvm_x86_ops->set_msr(vcpu, msr);
 899 }
 900
 901 /*
 902  * Adapt set_msr() to msr_io()'s calling convention
 903  */
 904 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
 905 {
 906         struct msr_data msr;
 907
 908         msr.data = *data;
 909         msr.index = index;
 910         msr.host_initiated = true;
 911         return kvm_set_msr(vcpu, &msr);
 912 }
 913
 914 #ifdef CONFIG_X86_64
 915 struct pvclock_gtod_data {
 916         seqcount_t      seq;
 917
 918         struct { /* extract of a clocksource struct */
 919                 int vclock_mode;
 920                 cycle_t cycle_last;
 921                 cycle_t mask;
 922                 u32     mult;
 923                 u32     shift;
 924         } clock;
 925
 926         /* open coded 'struct timespec' */
 927         u64             monotonic_time_snsec;
 928         time_t          monotonic_time_sec;
 929 };
 930
 931 static struct pvclock_gtod_data pvclock_gtod_data;
 932
 933 static void update_pvclock_gtod(struct timekeeper *tk)
 934 {
 935         struct pvclock_gtod_data *vdata = &pvclock_gtod_data;
 936
 937         write_seqcount_begin(&vdata->seq);
 938
 939         /* copy pvclock gtod data */
 940         vdata->clock.vclock_mode        = tk->clock->archdata.vclock_mode;
 941         vdata->clock.cycle_last         = tk->clock->cycle_last;
 942         vdata->clock.mask               = tk->clock->mask;
 943         vdata->clock.mult               = tk->mult;
 944         vdata->clock.shift              = tk->shift;
 945
 946         vdata->monotonic_time_sec       = tk->xtime_sec
 947                                         + tk->wall_to_monotonic.tv_sec;
 948         vdata->monotonic_time_snsec     = tk->xtime_nsec
 949                                         + (tk->wall_to_monotonic.tv_nsec
 950                                                 << tk->shift);
 951         while (vdata->monotonic_time_snsec >=
 952                                         (((u64)NSEC_PER_SEC) << tk->shift)) {
 953                 vdata->monotonic_time_snsec -=
 954                                         ((u64)NSEC_PER_SEC) << tk->shift;
 955                 vdata->monotonic_time_sec++;
 956         }
 957
 958         write_seqcount_end(&vdata->seq);
 959 }
 960 #endif
 961
 962
 963 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
 964 {
 965         int version;
 966         int r;
 967         struct pvclock_wall_clock wc;
 968         struct timespec boot;
 969
 970         if (!wall_clock)
 971                 return;
 972
 973         r = kvm_read_guest(kvm, wall_clock, &version, sizeof(version));
 974         if (r)
 975                 return;
 976
 977         if (version & 1)
 978                 ++version;  /* first time write, random junk */
 979
 980         ++version;
 981
 982         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
 983
 984         /*
 985          * The guest calculates current wall clock time by adding
 986          * system time (updated by kvm_guest_time_update below) to the
 987          * wall clock specified here.  guest system time equals host
 988          * system time for us, thus we must fill in host boot time here.
 989          */
 990         getboottime(&boot);
 991
 992         if (kvm->arch.kvmclock_offset) {
 993                 struct timespec ts = ns_to_timespec(kvm->arch.kvmclock_offset);
 994                 boot = timespec_sub(boot, ts);
 995         }
 996         wc.sec = boot.tv_sec;
 997         wc.nsec = boot.tv_nsec;
 998         wc.version = version;
 999
1000         kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
1001
1002         version++;
1003         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
1004 }
1005
1006 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
1007 {
1008         uint32_t quotient, remainder;
1009
1010         /* Don't try to replace with do_div(), this one calculates
1011          * "(dividend << 32) / divisor" */
1012         __asm__ ( "divl %4"
1013                   : "=a" (quotient), "=d" (remainder)
1014                   : "0" (0), "1" (dividend), "r" (divisor) );
1015         return quotient;
1016 }
1017
1018 static void kvm_get_time_scale(uint32_t scaled_khz, uint32_t base_khz,
1019                                s8 *pshift, u32 *pmultiplier)
1020 {
1021         uint64_t scaled64;
1022         int32_t  shift = 0;
1023         uint64_t tps64;
1024         uint32_t tps32;
1025
1026         tps64 = base_khz * 1000LL;
1027         scaled64 = scaled_khz * 1000LL;
1028         while (tps64 > scaled64*2 || tps64 & 0xffffffff00000000ULL) {
1029                 tps64 >>= 1;
1030                 shift--;
1031         }
1032
1033         tps32 = (uint32_t)tps64;
1034         while (tps32 <= scaled64 || scaled64 & 0xffffffff00000000ULL) {
1035                 if (scaled64 & 0xffffffff00000000ULL || tps32 & 0x80000000)
1036                         scaled64 >>= 1;
1037                 else
1038                         tps32 <<= 1;
1039                 shift++;
1040         }
1041
1042         *pshift = shift;
1043         *pmultiplier = div_frac(scaled64, tps32);
1044
1045         pr_debug("%s: base_khz %u => %u, shift %d, mul %u\n",
1046                  __func__, base_khz, scaled_khz, shift, *pmultiplier);
1047 }
1048
1049 static inline u64 get_kernel_ns(void)
1050 {
1051         struct timespec ts;
1052
1053         WARN_ON(preemptible());
1054         ktime_get_ts(&ts);
1055         monotonic_to_bootbased(&ts);
1056         return timespec_to_ns(&ts);
1057 }
1058
1059 #ifdef CONFIG_X86_64
1060 static atomic_t kvm_guest_has_master_clock = ATOMIC_INIT(0);
1061 #endif
1062
1063 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
1064 unsigned long max_tsc_khz;
1065
1066 static inline u64 nsec_to_cycles(struct kvm_vcpu *vcpu, u64 nsec)
1067 {
1068         return pvclock_scale_delta(nsec, vcpu->arch.virtual_tsc_mult,
1069                                    vcpu->arch.virtual_tsc_shift);
1070 }
1071
1072 static u32 adjust_tsc_khz(u32 khz, s32 ppm)
1073 {
1074         u64 v = (u64)khz * (1000000 + ppm);
1075         do_div(v, 1000000);
1076         return v;
1077 }
1078
1079 static void kvm_set_tsc_khz(struct kvm_vcpu *vcpu, u32 this_tsc_khz)
1080 {
1081         u32 thresh_lo, thresh_hi;
1082         int use_scaling = 0;
1083
1084         /* Compute a scale to convert nanoseconds in TSC cycles */
1085         kvm_get_time_scale(this_tsc_khz, NSEC_PER_SEC / 1000,
1086                            &vcpu->arch.virtual_tsc_shift,
1087                            &vcpu->arch.virtual_tsc_mult);
1088         vcpu->arch.virtual_tsc_khz = this_tsc_khz;
1089
1090         /*
1091          * Compute the variation in TSC rate which is acceptable
1092          * within the range of tolerance and decide if the
1093          * rate being applied is within that bounds of the hardware
1094          * rate.  If so, no scaling or compensation need be done.
1095          */
1096         thresh_lo = adjust_tsc_khz(tsc_khz, -tsc_tolerance_ppm);
1097         thresh_hi = adjust_tsc_khz(tsc_khz, tsc_tolerance_ppm);
1098         if (this_tsc_khz < thresh_lo || this_tsc_khz > thresh_hi) {
1099                 pr_debug("kvm: requested TSC rate %u falls outside tolerance [%u,%u]\n", this_tsc_khz, thresh_lo, thresh_hi);
1100                 use_scaling = 1;
1101         }
1102         kvm_x86_ops->set_tsc_khz(vcpu, this_tsc_khz, use_scaling);
1103 }
1104
1105 static u64 compute_guest_tsc(struct kvm_vcpu *vcpu, s64 kernel_ns)
1106 {
1107         u64 tsc = pvclock_scale_delta(kernel_ns-vcpu->arch.this_tsc_nsec,
1108                                       vcpu->arch.virtual_tsc_mult,
1109                                       vcpu->arch.virtual_tsc_shift);
1110         tsc += vcpu->arch.this_tsc_write;
1111         return tsc;
1112 }
1113
1114 void kvm_track_tsc_matching(struct kvm_vcpu *vcpu)
1115 {
1116 #ifdef CONFIG_X86_64
1117         bool vcpus_matched;
1118         bool do_request = false;
1119         struct kvm_arch *ka = &vcpu->kvm->arch;
1120         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1121
1122         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
1123                          atomic_read(&vcpu->kvm->online_vcpus));
1124
1125         if (vcpus_matched && gtod->clock.vclock_mode == VCLOCK_TSC)
1126                 if (!ka->use_master_clock)
1127                         do_request = 1;
1128
1129         if (!vcpus_matched && ka->use_master_clock)
1130                         do_request = 1;
1131
1132         if (do_request)
1133                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
1134
1135         trace_kvm_track_tsc(vcpu->vcpu_id, ka->nr_vcpus_matched_tsc,
1136                             atomic_read(&vcpu->kvm->online_vcpus),
1137                             ka->use_master_clock, gtod->clock.vclock_mode);
1138 #endif
1139 }
1140
1141 static void update_ia32_tsc_adjust_msr(struct kvm_vcpu *vcpu, s64 offset)
1142 {
1143         u64 curr_offset = kvm_x86_ops->read_tsc_offset(vcpu);
1144         vcpu->arch.ia32_tsc_adjust_msr += offset - curr_offset;
1145 }
1146
1147 void kvm_write_tsc(struct kvm_vcpu *vcpu, struct msr_data *msr)
1148 {
1149         struct kvm *kvm = vcpu->kvm;
1150         u64 offset, ns, elapsed;
1151         unsigned long flags;
1152         s64 usdiff;
1153         bool matched;
1154         u64 data = msr->data;
1155
1156         raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
1157         offset = kvm_x86_ops->compute_tsc_offset(vcpu, data);
1158         ns = get_kernel_ns();
1159         elapsed = ns - kvm->arch.last_tsc_nsec;
1160
1161         /* n.b - signed multiplication and division required */
1162         usdiff = data - kvm->arch.last_tsc_write;
1163 #ifdef CONFIG_X86_64
1164         usdiff = (usdiff * 1000) / vcpu->arch.virtual_tsc_khz;
1165 #else
1166         /* do_div() only does unsigned */
1167         asm("idivl %2; xor %%edx, %%edx"
1168             : "=A"(usdiff)
1169             : "A"(usdiff * 1000), "rm"(vcpu->arch.virtual_tsc_khz));
1170 #endif
1171         do_div(elapsed, 1000);
1172         usdiff -= elapsed;
1173         if (usdiff < 0)
1174                 usdiff = -usdiff;
1175
1176         /*
1177          * Special case: TSC write with a small delta (1 second) of virtual
1178          * cycle time against real time is interpreted as an attempt to
1179          * synchronize the CPU.
1180          *
1181          * For a reliable TSC, we can match TSC offsets, and for an unstable
1182          * TSC, we add elapsed time in this computation.  We could let the
1183          * compensation code attempt to catch up if we fall behind, but
1184          * it's better to try to match offsets from the beginning.
1185          */
1186         if (usdiff < USEC_PER_SEC &&
1187             vcpu->arch.virtual_tsc_khz == kvm->arch.last_tsc_khz) {
1188                 if (!check_tsc_unstable()) {
1189                         offset = kvm->arch.cur_tsc_offset;
1190                         pr_debug("kvm: matched tsc offset for %llu\n", data);
1191                 } else {
1192                         u64 delta = nsec_to_cycles(vcpu, elapsed);
1193                         data += delta;
1194                         offset = kvm_x86_ops->compute_tsc_offset(vcpu, data);
1195                         pr_debug("kvm: adjusted tsc offset by %llu\n", delta);
1196                 }
1197                 matched = true;
1198         } else {
1199                 /*
1200                  * We split periods of matched TSC writes into generations.
1201                  * For each generation, we track the original measured
1202                  * nanosecond time, offset, and write, so if TSCs are in
1203                  * sync, we can match exact offset, and if not, we can match
1204                  * exact software computation in compute_guest_tsc()
1205                  *
1206                  * These values are tracked in kvm->arch.cur_xxx variables.
1207                  */
1208                 kvm->arch.cur_tsc_generation++;
1209                 kvm->arch.cur_tsc_nsec = ns;
1210                 kvm->arch.cur_tsc_write = data;
1211                 kvm->arch.cur_tsc_offset = offset;
1212                 matched = false;
1213                 pr_debug("kvm: new tsc generation %u, clock %llu\n",
1214                          kvm->arch.cur_tsc_generation, data);
1215         }
1216
1217         /*
1218          * We also track th most recent recorded KHZ, write and time to
1219          * allow the matching interval to be extended at each write.
1220          */
1221         kvm->arch.last_tsc_nsec = ns;
1222         kvm->arch.last_tsc_write = data;
1223         kvm->arch.last_tsc_khz = vcpu->arch.virtual_tsc_khz;
1224
1225         /* Reset of TSC must disable overshoot protection below */
1226         vcpu->arch.hv_clock.tsc_timestamp = 0;
1227         vcpu->arch.last_guest_tsc = data;
1228
1229         /* Keep track of which generation this VCPU has synchronized to */
1230         vcpu->arch.this_tsc_generation = kvm->arch.cur_tsc_generation;
1231         vcpu->arch.this_tsc_nsec = kvm->arch.cur_tsc_nsec;
1232         vcpu->arch.this_tsc_write = kvm->arch.cur_tsc_write;
1233
1234         if (guest_cpuid_has_tsc_adjust(vcpu) && !msr->host_initiated)
1235                 update_ia32_tsc_adjust_msr(vcpu, offset);
1236         kvm_x86_ops->write_tsc_offset(vcpu, offset);
1237         raw_spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
1238
1239         spin_lock(&kvm->arch.pvclock_gtod_sync_lock);
1240         if (matched)
1241                 kvm->arch.nr_vcpus_matched_tsc++;
1242         else
1243                 kvm->arch.nr_vcpus_matched_tsc = 0;
1244
1245         kvm_track_tsc_matching(vcpu);
1246         spin_unlock(&kvm->arch.pvclock_gtod_sync_lock);
1247 }
1248
1249 EXPORT_SYMBOL_GPL(kvm_write_tsc);
1250
1251 #ifdef CONFIG_X86_64
1252
1253 static cycle_t read_tsc(void)
1254 {
1255         cycle_t ret;
1256         u64 last;
1257
1258         /*
1259          * Empirically, a fence (of type that depends on the CPU)
1260          * before rdtsc is enough to ensure that rdtsc is ordered
1261          * with respect to loads.  The various CPU manuals are unclear
1262          * as to whether rdtsc can be reordered with later loads,
1263          * but no one has ever seen it happen.
1264          */
1265         rdtsc_barrier();
1266         ret = (cycle_t)vget_cycles();
1267
1268         last = pvclock_gtod_data.clock.cycle_last;
1269
1270         if (likely(ret >= last))
1271                 return ret;
1272
1273         /*
1274          * GCC likes to generate cmov here, but this branch is extremely
1275          * predictable (it's just a funciton of time and the likely is
1276          * very likely) and there's a data dependence, so force GCC
1277          * to generate a branch instead.  I don't barrier() because
1278          * we don't actually need a barrier, and if this function
1279          * ever gets inlined it will generate worse code.
1280          */
1281         asm volatile ("");
1282         return last;
1283 }
1284
1285 static inline u64 vgettsc(cycle_t *cycle_now)
1286 {
1287         long v;
1288         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1289
1290         *cycle_now = read_tsc();
1291
1292         v = (*cycle_now - gtod->clock.cycle_last) & gtod->clock.mask;
1293         return v * gtod->clock.mult;
1294 }
1295
1296 static int do_monotonic(struct timespec *ts, cycle_t *cycle_now)
1297 {
1298         unsigned long seq;
1299         u64 ns;
1300         int mode;
1301         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1302
1303         ts->tv_nsec = 0;
1304         do {
1305                 seq = read_seqcount_begin(&gtod->seq);
1306                 mode = gtod->clock.vclock_mode;
1307                 ts->tv_sec = gtod->monotonic_time_sec;
1308                 ns = gtod->monotonic_time_snsec;
1309                 ns += vgettsc(cycle_now);
1310                 ns >>= gtod->clock.shift;
1311         } while (unlikely(read_seqcount_retry(&gtod->seq, seq)));
1312         timespec_add_ns(ts, ns);
1313
1314         return mode;
1315 }
1316
1317 /* returns true if host is using tsc clocksource */
1318 static bool kvm_get_time_and_clockread(s64 *kernel_ns, cycle_t *cycle_now)
1319 {
1320         struct timespec ts;
1321
1322         /* checked again under seqlock below */
1323         if (pvclock_gtod_data.clock.vclock_mode != VCLOCK_TSC)
1324                 return false;
1325
1326         if (do_monotonic(&ts, cycle_now) != VCLOCK_TSC)
1327                 return false;
1328
1329         monotonic_to_bootbased(&ts);
1330         *kernel_ns = timespec_to_ns(&ts);
1331
1332         return true;
1333 }
1334 #endif
1335
1336 /*
1337  *
1338  * Assuming a stable TSC across physical CPUS, and a stable TSC
1339  * across virtual CPUs, the following condition is possible.
1340  * Each numbered line represents an event visible to both
1341  * CPUs at the next numbered event.
1342  *
1343  * "timespecX" represents host monotonic time. "tscX" represents
1344  * RDTSC value.
1345  *
1346  *              VCPU0 on CPU0           |       VCPU1 on CPU1
1347  *
1348  * 1.  read timespec0,tsc0
1349  * 2.                                   | timespec1 = timespec0 + N
1350  *                                      | tsc1 = tsc0 + M
1351  * 3. transition to guest               | transition to guest
1352  * 4. ret0 = timespec0 + (rdtsc - tsc0) |
1353  * 5.                                   | ret1 = timespec1 + (rdtsc - tsc1)
1354  *                                      | ret1 = timespec0 + N + (rdtsc - (tsc0 + M))
1355  *
1356  * Since ret0 update is visible to VCPU1 at time 5, to obey monotonicity:
1357  *
1358  *      - ret0 < ret1
1359  *      - timespec0 + (rdtsc - tsc0) < timespec0 + N + (rdtsc - (tsc0 + M))
1360  *              ...
1361  *      - 0 < N - M => M < N
1362  *
1363  * That is, when timespec0 != timespec1, M < N. Unfortunately that is not
1364  * always the case (the difference between two distinct xtime instances
1365  * might be smaller then the difference between corresponding TSC reads,
1366  * when updating guest vcpus pvclock areas).
1367  *
1368  * To avoid that problem, do not allow visibility of distinct
1369  * system_timestamp/tsc_timestamp values simultaneously: use a master
1370  * copy of host monotonic time values. Update that master copy
1371  * in lockstep.
1372  *
1373  * Rely on synchronization of host TSCs and guest TSCs for monotonicity.
1374  *
1375  */
1376
1377 static void pvclock_update_vm_gtod_copy(struct kvm *kvm)
1378 {
1379 #ifdef CONFIG_X86_64
1380         struct kvm_arch *ka = &kvm->arch;
1381         int vclock_mode;
1382         bool host_tsc_clocksource, vcpus_matched;
1383
1384         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
1385                         atomic_read(&kvm->online_vcpus));
1386
1387         /*
1388          * If the host uses TSC clock, then passthrough TSC as stable
1389          * to the guest.
1390          */
1391         host_tsc_clocksource = kvm_get_time_and_clockread(
1392                                         &ka->master_kernel_ns,
1393                                         &ka->master_cycle_now);
1394
1395         ka->use_master_clock = host_tsc_clocksource & vcpus_matched;
1396
1397         if (ka->use_master_clock)
1398                 atomic_set(&kvm_guest_has_master_clock, 1);
1399
1400         vclock_mode = pvclock_gtod_data.clock.vclock_mode;
1401         trace_kvm_update_master_clock(ka->use_master_clock, vclock_mode,
1402                                         vcpus_matched);
1403 #endif
1404 }
1405
1406 static int kvm_guest_time_update(struct kvm_vcpu *v)
1407 {
1408         unsigned long flags, this_tsc_khz;
1409         struct kvm_vcpu_arch *vcpu = &v->arch;
1410         struct kvm_arch *ka = &v->kvm->arch;
1411         void *shared_kaddr;
1412         s64 kernel_ns, max_kernel_ns;
1413         u64 tsc_timestamp, host_tsc;
1414         struct pvclock_vcpu_time_info *guest_hv_clock;
1415         u8 pvclock_flags;
1416         bool use_master_clock;
1417
1418         kernel_ns = 0;
1419         host_tsc = 0;
1420
1421         /* Keep irq disabled to prevent changes to the clock */
1422         local_irq_save(flags);
1423         this_tsc_khz = __get_cpu_var(cpu_tsc_khz);
1424         if (unlikely(this_tsc_khz == 0)) {
1425                 local_irq_restore(flags);
1426                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
1427                 return 1;
1428         }
1429
1430         /*
1431          * If the host uses TSC clock, then passthrough TSC as stable
1432          * to the guest.
1433          */
1434         spin_lock(&ka->pvclock_gtod_sync_lock);
1435         use_master_clock = ka->use_master_clock;
1436         if (use_master_clock) {
1437                 host_tsc = ka->master_cycle_now;
1438                 kernel_ns = ka->master_kernel_ns;
1439         }
1440         spin_unlock(&ka->pvclock_gtod_sync_lock);
1441         if (!use_master_clock) {
1442                 host_tsc = native_read_tsc();
1443                 kernel_ns = get_kernel_ns();
1444         }
1445
1446         tsc_timestamp = kvm_x86_ops->read_l1_tsc(v, host_tsc);
1447
1448         /*
1449          * We may have to catch up the TSC to match elapsed wall clock
1450          * time for two reasons, even if kvmclock is used.
1451          *   1) CPU could have been running below the maximum TSC rate
1452          *   2) Broken TSC compensation resets the base at each VCPU
1453          *      entry to avoid unknown leaps of TSC even when running
1454          *      again on the same CPU.  This may cause apparent elapsed
1455          *      time to disappear, and the guest to stand still or run
1456          *      very slowly.
1457          */
1458         if (vcpu->tsc_catchup) {
1459                 u64 tsc = compute_guest_tsc(v, kernel_ns);
1460                 if (tsc > tsc_timestamp) {
1461                         adjust_tsc_offset_guest(v, tsc - tsc_timestamp);
1462                         tsc_timestamp = tsc;
1463                 }
1464         }
1465
1466         local_irq_restore(flags);
1467
1468         if (!vcpu->time_page)
1469                 return 0;
1470
1471         /*
1472          * Time as measured by the TSC may go backwards when resetting the base
1473          * tsc_timestamp.  The reason for this is that the TSC resolution is
1474          * higher than the resolution of the other clock scales.  Thus, many
1475          * possible measurments of the TSC correspond to one measurement of any
1476          * other clock, and so a spread of values is possible.  This is not a
1477          * problem for the computation of the nanosecond clock; with TSC rates
1478          * around 1GHZ, there can only be a few cycles which correspond to one
1479          * nanosecond value, and any path through this code will inevitably
1480          * take longer than that.  However, with the kernel_ns value itself,
1481          * the precision may be much lower, down to HZ granularity.  If the
1482          * first sampling of TSC against kernel_ns ends in the low part of the
1483          * range, and the second in the high end of the range, we can get:
1484          *
1485          * (TSC - offset_low) * S + kns_old > (TSC - offset_high) * S + kns_new
1486          *
1487          * As the sampling errors potentially range in the thousands of cycles,
1488          * it is possible such a time value has already been observed by the
1489          * guest.  To protect against this, we must compute the system time as
1490          * observed by the guest and ensure the new system time is greater.
1491          */
1492         max_kernel_ns = 0;
1493         if (vcpu->hv_clock.tsc_timestamp) {
1494                 max_kernel_ns = vcpu->last_guest_tsc -
1495                                 vcpu->hv_clock.tsc_timestamp;
1496                 max_kernel_ns = pvclock_scale_delta(max_kernel_ns,
1497                                     vcpu->hv_clock.tsc_to_system_mul,
1498                                     vcpu->hv_clock.tsc_shift);
1499                 max_kernel_ns += vcpu->last_kernel_ns;
1500         }
1501
1502         if (unlikely(vcpu->hw_tsc_khz != this_tsc_khz)) {
1503                 kvm_get_time_scale(NSEC_PER_SEC / 1000, this_tsc_khz,
1504                                    &vcpu->hv_clock.tsc_shift,
1505                                    &vcpu->hv_clock.tsc_to_system_mul);
1506                 vcpu->hw_tsc_khz = this_tsc_khz;
1507         }
1508
1509         /* with a master <monotonic time, tsc value> tuple,
1510          * pvclock clock reads always increase at the (scaled) rate
1511          * of guest TSC - no need to deal with sampling errors.
1512          */
1513         if (!use_master_clock) {
1514                 if (max_kernel_ns > kernel_ns)
1515                         kernel_ns = max_kernel_ns;
1516         }
1517         /* With all the info we got, fill in the values */
1518         vcpu->hv_clock.tsc_timestamp = tsc_timestamp;
1519         vcpu->hv_clock.system_time = kernel_ns + v->kvm->arch.kvmclock_offset;
1520         vcpu->last_kernel_ns = kernel_ns;
1521         vcpu->last_guest_tsc = tsc_timestamp;
1522
1523         /*
1524          * The interface expects us to write an even number signaling that the
1525          * update is finished. Since the guest won't see the intermediate
1526          * state, we just increase by 2 at the end.
1527          */
1528         vcpu->hv_clock.version += 2;
1529
1530         shared_kaddr = kmap_atomic(vcpu->time_page);
1531
1532         guest_hv_clock = shared_kaddr + vcpu->time_offset;
1533
1534         /* retain PVCLOCK_GUEST_STOPPED if set in guest copy */
1535         pvclock_flags = (guest_hv_clock->flags & PVCLOCK_GUEST_STOPPED);
1536
1537         if (vcpu->pvclock_set_guest_stopped_request) {
1538                 pvclock_flags |= PVCLOCK_GUEST_STOPPED;
1539                 vcpu->pvclock_set_guest_stopped_request = false;
1540         }
1541
1542         /* If the host uses TSC clocksource, then it is stable */
1543         if (use_master_clock)
1544                 pvclock_flags |= PVCLOCK_TSC_STABLE_BIT;
1545
1546         vcpu->hv_clock.flags = pvclock_flags;
1547
1548         memcpy(shared_kaddr + vcpu->time_offset, &vcpu->hv_clock,
1549                sizeof(vcpu->hv_clock));
1550
1551         kunmap_atomic(shared_kaddr);
1552
1553         mark_page_dirty(v->kvm, vcpu->time >> PAGE_SHIFT);
1554         return 0;
1555 }
1556
1557 static bool msr_mtrr_valid(unsigned msr)
1558 {
1559         switch (msr) {
1560         case 0x200 ... 0x200 + 2 * KVM_NR_VAR_MTRR - 1:
1561         case MSR_MTRRfix64K_00000:
1562         case MSR_MTRRfix16K_80000:
1563         case MSR_MTRRfix16K_A0000:
1564         case MSR_MTRRfix4K_C0000:
1565         case MSR_MTRRfix4K_C8000:
1566         case MSR_MTRRfix4K_D0000:
1567         case MSR_MTRRfix4K_D8000:
1568         case MSR_MTRRfix4K_E0000:
1569         case MSR_MTRRfix4K_E8000:
1570         case MSR_MTRRfix4K_F0000:
1571         case MSR_MTRRfix4K_F8000:
1572         case MSR_MTRRdefType:
1573         case MSR_IA32_CR_PAT:
1574                 return true;
1575         case 0x2f8:
1576                 return true;
1577         }
1578         return false;
1579 }
1580
1581 static bool valid_pat_type(unsigned t)
1582 {
1583         return t < 8 && (1 << t) & 0xf3; /* 0, 1, 4, 5, 6, 7 */
1584 }
1585
1586 static bool valid_mtrr_type(unsigned t)
1587 {
1588         return t < 8 && (1 << t) & 0x73; /* 0, 1, 4, 5, 6 */
1589 }
1590
1591 static bool mtrr_valid(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1592 {
1593         int i;
1594
1595         if (!msr_mtrr_valid(msr))
1596                 return false;
1597
1598         if (msr == MSR_IA32_CR_PAT) {
1599                 for (i = 0; i < 8; i++)
1600                         if (!valid_pat_type((data >> (i * 8)) & 0xff))
1601                                 return false;
1602                 return true;
1603         } else if (msr == MSR_MTRRdefType) {
1604                 if (data & ~0xcff)
1605                         return false;
1606                 return valid_mtrr_type(data & 0xff);
1607         } else if (msr >= MSR_MTRRfix64K_00000 && msr <= MSR_MTRRfix4K_F8000) {
1608                 for (i = 0; i < 8 ; i++)
1609                         if (!valid_mtrr_type((data >> (i * 8)) & 0xff))
1610                                 return false;
1611                 return true;
1612         }
1613
1614         /* variable MTRRs */
1615         return valid_mtrr_type(data & 0xff);
1616 }
1617
1618 static int set_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1619 {
1620         u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
1621
1622         if (!mtrr_valid(vcpu, msr, data))
1623                 return 1;
1624
1625         if (msr == MSR_MTRRdefType) {
1626                 vcpu->arch.mtrr_state.def_type = data;
1627                 vcpu->arch.mtrr_state.enabled = (data & 0xc00) >> 10;
1628         } else if (msr == MSR_MTRRfix64K_00000)
1629                 p[0] = data;
1630         else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
1631                 p[1 + msr - MSR_MTRRfix16K_80000] = data;
1632         else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
1633                 p[3 + msr - MSR_MTRRfix4K_C0000] = data;
1634         else if (msr == MSR_IA32_CR_PAT)
1635                 vcpu->arch.pat = data;
1636         else {  /* Variable MTRRs */
1637                 int idx, is_mtrr_mask;
1638                 u64 *pt;
1639
1640                 idx = (msr - 0x200) / 2;
1641                 is_mtrr_mask = msr - 0x200 - 2 * idx;
1642                 if (!is_mtrr_mask)
1643                         pt =
1644                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
1645                 else
1646                         pt =
1647                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
1648                 *pt = data;
1649         }
1650
1651         kvm_mmu_reset_context(vcpu);
1652         return 0;
1653 }
1654
1655 static int set_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1656 {
1657         u64 mcg_cap = vcpu->arch.mcg_cap;
1658         unsigned bank_num = mcg_cap & 0xff;
1659
1660         switch (msr) {
1661         case MSR_IA32_MCG_STATUS:
1662                 vcpu->arch.mcg_status = data;
1663                 break;
1664         case MSR_IA32_MCG_CTL:
1665                 if (!(mcg_cap & MCG_CTL_P))
1666                         return 1;
1667                 if (data != 0 && data != ~(u64)0)
1668                         return -1;
1669                 vcpu->arch.mcg_ctl = data;
1670                 break;
1671         default:
1672                 if (msr >= MSR_IA32_MC0_CTL &&
1673                     msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
1674                         u32 offset = msr - MSR_IA32_MC0_CTL;
1675                         /* only 0 or all 1s can be written to IA32_MCi_CTL
1676                          * some Linux kernels though clear bit 10 in bank 4 to
1677                          * workaround a BIOS/GART TBL issue on AMD K8s, ignore
1678                          * this to avoid an uncatched #GP in the guest
1679                          */
1680                         if ((offset & 0x3) == 0 &&
1681                             data != 0 && (data | (1 << 10)) != ~(u64)0)
1682                                 return -1;
1683                         vcpu->arch.mce_banks[offset] = data;
1684                         break;
1685                 }
1686                 return 1;
1687         }
1688         return 0;
1689 }
1690
1691 static int xen_hvm_config(struct kvm_vcpu *vcpu, u64 data)
1692 {
1693         struct kvm *kvm = vcpu->kvm;
1694         int lm = is_long_mode(vcpu);
1695         u8 *blob_addr = lm ? (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_64
1696                 : (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_32;
1697         u8 blob_size = lm ? kvm->arch.xen_hvm_config.blob_size_64
1698                 : kvm->arch.xen_hvm_config.blob_size_32;
1699         u32 page_num = data & ~PAGE_MASK;
1700         u64 page_addr = data & PAGE_MASK;
1701         u8 *page;
1702         int r;
1703
1704         r = -E2BIG;
1705         if (page_num >= blob_size)
1706                 goto out;
1707         r = -ENOMEM;
1708         page = memdup_user(blob_addr + (page_num * PAGE_SIZE), PAGE_SIZE);
1709         if (IS_ERR(page)) {
1710                 r = PTR_ERR(page);
1711                 goto out;
1712         }
1713         if (kvm_write_guest(kvm, page_addr, page, PAGE_SIZE))
1714                 goto out_free;
1715         r = 0;
1716 out_free:
1717         kfree(page);
1718 out:
1719         return r;
1720 }
1721
1722 static bool kvm_hv_hypercall_enabled(struct kvm *kvm)
1723 {
1724         return kvm->arch.hv_hypercall & HV_X64_MSR_HYPERCALL_ENABLE;
1725 }
1726
1727 static bool kvm_hv_msr_partition_wide(u32 msr)
1728 {
1729         bool r = false;
1730         switch (msr) {
1731         case HV_X64_MSR_GUEST_OS_ID:
1732         case HV_X64_MSR_HYPERCALL:
1733                 r = true;
1734                 break;
1735         }
1736
1737         return r;
1738 }
1739
1740 static int set_msr_hyperv_pw(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1741 {
1742         struct kvm *kvm = vcpu->kvm;
1743
1744         switch (msr) {
1745         case HV_X64_MSR_GUEST_OS_ID:
1746                 kvm->arch.hv_guest_os_id = data;
1747                 /* setting guest os id to zero disables hypercall page */
1748                 if (!kvm->arch.hv_guest_os_id)
1749                         kvm->arch.hv_hypercall &= ~HV_X64_MSR_HYPERCALL_ENABLE;
1750                 break;
1751         case HV_X64_MSR_HYPERCALL: {
1752                 u64 gfn;
1753                 unsigned long addr;
1754                 u8 instructions[4];
1755
1756                 /* if guest os id is not set hypercall should remain disabled */
1757                 if (!kvm->arch.hv_guest_os_id)
1758                         break;
1759                 if (!(data & HV_X64_MSR_HYPERCALL_ENABLE)) {
1760                         kvm->arch.hv_hypercall = data;
1761                         break;
1762                 }
1763                 gfn = data >> HV_X64_MSR_HYPERCALL_PAGE_ADDRESS_SHIFT;
1764                 addr = gfn_to_hva(kvm, gfn);
1765                 if (kvm_is_error_hva(addr))
1766                         return 1;
1767                 kvm_x86_ops->patch_hypercall(vcpu, instructions);
1768                 ((unsigned char *)instructions)[3] = 0xc3; /* ret */
1769                 if (__copy_to_user((void __user *)addr, instructions, 4))
1770                         return 1;
1771                 kvm->arch.hv_hypercall = data;
1772                 break;
1773         }
1774         default:
1775                 vcpu_unimpl(vcpu, "HYPER-V unimplemented wrmsr: 0x%x "
1776                             "data 0x%llx\n", msr, data);
1777                 return 1;
1778         }
1779         return 0;
1780 }
1781
1782 static int set_msr_hyperv(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1783 {
1784         switch (msr) {
1785         case HV_X64_MSR_APIC_ASSIST_PAGE: {
1786                 unsigned long addr;
1787
1788                 if (!(data & HV_X64_MSR_APIC_ASSIST_PAGE_ENABLE)) {
1789                         vcpu->arch.hv_vapic = data;
1790                         break;
1791                 }
1792                 addr = gfn_to_hva(vcpu->kvm, data >>
1793                                   HV_X64_MSR_APIC_ASSIST_PAGE_ADDRESS_SHIFT);
1794                 if (kvm_is_error_hva(addr))
1795                         return 1;
1796                 if (__clear_user((void __user *)addr, PAGE_SIZE))
1797                         return 1;
1798                 vcpu->arch.hv_vapic = data;
1799                 break;
1800         }
1801         case HV_X64_MSR_EOI:
1802                 return kvm_hv_vapic_msr_write(vcpu, APIC_EOI, data);
1803         case HV_X64_MSR_ICR:
1804                 return kvm_hv_vapic_msr_write(vcpu, APIC_ICR, data);
1805         case HV_X64_MSR_TPR:
1806                 return kvm_hv_vapic_msr_write(vcpu, APIC_TASKPRI, data);
1807         default:
1808                 vcpu_unimpl(vcpu, "HYPER-V unimplemented wrmsr: 0x%x "
1809                             "data 0x%llx\n", msr, data);
1810                 return 1;
1811         }
1812
1813         return 0;
1814 }
1815
1816 static int kvm_pv_enable_async_pf(struct kvm_vcpu *vcpu, u64 data)
1817 {
1818         gpa_t gpa = data & ~0x3f;
1819
1820         /* Bits 2:5 are reserved, Should be zero */
1821         if (data & 0x3c)
1822                 return 1;
1823
1824         vcpu->arch.apf.msr_val = data;
1825
1826         if (!(data & KVM_ASYNC_PF_ENABLED)) {
1827                 kvm_clear_async_pf_completion_queue(vcpu);
1828                 kvm_async_pf_hash_reset(vcpu);
1829                 return 0;
1830         }
1831
1832         if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.apf.data, gpa))
1833                 return 1;
1834
1835         vcpu->arch.apf.send_user_only = !(data & KVM_ASYNC_PF_SEND_ALWAYS);
1836         kvm_async_pf_wakeup_all(vcpu);
1837         return 0;
1838 }
1839
1840 static void kvmclock_reset(struct kvm_vcpu *vcpu)
1841 {
1842         if (vcpu->arch.time_page) {
1843                 kvm_release_page_dirty(vcpu->arch.time_page);
1844                 vcpu->arch.time_page = NULL;
1845         }
1846 }
1847
1848 static void accumulate_steal_time(struct kvm_vcpu *vcpu)
1849 {
1850         u64 delta;
1851
1852         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
1853                 return;
1854
1855         delta = current->sched_info.run_delay - vcpu->arch.st.last_steal;
1856         vcpu->arch.st.last_steal = current->sched_info.run_delay;
1857         vcpu->arch.st.accum_steal = delta;
1858 }
1859
1860 static void record_steal_time(struct kvm_vcpu *vcpu)
1861 {
1862         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
1863                 return;
1864
1865         if (unlikely(kvm_read_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
1866                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time))))
1867                 return;
1868
1869         vcpu->arch.st.steal.steal += vcpu->arch.st.accum_steal;
1870         vcpu->arch.st.steal.version += 2;
1871         vcpu->arch.st.accum_steal = 0;
1872
1873         kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
1874                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time));
1875 }
1876
1877 int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
1878 {
1879         bool pr = false;
1880         u32 msr = msr_info->index;
1881         u64 data = msr_info->data;
1882
1883         switch (msr) {
1884         case MSR_AMD64_NB_CFG:
1885         case MSR_IA32_UCODE_REV:
1886         case MSR_IA32_UCODE_WRITE:
1887         case MSR_VM_HSAVE_PA:
1888         case MSR_AMD64_PATCH_LOADER:
1889         case MSR_AMD64_BU_CFG2:
1890                 break;
1891
1892         case MSR_EFER:
1893                 return set_efer(vcpu, data);
1894         case MSR_K7_HWCR:
1895                 data &= ~(u64)0x40;     /* ignore flush filter disable */
1896                 data &= ~(u64)0x100;    /* ignore ignne emulation enable */
1897                 data &= ~(u64)0x8;      /* ignore TLB cache disable */
1898                 if (data != 0) {
1899                         vcpu_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
1900                                     data);
1901                         return 1;
1902                 }
1903                 break;
1904         case MSR_FAM10H_MMIO_CONF_BASE:
1905                 if (data != 0) {
1906                         vcpu_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
1907                                     "0x%llx\n", data);
1908                         return 1;
1909                 }
1910                 break;
1911         case MSR_IA32_DEBUGCTLMSR:
1912                 if (!data) {
1913                         /* We support the non-activated case already */
1914                         break;
1915                 } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
1916                         /* Values other than LBR and BTF are vendor-specific,
1917                            thus reserved and should throw a #GP */
1918                         return 1;
1919                 }
1920                 vcpu_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
1921                             __func__, data);
1922                 break;
1923         case 0x200 ... 0x2ff:
1924                 return set_msr_mtrr(vcpu, msr, data);
1925         case MSR_IA32_APICBASE:
1926                 kvm_set_apic_base(vcpu, data);
1927                 break;
1928         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
1929                 return kvm_x2apic_msr_write(vcpu, msr, data);
1930         case MSR_IA32_TSCDEADLINE:
1931                 kvm_set_lapic_tscdeadline_msr(vcpu, data);
1932                 break;
1933         case MSR_IA32_TSC_ADJUST:
1934                 if (guest_cpuid_has_tsc_adjust(vcpu)) {
1935                         if (!msr_info->host_initiated) {
1936                                 u64 adj = data - vcpu->arch.ia32_tsc_adjust_msr;
1937                                 kvm_x86_ops->adjust_tsc_offset(vcpu, adj, true);
1938                         }
1939                         vcpu->arch.ia32_tsc_adjust_msr = data;
1940                 }
1941                 break;
1942         case MSR_IA32_MISC_ENABLE:
1943                 vcpu->arch.ia32_misc_enable_msr = data;
1944                 break;
1945         case MSR_KVM_WALL_CLOCK_NEW:
1946         case MSR_KVM_WALL_CLOCK:
1947                 vcpu->kvm->arch.wall_clock = data;
1948                 kvm_write_wall_clock(vcpu->kvm, data);
1949                 break;
1950         case MSR_KVM_SYSTEM_TIME_NEW:
1951         case MSR_KVM_SYSTEM_TIME: {
1952                 kvmclock_reset(vcpu);
1953
1954                 vcpu->arch.time = data;
1955                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
1956
1957                 /* we verify if the enable bit is set... */
1958                 if (!(data & 1))
1959                         break;
1960
1961                 /* ...but clean it before doing the actual write */
1962                 vcpu->arch.time_offset = data & ~(PAGE_MASK | 1);
1963
1964                 vcpu->arch.time_page =
1965                                 gfn_to_page(vcpu->kvm, data >> PAGE_SHIFT);
1966
1967                 if (is_error_page(vcpu->arch.time_page))
1968                         vcpu->arch.time_page = NULL;
1969
1970                 break;
1971         }
1972         case MSR_KVM_ASYNC_PF_EN:
1973                 if (kvm_pv_enable_async_pf(vcpu, data))
1974                         return 1;
1975                 break;
1976         case MSR_KVM_STEAL_TIME:
1977
1978                 if (unlikely(!sched_info_on()))
1979                         return 1;
1980
1981                 if (data & KVM_STEAL_RESERVED_MASK)
1982                         return 1;
1983
1984                 if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.st.stime,
1985                                                         data & KVM_STEAL_VALID_BITS))
1986                         return 1;
1987
1988                 vcpu->arch.st.msr_val = data;
1989
1990                 if (!(data & KVM_MSR_ENABLED))
1991                         break;
1992
1993                 vcpu->arch.st.last_steal = current->sched_info.run_delay;
1994
1995                 preempt_disable();
1996                 accumulate_steal_time(vcpu);
1997                 preempt_enable();
1998
1999                 kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
2000
2001                 break;
2002         case MSR_KVM_PV_EOI_EN:
2003                 if (kvm_lapic_enable_pv_eoi(vcpu, data))
2004                         return 1;
2005                 break;
2006
2007         case MSR_IA32_MCG_CTL:
2008         case MSR_IA32_MCG_STATUS:
2009         case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
2010                 return set_msr_mce(vcpu, msr, data);
2011
2012         /* Performance counters are not protected by a CPUID bit,
2013          * so we should check all of them in the generic path for the sake of
2014          * cross vendor migration.
2015          * Writing a zero into the event select MSRs disables them,
2016          * which we perfectly emulate ;-). Any other value should be at least
2017          * reported, some guests depend on them.
2018          */
2019         case MSR_K7_EVNTSEL0:
2020         case MSR_K7_EVNTSEL1:
2021         case MSR_K7_EVNTSEL2:
2022         case MSR_K7_EVNTSEL3:
2023                 if (data != 0)
2024                         vcpu_unimpl(vcpu, "unimplemented perfctr wrmsr: "
2025                                     "0x%x data 0x%llx\n", msr, data);
2026                 break;
2027         /* at least RHEL 4 unconditionally writes to the perfctr registers,
2028          * so we ignore writes to make it happy.
2029          */
2030         case MSR_K7_PERFCTR0:
2031         case MSR_K7_PERFCTR1:
2032         case MSR_K7_PERFCTR2:
2033         case MSR_K7_PERFCTR3:
2034                 vcpu_unimpl(vcpu, "unimplemented perfctr wrmsr: "
2035                             "0x%x data 0x%llx\n", msr, data);
2036                 break;
2037         case MSR_P6_PERFCTR0:
2038         case MSR_P6_PERFCTR1:
2039                 pr = true;
2040         case MSR_P6_EVNTSEL0:
2041         case MSR_P6_EVNTSEL1:
2042                 if (kvm_pmu_msr(vcpu, msr))
2043                         return kvm_pmu_set_msr(vcpu, msr, data);
2044
2045                 if (pr || data != 0)
2046                         vcpu_unimpl(vcpu, "disabled perfctr wrmsr: "
2047                                     "0x%x data 0x%llx\n", msr, data);
2048                 break;
2049         case MSR_K7_CLK_CTL:
2050                 /*
2051                  * Ignore all writes to this no longer documented MSR.
2052                  * Writes are only relevant for old K7 processors,
2053                  * all pre-dating SVM, but a recommended workaround from
2054                  * AMD for these chips. It is possible to specify the
2055                  * affected processor models on the command line, hence
2056                  * the need to ignore the workaround.
2057                  */
2058                 break;
2059         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
2060                 if (kvm_hv_msr_partition_wide(msr)) {
2061                         int r;
2062                         mutex_lock(&vcpu->kvm->lock);
2063                         r = set_msr_hyperv_pw(vcpu, msr, data);
2064                         mutex_unlock(&vcpu->kvm->lock);
2065                         return r;
2066                 } else
2067                         return set_msr_hyperv(vcpu, msr, data);
2068                 break;
2069         case MSR_IA32_BBL_CR_CTL3:
2070                 /* Drop writes to this legacy MSR -- see rdmsr
2071                  * counterpart for further detail.
2072                  */
2073                 vcpu_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n", msr, data);
2074                 break;
2075         case MSR_AMD64_OSVW_ID_LENGTH:
2076                 if (!guest_cpuid_has_osvw(vcpu))
2077                         return 1;
2078                 vcpu->arch.osvw.length = data;
2079                 break;
2080         case MSR_AMD64_OSVW_STATUS:
2081                 if (!guest_cpuid_has_osvw(vcpu))
2082                         return 1;
2083                 vcpu->arch.osvw.status = data;
2084                 break;
2085         default:
2086                 if (msr && (msr == vcpu->kvm->arch.xen_hvm_config.msr))
2087                         return xen_hvm_config(vcpu, data);
2088                 if (kvm_pmu_msr(vcpu, msr))
2089                         return kvm_pmu_set_msr(vcpu, msr, data);
2090                 if (!ignore_msrs) {
2091                         vcpu_unimpl(vcpu, "unhandled wrmsr: 0x%x data %llx\n",
2092                                     msr, data);
2093                         return 1;
2094                 } else {
2095                         vcpu_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n",
2096                                     msr, data);
2097                         break;
2098                 }
2099         }
2100         return 0;
2101 }
2102 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
2103
2104
2105 /*
2106  * Reads an msr value (of 'msr_index') into 'pdata'.
2107  * Returns 0 on success, non-0 otherwise.
2108  * Assumes vcpu_load() was already called.
2109  */
2110 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata)
2111 {
2112         return kvm_x86_ops->get_msr(vcpu, msr_index, pdata);
2113 }
2114
2115 static int get_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
2116 {
2117         u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
2118
2119         if (!msr_mtrr_valid(msr))
2120                 return 1;
2121
2122         if (msr == MSR_MTRRdefType)
2123                 *pdata = vcpu->arch.mtrr_state.def_type +
2124                          (vcpu->arch.mtrr_state.enabled << 10);
2125         else if (msr == MSR_MTRRfix64K_00000)
2126                 *pdata = p[0];
2127         else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
2128                 *pdata = p[1 + msr - MSR_MTRRfix16K_80000];
2129         else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
2130                 *pdata = p[3 + msr - MSR_MTRRfix4K_C0000];
2131         else if (msr == MSR_IA32_CR_PAT)
2132                 *pdata = vcpu->arch.pat;
2133         else {  /* Variable MTRRs */
2134                 int idx, is_mtrr_mask;
2135                 u64 *pt;
2136
2137                 idx = (msr - 0x200) / 2;
2138                 is_mtrr_mask = msr - 0x200 - 2 * idx;
2139                 if (!is_mtrr_mask)
2140                         pt =
2141                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
2142                 else
2143                         pt =
2144                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
2145                 *pdata = *pt;
2146         }
2147
2148         return 0;
2149 }
2150
2151 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
2152 {
2153         u64 data;
2154         u64 mcg_cap = vcpu->arch.mcg_cap;
2155         unsigned bank_num = mcg_cap & 0xff;
2156
2157         switch (msr) {
2158         case MSR_IA32_P5_MC_ADDR:
2159         case MSR_IA32_P5_MC_TYPE:
2160                 data = 0;
2161                 break;
2162         case MSR_IA32_MCG_CAP:
2163                 data = vcpu->arch.mcg_cap;
2164                 break;
2165         case MSR_IA32_MCG_CTL:
2166                 if (!(mcg_cap & MCG_CTL_P))
2167                         return 1;
2168                 data = vcpu->arch.mcg_ctl;
2169                 break;
2170         case MSR_IA32_MCG_STATUS:
2171                 data = vcpu->arch.mcg_status;
2172                 break;
2173         default:
2174                 if (msr >= MSR_IA32_MC0_CTL &&
2175                     msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
2176                         u32 offset = msr - MSR_IA32_MC0_CTL;
2177                         data = vcpu->arch.mce_banks[offset];
2178                         break;
2179                 }
2180                 return 1;
2181         }
2182         *pdata = data;
2183         return 0;
2184 }
2185
2186 static int get_msr_hyperv_pw(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
2187 {
2188         u64 data = 0;
2189         struct kvm *kvm = vcpu->kvm;
2190
2191         switch (msr) {
2192         case HV_X64_MSR_GUEST_OS_ID:
2193                 data = kvm->arch.hv_guest_os_id;
2194                 break;
2195         case HV_X64_MSR_HYPERCALL:
2196                 data = kvm->arch.hv_hypercall;
2197                 break;
2198         default:
2199                 vcpu_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
2200                 return 1;
2201         }
2202
2203         *pdata = data;
2204         return 0;
2205 }
2206
2207 static int get_msr_hyperv(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
2208 {
2209         u64 data = 0;
2210
2211         switch (msr) {
2212         case HV_X64_MSR_VP_INDEX: {
2213                 int r;
2214                 struct kvm_vcpu *v;
2215                 kvm_for_each_vcpu(r, v, vcpu->kvm)
2216                         if (v == vcpu)
2217                                 data = r;
2218                 break;
2219         }
2220         case HV_X64_MSR_EOI:
2221                 return kvm_hv_vapic_msr_read(vcpu, APIC_EOI, pdata);
2222         case HV_X64_MSR_ICR:
2223                 return kvm_hv_vapic_msr_read(vcpu, APIC_ICR, pdata);
2224         case HV_X64_MSR_TPR:
2225                 return kvm_hv_vapic_msr_read(vcpu, APIC_TASKPRI, pdata);
2226         case HV_X64_MSR_APIC_ASSIST_PAGE:
2227                 data = vcpu->arch.hv_vapic;
2228                 break;
2229         default:
2230                 vcpu_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
2231                 return 1;
2232         }
2233         *pdata = data;
2234         return 0;
2235 }
2236
2237 int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
2238 {
2239         u64 data;
2240
2241         switch (msr) {
2242         case MSR_IA32_PLATFORM_ID:
2243         case MSR_IA32_EBL_CR_POWERON:
2244         case MSR_IA32_DEBUGCTLMSR:
2245         case MSR_IA32_LASTBRANCHFROMIP:
2246         case MSR_IA32_LASTBRANCHTOIP:
2247         case MSR_IA32_LASTINTFROMIP:
2248         case MSR_IA32_LASTINTTOIP:
2249         case MSR_K8_SYSCFG:
2250         case MSR_K7_HWCR:
2251         case MSR_VM_HSAVE_PA:
2252         case MSR_K7_EVNTSEL0:
2253         case MSR_K7_PERFCTR0:
2254         case MSR_K8_INT_PENDING_MSG:
2255         case MSR_AMD64_NB_CFG:
2256         case MSR_FAM10H_MMIO_CONF_BASE:
2257         case MSR_AMD64_BU_CFG2:
2258                 data = 0;
2259                 break;
2260         case MSR_P6_PERFCTR0:
2261         case MSR_P6_PERFCTR1:
2262         case MSR_P6_EVNTSEL0:
2263         case MSR_P6_EVNTSEL1:
2264                 if (kvm_pmu_msr(vcpu, msr))
2265                         return kvm_pmu_get_msr(vcpu, msr, pdata);
2266                 data = 0;
2267                 break;
2268         case MSR_IA32_UCODE_REV:
2269                 data = 0x100000000ULL;
2270                 break;
2271         case MSR_MTRRcap:
2272                 data = 0x500 | KVM_NR_VAR_MTRR;
2273                 break;
2274         case 0x200 ... 0x2ff:
2275                 return get_msr_mtrr(vcpu, msr, pdata);
2276         case 0xcd: /* fsb frequency */
2277                 data = 3;
2278                 break;
2279                 /*
2280                  * MSR_EBC_FREQUENCY_ID
2281                  * Conservative value valid for even the basic CPU models.
2282                  * Models 0,1: 000 in bits 23:21 indicating a bus speed of
2283                  * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
2284                  * and 266MHz for model 3, or 4. Set Core Clock
2285                  * Frequency to System Bus Frequency Ratio to 1 (bits
2286                  * 31:24) even though these are only valid for CPU
2287                  * models > 2, however guests may end up dividing or
2288                  * multiplying by zero otherwise.
2289                  */
2290         case MSR_EBC_FREQUENCY_ID:
2291                 data = 1 << 24;
2292                 break;
2293         case MSR_IA32_APICBASE:
2294                 data = kvm_get_apic_base(vcpu);
2295                 break;
2296         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
2297                 return kvm_x2apic_msr_read(vcpu, msr, pdata);
2298                 break;
2299         case MSR_IA32_TSCDEADLINE:
2300                 data = kvm_get_lapic_tscdeadline_msr(vcpu);
2301                 break;
2302         case MSR_IA32_TSC_ADJUST:
2303                 data = (u64)vcpu->arch.ia32_tsc_adjust_msr;
2304                 break;
2305         case MSR_IA32_MISC_ENABLE:
2306                 data = vcpu->arch.ia32_misc_enable_msr;
2307                 break;
2308         case MSR_IA32_PERF_STATUS:
2309                 /* TSC increment by tick */
2310                 data = 1000ULL;
2311                 /* CPU multiplier */
2312                 data |= (((uint64_t)4ULL) << 40);
2313                 break;
2314         case MSR_EFER:
2315                 data = vcpu->arch.efer;
2316                 break;
2317         case MSR_KVM_WALL_CLOCK:
2318         case MSR_KVM_WALL_CLOCK_NEW:
2319                 data = vcpu->kvm->arch.wall_clock;
2320                 break;
2321         case MSR_KVM_SYSTEM_TIME:
2322         case MSR_KVM_SYSTEM_TIME_NEW:
2323                 data = vcpu->arch.time;
2324                 break;
2325         case MSR_KVM_ASYNC_PF_EN:
2326                 data = vcpu->arch.apf.msr_val;
2327                 break;
2328         case MSR_KVM_STEAL_TIME:
2329                 data = vcpu->arch.st.msr_val;
2330                 break;
2331         case MSR_KVM_PV_EOI_EN:
2332                 data = vcpu->arch.pv_eoi.msr_val;
2333                 break;
2334         case MSR_IA32_P5_MC_ADDR:
2335         case MSR_IA32_P5_MC_TYPE:
2336         case MSR_IA32_MCG_CAP:
2337         case MSR_IA32_MCG_CTL:
2338         case MSR_IA32_MCG_STATUS:
2339         case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
2340                 return get_msr_mce(vcpu, msr, pdata);
2341         case MSR_K7_CLK_CTL:
2342                 /*
2343                  * Provide expected ramp-up count for K7. All other
2344                  * are set to zero, indicating minimum divisors for
2345                  * every field.
2346                  *
2347                  * This prevents guest kernels on AMD host with CPU
2348                  * type 6, model 8 and higher from exploding due to
2349                  * the rdmsr failing.
2350                  */
2351                 data = 0x20000000;
2352                 break;
2353         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
2354                 if (kvm_hv_msr_partition_wide(msr)) {
2355                         int r;
2356                         mutex_lock(&vcpu->kvm->lock);
2357                         r = get_msr_hyperv_pw(vcpu, msr, pdata);
2358                         mutex_unlock(&vcpu->kvm->lock);
2359                         return r;
2360                 } else
2361                         return get_msr_hyperv(vcpu, msr, pdata);
2362                 break;
2363         case MSR_IA32_BBL_CR_CTL3:
2364                 /* This legacy MSR exists but isn't fully documented in current
2365                  * silicon.  It is however accessed by winxp in very narrow
2366                  * scenarios where it sets bit #19, itself documented as
2367                  * a "reserved" bit.  Best effort attempt to source coherent
2368                  * read data here should the balance of the register be
2369                  * interpreted by the guest:
2370                  *
2371                  * L2 cache control register 3: 64GB range, 256KB size,
2372                  * enabled, latency 0x1, configured
2373                  */
2374                 data = 0xbe702111;
2375                 break;
2376         case MSR_AMD64_OSVW_ID_LENGTH:
2377                 if (!guest_cpuid_has_osvw(vcpu))
2378                         return 1;
2379                 data = vcpu->arch.osvw.length;
2380                 break;
2381         case MSR_AMD64_OSVW_STATUS:
2382                 if (!guest_cpuid_has_osvw(vcpu))
2383                         return 1;
2384                 data = vcpu->arch.osvw.status;
2385                 break;
2386         default:
2387                 if (kvm_pmu_msr(vcpu, msr))
2388                         return kvm_pmu_get_msr(vcpu, msr, pdata);
2389                 if (!ignore_msrs) {
2390                         vcpu_unimpl(vcpu, "unhandled rdmsr: 0x%x\n", msr);
2391                         return 1;
2392                 } else {
2393                         vcpu_unimpl(vcpu, "ignored rdmsr: 0x%x\n", msr);
2394                         data = 0;
2395                 }
2396                 break;
2397         }
2398         *pdata = data;
2399         return 0;
2400 }
2401 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
2402
2403 /*
2404  * Read or write a bunch of msrs. All parameters are kernel addresses.
2405  *
2406  * @return number of msrs set successfully.
2407  */
2408 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
2409                     struct kvm_msr_entry *entries,
2410                     int (*do_msr)(struct kvm_vcpu *vcpu,
2411                                   unsigned index, u64 *data))
2412 {
2413         int i, idx;
2414
2415         idx = srcu_read_lock(&vcpu->kvm->srcu);
2416         for (i = 0; i < msrs->nmsrs; ++i)
2417                 if (do_msr(vcpu, entries[i].index, &entries[i].data))
2418                         break;
2419         srcu_read_unlock(&vcpu->kvm->srcu, idx);
2420
2421         return i;
2422 }
2423
2424 /*
2425  * Read or write a bunch of msrs. Parameters are user addresses.
2426  *
2427  * @return number of msrs set successfully.
2428  */
2429 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
2430                   int (*do_msr)(struct kvm_vcpu *vcpu,
2431                                 unsigned index, u64 *data),
2432                   int writeback)
2433 {
2434         struct kvm_msrs msrs;
2435         struct kvm_msr_entry *entries;
2436         int r, n;
2437         unsigned size;
2438
2439         r = -EFAULT;
2440         if (copy_from_user(&msrs, user_msrs, sizeof msrs))
2441                 goto out;
2442
2443         r = -E2BIG;
2444         if (msrs.nmsrs >= MAX_IO_MSRS)
2445                 goto out;
2446
2447         size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
2448         entries = memdup_user(user_msrs->entries, size);
2449         if (IS_ERR(entries)) {
2450                 r = PTR_ERR(entries);
2451                 goto out;
2452         }
2453
2454         r = n = __msr_io(vcpu, &msrs, entries, do_msr);
2455         if (r < 0)
2456                 goto out_free;
2457
2458         r = -EFAULT;
2459         if (writeback && copy_to_user(user_msrs->entries, entries, size))
2460                 goto out_free;
2461
2462         r = n;
2463
2464 out_free:
2465         kfree(entries);
2466 out:
2467         return r;
2468 }
2469
2470 int kvm_dev_ioctl_check_extension(long ext)
2471 {
2472         int r;
2473
2474         switch (ext) {
2475         case KVM_CAP_IRQCHIP:
2476         case KVM_CAP_HLT:
2477         case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
2478         case KVM_CAP_SET_TSS_ADDR:
2479         case KVM_CAP_EXT_CPUID:
2480         case KVM_CAP_CLOCKSOURCE:
2481         case KVM_CAP_PIT:
2482         case KVM_CAP_NOP_IO_DELAY:
2483         case KVM_CAP_MP_STATE:
2484         case KVM_CAP_SYNC_MMU:
2485         case KVM_CAP_USER_NMI:
2486         case KVM_CAP_REINJECT_CONTROL:
2487         case KVM_CAP_IRQ_INJECT_STATUS:
2488         case KVM_CAP_ASSIGN_DEV_IRQ:
2489         case KVM_CAP_IRQFD:
2490         case KVM_CAP_IOEVENTFD:
2491         case KVM_CAP_PIT2:
2492         case KVM_CAP_PIT_STATE2:
2493         case KVM_CAP_SET_IDENTITY_MAP_ADDR:
2494         case KVM_CAP_XEN_HVM:
2495         case KVM_CAP_ADJUST_CLOCK:
2496         case KVM_CAP_VCPU_EVENTS:
2497         case KVM_CAP_HYPERV:
2498         case KVM_CAP_HYPERV_VAPIC:
2499         case KVM_CAP_HYPERV_SPIN:
2500         case KVM_CAP_PCI_SEGMENT:
2501         case KVM_CAP_DEBUGREGS:
2502         case KVM_CAP_X86_ROBUST_SINGLESTEP:
2503         case KVM_CAP_XSAVE:
2504         case KVM_CAP_ASYNC_PF:
2505         case KVM_CAP_GET_TSC_KHZ:
2506         case KVM_CAP_PCI_2_3:
2507         case KVM_CAP_KVMCLOCK_CTRL:
2508         case KVM_CAP_READONLY_MEM:
2509         case KVM_CAP_IRQFD_RESAMPLE:
2510                 r = 1;
2511                 break;
2512         case KVM_CAP_COALESCED_MMIO:
2513                 r = KVM_COALESCED_MMIO_PAGE_OFFSET;
2514                 break;
2515         case KVM_CAP_VAPIC:
2516                 r = !kvm_x86_ops->cpu_has_accelerated_tpr();
2517                 break;
2518         case KVM_CAP_NR_VCPUS:
2519                 r = KVM_SOFT_MAX_VCPUS;
2520                 break;
2521         case KVM_CAP_MAX_VCPUS:
2522                 r = KVM_MAX_VCPUS;
2523                 break;
2524         case KVM_CAP_NR_MEMSLOTS:
2525                 r = KVM_MEMORY_SLOTS;
2526                 break;
2527         case KVM_CAP_PV_MMU:    /* obsolete */
2528                 r = 0;
2529                 break;
2530         case KVM_CAP_IOMMU:
2531                 r = iommu_present(&pci_bus_type);
2532                 break;
2533         case KVM_CAP_MCE:
2534                 r = KVM_MAX_MCE_BANKS;
2535                 break;
2536         case KVM_CAP_XCRS:
2537                 r = cpu_has_xsave;
2538                 break;
2539         case KVM_CAP_TSC_CONTROL:
2540                 r = kvm_has_tsc_control;
2541                 break;
2542         case KVM_CAP_TSC_DEADLINE_TIMER:
2543                 r = boot_cpu_has(X86_FEATURE_TSC_DEADLINE_TIMER);
2544                 break;
2545         default:
2546                 r = 0;
2547                 break;
2548         }
2549         return r;
2550
2551 }
2552
2553 long kvm_arch_dev_ioctl(struct file *filp,
2554                         unsigned int ioctl, unsigned long arg)
2555 {
2556         void __user *argp = (void __user *)arg;
2557         long r;
2558
2559         switch (ioctl) {
2560         case KVM_GET_MSR_INDEX_LIST: {
2561                 struct kvm_msr_list __user *user_msr_list = argp;
2562                 struct kvm_msr_list msr_list;
2563                 unsigned n;
2564
2565                 r = -EFAULT;
2566                 if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list))
2567                         goto out;
2568                 n = msr_list.nmsrs;
2569                 msr_list.nmsrs = num_msrs_to_save + ARRAY_SIZE(emulated_msrs);
2570                 if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list))
2571                         goto out;
2572                 r = -E2BIG;
2573                 if (n < msr_list.nmsrs)
2574                         goto out;
2575                 r = -EFAULT;
2576                 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
2577                                  num_msrs_to_save * sizeof(u32)))
2578                         goto out;
2579                 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
2580                                  &emulated_msrs,
2581                                  ARRAY_SIZE(emulated_msrs) * sizeof(u32)))
2582                         goto out;
2583                 r = 0;
2584                 break;
2585         }
2586         case KVM_GET_SUPPORTED_CPUID: {
2587                 struct kvm_cpuid2 __user *cpuid_arg = argp;
2588                 struct kvm_cpuid2 cpuid;
2589
2590                 r = -EFAULT;
2591                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2592                         goto out;
2593                 r = kvm_dev_ioctl_get_supported_cpuid(&cpuid,
2594                                                       cpuid_arg->entries);
2595                 if (r)
2596                         goto out;
2597
2598                 r = -EFAULT;
2599                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
2600                         goto out;
2601                 r = 0;
2602                 break;
2603         }
2604         case KVM_X86_GET_MCE_CAP_SUPPORTED: {
2605                 u64 mce_cap;
2606
2607                 mce_cap = KVM_MCE_CAP_SUPPORTED;
2608                 r = -EFAULT;
2609                 if (copy_to_user(argp, &mce_cap, sizeof mce_cap))
2610                         goto out;
2611                 r = 0;
2612                 break;
2613         }
2614         default:
2615                 r = -EINVAL;
2616         }
2617 out:
2618         return r;
2619 }
2620
2621 static void wbinvd_ipi(void *garbage)
2622 {
2623         wbinvd();
2624 }
2625
2626 static bool need_emulate_wbinvd(struct kvm_vcpu *vcpu)
2627 {
2628         return vcpu->kvm->arch.iommu_domain &&
2629                 !(vcpu->kvm->arch.iommu_flags & KVM_IOMMU_CACHE_COHERENCY);
2630 }
2631
2632 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
2633 {
2634         /* Address WBINVD may be executed by guest */
2635         if (need_emulate_wbinvd(vcpu)) {
2636                 if (kvm_x86_ops->has_wbinvd_exit())
2637                         cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
2638                 else if (vcpu->cpu != -1 && vcpu->cpu != cpu)
2639                         smp_call_function_single(vcpu->cpu,
2640                                         wbinvd_ipi, NULL, 1);
2641         }
2642
2643         kvm_x86_ops->vcpu_load(vcpu, cpu);
2644
2645         /* Apply any externally detected TSC adjustments (due to suspend) */
2646         if (unlikely(vcpu->arch.tsc_offset_adjustment)) {
2647                 adjust_tsc_offset_host(vcpu, vcpu->arch.tsc_offset_adjustment);
2648                 vcpu->arch.tsc_offset_adjustment = 0;
2649                 set_bit(KVM_REQ_CLOCK_UPDATE, &vcpu->requests);
2650         }
2651
2652         if (unlikely(vcpu->cpu != cpu) || check_tsc_unstable()) {
2653                 s64 tsc_delta = !vcpu->arch.last_host_tsc ? 0 :
2654                                 native_read_tsc() - vcpu->arch.last_host_tsc;
2655                 if (tsc_delta < 0)
2656                         mark_tsc_unstable("KVM discovered backwards TSC");
2657                 if (check_tsc_unstable()) {
2658                         u64 offset = kvm_x86_ops->compute_tsc_offset(vcpu,
2659                                                 vcpu->arch.last_guest_tsc);
2660                         kvm_x86_ops->write_tsc_offset(vcpu, offset);
2661                         vcpu->arch.tsc_catchup = 1;
2662                 }
2663                 /*
2664                  * On a host with synchronized TSC, there is no need to update
2665                  * kvmclock on vcpu->cpu migration
2666                  */
2667                 if (!vcpu->kvm->arch.use_master_clock || vcpu->cpu == -1)
2668                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2669                 if (vcpu->cpu != cpu)
2670                         kvm_migrate_timers(vcpu);
2671                 vcpu->cpu = cpu;
2672         }
2673
2674         accumulate_steal_time(vcpu);
2675         kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
2676 }
2677
2678 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
2679 {
2680         kvm_x86_ops->vcpu_put(vcpu);
2681         kvm_put_guest_fpu(vcpu);
2682         vcpu->arch.last_host_tsc = native_read_tsc();
2683 }
2684
2685 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
2686                                     struct kvm_lapic_state *s)
2687 {
2688         memcpy(s->regs, vcpu->arch.apic->regs, sizeof *s);
2689
2690         return 0;
2691 }
2692
2693 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
2694                                     struct kvm_lapic_state *s)
2695 {
2696         kvm_apic_post_state_restore(vcpu, s);
2697         update_cr8_intercept(vcpu);
2698
2699         return 0;
2700 }
2701
2702 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
2703                                     struct kvm_interrupt *irq)
2704 {
2705         if (irq->irq < 0 || irq->irq >= KVM_NR_INTERRUPTS)
2706                 return -EINVAL;
2707         if (irqchip_in_kernel(vcpu->kvm))
2708                 return -ENXIO;
2709
2710         kvm_queue_interrupt(vcpu, irq->irq, false);
2711         kvm_make_request(KVM_REQ_EVENT, vcpu);
2712
2713         return 0;
2714 }
2715
2716 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
2717 {
2718         kvm_inject_nmi(vcpu);
2719
2720         return 0;
2721 }
2722
2723 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
2724                                            struct kvm_tpr_access_ctl *tac)
2725 {
2726         if (tac->flags)
2727                 return -EINVAL;
2728         vcpu->arch.tpr_access_reporting = !!tac->enabled;
2729         return 0;
2730 }
2731
2732 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
2733                                         u64 mcg_cap)
2734 {
2735         int r;
2736         unsigned bank_num = mcg_cap & 0xff, bank;
2737
2738         r = -EINVAL;
2739         if (!bank_num || bank_num >= KVM_MAX_MCE_BANKS)
2740                 goto out;
2741         if (mcg_cap & ~(KVM_MCE_CAP_SUPPORTED | 0xff | 0xff0000))
2742                 goto out;
2743         r = 0;
2744         vcpu->arch.mcg_cap = mcg_cap;
2745         /* Init IA32_MCG_CTL to all 1s */
2746         if (mcg_cap & MCG_CTL_P)
2747                 vcpu->arch.mcg_ctl = ~(u64)0;
2748         /* Init IA32_MCi_CTL to all 1s */
2749         for (bank = 0; bank < bank_num; bank++)
2750                 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
2751 out:
2752         return r;
2753 }
2754
2755 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
2756                                       struct kvm_x86_mce *mce)
2757 {
2758         u64 mcg_cap = vcpu->arch.mcg_cap;
2759         unsigned bank_num = mcg_cap & 0xff;
2760         u64 *banks = vcpu->arch.mce_banks;
2761
2762         if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
2763                 return -EINVAL;
2764         /*
2765          * if IA32_MCG_CTL is not all 1s, the uncorrected error
2766          * reporting is disabled
2767          */
2768         if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
2769             vcpu->arch.mcg_ctl != ~(u64)0)
2770                 return 0;
2771         banks += 4 * mce->bank;
2772         /*
2773          * if IA32_MCi_CTL is not all 1s, the uncorrected error
2774          * reporting is disabled for the bank
2775          */
2776         if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
2777                 return 0;
2778         if (mce->status & MCI_STATUS_UC) {
2779                 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
2780                     !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
2781                         kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
2782                         return 0;
2783                 }
2784                 if (banks[1] & MCI_STATUS_VAL)
2785                         mce->status |= MCI_STATUS_OVER;
2786                 banks[2] = mce->addr;
2787                 banks[3] = mce->misc;
2788                 vcpu->arch.mcg_status = mce->mcg_status;
2789                 banks[1] = mce->status;
2790                 kvm_queue_exception(vcpu, MC_VECTOR);
2791         } else if (!(banks[1] & MCI_STATUS_VAL)
2792                    || !(banks[1] & MCI_STATUS_UC)) {
2793                 if (banks[1] & MCI_STATUS_VAL)
2794                         mce->status |= MCI_STATUS_OVER;
2795                 banks[2] = mce->addr;
2796                 banks[3] = mce->misc;
2797                 banks[1] = mce->status;
2798         } else
2799                 banks[1] |= MCI_STATUS_OVER;
2800         return 0;
2801 }
2802
2803 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
2804                                                struct kvm_vcpu_events *events)
2805 {
2806         process_nmi(vcpu);
2807         events->exception.injected =
2808                 vcpu->arch.exception.pending &&
2809                 !kvm_exception_is_soft(vcpu->arch.exception.nr);
2810         events->exception.nr = vcpu->arch.exception.nr;
2811         events->exception.has_error_code = vcpu->arch.exception.has_error_code;
2812         events->exception.pad = 0;
2813         events->exception.error_code = vcpu->arch.exception.error_code;
2814
2815         events->interrupt.injected =
2816                 vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft;
2817         events->interrupt.nr = vcpu->arch.interrupt.nr;
2818         events->interrupt.soft = 0;
2819         events->interrupt.shadow =
2820                 kvm_x86_ops->get_interrupt_shadow(vcpu,
2821                         KVM_X86_SHADOW_INT_MOV_SS | KVM_X86_SHADOW_INT_STI);
2822
2823         events->nmi.injected = vcpu->arch.nmi_injected;
2824         events->nmi.pending = vcpu->arch.nmi_pending != 0;
2825         events->nmi.masked = kvm_x86_ops->get_nmi_mask(vcpu);
2826         events->nmi.pad = 0;
2827
2828         events->sipi_vector = vcpu->arch.sipi_vector;
2829
2830         events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
2831                          | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2832                          | KVM_VCPUEVENT_VALID_SHADOW);
2833         memset(&events->reserved, 0, sizeof(events->reserved));
2834 }
2835
2836 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
2837                                               struct kvm_vcpu_events *events)
2838 {
2839         if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
2840                               | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2841                               | KVM_VCPUEVENT_VALID_SHADOW))
2842                 return -EINVAL;
2843
2844         process_nmi(vcpu);
2845         vcpu->arch.exception.pending = events->exception.injected;
2846         vcpu->arch.exception.nr = events->exception.nr;
2847         vcpu->arch.exception.has_error_code = events->exception.has_error_code;
2848         vcpu->arch.exception.error_code = events->exception.error_code;
2849
2850         vcpu->arch.interrupt.pending = events->interrupt.injected;
2851         vcpu->arch.interrupt.nr = events->interrupt.nr;
2852         vcpu->arch.interrupt.soft = events->interrupt.soft;
2853         if (events->flags & KVM_VCPUEVENT_VALID_SHADOW)
2854                 kvm_x86_ops->set_interrupt_shadow(vcpu,
2855                                                   events->interrupt.shadow);
2856
2857         vcpu->arch.nmi_injected = events->nmi.injected;
2858         if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
2859                 vcpu->arch.nmi_pending = events->nmi.pending;
2860         kvm_x86_ops->set_nmi_mask(vcpu, events->nmi.masked);
2861
2862         if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR)
2863                 vcpu->arch.sipi_vector = events->sipi_vector;
2864
2865         kvm_make_request(KVM_REQ_EVENT, vcpu);
2866
2867         return 0;
2868 }
2869
2870 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
2871                                              struct kvm_debugregs *dbgregs)
2872 {
2873         memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db));
2874         dbgregs->dr6 = vcpu->arch.dr6;
2875         dbgregs->dr7 = vcpu->arch.dr7;
2876         dbgregs->flags = 0;
2877         memset(&dbgregs->reserved, 0, sizeof(dbgregs->reserved));
2878 }
2879
2880 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
2881                                             struct kvm_debugregs *dbgregs)
2882 {
2883         if (dbgregs->flags)
2884                 return -EINVAL;
2885
2886         memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db));
2887         vcpu->arch.dr6 = dbgregs->dr6;
2888         vcpu->arch.dr7 = dbgregs->dr7;
2889
2890         return 0;
2891 }
2892
2893 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu *vcpu,
2894                                          struct kvm_xsave *guest_xsave)
2895 {
2896         if (cpu_has_xsave)
2897                 memcpy(guest_xsave->region,
2898                         &vcpu->arch.guest_fpu.state->xsave,
2899                         xstate_size);
2900         else {
2901                 memcpy(guest_xsave->region,
2902                         &vcpu->arch.guest_fpu.state->fxsave,
2903                         sizeof(struct i387_fxsave_struct));
2904                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)] =
2905                         XSTATE_FPSSE;
2906         }
2907 }
2908
2909 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu *vcpu,
2910                                         struct kvm_xsave *guest_xsave)
2911 {
2912         u64 xstate_bv =
2913                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)];
2914
2915         if (cpu_has_xsave)
2916                 memcpy(&vcpu->arch.guest_fpu.state->xsave,
2917                         guest_xsave->region, xstate_size);
2918         else {
2919                 if (xstate_bv & ~XSTATE_FPSSE)
2920                         return -EINVAL;
2921                 memcpy(&vcpu->arch.guest_fpu.state->fxsave,
2922                         guest_xsave->region, sizeof(struct i387_fxsave_struct));
2923         }
2924         return 0;
2925 }
2926
2927 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu *vcpu,
2928                                         struct kvm_xcrs *guest_xcrs)
2929 {
2930         if (!cpu_has_xsave) {
2931                 guest_xcrs->nr_xcrs = 0;
2932                 return;
2933         }
2934
2935         guest_xcrs->nr_xcrs = 1;
2936         guest_xcrs->flags = 0;
2937         guest_xcrs->xcrs[0].xcr = XCR_XFEATURE_ENABLED_MASK;
2938         guest_xcrs->xcrs[0].value = vcpu->arch.xcr0;
2939 }
2940
2941 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu *vcpu,
2942                                        struct kvm_xcrs *guest_xcrs)
2943 {
2944         int i, r = 0;
2945
2946         if (!cpu_has_xsave)
2947                 return -EINVAL;
2948
2949         if (guest_xcrs->nr_xcrs > KVM_MAX_XCRS || guest_xcrs->flags)
2950                 return -EINVAL;
2951
2952         for (i = 0; i < guest_xcrs->nr_xcrs; i++)
2953                 /* Only support XCR0 currently */
2954                 if (guest_xcrs->xcrs[0].xcr == XCR_XFEATURE_ENABLED_MASK) {
2955                         r = __kvm_set_xcr(vcpu, XCR_XFEATURE_ENABLED_MASK,
2956                                 guest_xcrs->xcrs[0].value);
2957                         break;
2958                 }
2959         if (r)
2960                 r = -EINVAL;
2961         return r;
2962 }
2963
2964 /*
2965  * kvm_set_guest_paused() indicates to the guest kernel that it has been
2966  * stopped by the hypervisor.  This function will be called from the host only.
2967  * EINVAL is returned when the host attempts to set the flag for a guest that
2968  * does not support pv clocks.
2969  */
2970 static int kvm_set_guest_paused(struct kvm_vcpu *vcpu)
2971 {
2972         if (!vcpu->arch.time_page)
2973                 return -EINVAL;
2974         vcpu->arch.pvclock_set_guest_stopped_request = true;
2975         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2976         return 0;
2977 }
2978
2979 long kvm_arch_vcpu_ioctl(struct file *filp,
2980                          unsigned int ioctl, unsigned long arg)
2981 {
2982         struct kvm_vcpu *vcpu = filp->private_data;
2983         void __user *argp = (void __user *)arg;
2984         int r;
2985         union {
2986                 struct kvm_lapic_state *lapic;
2987                 struct kvm_xsave *xsave;
2988                 struct kvm_xcrs *xcrs;
2989                 void *buffer;
2990         } u;
2991
2992         u.buffer = NULL;
2993         switch (ioctl) {
2994         case KVM_GET_LAPIC: {
2995                 r = -EINVAL;
2996                 if (!vcpu->arch.apic)
2997                         goto out;
2998                 u.lapic = kzalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
2999
3000                 r = -ENOMEM;
3001                 if (!u.lapic)
3002                         goto out;
3003                 r = kvm_vcpu_ioctl_get_lapic(vcpu, u.lapic);
3004                 if (r)
3005                         goto out;
3006                 r = -EFAULT;
3007                 if (copy_to_user(argp, u.lapic, sizeof(struct kvm_lapic_state)))
3008                         goto out;
3009                 r = 0;
3010                 break;
3011         }
3012         case KVM_SET_LAPIC: {
3013                 r = -EINVAL;
3014                 if (!vcpu->arch.apic)
3015                         goto out;
3016                 u.lapic = memdup_user(argp, sizeof(*u.lapic));
3017                 if (IS_ERR(u.lapic))
3018                         return PTR_ERR(u.lapic);
3019
3020                 r = kvm_vcpu_ioctl_set_lapic(vcpu, u.lapic);
3021                 break;
3022         }
3023         case KVM_INTERRUPT: {
3024                 struct kvm_interrupt irq;
3025
3026                 r = -EFAULT;
3027                 if (copy_from_user(&irq, argp, sizeof irq))
3028                         goto out;
3029                 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
3030                 break;
3031         }
3032         case KVM_NMI: {
3033                 r = kvm_vcpu_ioctl_nmi(vcpu);
3034                 break;
3035         }
3036         case KVM_SET_CPUID: {
3037                 struct kvm_cpuid __user *cpuid_arg = argp;
3038                 struct kvm_cpuid cpuid;
3039
3040                 r = -EFAULT;
3041                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3042                         goto out;
3043                 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
3044                 break;
3045         }
3046         case KVM_SET_CPUID2: {
3047                 struct kvm_cpuid2 __user *cpuid_arg = argp;
3048                 struct kvm_cpuid2 cpuid;
3049
3050                 r = -EFAULT;
3051                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3052                         goto out;
3053                 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
3054                                               cpuid_arg->entries);
3055                 break;
3056         }
3057         case KVM_GET_CPUID2: {
3058                 struct kvm_cpuid2 __user *cpuid_arg = argp;
3059                 struct kvm_cpuid2 cpuid;
3060
3061                 r = -EFAULT;
3062                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3063                         goto out;
3064                 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
3065                                               cpuid_arg->entries);
3066                 if (r)
3067                         goto out;
3068                 r = -EFAULT;
3069                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
3070                         goto out;
3071                 r = 0;
3072                 break;
3073         }
3074         case KVM_GET_MSRS:
3075                 r = msr_io(vcpu, argp, kvm_get_msr, 1);
3076                 break;
3077         case KVM_SET_MSRS:
3078                 r = msr_io(vcpu, argp, do_set_msr, 0);
3079                 break;
3080         case KVM_TPR_ACCESS_REPORTING: {
3081                 struct kvm_tpr_access_ctl tac;
3082
3083                 r = -EFAULT;
3084                 if (copy_from_user(&tac, argp, sizeof tac))
3085                         goto out;
3086                 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
3087                 if (r)
3088                         goto out;
3089                 r = -EFAULT;
3090                 if (copy_to_user(argp, &tac, sizeof tac))
3091                         goto out;
3092                 r = 0;
3093                 break;
3094         };
3095         case KVM_SET_VAPIC_ADDR: {
3096                 struct kvm_vapic_addr va;
3097
3098                 r = -EINVAL;
3099                 if (!irqchip_in_kernel(vcpu->kvm))
3100                         goto out;
3101                 r = -EFAULT;
3102                 if (copy_from_user(&va, argp, sizeof va))
3103                         goto out;
3104                 r = 0;
3105                 kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
3106                 break;
3107         }
3108         case KVM_X86_SETUP_MCE: {
3109                 u64 mcg_cap;
3110
3111                 r = -EFAULT;
3112                 if (copy_from_user(&mcg_cap, argp, sizeof mcg_cap))
3113                         goto out;
3114                 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
3115                 break;
3116         }
3117         case KVM_X86_SET_MCE: {
3118                 struct kvm_x86_mce mce;
3119
3120                 r = -EFAULT;
3121                 if (copy_from_user(&mce, argp, sizeof mce))
3122                         goto out;
3123                 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
3124                 break;
3125         }
3126         case KVM_GET_VCPU_EVENTS: {
3127                 struct kvm_vcpu_events events;
3128
3129                 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
3130
3131                 r = -EFAULT;
3132                 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
3133                         break;
3134                 r = 0;
3135                 break;
3136         }
3137         case KVM_SET_VCPU_EVENTS: {
3138                 struct kvm_vcpu_events events;
3139
3140                 r = -EFAULT;
3141                 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
3142                         break;
3143
3144                 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
3145                 break;
3146         }
3147         case KVM_GET_DEBUGREGS: {
3148                 struct kvm_debugregs dbgregs;
3149
3150                 kvm_vcpu_ioctl_x86_get_debugregs(vcpu, &dbgregs);
3151
3152                 r = -EFAULT;
3153                 if (copy_to_user(argp, &dbgregs,
3154                                  sizeof(struct kvm_debugregs)))
3155                         break;
3156                 r = 0;
3157                 break;
3158         }
3159         case KVM_SET_DEBUGREGS: {
3160                 struct kvm_debugregs dbgregs;
3161
3162                 r = -EFAULT;
3163                 if (copy_from_user(&dbgregs, argp,
3164                                    sizeof(struct kvm_debugregs)))
3165                         break;
3166
3167                 r = kvm_vcpu_ioctl_x86_set_debugregs(vcpu, &dbgregs);
3168                 break;
3169         }
3170         case KVM_GET_XSAVE: {
3171                 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL);
3172                 r = -ENOMEM;
3173                 if (!u.xsave)
3174                         break;
3175
3176                 kvm_vcpu_ioctl_x86_get_xsave(vcpu, u.xsave);
3177
3178                 r = -EFAULT;
3179                 if (copy_to_user(argp, u.xsave, sizeof(struct kvm_xsave)))
3180                         break;
3181                 r = 0;
3182                 break;
3183         }
3184         case KVM_SET_XSAVE: {
3185                 u.xsave = memdup_user(argp, sizeof(*u.xsave));
3186                 if (IS_ERR(u.xsave))
3187                         return PTR_ERR(u.xsave);
3188
3189                 r = kvm_vcpu_ioctl_x86_set_xsave(vcpu, u.xsave);
3190                 break;
3191         }
3192         case KVM_GET_XCRS: {
3193                 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL);
3194                 r = -ENOMEM;
3195                 if (!u.xcrs)
3196                         break;
3197
3198                 kvm_vcpu_ioctl_x86_get_xcrs(vcpu, u.xcrs);
3199
3200                 r = -EFAULT;
3201                 if (copy_to_user(argp, u.xcrs,
3202                                  sizeof(struct kvm_xcrs)))
3203                         break;
3204                 r = 0;
3205                 break;
3206         }
3207         case KVM_SET_XCRS: {
3208                 u.xcrs = memdup_user(argp, sizeof(*u.xcrs));
3209                 if (IS_ERR(u.xcrs))
3210                         return PTR_ERR(u.xcrs);
3211
3212                 r = kvm_vcpu_ioctl_x86_set_xcrs(vcpu, u.xcrs);
3213                 break;
3214         }
3215         case KVM_SET_TSC_KHZ: {
3216                 u32 user_tsc_khz;
3217
3218                 r = -EINVAL;
3219                 user_tsc_khz = (u32)arg;
3220
3221                 if (user_tsc_khz >= kvm_max_guest_tsc_khz)
3222                         goto out;
3223
3224                 if (user_tsc_khz == 0)
3225                         user_tsc_khz = tsc_khz;
3226
3227                 kvm_set_tsc_khz(vcpu, user_tsc_khz);
3228
3229                 r = 0;
3230                 goto out;
3231         }
3232         case KVM_GET_TSC_KHZ: {
3233                 r = vcpu->arch.virtual_tsc_khz;
3234                 goto out;
3235         }
3236         case KVM_KVMCLOCK_CTRL: {
3237                 r = kvm_set_guest_paused(vcpu);
3238                 goto out;
3239         }
3240         default:
3241                 r = -EINVAL;
3242         }
3243 out:
3244         kfree(u.buffer);
3245         return r;
3246 }
3247
3248 int kvm_arch_vcpu_fault(struct kvm_vcpu *vcpu, struct vm_fault *vmf)
3249 {
3250         return VM_FAULT_SIGBUS;
3251 }
3252
3253 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
3254 {
3255         int ret;
3256
3257         if (addr > (unsigned int)(-3 * PAGE_SIZE))
3258                 return -EINVAL;
3259         ret = kvm_x86_ops->set_tss_addr(kvm, addr);
3260         return ret;
3261 }
3262
3263 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
3264                                               u64 ident_addr)
3265 {
3266         kvm->arch.ept_identity_map_addr = ident_addr;
3267         return 0;
3268 }
3269
3270 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
3271                                           u32 kvm_nr_mmu_pages)
3272 {
3273         if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
3274                 return -EINVAL;
3275
3276         mutex_lock(&kvm->slots_lock);
3277         spin_lock(&kvm->mmu_lock);
3278
3279         kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
3280         kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
3281
3282         spin_unlock(&kvm->mmu_lock);
3283         mutex_unlock(&kvm->slots_lock);
3284         return 0;
3285 }
3286
3287 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
3288 {
3289         return kvm->arch.n_max_mmu_pages;
3290 }
3291
3292 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3293 {
3294         int r;
3295
3296         r = 0;
3297         switch (chip->chip_id) {
3298         case KVM_IRQCHIP_PIC_MASTER:
3299                 memcpy(&chip->chip.pic,
3300                         &pic_irqchip(kvm)->pics[0],
3301                         sizeof(struct kvm_pic_state));
3302                 break;
3303         case KVM_IRQCHIP_PIC_SLAVE:
3304                 memcpy(&chip->chip.pic,
3305                         &pic_irqchip(kvm)->pics[1],
3306                         sizeof(struct kvm_pic_state));
3307                 break;
3308         case KVM_IRQCHIP_IOAPIC:
3309                 r = kvm_get_ioapic(kvm, &chip->chip.ioapic);
3310                 break;
3311         default:
3312                 r = -EINVAL;
3313                 break;
3314         }
3315         return r;
3316 }
3317
3318 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3319 {
3320         int r;
3321
3322         r = 0;
3323         switch (chip->chip_id) {
3324         case KVM_IRQCHIP_PIC_MASTER:
3325                 spin_lock(&pic_irqchip(kvm)->lock);
3326                 memcpy(&pic_irqchip(kvm)->pics[0],
3327                         &chip->chip.pic,
3328                         sizeof(struct kvm_pic_state));
3329                 spin_unlock(&pic_irqchip(kvm)->lock);
3330                 break;
3331         case KVM_IRQCHIP_PIC_SLAVE:
3332                 spin_lock(&pic_irqchip(kvm)->lock);
3333                 memcpy(&pic_irqchip(kvm)->pics[1],
3334                         &chip->chip.pic,
3335                         sizeof(struct kvm_pic_state));
3336                 spin_unlock(&pic_irqchip(kvm)->lock);
3337                 break;
3338         case KVM_IRQCHIP_IOAPIC:
3339                 r = kvm_set_ioapic(kvm, &chip->chip.ioapic);
3340                 break;
3341         default:
3342                 r = -EINVAL;
3343                 break;
3344         }
3345         kvm_pic_update_irq(pic_irqchip(kvm));
3346         return r;
3347 }
3348
3349 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3350 {
3351         int r = 0;
3352
3353         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3354         memcpy(ps, &kvm->arch.vpit->pit_state, sizeof(struct kvm_pit_state));
3355         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3356         return r;
3357 }
3358
3359 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3360 {
3361         int r = 0;
3362
3363         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3364         memcpy(&kvm->arch.vpit->pit_state, ps, sizeof(struct kvm_pit_state));
3365         kvm_pit_load_count(kvm, 0, ps->channels[0].count, 0);
3366         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3367         return r;
3368 }
3369
3370 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3371 {
3372         int r = 0;
3373
3374         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3375         memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
3376                 sizeof(ps->channels));
3377         ps->flags = kvm->arch.vpit->pit_state.flags;
3378         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3379         memset(&ps->reserved, 0, sizeof(ps->reserved));
3380         return r;
3381 }
3382
3383 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3384 {
3385         int r = 0, start = 0;
3386         u32 prev_legacy, cur_legacy;
3387         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3388         prev_legacy = kvm->arch.vpit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
3389         cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
3390         if (!prev_legacy && cur_legacy)
3391                 start = 1;
3392         memcpy(&kvm->arch.vpit->pit_state.channels, &ps->channels,
3393                sizeof(kvm->arch.vpit->pit_state.channels));
3394         kvm->arch.vpit->pit_state.flags = ps->flags;
3395         kvm_pit_load_count(kvm, 0, kvm->arch.vpit->pit_state.channels[0].count, start);
3396         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3397         return r;
3398 }
3399
3400 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
3401                                  struct kvm_reinject_control *control)
3402 {
3403         if (!kvm->arch.vpit)
3404                 return -ENXIO;
3405         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3406         kvm->arch.vpit->pit_state.reinject = control->pit_reinject;
3407         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3408         return 0;
3409 }
3410
3411 /**
3412  * kvm_vm_ioctl_get_dirty_log - get and clear the log of dirty pages in a slot
3413  * @kvm: kvm instance
3414  * @log: slot id and address to which we copy the log
3415  *
3416  * We need to keep it in mind that VCPU threads can write to the bitmap
3417  * concurrently.  So, to avoid losing data, we keep the following order for
3418  * each bit:
3419  *
3420  *   1. Take a snapshot of the bit and clear it if needed.
3421  *   2. Write protect the corresponding page.
3422  *   3. Flush TLB's if needed.
3423  *   4. Copy the snapshot to the userspace.
3424  *
3425  * Between 2 and 3, the guest may write to the page using the remaining TLB
3426  * entry.  This is not a problem because the page will be reported dirty at
3427  * step 4 using the snapshot taken before and step 3 ensures that successive
3428  * writes will be logged for the next call.
3429  */
3430 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm, struct kvm_dirty_log *log)
3431 {
3432         int r;
3433         struct kvm_memory_slot *memslot;
3434         unsigned long n, i;
3435         unsigned long *dirty_bitmap;
3436         unsigned long *dirty_bitmap_buffer;
3437         bool is_dirty = false;
3438
3439         mutex_lock(&kvm->slots_lock);
3440
3441         r = -EINVAL;
3442         if (log->slot >= KVM_MEMORY_SLOTS)
3443                 goto out;
3444
3445         memslot = id_to_memslot(kvm->memslots, log->slot);
3446
3447         dirty_bitmap = memslot->dirty_bitmap;
3448         r = -ENOENT;
3449         if (!dirty_bitmap)
3450                 goto out;
3451
3452         n = kvm_dirty_bitmap_bytes(memslot);
3453
3454         dirty_bitmap_buffer = dirty_bitmap + n / sizeof(long);
3455         memset(dirty_bitmap_buffer, 0, n);
3456
3457         spin_lock(&kvm->mmu_lock);
3458
3459         for (i = 0; i < n / sizeof(long); i++) {
3460                 unsigned long mask;
3461                 gfn_t offset;
3462
3463                 if (!dirty_bitmap[i])
3464                         continue;
3465
3466                 is_dirty = true;
3467
3468                 mask = xchg(&dirty_bitmap[i], 0);
3469                 dirty_bitmap_buffer[i] = mask;
3470
3471                 offset = i * BITS_PER_LONG;
3472                 kvm_mmu_write_protect_pt_masked(kvm, memslot, offset, mask);
3473         }
3474         if (is_dirty)
3475                 kvm_flush_remote_tlbs(kvm);
3476
3477         spin_unlock(&kvm->mmu_lock);
3478
3479         r = -EFAULT;
3480         if (copy_to_user(log->dirty_bitmap, dirty_bitmap_buffer, n))
3481                 goto out;
3482
3483         r = 0;
3484 out:
3485         mutex_unlock(&kvm->slots_lock);
3486         return r;
3487 }
3488
3489 int kvm_vm_ioctl_irq_line(struct kvm *kvm, struct kvm_irq_level *irq_event)
3490 {
3491         if (!irqchip_in_kernel(kvm))
3492                 return -ENXIO;
3493
3494         irq_event->status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
3495                                         irq_event->irq, irq_event->level);
3496         return 0;
3497 }
3498
3499 long kvm_arch_vm_ioctl(struct file *filp,
3500                        unsigned int ioctl, unsigned long arg)
3501 {
3502         struct kvm *kvm = filp->private_data;
3503         void __user *argp = (void __user *)arg;
3504         int r = -ENOTTY;
3505         /*
3506          * This union makes it completely explicit to gcc-3.x
3507          * that these two variables' stack usage should be
3508          * combined, not added together.
3509          */
3510         union {
3511                 struct kvm_pit_state ps;
3512                 struct kvm_pit_state2 ps2;
3513                 struct kvm_pit_config pit_config;
3514         } u;
3515
3516         switch (ioctl) {
3517         case KVM_SET_TSS_ADDR:
3518                 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
3519                 break;
3520         case KVM_SET_IDENTITY_MAP_ADDR: {
3521                 u64 ident_addr;
3522
3523                 r = -EFAULT;
3524                 if (copy_from_user(&ident_addr, argp, sizeof ident_addr))
3525                         goto out;
3526                 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
3527                 break;
3528         }
3529         case KVM_SET_NR_MMU_PAGES:
3530                 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
3531                 break;
3532         case KVM_GET_NR_MMU_PAGES:
3533                 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
3534                 break;
3535         case KVM_CREATE_IRQCHIP: {
3536                 struct kvm_pic *vpic;
3537
3538                 mutex_lock(&kvm->lock);
3539                 r = -EEXIST;
3540                 if (kvm->arch.vpic)
3541                         goto create_irqchip_unlock;
3542                 r = -EINVAL;
3543                 if (atomic_read(&kvm->online_vcpus))
3544                         goto create_irqchip_unlock;
3545                 r = -ENOMEM;
3546                 vpic = kvm_create_pic(kvm);
3547                 if (vpic) {
3548                         r = kvm_ioapic_init(kvm);
3549                         if (r) {
3550                                 mutex_lock(&kvm->slots_lock);
3551                                 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS,
3552                                                           &vpic->dev_master);
3553                                 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS,
3554                                                           &vpic->dev_slave);
3555                                 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS,
3556                                                           &vpic->dev_eclr);
3557                                 mutex_unlock(&kvm->slots_lock);
3558                                 kfree(vpic);
3559                                 goto create_irqchip_unlock;
3560                         }
3561                 } else
3562                         goto create_irqchip_unlock;
3563                 smp_wmb();
3564                 kvm->arch.vpic = vpic;
3565                 smp_wmb();
3566                 r = kvm_setup_default_irq_routing(kvm);
3567                 if (r) {
3568                         mutex_lock(&kvm->slots_lock);
3569                         mutex_lock(&kvm->irq_lock);
3570                         kvm_ioapic_destroy(kvm);
3571                         kvm_destroy_pic(kvm);
3572                         mutex_unlock(&kvm->irq_lock);
3573                         mutex_unlock(&kvm->slots_lock);
3574                 }
3575         create_irqchip_unlock:
3576                 mutex_unlock(&kvm->lock);
3577                 break;
3578         }
3579         case KVM_CREATE_PIT:
3580                 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
3581                 goto create_pit;
3582         case KVM_CREATE_PIT2:
3583                 r = -EFAULT;
3584                 if (copy_from_user(&u.pit_config, argp,
3585                                    sizeof(struct kvm_pit_config)))
3586                         goto out;
3587         create_pit:
3588                 mutex_lock(&kvm->slots_lock);
3589                 r = -EEXIST;
3590                 if (kvm->arch.vpit)
3591                         goto create_pit_unlock;
3592                 r = -ENOMEM;
3593                 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
3594                 if (kvm->arch.vpit)
3595                         r = 0;
3596         create_pit_unlock:
3597                 mutex_unlock(&kvm->slots_lock);
3598                 break;
3599         case KVM_GET_IRQCHIP: {
3600                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3601                 struct kvm_irqchip *chip;
3602
3603                 chip = memdup_user(argp, sizeof(*chip));
3604                 if (IS_ERR(chip)) {
3605                         r = PTR_ERR(chip);
3606                         goto out;
3607                 }
3608
3609                 r = -ENXIO;
3610                 if (!irqchip_in_kernel(kvm))
3611                         goto get_irqchip_out;
3612                 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
3613                 if (r)
3614                         goto get_irqchip_out;
3615                 r = -EFAULT;
3616                 if (copy_to_user(argp, chip, sizeof *chip))
3617                         goto get_irqchip_out;
3618                 r = 0;
3619         get_irqchip_out:
3620                 kfree(chip);
3621                 break;
3622         }
3623         case KVM_SET_IRQCHIP: {
3624                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3625                 struct kvm_irqchip *chip;
3626
3627                 chip = memdup_user(argp, sizeof(*chip));
3628                 if (IS_ERR(chip)) {
3629                         r = PTR_ERR(chip);
3630                         goto out;
3631                 }
3632
3633                 r = -ENXIO;
3634                 if (!irqchip_in_kernel(kvm))
3635                         goto set_irqchip_out;
3636                 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
3637                 if (r)
3638                         goto set_irqchip_out;
3639                 r = 0;
3640         set_irqchip_out:
3641                 kfree(chip);
3642                 break;
3643         }
3644         case KVM_GET_PIT: {
3645                 r = -EFAULT;
3646                 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
3647                         goto out;
3648                 r = -ENXIO;
3649                 if (!kvm->arch.vpit)
3650                         goto out;
3651                 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
3652                 if (r)
3653                         goto out;
3654                 r = -EFAULT;
3655                 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
3656                         goto out;
3657                 r = 0;
3658                 break;
3659         }
3660         case KVM_SET_PIT: {
3661                 r = -EFAULT;
3662                 if (copy_from_user(&u.ps, argp, sizeof u.ps))
3663                         goto out;
3664                 r = -ENXIO;
3665                 if (!kvm->arch.vpit)
3666                         goto out;
3667                 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
3668                 break;
3669         }
3670         case KVM_GET_PIT2: {
3671                 r = -ENXIO;
3672                 if (!kvm->arch.vpit)
3673                         goto out;
3674                 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
3675                 if (r)
3676                         goto out;
3677                 r = -EFAULT;
3678                 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
3679                         goto out;
3680                 r = 0;
3681                 break;
3682         }
3683         case KVM_SET_PIT2: {
3684                 r = -EFAULT;
3685                 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
3686                         goto out;
3687                 r = -ENXIO;
3688                 if (!kvm->arch.vpit)
3689                         goto out;
3690                 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
3691                 break;
3692         }
3693         case KVM_REINJECT_CONTROL: {
3694                 struct kvm_reinject_control control;
3695                 r =  -EFAULT;
3696                 if (copy_from_user(&control, argp, sizeof(control)))
3697                         goto out;
3698                 r = kvm_vm_ioctl_reinject(kvm, &control);
3699                 break;
3700         }
3701         case KVM_XEN_HVM_CONFIG: {
3702                 r = -EFAULT;
3703                 if (copy_from_user(&kvm->arch.xen_hvm_config, argp,
3704                                    sizeof(struct kvm_xen_hvm_config)))
3705                         goto out;
3706                 r = -EINVAL;
3707                 if (kvm->arch.xen_hvm_config.flags)
3708                         goto out;
3709                 r = 0;
3710                 break;
3711         }
3712         case KVM_SET_CLOCK: {
3713                 struct kvm_clock_data user_ns;
3714                 u64 now_ns;
3715                 s64 delta;
3716
3717                 r = -EFAULT;
3718                 if (copy_from_user(&user_ns, argp, sizeof(user_ns)))
3719                         goto out;
3720
3721                 r = -EINVAL;
3722                 if (user_ns.flags)
3723                         goto out;
3724
3725                 r = 0;
3726                 local_irq_disable();
3727                 now_ns = get_kernel_ns();
3728                 delta = user_ns.clock - now_ns;
3729                 local_irq_enable();
3730                 kvm->arch.kvmclock_offset = delta;
3731                 break;
3732         }
3733         case KVM_GET_CLOCK: {
3734                 struct kvm_clock_data user_ns;
3735                 u64 now_ns;
3736
3737                 local_irq_disable();
3738                 now_ns = get_kernel_ns();
3739                 user_ns.clock = kvm->arch.kvmclock_offset + now_ns;
3740                 local_irq_enable();
3741                 user_ns.flags = 0;
3742                 memset(&user_ns.pad, 0, sizeof(user_ns.pad));
3743
3744                 r = -EFAULT;
3745                 if (copy_to_user(argp, &user_ns, sizeof(user_ns)))
3746                         goto out;
3747                 r = 0;
3748                 break;
3749         }
3750
3751         default:
3752                 ;
3753         }
3754 out:
3755         return r;
3756 }
3757
3758 static void kvm_init_msr_list(void)
3759 {
3760         u32 dummy[2];
3761         unsigned i, j;
3762
3763         /* skip the first msrs in the list. KVM-specific */
3764         for (i = j = KVM_SAVE_MSRS_BEGIN; i < ARRAY_SIZE(msrs_to_save); i++) {
3765                 if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
3766                         continue;
3767                 if (j < i)
3768                         msrs_to_save[j] = msrs_to_save[i];
3769                 j++;
3770         }
3771         num_msrs_to_save = j;
3772 }
3773
3774 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
3775                            const void *v)
3776 {
3777         int handled = 0;
3778         int n;
3779
3780         do {
3781                 n = min(len, 8);
3782                 if (!(vcpu->arch.apic &&
3783                       !kvm_iodevice_write(&vcpu->arch.apic->dev, addr, n, v))
3784                     && kvm_io_bus_write(vcpu->kvm, KVM_MMIO_BUS, addr, n, v))
3785                         break;
3786                 handled += n;
3787                 addr += n;
3788                 len -= n;
3789                 v += n;
3790         } while (len);
3791
3792         return handled;
3793 }
3794
3795 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
3796 {
3797         int handled = 0;
3798         int n;
3799
3800         do {
3801                 n = min(len, 8);
3802                 if (!(vcpu->arch.apic &&
3803                       !kvm_iodevice_read(&vcpu->arch.apic->dev, addr, n, v))
3804                     && kvm_io_bus_read(vcpu->kvm, KVM_MMIO_BUS, addr, n, v))
3805                         break;
3806                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, n, addr, *(u64 *)v);
3807                 handled += n;
3808                 addr += n;
3809                 len -= n;
3810                 v += n;
3811         } while (len);
3812
3813         return handled;
3814 }
3815
3816 static void kvm_set_segment(struct kvm_vcpu *vcpu,
3817                         struct kvm_segment *var, int seg)
3818 {
3819         kvm_x86_ops->set_segment(vcpu, var, seg);
3820 }
3821
3822 void kvm_get_segment(struct kvm_vcpu *vcpu,
3823                      struct kvm_segment *var, int seg)
3824 {
3825         kvm_x86_ops->get_segment(vcpu, var, seg);
3826 }
3827
3828 gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access)
3829 {
3830         gpa_t t_gpa;
3831         struct x86_exception exception;
3832
3833         BUG_ON(!mmu_is_nested(vcpu));
3834
3835         /* NPT walks are always user-walks */
3836         access |= PFERR_USER_MASK;
3837         t_gpa  = vcpu->arch.mmu.gva_to_gpa(vcpu, gpa, access, &exception);
3838
3839         return t_gpa;
3840 }
3841
3842 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
3843                               struct x86_exception *exception)
3844 {
3845         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3846         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
3847 }
3848
3849  gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva,
3850                                 struct x86_exception *exception)
3851 {
3852         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3853         access |= PFERR_FETCH_MASK;
3854         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
3855 }
3856
3857 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
3858                                struct x86_exception *exception)
3859 {
3860         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3861         access |= PFERR_WRITE_MASK;
3862         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
3863 }
3864
3865 /* uses this to access any guest's mapped memory without checking CPL */
3866 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
3867                                 struct x86_exception *exception)
3868 {
3869         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, 0, exception);
3870 }
3871
3872 static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
3873                                       struct kvm_vcpu *vcpu, u32 access,
3874                                       struct x86_exception *exception)
3875 {
3876         void *data = val;
3877         int r = X86EMUL_CONTINUE;
3878
3879         while (bytes) {
3880                 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access,
3881                                                             exception);
3882                 unsigned offset = addr & (PAGE_SIZE-1);
3883                 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
3884                 int ret;
3885
3886                 if (gpa == UNMAPPED_GVA)
3887                         return X86EMUL_PROPAGATE_FAULT;
3888                 ret = kvm_read_guest(vcpu->kvm, gpa, data, toread);
3889                 if (ret < 0) {
3890                         r = X86EMUL_IO_NEEDED;
3891                         goto out;
3892                 }
3893
3894                 bytes -= toread;
3895                 data += toread;
3896                 addr += toread;
3897         }
3898 out:
3899         return r;
3900 }
3901
3902 /* used for instruction fetching */
3903 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt *ctxt,
3904                                 gva_t addr, void *val, unsigned int bytes,
3905                                 struct x86_exception *exception)
3906 {
3907         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
3908         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3909
3910         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu,
3911                                           access | PFERR_FETCH_MASK,
3912                                           exception);
3913 }
3914
3915 int kvm_read_guest_virt(struct x86_emulate_ctxt *ctxt,
3916                                gva_t addr, void *val, unsigned int bytes,
3917                                struct x86_exception *exception)
3918 {
3919         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
3920         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3921
3922         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
3923                                           exception);
3924 }
3925 EXPORT_SYMBOL_GPL(kvm_read_guest_virt);
3926
3927 static int kvm_read_guest_virt_system(struct x86_emulate_ctxt *ctxt,
3928                                       gva_t addr, void *val, unsigned int bytes,
3929                                       struct x86_exception *exception)
3930 {
3931         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
3932         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, 0, exception);
3933 }
3934
3935 int kvm_write_guest_virt_system(struct x86_emulate_ctxt *ctxt,
3936                                        gva_t addr, void *val,
3937                                        unsigned int bytes,
3938                                        struct x86_exception *exception)
3939 {
3940         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
3941         void *data = val;
3942         int r = X86EMUL_CONTINUE;
3943
3944         while (bytes) {
3945                 gpa_t gpa =  vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr,
3946                                                              PFERR_WRITE_MASK,
3947                                                              exception);
3948                 unsigned offset = addr & (PAGE_SIZE-1);
3949                 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
3950                 int ret;
3951
3952                 if (gpa == UNMAPPED_GVA)
3953                         return X86EMUL_PROPAGATE_FAULT;
3954                 ret = kvm_write_guest(vcpu->kvm, gpa, data, towrite);
3955                 if (ret < 0) {
3956                         r = X86EMUL_IO_NEEDED;
3957                         goto out;
3958                 }
3959
3960                 bytes -= towrite;
3961                 data += towrite;
3962                 addr += towrite;
3963         }
3964 out:
3965         return r;
3966 }
3967 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system);
3968
3969 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
3970                                 gpa_t *gpa, struct x86_exception *exception,
3971                                 bool write)
3972 {
3973         u32 access = ((kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0)
3974                 | (write ? PFERR_WRITE_MASK : 0);
3975
3976         if (vcpu_match_mmio_gva(vcpu, gva)
3977             && !permission_fault(vcpu->arch.walk_mmu, vcpu->arch.access, access)) {
3978                 *gpa = vcpu->arch.mmio_gfn << PAGE_SHIFT |
3979                                         (gva & (PAGE_SIZE - 1));
3980                 trace_vcpu_match_mmio(gva, *gpa, write, false);
3981                 return 1;
3982         }
3983
3984         *gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
3985
3986         if (*gpa == UNMAPPED_GVA)
3987                 return -1;
3988
3989         /* For APIC access vmexit */
3990         if ((*gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
3991                 return 1;
3992
3993         if (vcpu_match_mmio_gpa(vcpu, *gpa)) {
3994                 trace_vcpu_match_mmio(gva, *gpa, write, true);
3995                 return 1;
3996         }
3997
3998         return 0;
3999 }
4000
4001 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
4002                         const void *val, int bytes)
4003 {
4004         int ret;
4005
4006         ret = kvm_write_guest(vcpu->kvm, gpa, val, bytes);
4007         if (ret < 0)
4008                 return 0;
4009         kvm_mmu_pte_write(vcpu, gpa, val, bytes);
4010         return 1;
4011 }
4012
4013 struct read_write_emulator_ops {
4014         int (*read_write_prepare)(struct kvm_vcpu *vcpu, void *val,
4015                                   int bytes);
4016         int (*read_write_emulate)(struct kvm_vcpu *vcpu, gpa_t gpa,
4017                                   void *val, int bytes);
4018         int (*read_write_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
4019                                int bytes, void *val);
4020         int (*read_write_exit_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
4021                                     void *val, int bytes);
4022         bool write;
4023 };
4024
4025 static int read_prepare(struct kvm_vcpu *vcpu, void *val, int bytes)
4026 {
4027         if (vcpu->mmio_read_completed) {
4028                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
4029                                vcpu->mmio_fragments[0].gpa, *(u64 *)val);
4030                 vcpu->mmio_read_completed = 0;
4031                 return 1;
4032         }
4033
4034         return 0;
4035 }
4036
4037 static int read_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
4038                         void *val, int bytes)
4039 {
4040         return !kvm_read_guest(vcpu->kvm, gpa, val, bytes);
4041 }
4042
4043 static int write_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
4044                          void *val, int bytes)
4045 {
4046         return emulator_write_phys(vcpu, gpa, val, bytes);
4047 }
4048
4049 static int write_mmio(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes, void *val)
4050 {
4051         trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, *(u64 *)val);
4052         return vcpu_mmio_write(vcpu, gpa, bytes, val);
4053 }
4054
4055 static int read_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
4056                           void *val, int bytes)
4057 {
4058         trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, 0);
4059         return X86EMUL_IO_NEEDED;
4060 }
4061
4062 static int write_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
4063                            void *val, int bytes)
4064 {
4065         struct kvm_mmio_fragment *frag = &vcpu->mmio_fragments[0];
4066
4067         memcpy(vcpu->run->mmio.data, frag->data, min(8u, frag->len));
4068         return X86EMUL_CONTINUE;
4069 }
4070
4071 static const struct read_write_emulator_ops read_emultor = {
4072         .read_write_prepare = read_prepare,
4073         .read_write_emulate = read_emulate,
4074         .read_write_mmio = vcpu_mmio_read,
4075         .read_write_exit_mmio = read_exit_mmio,
4076 };
4077
4078 static const struct read_write_emulator_ops write_emultor = {
4079         .read_write_emulate = write_emulate,
4080         .read_write_mmio = write_mmio,
4081         .read_write_exit_mmio = write_exit_mmio,
4082         .write = true,
4083 };
4084
4085 static int emulator_read_write_onepage(unsigned long addr, void *val,
4086                                        unsigned int bytes,
4087                                        struct x86_exception *exception,
4088                                        struct kvm_vcpu *vcpu,
4089                                        const struct read_write_emulator_ops *ops)
4090 {
4091         gpa_t gpa;
4092         int handled, ret;
4093         bool write = ops->write;
4094         struct kvm_mmio_fragment *frag;
4095
4096         ret = vcpu_mmio_gva_to_gpa(vcpu, addr, &gpa, exception, write);
4097
4098         if (ret < 0)
4099                 return X86EMUL_PROPAGATE_FAULT;
4100
4101         /* For APIC access vmexit */
4102         if (ret)
4103                 goto mmio;
4104
4105         if (ops->read_write_emulate(vcpu, gpa, val, bytes))
4106                 return X86EMUL_CONTINUE;
4107
4108 mmio:
4109         /*
4110          * Is this MMIO handled locally?
4111          */
4112         handled = ops->read_write_mmio(vcpu, gpa, bytes, val);
4113         if (handled == bytes)
4114                 return X86EMUL_CONTINUE;
4115
4116         gpa += handled;
4117         bytes -= handled;
4118         val += handled;
4119
4120         WARN_ON(vcpu->mmio_nr_fragments >= KVM_MAX_MMIO_FRAGMENTS);
4121         frag = &vcpu->mmio_fragments[vcpu->mmio_nr_fragments++];
4122         frag->gpa = gpa;
4123         frag->data = val;
4124         frag->len = bytes;
4125         return X86EMUL_CONTINUE;
4126 }
4127
4128 int emulator_read_write(struct x86_emulate_ctxt *ctxt, unsigned long addr,
4129                         void *val, unsigned int bytes,
4130                         struct x86_exception *exception,
4131                         const struct read_write_emulator_ops *ops)
4132 {
4133         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4134         gpa_t gpa;
4135         int rc;
4136
4137         if (ops->read_write_prepare &&
4138                   ops->read_write_prepare(vcpu, val, bytes))
4139                 return X86EMUL_CONTINUE;
4140
4141         vcpu->mmio_nr_fragments = 0;
4142
4143         /* Crossing a page boundary? */
4144         if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
4145                 int now;
4146
4147                 now = -addr & ~PAGE_MASK;
4148                 rc = emulator_read_write_onepage(addr, val, now, exception,
4149                                                  vcpu, ops);
4150
4151                 if (rc != X86EMUL_CONTINUE)
4152                         return rc;
4153                 addr += now;
4154                 val += now;
4155                 bytes -= now;
4156         }
4157
4158         rc = emulator_read_write_onepage(addr, val, bytes, exception,
4159                                          vcpu, ops);
4160         if (rc != X86EMUL_CONTINUE)
4161                 return rc;
4162
4163         if (!vcpu->mmio_nr_fragments)
4164                 return rc;
4165
4166         gpa = vcpu->mmio_fragments[0].gpa;
4167
4168         vcpu->mmio_needed = 1;
4169         vcpu->mmio_cur_fragment = 0;
4170
4171         vcpu->run->mmio.len = min(8u, vcpu->mmio_fragments[0].len);
4172         vcpu->run->mmio.is_write = vcpu->mmio_is_write = ops->write;
4173         vcpu->run->exit_reason = KVM_EXIT_MMIO;
4174         vcpu->run->mmio.phys_addr = gpa;
4175
4176         return ops->read_write_exit_mmio(vcpu, gpa, val, bytes);
4177 }
4178
4179 static int emulator_read_emulated(struct x86_emulate_ctxt *ctxt,
4180                                   unsigned long addr,
4181                                   void *val,
4182                                   unsigned int bytes,
4183                                   struct x86_exception *exception)
4184 {
4185         return emulator_read_write(ctxt, addr, val, bytes,
4186                                    exception, &read_emultor);
4187 }
4188
4189 int emulator_write_emulated(struct x86_emulate_ctxt *ctxt,
4190                             unsigned long addr,
4191                             const void *val,
4192                             unsigned int bytes,
4193                             struct x86_exception *exception)
4194 {
4195         return emulator_read_write(ctxt, addr, (void *)val, bytes,
4196                                    exception, &write_emultor);
4197 }
4198
4199 #define CMPXCHG_TYPE(t, ptr, old, new) \
4200         (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
4201
4202 #ifdef CONFIG_X86_64
4203 #  define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
4204 #else
4205 #  define CMPXCHG64(ptr, old, new) \
4206         (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
4207 #endif
4208
4209 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt *ctxt,
4210                                      unsigned long addr,
4211                                      const void *old,
4212                                      const void *new,
4213                                      unsigned int bytes,
4214                                      struct x86_exception *exception)
4215 {
4216         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4217         gpa_t gpa;
4218         struct page *page;
4219         char *kaddr;
4220         bool exchanged;
4221
4222         /* guests cmpxchg8b have to be emulated atomically */
4223         if (bytes > 8 || (bytes & (bytes - 1)))
4224                 goto emul_write;
4225
4226         gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
4227
4228         if (gpa == UNMAPPED_GVA ||
4229             (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
4230                 goto emul_write;
4231
4232         if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
4233                 goto emul_write;
4234
4235         page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
4236         if (is_error_page(page))
4237                 goto emul_write;
4238
4239         kaddr = kmap_atomic(page);
4240         kaddr += offset_in_page(gpa);
4241         switch (bytes) {
4242         case 1:
4243                 exchanged = CMPXCHG_TYPE(u8, kaddr, old, new);
4244                 break;
4245         case 2:
4246                 exchanged = CMPXCHG_TYPE(u16, kaddr, old, new);
4247                 break;
4248         case 4:
4249                 exchanged = CMPXCHG_TYPE(u32, kaddr, old, new);
4250                 break;
4251         case 8:
4252                 exchanged = CMPXCHG64(kaddr, old, new);
4253                 break;
4254         default:
4255                 BUG();
4256         }
4257         kunmap_atomic(kaddr);
4258         kvm_release_page_dirty(page);
4259
4260         if (!exchanged)
4261                 return X86EMUL_CMPXCHG_FAILED;
4262
4263         kvm_mmu_pte_write(vcpu, gpa, new, bytes);
4264
4265         return X86EMUL_CONTINUE;
4266
4267 emul_write:
4268         printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
4269
4270         return emulator_write_emulated(ctxt, addr, new, bytes, exception);
4271 }
4272
4273 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
4274 {
4275         /* TODO: String I/O for in kernel device */
4276         int r;
4277
4278         if (vcpu->arch.pio.in)
4279                 r = kvm_io_bus_read(vcpu->kvm, KVM_PIO_BUS, vcpu->arch.pio.port,
4280                                     vcpu->arch.pio.size, pd);
4281         else
4282                 r = kvm_io_bus_write(vcpu->kvm, KVM_PIO_BUS,
4283                                      vcpu->arch.pio.port, vcpu->arch.pio.size,
4284                                      pd);
4285         return r;
4286 }
4287
4288 static int emulator_pio_in_out(struct kvm_vcpu *vcpu, int size,
4289                                unsigned short port, void *val,
4290                                unsigned int count, bool in)
4291 {
4292         trace_kvm_pio(!in, port, size, count);
4293
4294         vcpu->arch.pio.port = port;
4295         vcpu->arch.pio.in = in;
4296         vcpu->arch.pio.count  = count;
4297         vcpu->arch.pio.size = size;
4298
4299         if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
4300                 vcpu->arch.pio.count = 0;
4301                 return 1;
4302         }
4303
4304         vcpu->run->exit_reason = KVM_EXIT_IO;
4305         vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
4306         vcpu->run->io.size = size;
4307         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
4308         vcpu->run->io.count = count;
4309         vcpu->run->io.port = port;
4310
4311         return 0;
4312 }
4313
4314 static int emulator_pio_in_emulated(struct x86_emulate_ctxt *ctxt,
4315                                     int size, unsigned short port, void *val,
4316                                     unsigned int count)
4317 {
4318         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4319         int ret;
4320
4321         if (vcpu->arch.pio.count)
4322                 goto data_avail;
4323
4324         ret = emulator_pio_in_out(vcpu, size, port, val, count, true);
4325         if (ret) {
4326 data_avail:
4327                 memcpy(val, vcpu->arch.pio_data, size * count);
4328                 vcpu->arch.pio.count = 0;
4329                 return 1;
4330         }
4331
4332         return 0;
4333 }
4334
4335 static int emulator_pio_out_emulated(struct x86_emulate_ctxt *ctxt,
4336                                      int size, unsigned short port,
4337                                      const void *val, unsigned int count)
4338 {
4339         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4340
4341         memcpy(vcpu->arch.pio_data, val, size * count);
4342         return emulator_pio_in_out(vcpu, size, port, (void *)val, count, false);
4343 }
4344
4345 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
4346 {
4347         return kvm_x86_ops->get_segment_base(vcpu, seg);
4348 }
4349
4350 static void emulator_invlpg(struct x86_emulate_ctxt *ctxt, ulong address)
4351 {
4352         kvm_mmu_invlpg(emul_to_vcpu(ctxt), address);
4353 }
4354
4355 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu)
4356 {
4357         if (!need_emulate_wbinvd(vcpu))
4358                 return X86EMUL_CONTINUE;
4359
4360         if (kvm_x86_ops->has_wbinvd_exit()) {
4361                 int cpu = get_cpu();
4362
4363                 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
4364                 smp_call_function_many(vcpu->arch.wbinvd_dirty_mask,
4365                                 wbinvd_ipi, NULL, 1);
4366                 put_cpu();
4367                 cpumask_clear(vcpu->arch.wbinvd_dirty_mask);
4368         } else
4369                 wbinvd();
4370         return X86EMUL_CONTINUE;
4371 }
4372 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd);
4373
4374 static void emulator_wbinvd(struct x86_emulate_ctxt *ctxt)
4375 {
4376         kvm_emulate_wbinvd(emul_to_vcpu(ctxt));
4377 }
4378
4379 int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long *dest)
4380 {
4381         return _kvm_get_dr(emul_to_vcpu(ctxt), dr, dest);
4382 }
4383
4384 int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long value)
4385 {
4386
4387         return __kvm_set_dr(emul_to_vcpu(ctxt), dr, value);
4388 }
4389
4390 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
4391 {
4392         return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
4393 }
4394
4395 static unsigned long emulator_get_cr(struct x86_emulate_ctxt *ctxt, int cr)
4396 {
4397         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4398         unsigned long value;
4399
4400         switch (cr) {
4401         case 0:
4402                 value = kvm_read_cr0(vcpu);
4403                 break;
4404         case 2:
4405                 value = vcpu->arch.cr2;
4406                 break;
4407         case 3:
4408                 value = kvm_read_cr3(vcpu);
4409                 break;
4410         case 4:
4411                 value = kvm_read_cr4(vcpu);
4412                 break;
4413         case 8:
4414                 value = kvm_get_cr8(vcpu);
4415                 break;
4416         default:
4417                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
4418                 return 0;
4419         }
4420
4421         return value;
4422 }
4423
4424 static int emulator_set_cr(struct x86_emulate_ctxt *ctxt, int cr, ulong val)
4425 {
4426         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4427         int res = 0;
4428
4429         switch (cr) {
4430         case 0:
4431                 res = kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
4432                 break;
4433         case 2:
4434                 vcpu->arch.cr2 = val;
4435                 break;
4436         case 3:
4437                 res = kvm_set_cr3(vcpu, val);
4438                 break;
4439         case 4:
4440                 res = kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
4441                 break;
4442         case 8:
4443                 res = kvm_set_cr8(vcpu, val);
4444                 break;
4445         default:
4446                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
4447                 res = -1;
4448         }
4449
4450         return res;
4451 }
4452
4453 static void emulator_set_rflags(struct x86_emulate_ctxt *ctxt, ulong val)
4454 {
4455         kvm_set_rflags(emul_to_vcpu(ctxt), val);
4456 }
4457
4458 static int emulator_get_cpl(struct x86_emulate_ctxt *ctxt)
4459 {
4460         return kvm_x86_ops->get_cpl(emul_to_vcpu(ctxt));
4461 }
4462
4463 static void emulator_get_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4464 {
4465         kvm_x86_ops->get_gdt(emul_to_vcpu(ctxt), dt);
4466 }
4467
4468 static void emulator_get_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4469 {
4470         kvm_x86_ops->get_idt(emul_to_vcpu(ctxt), dt);
4471 }
4472
4473 static void emulator_set_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4474 {
4475         kvm_x86_ops->set_gdt(emul_to_vcpu(ctxt), dt);
4476 }
4477
4478 static void emulator_set_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4479 {
4480         kvm_x86_ops->set_idt(emul_to_vcpu(ctxt), dt);
4481 }
4482
4483 static unsigned long emulator_get_cached_segment_base(
4484         struct x86_emulate_ctxt *ctxt, int seg)
4485 {
4486         return get_segment_base(emul_to_vcpu(ctxt), seg);
4487 }
4488
4489 static bool emulator_get_segment(struct x86_emulate_ctxt *ctxt, u16 *selector,
4490                                  struct desc_struct *desc, u32 *base3,
4491                                  int seg)
4492 {
4493         struct kvm_segment var;
4494
4495         kvm_get_segment(emul_to_vcpu(ctxt), &var, seg);
4496         *selector = var.selector;
4497
4498         if (var.unusable)
4499                 return false;
4500
4501         if (var.g)
4502                 var.limit >>= 12;
4503         set_desc_limit(desc, var.limit);
4504         set_desc_base(desc, (unsigned long)var.base);
4505 #ifdef CONFIG_X86_64
4506         if (base3)
4507                 *base3 = var.base >> 32;
4508 #endif
4509         desc->type = var.type;
4510         desc->s = var.s;
4511         desc->dpl = var.dpl;
4512         desc->p = var.present;
4513         desc->avl = var.avl;
4514         desc->l = var.l;
4515         desc->d = var.db;
4516         desc->g = var.g;
4517
4518         return true;
4519 }
4520
4521 static void emulator_set_segment(struct x86_emulate_ctxt *ctxt, u16 selector,
4522                                  struct desc_struct *desc, u32 base3,
4523                                  int seg)
4524 {
4525         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4526         struct kvm_segment var;
4527
4528         var.selector = selector;
4529         var.base = get_desc_base(desc);
4530 #ifdef CONFIG_X86_64
4531         var.base |= ((u64)base3) << 32;
4532 #endif
4533         var.limit = get_desc_limit(desc);
4534         if (desc->g)
4535                 var.limit = (var.limit << 12) | 0xfff;
4536         var.type = desc->type;
4537         var.present = desc->p;
4538         var.dpl = desc->dpl;
4539         var.db = desc->d;
4540         var.s = desc->s;
4541         var.l = desc->l;
4542         var.g = desc->g;
4543         var.avl = desc->avl;
4544         var.present = desc->p;
4545         var.unusable = !var.present;
4546         var.padding = 0;
4547
4548         kvm_set_segment(vcpu, &var, seg);
4549         return;
4550 }
4551
4552 static int emulator_get_msr(struct x86_emulate_ctxt *ctxt,
4553                             u32 msr_index, u64 *pdata)
4554 {
4555         return kvm_get_msr(emul_to_vcpu(ctxt), msr_index, pdata);
4556 }
4557
4558 static int emulator_set_msr(struct x86_emulate_ctxt *ctxt,
4559                             u32 msr_index, u64 data)
4560 {
4561         struct msr_data msr;
4562
4563         msr.data = data;
4564         msr.index = msr_index;
4565         msr.host_initiated = false;
4566         return kvm_set_msr(emul_to_vcpu(ctxt), &msr);
4567 }
4568
4569 static int emulator_read_pmc(struct x86_emulate_ctxt *ctxt,
4570                              u32 pmc, u64 *pdata)
4571 {
4572         return kvm_pmu_read_pmc(emul_to_vcpu(ctxt), pmc, pdata);
4573 }
4574
4575 static void emulator_halt(struct x86_emulate_ctxt *ctxt)
4576 {
4577         emul_to_vcpu(ctxt)->arch.halt_request = 1;
4578 }
4579
4580 static void emulator_get_fpu(struct x86_emulate_ctxt *ctxt)
4581 {
4582         preempt_disable();
4583         kvm_load_guest_fpu(emul_to_vcpu(ctxt));
4584         /*
4585          * CR0.TS may reference the host fpu state, not the guest fpu state,
4586          * so it may be clear at this point.
4587          */
4588         clts();
4589 }
4590
4591 static void emulator_put_fpu(struct x86_emulate_ctxt *ctxt)
4592 {
4593         preempt_enable();
4594 }
4595
4596 static int emulator_intercept(struct x86_emulate_ctxt *ctxt,
4597                               struct x86_instruction_info *info,
4598                               enum x86_intercept_stage stage)
4599 {
4600         return kvm_x86_ops->check_intercept(emul_to_vcpu(ctxt), info, stage);
4601 }
4602
4603 static void emulator_get_cpuid(struct x86_emulate_ctxt *ctxt,
4604                                u32 *eax, u32 *ebx, u32 *ecx, u32 *edx)
4605 {
4606         kvm_cpuid(emul_to_vcpu(ctxt), eax, ebx, ecx, edx);
4607 }
4608
4609 static ulong emulator_read_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg)
4610 {
4611         return kvm_register_read(emul_to_vcpu(ctxt), reg);
4612 }
4613
4614 static void emulator_write_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg, ulong val)
4615 {
4616         kvm_register_write(emul_to_vcpu(ctxt), reg, val);
4617 }
4618
4619 static const struct x86_emulate_ops emulate_ops = {
4620         .read_gpr            = emulator_read_gpr,
4621         .write_gpr           = emulator_write_gpr,
4622         .read_std            = kvm_read_guest_virt_system,
4623         .write_std           = kvm_write_guest_virt_system,
4624         .fetch               = kvm_fetch_guest_virt,
4625         .read_emulated       = emulator_read_emulated,
4626         .write_emulated      = emulator_write_emulated,
4627         .cmpxchg_emulated    = emulator_cmpxchg_emulated,
4628         .invlpg              = emulator_invlpg,
4629         .pio_in_emulated     = emulator_pio_in_emulated,
4630         .pio_out_emulated    = emulator_pio_out_emulated,
4631         .get_segment         = emulator_get_segment,
4632         .set_segment         = emulator_set_segment,
4633         .get_cached_segment_base = emulator_get_cached_segment_base,
4634         .get_gdt             = emulator_get_gdt,
4635         .get_idt             = emulator_get_idt,
4636         .set_gdt             = emulator_set_gdt,
4637         .set_idt             = emulator_set_idt,
4638         .get_cr              = emulator_get_cr,
4639         .set_cr              = emulator_set_cr,
4640         .set_rflags          = emulator_set_rflags,
4641         .cpl                 = emulator_get_cpl,
4642         .get_dr              = emulator_get_dr,
4643         .set_dr              = emulator_set_dr,
4644         .set_msr             = emulator_set_msr,
4645         .get_msr             = emulator_get_msr,
4646         .read_pmc            = emulator_read_pmc,
4647         .halt                = emulator_halt,
4648         .wbinvd              = emulator_wbinvd,
4649         .fix_hypercall       = emulator_fix_hypercall,
4650         .get_fpu             = emulator_get_fpu,
4651         .put_fpu             = emulator_put_fpu,
4652         .intercept           = emulator_intercept,
4653         .get_cpuid           = emulator_get_cpuid,
4654 };
4655
4656 static void toggle_interruptibility(struct kvm_vcpu *vcpu, u32 mask)
4657 {
4658         u32 int_shadow = kvm_x86_ops->get_interrupt_shadow(vcpu, mask);
4659         /*
4660          * an sti; sti; sequence only disable interrupts for the first
4661          * instruction. So, if the last instruction, be it emulated or
4662          * not, left the system with the INT_STI flag enabled, it
4663          * means that the last instruction is an sti. We should not
4664          * leave the flag on in this case. The same goes for mov ss
4665          */
4666         if (!(int_shadow & mask))
4667                 kvm_x86_ops->set_interrupt_shadow(vcpu, mask);
4668 }
4669
4670 static void inject_emulated_exception(struct kvm_vcpu *vcpu)
4671 {
4672         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4673         if (ctxt->exception.vector == PF_VECTOR)
4674                 kvm_propagate_fault(vcpu, &ctxt->exception);
4675         else if (ctxt->exception.error_code_valid)
4676                 kvm_queue_exception_e(vcpu, ctxt->exception.vector,
4677                                       ctxt->exception.error_code);
4678         else
4679                 kvm_queue_exception(vcpu, ctxt->exception.vector);
4680 }
4681
4682 static void init_decode_cache(struct x86_emulate_ctxt *ctxt)
4683 {
4684         memset(&ctxt->twobyte, 0,
4685                (void *)&ctxt->_regs - (void *)&ctxt->twobyte);
4686
4687         ctxt->fetch.start = 0;
4688         ctxt->fetch.end = 0;
4689         ctxt->io_read.pos = 0;
4690         ctxt->io_read.end = 0;
4691         ctxt->mem_read.pos = 0;
4692         ctxt->mem_read.end = 0;
4693 }
4694
4695 static void init_emulate_ctxt(struct kvm_vcpu *vcpu)
4696 {
4697         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4698         int cs_db, cs_l;
4699
4700         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
4701
4702         ctxt->eflags = kvm_get_rflags(vcpu);
4703         ctxt->eip = kvm_rip_read(vcpu);
4704         ctxt->mode = (!is_protmode(vcpu))               ? X86EMUL_MODE_REAL :
4705                      (ctxt->eflags & X86_EFLAGS_VM)     ? X86EMUL_MODE_VM86 :
4706                      cs_l                               ? X86EMUL_MODE_PROT64 :
4707                      cs_db                              ? X86EMUL_MODE_PROT32 :
4708                                                           X86EMUL_MODE_PROT16;
4709         ctxt->guest_mode = is_guest_mode(vcpu);
4710
4711         init_decode_cache(ctxt);
4712         vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
4713 }
4714
4715 int kvm_inject_realmode_interrupt(struct kvm_vcpu *vcpu, int irq, int inc_eip)
4716 {
4717         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4718         int ret;
4719
4720         init_emulate_ctxt(vcpu);
4721
4722         ctxt->op_bytes = 2;
4723         ctxt->ad_bytes = 2;
4724         ctxt->_eip = ctxt->eip + inc_eip;
4725         ret = emulate_int_real(ctxt, irq);
4726
4727         if (ret != X86EMUL_CONTINUE)
4728                 return EMULATE_FAIL;
4729
4730         ctxt->eip = ctxt->_eip;
4731         kvm_rip_write(vcpu, ctxt->eip);
4732         kvm_set_rflags(vcpu, ctxt->eflags);
4733
4734         if (irq == NMI_VECTOR)
4735                 vcpu->arch.nmi_pending = 0;
4736         else
4737                 vcpu->arch.interrupt.pending = false;
4738
4739         return EMULATE_DONE;
4740 }
4741 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt);
4742
4743 static int handle_emulation_failure(struct kvm_vcpu *vcpu)
4744 {
4745         int r = EMULATE_DONE;
4746
4747         ++vcpu->stat.insn_emulation_fail;
4748         trace_kvm_emulate_insn_failed(vcpu);
4749         if (!is_guest_mode(vcpu)) {
4750                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
4751                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
4752                 vcpu->run->internal.ndata = 0;
4753                 r = EMULATE_FAIL;
4754         }
4755         kvm_queue_exception(vcpu, UD_VECTOR);
4756
4757         return r;
4758 }
4759
4760 static bool reexecute_instruction(struct kvm_vcpu *vcpu, gva_t gva)
4761 {
4762         gpa_t gpa;
4763         pfn_t pfn;
4764
4765         if (tdp_enabled)
4766                 return false;
4767
4768         /*
4769          * if emulation was due to access to shadowed page table
4770          * and it failed try to unshadow page and re-enter the
4771          * guest to let CPU execute the instruction.
4772          */
4773         if (kvm_mmu_unprotect_page_virt(vcpu, gva))
4774                 return true;
4775
4776         gpa = kvm_mmu_gva_to_gpa_system(vcpu, gva, NULL);
4777
4778         if (gpa == UNMAPPED_GVA)
4779                 return true; /* let cpu generate fault */
4780
4781         /*
4782          * Do not retry the unhandleable instruction if it faults on the
4783          * readonly host memory, otherwise it will goto a infinite loop:
4784          * retry instruction -> write #PF -> emulation fail -> retry
4785          * instruction -> ...
4786          */
4787         pfn = gfn_to_pfn(vcpu->kvm, gpa_to_gfn(gpa));
4788         if (!is_error_noslot_pfn(pfn)) {
4789                 kvm_release_pfn_clean(pfn);
4790                 return true;
4791         }
4792
4793         return false;
4794 }
4795
4796 static bool retry_instruction(struct x86_emulate_ctxt *ctxt,
4797                               unsigned long cr2,  int emulation_type)
4798 {
4799         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4800         unsigned long last_retry_eip, last_retry_addr, gpa = cr2;
4801
4802         last_retry_eip = vcpu->arch.last_retry_eip;
4803         last_retry_addr = vcpu->arch.last_retry_addr;
4804
4805         /*
4806          * If the emulation is caused by #PF and it is non-page_table
4807          * writing instruction, it means the VM-EXIT is caused by shadow
4808          * page protected, we can zap the shadow page and retry this
4809          * instruction directly.
4810          *
4811          * Note: if the guest uses a non-page-table modifying instruction
4812          * on the PDE that points to the instruction, then we will unmap
4813          * the instruction and go to an infinite loop. So, we cache the
4814          * last retried eip and the last fault address, if we meet the eip
4815          * and the address again, we can break out of the potential infinite
4816          * loop.
4817          */
4818         vcpu->arch.last_retry_eip = vcpu->arch.last_retry_addr = 0;
4819
4820         if (!(emulation_type & EMULTYPE_RETRY))
4821                 return false;
4822
4823         if (x86_page_table_writing_insn(ctxt))
4824                 return false;
4825
4826         if (ctxt->eip == last_retry_eip && last_retry_addr == cr2)
4827                 return false;
4828
4829         vcpu->arch.last_retry_eip = ctxt->eip;
4830         vcpu->arch.last_retry_addr = cr2;
4831
4832         if (!vcpu->arch.mmu.direct_map)
4833                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2, NULL);
4834
4835         kvm_mmu_unprotect_page(vcpu->kvm, gpa >> PAGE_SHIFT);
4836
4837         return true;
4838 }
4839
4840 static int complete_emulated_mmio(struct kvm_vcpu *vcpu);
4841 static int complete_emulated_pio(struct kvm_vcpu *vcpu);
4842
4843 int x86_emulate_instruction(struct kvm_vcpu *vcpu,
4844                             unsigned long cr2,
4845                             int emulation_type,
4846                             void *insn,
4847                             int insn_len)
4848 {
4849         int r;
4850         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4851         bool writeback = true;
4852
4853         kvm_clear_exception_queue(vcpu);
4854
4855         if (!(emulation_type & EMULTYPE_NO_DECODE)) {
4856                 init_emulate_ctxt(vcpu);
4857                 ctxt->interruptibility = 0;
4858                 ctxt->have_exception = false;
4859                 ctxt->perm_ok = false;
4860
4861                 ctxt->only_vendor_specific_insn
4862                         = emulation_type & EMULTYPE_TRAP_UD;
4863
4864                 r = x86_decode_insn(ctxt, insn, insn_len);
4865
4866                 trace_kvm_emulate_insn_start(vcpu);
4867                 ++vcpu->stat.insn_emulation;
4868                 if (r != EMULATION_OK)  {
4869                         if (emulation_type & EMULTYPE_TRAP_UD)
4870                                 return EMULATE_FAIL;
4871                         if (reexecute_instruction(vcpu, cr2))
4872                                 return EMULATE_DONE;
4873                         if (emulation_type & EMULTYPE_SKIP)
4874                                 return EMULATE_FAIL;
4875                         return handle_emulation_failure(vcpu);
4876                 }
4877         }
4878
4879         if (emulation_type & EMULTYPE_SKIP) {
4880                 kvm_rip_write(vcpu, ctxt->_eip);
4881                 return EMULATE_DONE;
4882         }
4883
4884         if (retry_instruction(ctxt, cr2, emulation_type))
4885                 return EMULATE_DONE;
4886
4887         /* this is needed for vmware backdoor interface to work since it
4888            changes registers values  during IO operation */
4889         if (vcpu->arch.emulate_regs_need_sync_from_vcpu) {
4890                 vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
4891                 emulator_invalidate_register_cache(ctxt);
4892         }
4893
4894 restart:
4895         r = x86_emulate_insn(ctxt);
4896
4897         if (r == EMULATION_INTERCEPTED)
4898                 return EMULATE_DONE;
4899
4900         if (r == EMULATION_FAILED) {
4901                 if (reexecute_instruction(vcpu, cr2))
4902                         return EMULATE_DONE;
4903
4904                 return handle_emulation_failure(vcpu);
4905         }
4906
4907         if (ctxt->have_exception) {
4908                 inject_emulated_exception(vcpu);
4909                 r = EMULATE_DONE;
4910         } else if (vcpu->arch.pio.count) {
4911                 if (!vcpu->arch.pio.in)
4912                         vcpu->arch.pio.count = 0;
4913                 else {
4914                         writeback = false;
4915                         vcpu->arch.complete_userspace_io = complete_emulated_pio;
4916                 }
4917                 r = EMULATE_DO_MMIO;
4918         } else if (vcpu->mmio_needed) {
4919                 if (!vcpu->mmio_is_write)
4920                         writeback = false;
4921                 r = EMULATE_DO_MMIO;
4922                 vcpu->arch.complete_userspace_io = complete_emulated_mmio;
4923         } else if (r == EMULATION_RESTART)
4924                 goto restart;
4925         else
4926                 r = EMULATE_DONE;
4927
4928         if (writeback) {
4929                 toggle_interruptibility(vcpu, ctxt->interruptibility);
4930                 kvm_set_rflags(vcpu, ctxt->eflags);
4931                 kvm_make_request(KVM_REQ_EVENT, vcpu);
4932                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
4933                 kvm_rip_write(vcpu, ctxt->eip);
4934         } else
4935                 vcpu->arch.emulate_regs_need_sync_to_vcpu = true;
4936
4937         return r;
4938 }
4939 EXPORT_SYMBOL_GPL(x86_emulate_instruction);
4940
4941 int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size, unsigned short port)
4942 {
4943         unsigned long val = kvm_register_read(vcpu, VCPU_REGS_RAX);
4944         int ret = emulator_pio_out_emulated(&vcpu->arch.emulate_ctxt,
4945                                             size, port, &val, 1);
4946         /* do not return to emulator after return from userspace */
4947         vcpu->arch.pio.count = 0;
4948         return ret;
4949 }
4950 EXPORT_SYMBOL_GPL(kvm_fast_pio_out);
4951
4952 static void tsc_bad(void *info)
4953 {
4954         __this_cpu_write(cpu_tsc_khz, 0);
4955 }
4956
4957 static void tsc_khz_changed(void *data)
4958 {
4959         struct cpufreq_freqs *freq = data;
4960         unsigned long khz = 0;
4961
4962         if (data)
4963                 khz = freq->new;
4964         else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
4965                 khz = cpufreq_quick_get(raw_smp_processor_id());
4966         if (!khz)
4967                 khz = tsc_khz;
4968         __this_cpu_write(cpu_tsc_khz, khz);
4969 }
4970
4971 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
4972                                      void *data)
4973 {
4974         struct cpufreq_freqs *freq = data;
4975         struct kvm *kvm;
4976         struct kvm_vcpu *vcpu;
4977         int i, send_ipi = 0;
4978
4979         /*
4980          * We allow guests to temporarily run on slowing clocks,
4981          * provided we notify them after, or to run on accelerating
4982          * clocks, provided we notify them before.  Thus time never
4983          * goes backwards.
4984          *
4985          * However, we have a problem.  We can't atomically update
4986          * the frequency of a given CPU from this function; it is
4987          * merely a notifier, which can be called from any CPU.
4988          * Changing the TSC frequency at arbitrary points in time
4989          * requires a recomputation of local variables related to
4990          * the TSC for each VCPU.  We must flag these local variables
4991          * to be updated and be sure the update takes place with the
4992          * new frequency before any guests proceed.
4993          *
4994          * Unfortunately, the combination of hotplug CPU and frequency
4995          * change creates an intractable locking scenario; the order
4996          * of when these callouts happen is undefined with respect to
4997          * CPU hotplug, and they can race with each other.  As such,
4998          * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
4999          * undefined; you can actually have a CPU frequency change take
5000          * place in between the computation of X and the setting of the
5001          * variable.  To protect against this problem, all updates of
5002          * the per_cpu tsc_khz variable are done in an interrupt
5003          * protected IPI, and all callers wishing to update the value
5004          * must wait for a synchronous IPI to complete (which is trivial
5005          * if the caller is on the CPU already).  This establishes the
5006          * necessary total order on variable updates.
5007          *
5008          * Note that because a guest time update may take place
5009          * anytime after the setting of the VCPU's request bit, the
5010          * correct TSC value must be set before the request.  However,
5011          * to ensure the update actually makes it to any guest which
5012          * starts running in hardware virtualization between the set
5013          * and the acquisition of the spinlock, we must also ping the
5014          * CPU after setting the request bit.
5015          *
5016          */
5017
5018         if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
5019                 return 0;
5020         if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
5021                 return 0;
5022
5023         smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
5024
5025         raw_spin_lock(&kvm_lock);
5026         list_for_each_entry(kvm, &vm_list, vm_list) {
5027                 kvm_for_each_vcpu(i, vcpu, kvm) {
5028                         if (vcpu->cpu != freq->cpu)
5029                                 continue;
5030                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
5031                         if (vcpu->cpu != smp_processor_id())
5032                                 send_ipi = 1;
5033                 }
5034         }
5035         raw_spin_unlock(&kvm_lock);
5036
5037         if (freq->old < freq->new && send_ipi) {
5038                 /*
5039                  * We upscale the frequency.  Must make the guest
5040                  * doesn't see old kvmclock values while running with
5041                  * the new frequency, otherwise we risk the guest sees
5042                  * time go backwards.
5043                  *
5044                  * In case we update the frequency for another cpu
5045                  * (which might be in guest context) send an interrupt
5046                  * to kick the cpu out of guest context.  Next time
5047                  * guest context is entered kvmclock will be updated,
5048                  * so the guest will not see stale values.
5049                  */
5050                 smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
5051         }
5052         return 0;
5053 }
5054
5055 static struct notifier_block kvmclock_cpufreq_notifier_block = {
5056         .notifier_call  = kvmclock_cpufreq_notifier
5057 };
5058
5059 static int kvmclock_cpu_notifier(struct notifier_block *nfb,
5060                                         unsigned long action, void *hcpu)
5061 {
5062         unsigned int cpu = (unsigned long)hcpu;
5063
5064         switch (action) {
5065                 case CPU_ONLINE:
5066                 case CPU_DOWN_FAILED:
5067                         smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
5068                         break;
5069                 case CPU_DOWN_PREPARE:
5070                         smp_call_function_single(cpu, tsc_bad, NULL, 1);
5071                         break;
5072         }
5073         return NOTIFY_OK;
5074 }
5075
5076 static struct notifier_block kvmclock_cpu_notifier_block = {
5077         .notifier_call  = kvmclock_cpu_notifier,
5078         .priority = -INT_MAX
5079 };
5080
5081 static void kvm_timer_init(void)
5082 {
5083         int cpu;
5084
5085         max_tsc_khz = tsc_khz;
5086         register_hotcpu_notifier(&kvmclock_cpu_notifier_block);
5087         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
5088 #ifdef CONFIG_CPU_FREQ
5089                 struct cpufreq_policy policy;
5090                 memset(&policy, 0, sizeof(policy));
5091                 cpu = get_cpu();
5092                 cpufreq_get_policy(&policy, cpu);
5093                 if (policy.cpuinfo.max_freq)
5094                         max_tsc_khz = policy.cpuinfo.max_freq;
5095                 put_cpu();
5096 #endif
5097                 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
5098                                           CPUFREQ_TRANSITION_NOTIFIER);
5099         }
5100         pr_debug("kvm: max_tsc_khz = %ld\n", max_tsc_khz);
5101         for_each_online_cpu(cpu)
5102                 smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
5103 }
5104
5105 static DEFINE_PER_CPU(struct kvm_vcpu *, current_vcpu);
5106
5107 int kvm_is_in_guest(void)
5108 {
5109         return __this_cpu_read(current_vcpu) != NULL;
5110 }
5111
5112 static int kvm_is_user_mode(void)
5113 {
5114         int user_mode = 3;
5115
5116         if (__this_cpu_read(current_vcpu))
5117                 user_mode = kvm_x86_ops->get_cpl(__this_cpu_read(current_vcpu));
5118
5119         return user_mode != 0;
5120 }
5121
5122 static unsigned long kvm_get_guest_ip(void)
5123 {
5124         unsigned long ip = 0;
5125
5126         if (__this_cpu_read(current_vcpu))
5127                 ip = kvm_rip_read(__this_cpu_read(current_vcpu));
5128
5129         return ip;
5130 }
5131
5132 static struct perf_guest_info_callbacks kvm_guest_cbs = {
5133         .is_in_guest            = kvm_is_in_guest,
5134         .is_user_mode           = kvm_is_user_mode,
5135         .get_guest_ip           = kvm_get_guest_ip,
5136 };
5137
5138 void kvm_before_handle_nmi(struct kvm_vcpu *vcpu)
5139 {
5140         __this_cpu_write(current_vcpu, vcpu);
5141 }
5142 EXPORT_SYMBOL_GPL(kvm_before_handle_nmi);
5143
5144 void kvm_after_handle_nmi(struct kvm_vcpu *vcpu)
5145 {
5146         __this_cpu_write(current_vcpu, NULL);
5147 }
5148 EXPORT_SYMBOL_GPL(kvm_after_handle_nmi);
5149
5150 static void kvm_set_mmio_spte_mask(void)
5151 {
5152         u64 mask;
5153         int maxphyaddr = boot_cpu_data.x86_phys_bits;
5154
5155         /*
5156          * Set the reserved bits and the present bit of an paging-structure
5157          * entry to generate page fault with PFER.RSV = 1.
5158          */
5159         mask = ((1ull << (62 - maxphyaddr + 1)) - 1) << maxphyaddr;
5160         mask |= 1ull;
5161
5162 #ifdef CONFIG_X86_64
5163         /*
5164          * If reserved bit is not supported, clear the present bit to disable
5165          * mmio page fault.
5166          */
5167         if (maxphyaddr == 52)
5168                 mask &= ~1ull;
5169 #endif
5170
5171         kvm_mmu_set_mmio_spte_mask(mask);
5172 }
5173
5174 #ifdef CONFIG_X86_64
5175 static void pvclock_gtod_update_fn(struct work_struct *work)
5176 {
5177         struct kvm *kvm;
5178
5179         struct kvm_vcpu *vcpu;
5180         int i;
5181
5182         raw_spin_lock(&kvm_lock);
5183         list_for_each_entry(kvm, &vm_list, vm_list)
5184                 kvm_for_each_vcpu(i, vcpu, kvm)
5185                         set_bit(KVM_REQ_MASTERCLOCK_UPDATE, &vcpu->requests);
5186         atomic_set(&kvm_guest_has_master_clock, 0);
5187         raw_spin_unlock(&kvm_lock);
5188 }
5189
5190 static DECLARE_WORK(pvclock_gtod_work, pvclock_gtod_update_fn);
5191
5192 /*
5193  * Notification about pvclock gtod data update.
5194  */
5195 static int pvclock_gtod_notify(struct notifier_block *nb, unsigned long unused,
5196                                void *priv)
5197 {
5198         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
5199         struct timekeeper *tk = priv;
5200
5201         update_pvclock_gtod(tk);
5202
5203         /* disable master clock if host does not trust, or does not
5204          * use, TSC clocksource
5205          */
5206         if (gtod->clock.vclock_mode != VCLOCK_TSC &&
5207             atomic_read(&kvm_guest_has_master_clock) != 0)
5208                 queue_work(system_long_wq, &pvclock_gtod_work);
5209
5210         return 0;
5211 }
5212
5213 static struct notifier_block pvclock_gtod_notifier = {
5214         .notifier_call = pvclock_gtod_notify,
5215 };
5216 #endif
5217
5218 int kvm_arch_init(void *opaque)
5219 {
5220         int r;
5221         struct kvm_x86_ops *ops = (struct kvm_x86_ops *)opaque;
5222
5223         if (kvm_x86_ops) {
5224                 printk(KERN_ERR "kvm: already loaded the other module\n");
5225                 r = -EEXIST;
5226                 goto out;
5227         }
5228
5229         if (!ops->cpu_has_kvm_support()) {
5230                 printk(KERN_ERR "kvm: no hardware support\n");
5231                 r = -EOPNOTSUPP;
5232                 goto out;
5233         }
5234         if (ops->disabled_by_bios()) {
5235                 printk(KERN_ERR "kvm: disabled by bios\n");
5236                 r = -EOPNOTSUPP;
5237                 goto out;
5238         }
5239
5240         r = -ENOMEM;
5241         shared_msrs = alloc_percpu(struct kvm_shared_msrs);
5242         if (!shared_msrs) {
5243                 printk(KERN_ERR "kvm: failed to allocate percpu kvm_shared_msrs\n");
5244                 goto out;
5245         }
5246
5247         r = kvm_mmu_module_init();
5248         if (r)
5249                 goto out_free_percpu;
5250
5251         kvm_set_mmio_spte_mask();
5252         kvm_init_msr_list();
5253
5254         kvm_x86_ops = ops;
5255         kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
5256                         PT_DIRTY_MASK, PT64_NX_MASK, 0);
5257
5258         kvm_timer_init();
5259
5260         perf_register_guest_info_callbacks(&kvm_guest_cbs);
5261
5262         if (cpu_has_xsave)
5263                 host_xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);
5264
5265         kvm_lapic_init();
5266 #ifdef CONFIG_X86_64
5267         pvclock_gtod_register_notifier(&pvclock_gtod_notifier);
5268 #endif
5269
5270         return 0;
5271
5272 out_free_percpu:
5273         free_percpu(shared_msrs);
5274 out:
5275         return r;
5276 }
5277
5278 void kvm_arch_exit(void)
5279 {
5280         perf_unregister_guest_info_callbacks(&kvm_guest_cbs);
5281
5282         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
5283                 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
5284                                             CPUFREQ_TRANSITION_NOTIFIER);
5285         unregister_hotcpu_notifier(&kvmclock_cpu_notifier_block);
5286 #ifdef CONFIG_X86_64
5287         pvclock_gtod_unregister_notifier(&pvclock_gtod_notifier);
5288 #endif
5289         kvm_x86_ops = NULL;
5290         kvm_mmu_module_exit();
5291         free_percpu(shared_msrs);
5292 }
5293
5294 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
5295 {
5296         ++vcpu->stat.halt_exits;
5297         if (irqchip_in_kernel(vcpu->kvm)) {
5298                 vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
5299                 return 1;
5300         } else {
5301                 vcpu->run->exit_reason = KVM_EXIT_HLT;
5302                 return 0;
5303         }
5304 }
5305 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
5306
5307 int kvm_hv_hypercall(struct kvm_vcpu *vcpu)
5308 {
5309         u64 param, ingpa, outgpa, ret;
5310         uint16_t code, rep_idx, rep_cnt, res = HV_STATUS_SUCCESS, rep_done = 0;
5311         bool fast, longmode;
5312         int cs_db, cs_l;
5313
5314         /*
5315          * hypercall generates UD from non zero cpl and real mode
5316          * per HYPER-V spec
5317          */
5318         if (kvm_x86_ops->get_cpl(vcpu) != 0 || !is_protmode(vcpu)) {
5319                 kvm_queue_exception(vcpu, UD_VECTOR);
5320                 return 0;
5321         }
5322
5323         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
5324         longmode = is_long_mode(vcpu) && cs_l == 1;
5325
5326         if (!longmode) {
5327                 param = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDX) << 32) |
5328                         (kvm_register_read(vcpu, VCPU_REGS_RAX) & 0xffffffff);
5329                 ingpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RBX) << 32) |
5330                         (kvm_register_read(vcpu, VCPU_REGS_RCX) & 0xffffffff);
5331                 outgpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDI) << 32) |
5332                         (kvm_register_read(vcpu, VCPU_REGS_RSI) & 0xffffffff);
5333         }
5334 #ifdef CONFIG_X86_64
5335         else {
5336                 param = kvm_register_read(vcpu, VCPU_REGS_RCX);
5337                 ingpa = kvm_register_read(vcpu, VCPU_REGS_RDX);
5338                 outgpa = kvm_register_read(vcpu, VCPU_REGS_R8);
5339         }
5340 #endif
5341
5342         code = param & 0xffff;
5343         fast = (param >> 16) & 0x1;
5344         rep_cnt = (param >> 32) & 0xfff;
5345         rep_idx = (param >> 48) & 0xfff;
5346
5347         trace_kvm_hv_hypercall(code, fast, rep_cnt, rep_idx, ingpa, outgpa);
5348
5349         switch (code) {
5350         case HV_X64_HV_NOTIFY_LONG_SPIN_WAIT:
5351                 kvm_vcpu_on_spin(vcpu);
5352                 break;
5353         default:
5354                 res = HV_STATUS_INVALID_HYPERCALL_CODE;
5355                 break;
5356         }
5357
5358         ret = res | (((u64)rep_done & 0xfff) << 32);
5359         if (longmode) {
5360                 kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
5361         } else {
5362                 kvm_register_write(vcpu, VCPU_REGS_RDX, ret >> 32);
5363                 kvm_register_write(vcpu, VCPU_REGS_RAX, ret & 0xffffffff);
5364         }
5365
5366         return 1;
5367 }
5368
5369 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
5370 {
5371         unsigned long nr, a0, a1, a2, a3, ret;
5372         int r = 1;
5373
5374         if (kvm_hv_hypercall_enabled(vcpu->kvm))
5375                 return kvm_hv_hypercall(vcpu);
5376
5377         nr = kvm_register_read(vcpu, VCPU_REGS_RAX);
5378         a0 = kvm_register_read(vcpu, VCPU_REGS_RBX);
5379         a1 = kvm_register_read(vcpu, VCPU_REGS_RCX);
5380         a2 = kvm_register_read(vcpu, VCPU_REGS_RDX);
5381         a3 = kvm_register_read(vcpu, VCPU_REGS_RSI);
5382
5383         trace_kvm_hypercall(nr, a0, a1, a2, a3);
5384
5385         if (!is_long_mode(vcpu)) {
5386                 nr &= 0xFFFFFFFF;
5387                 a0 &= 0xFFFFFFFF;
5388                 a1 &= 0xFFFFFFFF;
5389                 a2 &= 0xFFFFFFFF;
5390                 a3 &= 0xFFFFFFFF;
5391         }
5392
5393         if (kvm_x86_ops->get_cpl(vcpu) != 0) {
5394                 ret = -KVM_EPERM;
5395                 goto out;
5396         }
5397
5398         switch (nr) {
5399         case KVM_HC_VAPIC_POLL_IRQ:
5400                 ret = 0;
5401                 break;
5402         default:
5403                 ret = -KVM_ENOSYS;
5404                 break;
5405         }
5406 out:
5407         kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
5408         ++vcpu->stat.hypercalls;
5409         return r;
5410 }
5411 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
5412
5413 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt)
5414 {
5415         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5416         char instruction[3];
5417         unsigned long rip = kvm_rip_read(vcpu);
5418
5419         /*
5420          * Blow out the MMU to ensure that no other VCPU has an active mapping
5421          * to ensure that the updated hypercall appears atomically across all
5422          * VCPUs.
5423          */
5424         kvm_mmu_zap_all(vcpu->kvm);
5425
5426         kvm_x86_ops->patch_hypercall(vcpu, instruction);
5427
5428         return emulator_write_emulated(ctxt, rip, instruction, 3, NULL);
5429 }
5430
5431 /*
5432  * Check if userspace requested an interrupt window, and that the
5433  * interrupt window is open.
5434  *
5435  * No need to exit to userspace if we already have an interrupt queued.
5436  */
5437 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
5438 {
5439         return (!irqchip_in_kernel(vcpu->kvm) && !kvm_cpu_has_interrupt(vcpu) &&
5440                 vcpu->run->request_interrupt_window &&
5441                 kvm_arch_interrupt_allowed(vcpu));
5442 }
5443
5444 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
5445 {
5446         struct kvm_run *kvm_run = vcpu->run;
5447
5448         kvm_run->if_flag = (kvm_get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
5449         kvm_run->cr8 = kvm_get_cr8(vcpu);
5450         kvm_run->apic_base = kvm_get_apic_base(vcpu);
5451         if (irqchip_in_kernel(vcpu->kvm))
5452                 kvm_run->ready_for_interrupt_injection = 1;
5453         else
5454                 kvm_run->ready_for_interrupt_injection =
5455                         kvm_arch_interrupt_allowed(vcpu) &&
5456                         !kvm_cpu_has_interrupt(vcpu) &&
5457                         !kvm_event_needs_reinjection(vcpu);
5458 }
5459
5460 static int vapic_enter(struct kvm_vcpu *vcpu)
5461 {
5462         struct kvm_lapic *apic = vcpu->arch.apic;
5463         struct page *page;
5464
5465         if (!apic || !apic->vapic_addr)
5466                 return 0;
5467
5468         page = gfn_to_page(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
5469         if (is_error_page(page))
5470                 return -EFAULT;
5471
5472         vcpu->arch.apic->vapic_page = page;
5473         return 0;
5474 }
5475
5476 static void vapic_exit(struct kvm_vcpu *vcpu)
5477 {
5478         struct kvm_lapic *apic = vcpu->arch.apic;
5479         int idx;
5480
5481         if (!apic || !apic->vapic_addr)
5482                 return;
5483
5484         idx = srcu_read_lock(&vcpu->kvm->srcu);
5485         kvm_release_page_dirty(apic->vapic_page);
5486         mark_page_dirty(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
5487         srcu_read_unlock(&vcpu->kvm->srcu, idx);
5488 }
5489
5490 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
5491 {
5492         int max_irr, tpr;
5493
5494         if (!kvm_x86_ops->update_cr8_intercept)
5495                 return;
5496
5497         if (!vcpu->arch.apic)
5498                 return;
5499
5500         if (!vcpu->arch.apic->vapic_addr)
5501                 max_irr = kvm_lapic_find_highest_irr(vcpu);
5502         else
5503                 max_irr = -1;
5504
5505         if (max_irr != -1)
5506                 max_irr >>= 4;
5507
5508         tpr = kvm_lapic_get_cr8(vcpu);
5509
5510         kvm_x86_ops->update_cr8_intercept(vcpu, tpr, max_irr);
5511 }
5512
5513 static void inject_pending_event(struct kvm_vcpu *vcpu)
5514 {
5515         /* try to reinject previous events if any */
5516         if (vcpu->arch.exception.pending) {
5517                 trace_kvm_inj_exception(vcpu->arch.exception.nr,
5518                                         vcpu->arch.exception.has_error_code,
5519                                         vcpu->arch.exception.error_code);
5520                 kvm_x86_ops->queue_exception(vcpu, vcpu->arch.exception.nr,
5521                                           vcpu->arch.exception.has_error_code,
5522                                           vcpu->arch.exception.error_code,
5523                                           vcpu->arch.exception.reinject);
5524                 return;
5525         }
5526
5527         if (vcpu->arch.nmi_injected) {
5528                 kvm_x86_ops->set_nmi(vcpu);
5529                 return;
5530         }
5531
5532         if (vcpu->arch.interrupt.pending) {
5533                 kvm_x86_ops->set_irq(vcpu);
5534                 return;
5535         }
5536
5537         /* try to inject new event if pending */
5538         if (vcpu->arch.nmi_pending) {
5539                 if (kvm_x86_ops->nmi_allowed(vcpu)) {
5540                         --vcpu->arch.nmi_pending;
5541                         vcpu->arch.nmi_injected = true;
5542                         kvm_x86_ops->set_nmi(vcpu);
5543                 }
5544         } else if (kvm_cpu_has_interrupt(vcpu)) {
5545                 if (kvm_x86_ops->interrupt_allowed(vcpu)) {
5546                         kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu),
5547                                             false);
5548                         kvm_x86_ops->set_irq(vcpu);
5549                 }
5550         }
5551 }
5552
5553 static void kvm_load_guest_xcr0(struct kvm_vcpu *vcpu)
5554 {
5555         if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE) &&
5556                         !vcpu->guest_xcr0_loaded) {
5557                 /* kvm_set_xcr() also depends on this */
5558                 xsetbv(XCR_XFEATURE_ENABLED_MASK, vcpu->arch.xcr0);
5559                 vcpu->guest_xcr0_loaded = 1;
5560         }
5561 }
5562
5563 static void kvm_put_guest_xcr0(struct kvm_vcpu *vcpu)
5564 {
5565         if (vcpu->guest_xcr0_loaded) {
5566                 if (vcpu->arch.xcr0 != host_xcr0)
5567                         xsetbv(XCR_XFEATURE_ENABLED_MASK, host_xcr0);
5568                 vcpu->guest_xcr0_loaded = 0;
5569         }
5570 }
5571
5572 static void process_nmi(struct kvm_vcpu *vcpu)
5573 {
5574         unsigned limit = 2;
5575
5576         /*
5577          * x86 is limited to one NMI running, and one NMI pending after it.
5578          * If an NMI is already in progress, limit further NMIs to just one.
5579          * Otherwise, allow two (and we'll inject the first one immediately).
5580          */
5581         if (kvm_x86_ops->get_nmi_mask(vcpu) || vcpu->arch.nmi_injected)
5582                 limit = 1;
5583
5584         vcpu->arch.nmi_pending += atomic_xchg(&vcpu->arch.nmi_queued, 0);
5585         vcpu->arch.nmi_pending = min(vcpu->arch.nmi_pending, limit);
5586         kvm_make_request(KVM_REQ_EVENT, vcpu);
5587 }
5588
5589 static void kvm_gen_update_masterclock(struct kvm *kvm)
5590 {
5591 #ifdef CONFIG_X86_64
5592         int i;
5593         struct kvm_vcpu *vcpu;
5594         struct kvm_arch *ka = &kvm->arch;
5595
5596         spin_lock(&ka->pvclock_gtod_sync_lock);
5597         kvm_make_mclock_inprogress_request(kvm);
5598         /* no guest entries from this point */
5599         pvclock_update_vm_gtod_copy(kvm);
5600
5601         kvm_for_each_vcpu(i, vcpu, kvm)
5602                 set_bit(KVM_REQ_CLOCK_UPDATE, &vcpu->requests);
5603
5604         /* guest entries allowed */
5605         kvm_for_each_vcpu(i, vcpu, kvm)
5606                 clear_bit(KVM_REQ_MCLOCK_INPROGRESS, &vcpu->requests);
5607
5608         spin_unlock(&ka->pvclock_gtod_sync_lock);
5609 #endif
5610 }
5611
5612 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
5613 {
5614         int r;
5615         bool req_int_win = !irqchip_in_kernel(vcpu->kvm) &&
5616                 vcpu->run->request_interrupt_window;
5617         bool req_immediate_exit = 0;
5618
5619         if (vcpu->requests) {
5620                 if (kvm_check_request(KVM_REQ_MMU_RELOAD, vcpu))
5621                         kvm_mmu_unload(vcpu);
5622                 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER, vcpu))
5623                         __kvm_migrate_timers(vcpu);
5624                 if (kvm_check_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu))
5625                         kvm_gen_update_masterclock(vcpu->kvm);
5626                 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE, vcpu)) {
5627                         r = kvm_guest_time_update(vcpu);
5628                         if (unlikely(r))
5629                                 goto out;
5630                 }
5631                 if (kvm_check_request(KVM_REQ_MMU_SYNC, vcpu))
5632                         kvm_mmu_sync_roots(vcpu);
5633                 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu))
5634                         kvm_x86_ops->tlb_flush(vcpu);
5635                 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS, vcpu)) {
5636                         vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
5637                         r = 0;
5638                         goto out;
5639                 }
5640                 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
5641                         vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
5642                         r = 0;
5643                         goto out;
5644                 }
5645                 if (kvm_check_request(KVM_REQ_DEACTIVATE_FPU, vcpu)) {
5646                         vcpu->fpu_active = 0;
5647                         kvm_x86_ops->fpu_deactivate(vcpu);
5648                 }
5649                 if (kvm_check_request(KVM_REQ_APF_HALT, vcpu)) {
5650                         /* Page is swapped out. Do synthetic halt */
5651                         vcpu->arch.apf.halted = true;
5652                         r = 1;
5653                         goto out;
5654                 }
5655                 if (kvm_check_request(KVM_REQ_STEAL_UPDATE, vcpu))
5656                         record_steal_time(vcpu);
5657                 if (kvm_check_request(KVM_REQ_NMI, vcpu))
5658                         process_nmi(vcpu);
5659                 req_immediate_exit =
5660                         kvm_check_request(KVM_REQ_IMMEDIATE_EXIT, vcpu);
5661                 if (kvm_check_request(KVM_REQ_PMU, vcpu))
5662                         kvm_handle_pmu_event(vcpu);
5663                 if (kvm_check_request(KVM_REQ_PMI, vcpu))
5664                         kvm_deliver_pmi(vcpu);
5665         }
5666
5667         if (kvm_check_request(KVM_REQ_EVENT, vcpu) || req_int_win) {
5668                 inject_pending_event(vcpu);
5669
5670                 /* enable NMI/IRQ window open exits if needed */
5671                 if (vcpu->arch.nmi_pending)
5672                         kvm_x86_ops->enable_nmi_window(vcpu);
5673                 else if (kvm_cpu_has_interrupt(vcpu) || req_int_win)
5674                         kvm_x86_ops->enable_irq_window(vcpu);
5675
5676                 if (kvm_lapic_enabled(vcpu)) {
5677                         update_cr8_intercept(vcpu);
5678                         kvm_lapic_sync_to_vapic(vcpu);
5679                 }
5680         }
5681
5682         r = kvm_mmu_reload(vcpu);
5683         if (unlikely(r)) {
5684                 goto cancel_injection;
5685         }
5686
5687         preempt_disable();
5688
5689         kvm_x86_ops->prepare_guest_switch(vcpu);
5690         if (vcpu->fpu_active)
5691                 kvm_load_guest_fpu(vcpu);
5692         kvm_load_guest_xcr0(vcpu);
5693
5694         vcpu->mode = IN_GUEST_MODE;
5695
5696         /* We should set ->mode before check ->requests,
5697          * see the comment in make_all_cpus_request.
5698          */
5699         smp_mb();
5700
5701         local_irq_disable();
5702
5703         if (vcpu->mode == EXITING_GUEST_MODE || vcpu->requests
5704             || need_resched() || signal_pending(current)) {
5705                 vcpu->mode = OUTSIDE_GUEST_MODE;
5706                 smp_wmb();
5707                 local_irq_enable();
5708                 preempt_enable();
5709                 r = 1;
5710                 goto cancel_injection;
5711         }
5712
5713         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
5714
5715         if (req_immediate_exit)
5716                 smp_send_reschedule(vcpu->cpu);
5717
5718         kvm_guest_enter();
5719
5720         if (unlikely(vcpu->arch.switch_db_regs)) {
5721                 set_debugreg(0, 7);
5722                 set_debugreg(vcpu->arch.eff_db[0], 0);
5723                 set_debugreg(vcpu->arch.eff_db[1], 1);
5724                 set_debugreg(vcpu->arch.eff_db[2], 2);
5725                 set_debugreg(vcpu->arch.eff_db[3], 3);
5726         }
5727
5728         trace_kvm_entry(vcpu->vcpu_id);
5729         kvm_x86_ops->run(vcpu);
5730
5731         /*
5732          * If the guest has used debug registers, at least dr7
5733          * will be disabled while returning to the host.
5734          * If we don't have active breakpoints in the host, we don't
5735          * care about the messed up debug address registers. But if
5736          * we have some of them active, restore the old state.
5737          */
5738         if (hw_breakpoint_active())
5739                 hw_breakpoint_restore();
5740
5741         vcpu->arch.last_guest_tsc = kvm_x86_ops->read_l1_tsc(vcpu,
5742                                                            native_read_tsc());
5743
5744         vcpu->mode = OUTSIDE_GUEST_MODE;
5745         smp_wmb();
5746         local_irq_enable();
5747
5748         ++vcpu->stat.exits;
5749
5750         /*
5751          * We must have an instruction between local_irq_enable() and
5752          * kvm_guest_exit(), so the timer interrupt isn't delayed by
5753          * the interrupt shadow.  The stat.exits increment will do nicely.
5754          * But we need to prevent reordering, hence this barrier():
5755          */
5756         barrier();
5757
5758         kvm_guest_exit();
5759
5760         preempt_enable();
5761
5762         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
5763
5764         /*
5765          * Profile KVM exit RIPs:
5766          */
5767         if (unlikely(prof_on == KVM_PROFILING)) {
5768                 unsigned long rip = kvm_rip_read(vcpu);
5769                 profile_hit(KVM_PROFILING, (void *)rip);
5770         }
5771
5772         if (unlikely(vcpu->arch.tsc_always_catchup))
5773                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
5774
5775         if (vcpu->arch.apic_attention)
5776                 kvm_lapic_sync_from_vapic(vcpu);
5777
5778         r = kvm_x86_ops->handle_exit(vcpu);
5779         return r;
5780
5781 cancel_injection:
5782         kvm_x86_ops->cancel_injection(vcpu);
5783         if (unlikely(vcpu->arch.apic_attention))
5784                 kvm_lapic_sync_from_vapic(vcpu);
5785 out:
5786         return r;
5787 }
5788
5789
5790 static int __vcpu_run(struct kvm_vcpu *vcpu)
5791 {
5792         int r;
5793         struct kvm *kvm = vcpu->kvm;
5794
5795         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED)) {
5796                 pr_debug("vcpu %d received sipi with vector # %x\n",
5797                          vcpu->vcpu_id, vcpu->arch.sipi_vector);
5798                 kvm_lapic_reset(vcpu);
5799                 r = kvm_vcpu_reset(vcpu);
5800                 if (r)
5801                         return r;
5802                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
5803         }
5804
5805         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
5806         r = vapic_enter(vcpu);
5807         if (r) {
5808                 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
5809                 return r;
5810         }
5811
5812         r = 1;
5813         while (r > 0) {
5814                 if (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
5815                     !vcpu->arch.apf.halted)
5816                         r = vcpu_enter_guest(vcpu);
5817                 else {
5818                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
5819                         kvm_vcpu_block(vcpu);
5820                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
5821                         if (kvm_check_request(KVM_REQ_UNHALT, vcpu))
5822                         {
5823                                 switch(vcpu->arch.mp_state) {
5824                                 case KVM_MP_STATE_HALTED:
5825                                         vcpu->arch.mp_state =
5826                                                 KVM_MP_STATE_RUNNABLE;
5827                                 case KVM_MP_STATE_RUNNABLE:
5828                                         vcpu->arch.apf.halted = false;
5829                                         break;
5830                                 case KVM_MP_STATE_SIPI_RECEIVED:
5831                                 default:
5832                                         r = -EINTR;
5833                                         break;
5834                                 }
5835                         }
5836                 }
5837
5838                 if (r <= 0)
5839                         break;
5840
5841                 clear_bit(KVM_REQ_PENDING_TIMER, &vcpu->requests);
5842                 if (kvm_cpu_has_pending_timer(vcpu))
5843                         kvm_inject_pending_timer_irqs(vcpu);
5844
5845                 if (dm_request_for_irq_injection(vcpu)) {
5846                         r = -EINTR;
5847                         vcpu->run->exit_reason = KVM_EXIT_INTR;
5848                         ++vcpu->stat.request_irq_exits;
5849                 }
5850
5851                 kvm_check_async_pf_completion(vcpu);
5852
5853                 if (signal_pending(current)) {
5854                         r = -EINTR;
5855                         vcpu->run->exit_reason = KVM_EXIT_INTR;
5856                         ++vcpu->stat.signal_exits;
5857                 }
5858                 if (need_resched()) {
5859                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
5860                         kvm_resched(vcpu);
5861                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
5862                 }
5863         }
5864
5865         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
5866
5867         vapic_exit(vcpu);
5868
5869         return r;
5870 }
5871
5872 static inline int complete_emulated_io(struct kvm_vcpu *vcpu)
5873 {
5874         int r;
5875         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
5876         r = emulate_instruction(vcpu, EMULTYPE_NO_DECODE);
5877         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
5878         if (r != EMULATE_DONE)
5879                 return 0;
5880         return 1;
5881 }
5882
5883 static int complete_emulated_pio(struct kvm_vcpu *vcpu)
5884 {
5885         BUG_ON(!vcpu->arch.pio.count);
5886
5887         return complete_emulated_io(vcpu);
5888 }
5889
5890 /*
5891  * Implements the following, as a state machine:
5892  *
5893  * read:
5894  *   for each fragment
5895  *     for each mmio piece in the fragment
5896  *       write gpa, len
5897  *       exit
5898  *       copy data
5899  *   execute insn
5900  *
5901  * write:
5902  *   for each fragment
5903  *     for each mmio piece in the fragment
5904  *       write gpa, len
5905  *       copy data
5906  *       exit
5907  */
5908 static int complete_emulated_mmio(struct kvm_vcpu *vcpu)
5909 {
5910         struct kvm_run *run = vcpu->run;
5911         struct kvm_mmio_fragment *frag;
5912         unsigned len;
5913
5914         BUG_ON(!vcpu->mmio_needed);
5915
5916         /* Complete previous fragment */
5917         frag = &vcpu->mmio_fragments[vcpu->mmio_cur_fragment];
5918         len = min(8u, frag->len);
5919         if (!vcpu->mmio_is_write)
5920                 memcpy(frag->data, run->mmio.data, len);
5921
5922         if (frag->len <= 8) {
5923                 /* Switch to the next fragment. */
5924                 frag++;
5925                 vcpu->mmio_cur_fragment++;
5926         } else {
5927                 /* Go forward to the next mmio piece. */
5928                 frag->data += len;
5929                 frag->gpa += len;
5930                 frag->len -= len;
5931         }
5932
5933         if (vcpu->mmio_cur_fragment == vcpu->mmio_nr_fragments) {
5934                 vcpu->mmio_needed = 0;
5935                 if (vcpu->mmio_is_write)
5936                         return 1;
5937                 vcpu->mmio_read_completed = 1;
5938                 return complete_emulated_io(vcpu);
5939         }
5940
5941         run->exit_reason = KVM_EXIT_MMIO;
5942         run->mmio.phys_addr = frag->gpa;
5943         if (vcpu->mmio_is_write)
5944                 memcpy(run->mmio.data, frag->data, min(8u, frag->len));
5945         run->mmio.len = min(8u, frag->len);
5946         run->mmio.is_write = vcpu->mmio_is_write;
5947         vcpu->arch.complete_userspace_io = complete_emulated_mmio;
5948         return 0;
5949 }
5950
5951
5952 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
5953 {
5954         int r;
5955         sigset_t sigsaved;
5956
5957         if (!tsk_used_math(current) && init_fpu(current))
5958                 return -ENOMEM;
5959
5960         if (vcpu->sigset_active)
5961                 sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
5962
5963         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
5964                 kvm_vcpu_block(vcpu);
5965                 clear_bit(KVM_REQ_UNHALT, &vcpu->requests);
5966                 r = -EAGAIN;
5967                 goto out;
5968         }
5969
5970         /* re-sync apic's tpr */
5971         if (!irqchip_in_kernel(vcpu->kvm)) {
5972                 if (kvm_set_cr8(vcpu, kvm_run->cr8) != 0) {
5973                         r = -EINVAL;
5974                         goto out;
5975                 }
5976         }
5977
5978         if (unlikely(vcpu->arch.complete_userspace_io)) {
5979                 int (*cui)(struct kvm_vcpu *) = vcpu->arch.complete_userspace_io;
5980                 vcpu->arch.complete_userspace_io = NULL;
5981                 r = cui(vcpu);
5982                 if (r <= 0)
5983                         goto out;
5984         } else
5985                 WARN_ON(vcpu->arch.pio.count || vcpu->mmio_needed);
5986
5987         r = __vcpu_run(vcpu);
5988
5989 out:
5990         post_kvm_run_save(vcpu);
5991         if (vcpu->sigset_active)
5992                 sigprocmask(SIG_SETMASK, &sigsaved, NULL);
5993
5994         return r;
5995 }
5996
5997 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
5998 {
5999         if (vcpu->arch.emulate_regs_need_sync_to_vcpu) {
6000                 /*
6001                  * We are here if userspace calls get_regs() in the middle of
6002                  * instruction emulation. Registers state needs to be copied
6003                  * back from emulation context to vcpu. Userspace shouldn't do
6004                  * that usually, but some bad designed PV devices (vmware
6005                  * backdoor interface) need this to work
6006                  */
6007                 emulator_writeback_register_cache(&vcpu->arch.emulate_ctxt);
6008                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
6009         }
6010         regs->rax = kvm_register_read(vcpu, VCPU_REGS_RAX);
6011         regs->rbx = kvm_register_read(vcpu, VCPU_REGS_RBX);
6012         regs->rcx = kvm_register_read(vcpu, VCPU_REGS_RCX);
6013         regs->rdx = kvm_register_read(vcpu, VCPU_REGS_RDX);
6014         regs->rsi = kvm_register_read(vcpu, VCPU_REGS_RSI);
6015         regs->rdi = kvm_register_read(vcpu, VCPU_REGS_RDI);
6016         regs->rsp = kvm_register_read(vcpu, VCPU_REGS_RSP);
6017         regs->rbp = kvm_register_read(vcpu, VCPU_REGS_RBP);
6018 #ifdef CONFIG_X86_64
6019         regs->r8 = kvm_register_read(vcpu, VCPU_REGS_R8);
6020         regs->r9 = kvm_register_read(vcpu, VCPU_REGS_R9);
6021         regs->r10 = kvm_register_read(vcpu, VCPU_REGS_R10);
6022         regs->r11 = kvm_register_read(vcpu, VCPU_REGS_R11);
6023         regs->r12 = kvm_register_read(vcpu, VCPU_REGS_R12);
6024         regs->r13 = kvm_register_read(vcpu, VCPU_REGS_R13);
6025         regs->r14 = kvm_register_read(vcpu, VCPU_REGS_R14);
6026         regs->r15 = kvm_register_read(vcpu, VCPU_REGS_R15);
6027 #endif
6028
6029         regs->rip = kvm_rip_read(vcpu);
6030         regs->rflags = kvm_get_rflags(vcpu);
6031
6032         return 0;
6033 }
6034
6035 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
6036 {
6037         vcpu->arch.emulate_regs_need_sync_from_vcpu = true;
6038         vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
6039
6040         kvm_register_write(vcpu, VCPU_REGS_RAX, regs->rax);
6041         kvm_register_write(vcpu, VCPU_REGS_RBX, regs->rbx);
6042         kvm_register_write(vcpu, VCPU_REGS_RCX, regs->rcx);
6043         kvm_register_write(vcpu, VCPU_REGS_RDX, regs->rdx);
6044         kvm_register_write(vcpu, VCPU_REGS_RSI, regs->rsi);
6045         kvm_register_write(vcpu, VCPU_REGS_RDI, regs->rdi);
6046         kvm_register_write(vcpu, VCPU_REGS_RSP, regs->rsp);
6047         kvm_register_write(vcpu, VCPU_REGS_RBP, regs->rbp);
6048 #ifdef CONFIG_X86_64
6049         kvm_register_write(vcpu, VCPU_REGS_R8, regs->r8);
6050         kvm_register_write(vcpu, VCPU_REGS_R9, regs->r9);
6051         kvm_register_write(vcpu, VCPU_REGS_R10, regs->r10);
6052         kvm_register_write(vcpu, VCPU_REGS_R11, regs->r11);
6053         kvm_register_write(vcpu, VCPU_REGS_R12, regs->r12);
6054         kvm_register_write(vcpu, VCPU_REGS_R13, regs->r13);
6055         kvm_register_write(vcpu, VCPU_REGS_R14, regs->r14);
6056         kvm_register_write(vcpu, VCPU_REGS_R15, regs->r15);
6057 #endif
6058
6059         kvm_rip_write(vcpu, regs->rip);
6060         kvm_set_rflags(vcpu, regs->rflags);
6061
6062         vcpu->arch.exception.pending = false;
6063
6064         kvm_make_request(KVM_REQ_EVENT, vcpu);
6065
6066         return 0;
6067 }
6068
6069 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
6070 {
6071         struct kvm_segment cs;
6072
6073         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
6074         *db = cs.db;
6075         *l = cs.l;
6076 }
6077 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
6078
6079 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
6080                                   struct kvm_sregs *sregs)
6081 {
6082         struct desc_ptr dt;
6083
6084         kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
6085         kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
6086         kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
6087         kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
6088         kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
6089         kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
6090
6091         kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
6092         kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
6093
6094         kvm_x86_ops->get_idt(vcpu, &dt);
6095         sregs->idt.limit = dt.size;
6096         sregs->idt.base = dt.address;
6097         kvm_x86_ops->get_gdt(vcpu, &dt);
6098         sregs->gdt.limit = dt.size;
6099         sregs->gdt.base = dt.address;
6100
6101         sregs->cr0 = kvm_read_cr0(vcpu);
6102         sregs->cr2 = vcpu->arch.cr2;
6103         sregs->cr3 = kvm_read_cr3(vcpu);
6104         sregs->cr4 = kvm_read_cr4(vcpu);
6105         sregs->cr8 = kvm_get_cr8(vcpu);
6106         sregs->efer = vcpu->arch.efer;
6107         sregs->apic_base = kvm_get_apic_base(vcpu);
6108
6109         memset(sregs->interrupt_bitmap, 0, sizeof sregs->interrupt_bitmap);
6110
6111         if (vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft)
6112                 set_bit(vcpu->arch.interrupt.nr,
6113                         (unsigned long *)sregs->interrupt_bitmap);
6114
6115         return 0;
6116 }
6117
6118 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
6119                                     struct kvm_mp_state *mp_state)
6120 {
6121         mp_state->mp_state = vcpu->arch.mp_state;
6122         return 0;
6123 }
6124
6125 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
6126                                     struct kvm_mp_state *mp_state)
6127 {
6128         vcpu->arch.mp_state = mp_state->mp_state;
6129         kvm_make_request(KVM_REQ_EVENT, vcpu);
6130         return 0;
6131 }
6132
6133 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int idt_index,
6134                     int reason, bool has_error_code, u32 error_code)
6135 {
6136         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
6137         int ret;
6138
6139         init_emulate_ctxt(vcpu);
6140
6141         ret = emulator_task_switch(ctxt, tss_selector, idt_index, reason,
6142                                    has_error_code, error_code);
6143
6144         if (ret)
6145                 return EMULATE_FAIL;
6146
6147         kvm_rip_write(vcpu, ctxt->eip);
6148         kvm_set_rflags(vcpu, ctxt->eflags);
6149         kvm_make_request(KVM_REQ_EVENT, vcpu);
6150         return EMULATE_DONE;
6151 }
6152 EXPORT_SYMBOL_GPL(kvm_task_switch);
6153
6154 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
6155                                   struct kvm_sregs *sregs)
6156 {
6157         int mmu_reset_needed = 0;
6158         int pending_vec, max_bits, idx;
6159         struct desc_ptr dt;
6160
6161         if (!guest_cpuid_has_xsave(vcpu) && (sregs->cr4 & X86_CR4_OSXSAVE))
6162                 return -EINVAL;
6163
6164         dt.size = sregs->idt.limit;
6165         dt.address = sregs->idt.base;
6166         kvm_x86_ops->set_idt(vcpu, &dt);
6167         dt.size = sregs->gdt.limit;
6168         dt.address = sregs->gdt.base;
6169         kvm_x86_ops->set_gdt(vcpu, &dt);
6170
6171         vcpu->arch.cr2 = sregs->cr2;
6172         mmu_reset_needed |= kvm_read_cr3(vcpu) != sregs->cr3;
6173         vcpu->arch.cr3 = sregs->cr3;
6174         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
6175
6176         kvm_set_cr8(vcpu, sregs->cr8);
6177
6178         mmu_reset_needed |= vcpu->arch.efer != sregs->efer;
6179         kvm_x86_ops->set_efer(vcpu, sregs->efer);
6180         kvm_set_apic_base(vcpu, sregs->apic_base);
6181
6182         mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;
6183         kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
6184         vcpu->arch.cr0 = sregs->cr0;
6185
6186         mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
6187         kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
6188         if (sregs->cr4 & X86_CR4_OSXSAVE)
6189                 kvm_update_cpuid(vcpu);
6190
6191         idx = srcu_read_lock(&vcpu->kvm->srcu);
6192         if (!is_long_mode(vcpu) && is_pae(vcpu)) {
6193                 load_pdptrs(vcpu, vcpu->arch.walk_mmu, kvm_read_cr3(vcpu));
6194                 mmu_reset_needed = 1;
6195         }
6196         srcu_read_unlock(&vcpu->kvm->srcu, idx);
6197
6198         if (mmu_reset_needed)
6199                 kvm_mmu_reset_context(vcpu);
6200
6201         max_bits = KVM_NR_INTERRUPTS;
6202         pending_vec = find_first_bit(
6203                 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
6204         if (pending_vec < max_bits) {
6205                 kvm_queue_interrupt(vcpu, pending_vec, false);
6206                 pr_debug("Set back pending irq %d\n", pending_vec);
6207         }
6208
6209         kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
6210         kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
6211         kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
6212         kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
6213         kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
6214         kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
6215
6216         kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
6217         kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
6218
6219         update_cr8_intercept(vcpu);
6220
6221         /* Older userspace won't unhalt the vcpu on reset. */
6222         if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
6223             sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
6224             !is_protmode(vcpu))
6225                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
6226
6227         kvm_make_request(KVM_REQ_EVENT, vcpu);
6228
6229         return 0;
6230 }
6231
6232 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
6233                                         struct kvm_guest_debug *dbg)
6234 {
6235         unsigned long rflags;
6236         int i, r;
6237
6238         if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
6239                 r = -EBUSY;
6240                 if (vcpu->arch.exception.pending)
6241                         goto out;
6242                 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
6243                         kvm_queue_exception(vcpu, DB_VECTOR);
6244                 else
6245                         kvm_queue_exception(vcpu, BP_VECTOR);
6246         }
6247
6248         /*
6249          * Read rflags as long as potentially injected trace flags are still
6250          * filtered out.
6251          */
6252         rflags = kvm_get_rflags(vcpu);
6253
6254         vcpu->guest_debug = dbg->control;
6255         if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
6256                 vcpu->guest_debug = 0;
6257
6258         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
6259                 for (i = 0; i < KVM_NR_DB_REGS; ++i)
6260                         vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
6261                 vcpu->arch.guest_debug_dr7 = dbg->arch.debugreg[7];
6262         } else {
6263                 for (i = 0; i < KVM_NR_DB_REGS; i++)
6264                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
6265         }
6266         kvm_update_dr7(vcpu);
6267
6268         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
6269                 vcpu->arch.singlestep_rip = kvm_rip_read(vcpu) +
6270                         get_segment_base(vcpu, VCPU_SREG_CS);
6271
6272         /*
6273          * Trigger an rflags update that will inject or remove the trace
6274          * flags.
6275          */
6276         kvm_set_rflags(vcpu, rflags);
6277
6278         kvm_x86_ops->update_db_bp_intercept(vcpu);
6279
6280         r = 0;
6281
6282 out:
6283
6284         return r;
6285 }
6286
6287 /*
6288  * Translate a guest virtual address to a guest physical address.
6289  */
6290 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
6291                                     struct kvm_translation *tr)
6292 {
6293         unsigned long vaddr = tr->linear_address;
6294         gpa_t gpa;
6295         int idx;
6296
6297         idx = srcu_read_lock(&vcpu->kvm->srcu);
6298         gpa = kvm_mmu_gva_to_gpa_system(vcpu, vaddr, NULL);
6299         srcu_read_unlock(&vcpu->kvm->srcu, idx);
6300         tr->physical_address = gpa;
6301         tr->valid = gpa != UNMAPPED_GVA;
6302         tr->writeable = 1;
6303         tr->usermode = 0;
6304
6305         return 0;
6306 }
6307
6308 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
6309 {
6310         struct i387_fxsave_struct *fxsave =
6311                         &vcpu->arch.guest_fpu.state->fxsave;
6312
6313         memcpy(fpu->fpr, fxsave->st_space, 128);
6314         fpu->fcw = fxsave->cwd;
6315         fpu->fsw = fxsave->swd;
6316         fpu->ftwx = fxsave->twd;
6317         fpu->last_opcode = fxsave->fop;
6318         fpu->last_ip = fxsave->rip;
6319         fpu->last_dp = fxsave->rdp;
6320         memcpy(fpu->xmm, fxsave->xmm_space, sizeof fxsave->xmm_space);
6321
6322         return 0;
6323 }
6324
6325 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
6326 {
6327         struct i387_fxsave_struct *fxsave =
6328                         &vcpu->arch.guest_fpu.state->fxsave;
6329
6330         memcpy(fxsave->st_space, fpu->fpr, 128);
6331         fxsave->cwd = fpu->fcw;
6332         fxsave->swd = fpu->fsw;
6333         fxsave->twd = fpu->ftwx;
6334         fxsave->fop = fpu->last_opcode;
6335         fxsave->rip = fpu->last_ip;
6336         fxsave->rdp = fpu->last_dp;
6337         memcpy(fxsave->xmm_space, fpu->xmm, sizeof fxsave->xmm_space);
6338
6339         return 0;
6340 }
6341
6342 int fx_init(struct kvm_vcpu *vcpu)
6343 {
6344         int err;
6345
6346         err = fpu_alloc(&vcpu->arch.guest_fpu);
6347         if (err)
6348                 return err;
6349
6350         fpu_finit(&vcpu->arch.guest_fpu);
6351
6352         /*
6353          * Ensure guest xcr0 is valid for loading
6354          */
6355         vcpu->arch.xcr0 = XSTATE_FP;
6356
6357         vcpu->arch.cr0 |= X86_CR0_ET;
6358
6359         return 0;
6360 }
6361 EXPORT_SYMBOL_GPL(fx_init);
6362
6363 static void fx_free(struct kvm_vcpu *vcpu)
6364 {
6365         fpu_free(&vcpu->arch.guest_fpu);
6366 }
6367
6368 void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
6369 {
6370         if (vcpu->guest_fpu_loaded)
6371                 return;
6372
6373         /*
6374          * Restore all possible states in the guest,
6375          * and assume host would use all available bits.
6376          * Guest xcr0 would be loaded later.
6377          */
6378         kvm_put_guest_xcr0(vcpu);
6379         vcpu->guest_fpu_loaded = 1;
6380         __kernel_fpu_begin();
6381         fpu_restore_checking(&vcpu->arch.guest_fpu);
6382         trace_kvm_fpu(1);
6383 }
6384
6385 void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
6386 {
6387         kvm_put_guest_xcr0(vcpu);
6388
6389         if (!vcpu->guest_fpu_loaded)
6390                 return;
6391
6392         vcpu->guest_fpu_loaded = 0;
6393         fpu_save_init(&vcpu->arch.guest_fpu);
6394         __kernel_fpu_end();
6395         ++vcpu->stat.fpu_reload;
6396         kvm_make_request(KVM_REQ_DEACTIVATE_FPU, vcpu);
6397         trace_kvm_fpu(0);
6398 }
6399
6400 void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
6401 {
6402         kvmclock_reset(vcpu);
6403
6404         free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
6405         fx_free(vcpu);
6406         kvm_x86_ops->vcpu_free(vcpu);
6407 }
6408
6409 struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
6410                                                 unsigned int id)
6411 {
6412         if (check_tsc_unstable() && atomic_read(&kvm->online_vcpus) != 0)
6413                 printk_once(KERN_WARNING
6414                 "kvm: SMP vm created on host with unstable TSC; "
6415                 "guest TSC will not be reliable\n");
6416         return kvm_x86_ops->vcpu_create(kvm, id);
6417 }
6418
6419 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
6420 {
6421         int r;
6422
6423         vcpu->arch.mtrr_state.have_fixed = 1;
6424         r = vcpu_load(vcpu);
6425         if (r)
6426                 return r;
6427         r = kvm_vcpu_reset(vcpu);
6428         if (r == 0)
6429                 r = kvm_mmu_setup(vcpu);
6430         vcpu_put(vcpu);
6431
6432         return r;
6433 }
6434
6435 int kvm_arch_vcpu_postcreate(struct kvm_vcpu *vcpu)
6436 {
6437         int r;
6438         struct msr_data msr;
6439
6440         r = vcpu_load(vcpu);
6441         if (r)
6442                 return r;
6443         msr.data = 0x0;
6444         msr.index = MSR_IA32_TSC;
6445         msr.host_initiated = true;
6446         kvm_write_tsc(vcpu, &msr);
6447         vcpu_put(vcpu);
6448
6449         return r;
6450 }
6451
6452 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
6453 {
6454         int r;
6455         vcpu->arch.apf.msr_val = 0;
6456
6457         r = vcpu_load(vcpu);
6458         BUG_ON(r);
6459         kvm_mmu_unload(vcpu);
6460         vcpu_put(vcpu);
6461
6462         fx_free(vcpu);
6463         kvm_x86_ops->vcpu_free(vcpu);
6464 }
6465
6466 static int kvm_vcpu_reset(struct kvm_vcpu *vcpu)
6467 {
6468         atomic_set(&vcpu->arch.nmi_queued, 0);
6469         vcpu->arch.nmi_pending = 0;
6470         vcpu->arch.nmi_injected = false;
6471
6472         memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
6473         vcpu->arch.dr6 = DR6_FIXED_1;
6474         vcpu->arch.dr7 = DR7_FIXED_1;
6475         kvm_update_dr7(vcpu);
6476
6477         kvm_make_request(KVM_REQ_EVENT, vcpu);
6478         vcpu->arch.apf.msr_val = 0;
6479         vcpu->arch.st.msr_val = 0;
6480
6481         kvmclock_reset(vcpu);
6482
6483         kvm_clear_async_pf_completion_queue(vcpu);
6484         kvm_async_pf_hash_reset(vcpu);
6485         vcpu->arch.apf.halted = false;
6486
6487         kvm_pmu_reset(vcpu);
6488
6489         memset(vcpu->arch.regs, 0, sizeof(vcpu->arch.regs));
6490         vcpu->arch.regs_avail = ~0;
6491         vcpu->arch.regs_dirty = ~0;
6492
6493         return kvm_x86_ops->vcpu_reset(vcpu);
6494 }
6495
6496 int kvm_arch_hardware_enable(void *garbage)
6497 {
6498         struct kvm *kvm;
6499         struct kvm_vcpu *vcpu;
6500         int i;
6501         int ret;
6502         u64 local_tsc;
6503         u64 max_tsc = 0;
6504         bool stable, backwards_tsc = false;
6505
6506         kvm_shared_msr_cpu_online();
6507         ret = kvm_x86_ops->hardware_enable(garbage);
6508         if (ret != 0)
6509                 return ret;
6510
6511         local_tsc = native_read_tsc();
6512         stable = !check_tsc_unstable();
6513         list_for_each_entry(kvm, &vm_list, vm_list) {
6514                 kvm_for_each_vcpu(i, vcpu, kvm) {
6515                         if (!stable && vcpu->cpu == smp_processor_id())
6516                                 set_bit(KVM_REQ_CLOCK_UPDATE, &vcpu->requests);
6517                         if (stable && vcpu->arch.last_host_tsc > local_tsc) {
6518                                 backwards_tsc = true;
6519                                 if (vcpu->arch.last_host_tsc > max_tsc)
6520                                         max_tsc = vcpu->arch.last_host_tsc;
6521                         }
6522                 }
6523         }
6524
6525         /*
6526          * Sometimes, even reliable TSCs go backwards.  This happens on
6527          * platforms that reset TSC during suspend or hibernate actions, but
6528          * maintain synchronization.  We must compensate.  Fortunately, we can
6529          * detect that condition here, which happens early in CPU bringup,
6530          * before any KVM threads can be running.  Unfortunately, we can't
6531          * bring the TSCs fully up to date with real time, as we aren't yet far
6532          * enough into CPU bringup that we know how much real time has actually
6533          * elapsed; our helper function, get_kernel_ns() will be using boot
6534          * variables that haven't been updated yet.
6535          *
6536          * So we simply find the maximum observed TSC above, then record the
6537          * adjustment to TSC in each VCPU.  When the VCPU later gets loaded,
6538          * the adjustment will be applied.  Note that we accumulate
6539          * adjustments, in case multiple suspend cycles happen before some VCPU
6540          * gets a chance to run again.  In the event that no KVM threads get a
6541          * chance to run, we will miss the entire elapsed period, as we'll have
6542          * reset last_host_tsc, so VCPUs will not have the TSC adjusted and may
6543          * loose cycle time.  This isn't too big a deal, since the loss will be
6544          * uniform across all VCPUs (not to mention the scenario is extremely
6545          * unlikely). It is possible that a second hibernate recovery happens
6546          * much faster than a first, causing the observed TSC here to be
6547          * smaller; this would require additional padding adjustment, which is
6548          * why we set last_host_tsc to the local tsc observed here.
6549          *
6550          * N.B. - this code below runs only on platforms with reliable TSC,
6551          * as that is the only way backwards_tsc is set above.  Also note
6552          * that this runs for ALL vcpus, which is not a bug; all VCPUs should
6553          * have the same delta_cyc adjustment applied if backwards_tsc
6554          * is detected.  Note further, this adjustment is only done once,
6555          * as we reset last_host_tsc on all VCPUs to stop this from being
6556          * called multiple times (one for each physical CPU bringup).
6557          *
6558          * Platforms with unreliable TSCs don't have to deal with this, they
6559          * will be compensated by the logic in vcpu_load, which sets the TSC to
6560          * catchup mode.  This will catchup all VCPUs to real time, but cannot
6561          * guarantee that they stay in perfect synchronization.
6562          */
6563         if (backwards_tsc) {
6564                 u64 delta_cyc = max_tsc - local_tsc;
6565                 list_for_each_entry(kvm, &vm_list, vm_list) {
6566                         kvm_for_each_vcpu(i, vcpu, kvm) {
6567                                 vcpu->arch.tsc_offset_adjustment += delta_cyc;
6568                                 vcpu->arch.last_host_tsc = local_tsc;
6569                                 set_bit(KVM_REQ_MASTERCLOCK_UPDATE,
6570                                         &vcpu->requests);
6571                         }
6572
6573                         /*
6574                          * We have to disable TSC offset matching.. if you were
6575                          * booting a VM while issuing an S4 host suspend....
6576                          * you may have some problem.  Solving this issue is
6577                          * left as an exercise to the reader.
6578                          */
6579                         kvm->arch.last_tsc_nsec = 0;
6580                         kvm->arch.last_tsc_write = 0;
6581                 }
6582
6583         }
6584         return 0;
6585 }
6586
6587 void kvm_arch_hardware_disable(void *garbage)
6588 {
6589         kvm_x86_ops->hardware_disable(garbage);
6590         drop_user_return_notifiers(garbage);
6591 }
6592
6593 int kvm_arch_hardware_setup(void)
6594 {
6595         return kvm_x86_ops->hardware_setup();
6596 }
6597
6598 void kvm_arch_hardware_unsetup(void)
6599 {
6600         kvm_x86_ops->hardware_unsetup();
6601 }
6602
6603 void kvm_arch_check_processor_compat(void *rtn)
6604 {
6605         kvm_x86_ops->check_processor_compatibility(rtn);
6606 }
6607
6608 bool kvm_vcpu_compatible(struct kvm_vcpu *vcpu)
6609 {
6610         return irqchip_in_kernel(vcpu->kvm) == (vcpu->arch.apic != NULL);
6611 }
6612
6613 struct static_key kvm_no_apic_vcpu __read_mostly;
6614
6615 int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
6616 {
6617         struct page *page;
6618         struct kvm *kvm;
6619         int r;
6620
6621         BUG_ON(vcpu->kvm == NULL);
6622         kvm = vcpu->kvm;
6623
6624         vcpu->arch.emulate_ctxt.ops = &emulate_ops;
6625         if (!irqchip_in_kernel(kvm) || kvm_vcpu_is_bsp(vcpu))
6626                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
6627         else
6628                 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
6629
6630         page = alloc_page(GFP_KERNEL | __GFP_ZERO);
6631         if (!page) {
6632                 r = -ENOMEM;
6633                 goto fail;
6634         }
6635         vcpu->arch.pio_data = page_address(page);
6636
6637         kvm_set_tsc_khz(vcpu, max_tsc_khz);
6638
6639         r = kvm_mmu_create(vcpu);
6640         if (r < 0)
6641                 goto fail_free_pio_data;
6642
6643         if (irqchip_in_kernel(kvm)) {
6644                 r = kvm_create_lapic(vcpu);
6645                 if (r < 0)
6646                         goto fail_mmu_destroy;
6647         } else
6648                 static_key_slow_inc(&kvm_no_apic_vcpu);
6649
6650         vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
6651                                        GFP_KERNEL);
6652         if (!vcpu->arch.mce_banks) {
6653                 r = -ENOMEM;
6654                 goto fail_free_lapic;
6655         }
6656         vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
6657
6658         if (!zalloc_cpumask_var(&vcpu->arch.wbinvd_dirty_mask, GFP_KERNEL))
6659                 goto fail_free_mce_banks;
6660
6661         r = fx_init(vcpu);
6662         if (r)
6663                 goto fail_free_wbinvd_dirty_mask;
6664
6665         vcpu->arch.ia32_tsc_adjust_msr = 0x0;
6666         kvm_async_pf_hash_reset(vcpu);
6667         kvm_pmu_init(vcpu);
6668
6669         return 0;
6670 fail_free_wbinvd_dirty_mask:
6671         free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
6672 fail_free_mce_banks:
6673         kfree(vcpu->arch.mce_banks);
6674 fail_free_lapic:
6675         kvm_free_lapic(vcpu);
6676 fail_mmu_destroy:
6677         kvm_mmu_destroy(vcpu);
6678 fail_free_pio_data:
6679         free_page((unsigned long)vcpu->arch.pio_data);
6680 fail:
6681         return r;
6682 }
6683
6684 void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
6685 {
6686         int idx;
6687
6688         kvm_pmu_destroy(vcpu);
6689         kfree(vcpu->arch.mce_banks);
6690         kvm_free_lapic(vcpu);
6691         idx = srcu_read_lock(&vcpu->kvm->srcu);
6692         kvm_mmu_destroy(vcpu);
6693         srcu_read_unlock(&vcpu->kvm->srcu, idx);
6694         free_page((unsigned long)vcpu->arch.pio_data);
6695         if (!irqchip_in_kernel(vcpu->kvm))
6696                 static_key_slow_dec(&kvm_no_apic_vcpu);
6697 }
6698
6699 int kvm_arch_init_vm(struct kvm *kvm, unsigned long type)
6700 {
6701         if (type)
6702                 return -EINVAL;
6703
6704         INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
6705         INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
6706
6707         /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
6708         set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
6709         /* Reserve bit 1 of irq_sources_bitmap for irqfd-resampler */
6710         set_bit(KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID,
6711                 &kvm->arch.irq_sources_bitmap);
6712
6713         raw_spin_lock_init(&kvm->arch.tsc_write_lock);
6714         mutex_init(&kvm->arch.apic_map_lock);
6715         spin_lock_init(&kvm->arch.pvclock_gtod_sync_lock);
6716
6717         pvclock_update_vm_gtod_copy(kvm);
6718
6719         return 0;
6720 }
6721
6722 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
6723 {
6724         int r;
6725         r = vcpu_load(vcpu);
6726         BUG_ON(r);
6727         kvm_mmu_unload(vcpu);
6728         vcpu_put(vcpu);
6729 }
6730
6731 static void kvm_free_vcpus(struct kvm *kvm)
6732 {
6733         unsigned int i;
6734         struct kvm_vcpu *vcpu;
6735
6736         /*
6737          * Unpin any mmu pages first.
6738          */
6739         kvm_for_each_vcpu(i, vcpu, kvm) {
6740                 kvm_clear_async_pf_completion_queue(vcpu);
6741                 kvm_unload_vcpu_mmu(vcpu);
6742         }
6743         kvm_for_each_vcpu(i, vcpu, kvm)
6744                 kvm_arch_vcpu_free(vcpu);
6745
6746         mutex_lock(&kvm->lock);
6747         for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
6748                 kvm->vcpus[i] = NULL;
6749
6750         atomic_set(&kvm->online_vcpus, 0);
6751         mutex_unlock(&kvm->lock);
6752 }
6753
6754 void kvm_arch_sync_events(struct kvm *kvm)
6755 {
6756         kvm_free_all_assigned_devices(kvm);
6757         kvm_free_pit(kvm);
6758 }
6759
6760 void kvm_arch_destroy_vm(struct kvm *kvm)
6761 {
6762         kvm_iommu_unmap_guest(kvm);
6763         kfree(kvm->arch.vpic);
6764         kfree(kvm->arch.vioapic);
6765         kvm_free_vcpus(kvm);
6766         if (kvm->arch.apic_access_page)
6767                 put_page(kvm->arch.apic_access_page);
6768         if (kvm->arch.ept_identity_pagetable)
6769                 put_page(kvm->arch.ept_identity_pagetable);
6770         kfree(rcu_dereference_check(kvm->arch.apic_map, 1));
6771 }
6772
6773 void kvm_arch_free_memslot(struct kvm_memory_slot *free,
6774                            struct kvm_memory_slot *dont)
6775 {
6776         int i;
6777
6778         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
6779                 if (!dont || free->arch.rmap[i] != dont->arch.rmap[i]) {
6780                         kvm_kvfree(free->arch.rmap[i]);
6781                         free->arch.rmap[i] = NULL;
6782                 }
6783                 if (i == 0)
6784                         continue;
6785
6786                 if (!dont || free->arch.lpage_info[i - 1] !=
6787                              dont->arch.lpage_info[i - 1]) {
6788                         kvm_kvfree(free->arch.lpage_info[i - 1]);
6789                         free->arch.lpage_info[i - 1] = NULL;
6790                 }
6791         }
6792 }
6793
6794 int kvm_arch_create_memslot(struct kvm_memory_slot *slot, unsigned long npages)
6795 {
6796         int i;
6797
6798         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
6799                 unsigned long ugfn;
6800                 int lpages;
6801                 int level = i + 1;
6802
6803                 lpages = gfn_to_index(slot->base_gfn + npages - 1,
6804                                       slot->base_gfn, level) + 1;
6805
6806                 slot->arch.rmap[i] =
6807                         kvm_kvzalloc(lpages * sizeof(*slot->arch.rmap[i]));
6808                 if (!slot->arch.rmap[i])
6809                         goto out_free;
6810                 if (i == 0)
6811                         continue;
6812
6813                 slot->arch.lpage_info[i - 1] = kvm_kvzalloc(lpages *
6814                                         sizeof(*slot->arch.lpage_info[i - 1]));
6815                 if (!slot->arch.lpage_info[i - 1])
6816                         goto out_free;
6817
6818                 if (slot->base_gfn & (KVM_PAGES_PER_HPAGE(level) - 1))
6819                         slot->arch.lpage_info[i - 1][0].write_count = 1;
6820                 if ((slot->base_gfn + npages) & (KVM_PAGES_PER_HPAGE(level) - 1))
6821                         slot->arch.lpage_info[i - 1][lpages - 1].write_count = 1;
6822                 ugfn = slot->userspace_addr >> PAGE_SHIFT;
6823                 /*
6824                  * If the gfn and userspace address are not aligned wrt each
6825                  * other, or if explicitly asked to, disable large page
6826                  * support for this slot
6827                  */
6828                 if ((slot->base_gfn ^ ugfn) & (KVM_PAGES_PER_HPAGE(level) - 1) ||
6829                     !kvm_largepages_enabled()) {
6830                         unsigned long j;
6831
6832                         for (j = 0; j < lpages; ++j)
6833                                 slot->arch.lpage_info[i - 1][j].write_count = 1;
6834                 }
6835         }
6836
6837         return 0;
6838
6839 out_free:
6840         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
6841                 kvm_kvfree(slot->arch.rmap[i]);
6842                 slot->arch.rmap[i] = NULL;
6843                 if (i == 0)
6844                         continue;
6845
6846                 kvm_kvfree(slot->arch.lpage_info[i - 1]);
6847                 slot->arch.lpage_info[i - 1] = NULL;
6848         }
6849         return -ENOMEM;
6850 }
6851
6852 int kvm_arch_prepare_memory_region(struct kvm *kvm,
6853                                 struct kvm_memory_slot *memslot,
6854                                 struct kvm_memory_slot old,
6855                                 struct kvm_userspace_memory_region *mem,
6856                                 int user_alloc)
6857 {
6858         int npages = memslot->npages;
6859         int map_flags = MAP_PRIVATE | MAP_ANONYMOUS;
6860
6861         /* Prevent internal slot pages from being moved by fork()/COW. */
6862         if (memslot->id >= KVM_MEMORY_SLOTS)
6863                 map_flags = MAP_SHARED | MAP_ANONYMOUS;
6864
6865         /*To keep backward compatibility with older userspace,
6866          *x86 needs to handle !user_alloc case.
6867          */
6868         if (!user_alloc) {
6869                 if (npages && !old.npages) {
6870                         unsigned long userspace_addr;
6871
6872                         userspace_addr = vm_mmap(NULL, 0,
6873                                                  npages * PAGE_SIZE,
6874                                                  PROT_READ | PROT_WRITE,
6875                                                  map_flags,
6876                                                  0);
6877
6878                         if (IS_ERR((void *)userspace_addr))
6879                                 return PTR_ERR((void *)userspace_addr);
6880
6881                         memslot->userspace_addr = userspace_addr;
6882                 }
6883         }
6884
6885
6886         return 0;
6887 }
6888
6889 void kvm_arch_commit_memory_region(struct kvm *kvm,
6890                                 struct kvm_userspace_memory_region *mem,
6891                                 struct kvm_memory_slot old,
6892                                 int user_alloc)
6893 {
6894
6895         int nr_mmu_pages = 0, npages = mem->memory_size >> PAGE_SHIFT;
6896
6897         if (!user_alloc && !old.user_alloc && old.npages && !npages) {
6898                 int ret;
6899
6900                 ret = vm_munmap(old.userspace_addr,
6901                                 old.npages * PAGE_SIZE);
6902                 if (ret < 0)
6903                         printk(KERN_WARNING
6904                                "kvm_vm_ioctl_set_memory_region: "
6905                                "failed to munmap memory\n");
6906         }
6907
6908         if (!kvm->arch.n_requested_mmu_pages)
6909                 nr_mmu_pages = kvm_mmu_calculate_mmu_pages(kvm);
6910
6911         spin_lock(&kvm->mmu_lock);
6912         if (nr_mmu_pages)
6913                 kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages);
6914         kvm_mmu_slot_remove_write_access(kvm, mem->slot);
6915         spin_unlock(&kvm->mmu_lock);
6916         /*
6917          * If memory slot is created, or moved, we need to clear all
6918          * mmio sptes.
6919          */
6920         if (npages && old.base_gfn != mem->guest_phys_addr >> PAGE_SHIFT) {
6921                 kvm_mmu_zap_all(kvm);
6922                 kvm_reload_remote_mmus(kvm);
6923         }
6924 }
6925
6926 void kvm_arch_flush_shadow_all(struct kvm *kvm)
6927 {
6928         kvm_mmu_zap_all(kvm);
6929         kvm_reload_remote_mmus(kvm);
6930 }
6931
6932 void kvm_arch_flush_shadow_memslot(struct kvm *kvm,
6933                                    struct kvm_memory_slot *slot)
6934 {
6935         kvm_arch_flush_shadow_all(kvm);
6936 }
6937
6938 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
6939 {
6940         return (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
6941                 !vcpu->arch.apf.halted)
6942                 || !list_empty_careful(&vcpu->async_pf.done)
6943                 || vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED
6944                 || atomic_read(&vcpu->arch.nmi_queued) ||
6945                 (kvm_arch_interrupt_allowed(vcpu) &&
6946                  kvm_cpu_has_interrupt(vcpu));
6947 }
6948
6949 int kvm_arch_vcpu_should_kick(struct kvm_vcpu *vcpu)
6950 {
6951         return kvm_vcpu_exiting_guest_mode(vcpu) == IN_GUEST_MODE;
6952 }
6953
6954 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
6955 {
6956         return kvm_x86_ops->interrupt_allowed(vcpu);
6957 }
6958
6959 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip)
6960 {
6961         unsigned long current_rip = kvm_rip_read(vcpu) +
6962                 get_segment_base(vcpu, VCPU_SREG_CS);
6963
6964         return current_rip == linear_rip;
6965 }
6966 EXPORT_SYMBOL_GPL(kvm_is_linear_rip);
6967
6968 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu)
6969 {
6970         unsigned long rflags;
6971
6972         rflags = kvm_x86_ops->get_rflags(vcpu);
6973         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
6974                 rflags &= ~X86_EFLAGS_TF;
6975         return rflags;
6976 }
6977 EXPORT_SYMBOL_GPL(kvm_get_rflags);
6978
6979 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
6980 {
6981         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP &&
6982             kvm_is_linear_rip(vcpu, vcpu->arch.singlestep_rip))
6983                 rflags |= X86_EFLAGS_TF;
6984         kvm_x86_ops->set_rflags(vcpu, rflags);
6985         kvm_make_request(KVM_REQ_EVENT, vcpu);
6986 }
6987 EXPORT_SYMBOL_GPL(kvm_set_rflags);
6988
6989 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu, struct kvm_async_pf *work)
6990 {
6991         int r;
6992
6993         if ((vcpu->arch.mmu.direct_map != work->arch.direct_map) ||
6994               is_error_page(work->page))
6995                 return;
6996
6997         r = kvm_mmu_reload(vcpu);
6998         if (unlikely(r))
6999                 return;
7000
7001         if (!vcpu->arch.mmu.direct_map &&
7002               work->arch.cr3 != vcpu->arch.mmu.get_cr3(vcpu))
7003                 return;
7004
7005         vcpu->arch.mmu.page_fault(vcpu, work->gva, 0, true);
7006 }
7007
7008 static inline u32 kvm_async_pf_hash_fn(gfn_t gfn)
7009 {
7010         return hash_32(gfn & 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU));
7011 }
7012
7013 static inline u32 kvm_async_pf_next_probe(u32 key)
7014 {
7015         return (key + 1) & (roundup_pow_of_two(ASYNC_PF_PER_VCPU) - 1);
7016 }
7017
7018 static void kvm_add_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
7019 {
7020         u32 key = kvm_async_pf_hash_fn(gfn);
7021
7022         while (vcpu->arch.apf.gfns[key] != ~0)
7023                 key = kvm_async_pf_next_probe(key);
7024
7025         vcpu->arch.apf.gfns[key] = gfn;
7026 }
7027
7028 static u32 kvm_async_pf_gfn_slot(struct kvm_vcpu *vcpu, gfn_t gfn)
7029 {
7030         int i;
7031         u32 key = kvm_async_pf_hash_fn(gfn);
7032
7033         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU) &&
7034                      (vcpu->arch.apf.gfns[key] != gfn &&
7035                       vcpu->arch.apf.gfns[key] != ~0); i++)
7036                 key = kvm_async_pf_next_probe(key);
7037
7038         return key;
7039 }
7040
7041 bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
7042 {
7043         return vcpu->arch.apf.gfns[kvm_async_pf_gfn_slot(vcpu, gfn)] == gfn;
7044 }
7045
7046 static void kvm_del_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
7047 {
7048         u32 i, j, k;
7049
7050         i = j = kvm_async_pf_gfn_slot(vcpu, gfn);
7051         while (true) {
7052                 vcpu->arch.apf.gfns[i] = ~0;
7053                 do {
7054                         j = kvm_async_pf_next_probe(j);
7055                         if (vcpu->arch.apf.gfns[j] == ~0)
7056                                 return;
7057                         k = kvm_async_pf_hash_fn(vcpu->arch.apf.gfns[j]);
7058                         /*
7059                          * k lies cyclically in ]i,j]
7060                          * |    i.k.j |
7061                          * |....j i.k.| or  |.k..j i...|
7062                          */
7063                 } while ((i <= j) ? (i < k && k <= j) : (i < k || k <= j));
7064                 vcpu->arch.apf.gfns[i] = vcpu->arch.apf.gfns[j];
7065                 i = j;
7066         }
7067 }
7068
7069 static int apf_put_user(struct kvm_vcpu *vcpu, u32 val)
7070 {
7071
7072         return kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.apf.data, &val,
7073                                       sizeof(val));
7074 }
7075
7076 void kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
7077                                      struct kvm_async_pf *work)
7078 {
7079         struct x86_exception fault;
7080
7081         trace_kvm_async_pf_not_present(work->arch.token, work->gva);
7082         kvm_add_async_pf_gfn(vcpu, work->arch.gfn);
7083
7084         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) ||
7085             (vcpu->arch.apf.send_user_only &&
7086              kvm_x86_ops->get_cpl(vcpu) == 0))
7087                 kvm_make_request(KVM_REQ_APF_HALT, vcpu);
7088         else if (!apf_put_user(vcpu, KVM_PV_REASON_PAGE_NOT_PRESENT)) {
7089                 fault.vector = PF_VECTOR;
7090                 fault.error_code_valid = true;
7091                 fault.error_code = 0;
7092                 fault.nested_page_fault = false;
7093                 fault.address = work->arch.token;
7094                 kvm_inject_page_fault(vcpu, &fault);
7095         }
7096 }
7097
7098 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
7099                                  struct kvm_async_pf *work)
7100 {
7101         struct x86_exception fault;
7102
7103         trace_kvm_async_pf_ready(work->arch.token, work->gva);
7104         if (is_error_page(work->page))
7105                 work->arch.token = ~0; /* broadcast wakeup */
7106         else
7107                 kvm_del_async_pf_gfn(vcpu, work->arch.gfn);
7108
7109         if ((vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) &&
7110             !apf_put_user(vcpu, KVM_PV_REASON_PAGE_READY)) {
7111                 fault.vector = PF_VECTOR;
7112                 fault.error_code_valid = true;
7113                 fault.error_code = 0;
7114                 fault.nested_page_fault = false;
7115                 fault.address = work->arch.token;
7116                 kvm_inject_page_fault(vcpu, &fault);
7117         }
7118         vcpu->arch.apf.halted = false;
7119         vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
7120 }
7121
7122 bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu *vcpu)
7123 {
7124         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED))
7125                 return true;
7126         else
7127                 return !kvm_event_needs_reinjection(vcpu) &&
7128                         kvm_x86_ops->interrupt_allowed(vcpu);
7129 }
7130
7131 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
7132 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
7133 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
7134 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
7135 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);
7136 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun);
7137 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit);
7138 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject);
7139 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit);
7140 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga);
7141 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit);
7142 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts);