drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h

   1 /*
   2  * Copyright 2016 Advanced Micro Devices, Inc.
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice shall be included in
  12  * all copies or substantial portions of the Software.
  13  *
  14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20  * OTHER DEALINGS IN THE SOFTWARE.
  21  *
  22  */
  23
  24 #ifndef __AMDGPU_TTM_H__
  25 #define __AMDGPU_TTM_H__
  26
  27 #include <linux/dma-direction.h>
  28 #include <drm/gpu_scheduler.h>
  29 #include "amdgpu_vram_mgr.h"
  30 #include "amdgpu.h"
  31
  32 #define AMDGPU_PL_GDS           (TTM_PL_PRIV + 0)
  33 #define AMDGPU_PL_GWS           (TTM_PL_PRIV + 1)
  34 #define AMDGPU_PL_OA            (TTM_PL_PRIV + 2)
  35 #define AMDGPU_PL_PREEMPT       (TTM_PL_PRIV + 3)
  36
  37 #define AMDGPU_GTT_MAX_TRANSFER_SIZE    512
  38 #define AMDGPU_GTT_NUM_TRANSFER_WINDOWS 2
  39
  40 #define AMDGPU_POISON   0xd0bed0be
  41
  42 struct hmm_range;
  43
  44 struct amdgpu_gtt_mgr {
  45         struct ttm_resource_manager manager;
  46         struct drm_mm mm;
  47         spinlock_t lock;
  48 };
  49
  50 struct amdgpu_mman {
  51         struct ttm_device               bdev;
  52         struct ttm_pool                 *ttm_pools;
  53         bool                            initialized;
  54         void __iomem                    *aper_base_kaddr;
  55
  56         /* buffer handling */
  57         const struct amdgpu_buffer_funcs        *buffer_funcs;
  58         struct amdgpu_ring                      *buffer_funcs_ring;
  59         bool                                    buffer_funcs_enabled;
  60
  61         struct mutex                            gtt_window_lock;
  62         /* High priority scheduler entity for buffer moves */
  63         struct drm_sched_entity                 high_pr;
  64         /* Low priority scheduler entity for VRAM clearing */
  65         struct drm_sched_entity                 low_pr;
  66
  67         struct amdgpu_vram_mgr vram_mgr;
  68         struct amdgpu_gtt_mgr gtt_mgr;
  69         struct ttm_resource_manager preempt_mgr;
  70
  71         uint64_t                stolen_vga_size;
  72         struct amdgpu_bo        *stolen_vga_memory;
  73         uint64_t                stolen_extended_size;
  74         struct amdgpu_bo        *stolen_extended_memory;
  75         bool                    keep_stolen_vga_memory;
  76
  77         struct amdgpu_bo        *stolen_reserved_memory;
  78         uint64_t                stolen_reserved_offset;
  79         uint64_t                stolen_reserved_size;
  80
  81         /* discovery */
  82         uint8_t                         *discovery_bin;
  83         uint32_t                        discovery_tmr_size;
  84         /* fw reserved memory */
  85         struct amdgpu_bo                *fw_reserved_memory;
  86
  87         /* firmware VRAM reservation */
  88         u64             fw_vram_usage_start_offset;
  89         u64             fw_vram_usage_size;
  90         struct amdgpu_bo        *fw_vram_usage_reserved_bo;
  91         void            *fw_vram_usage_va;
  92
  93         /* driver VRAM reservation */
  94         u64             drv_vram_usage_start_offset;
  95         u64             drv_vram_usage_size;
  96         struct amdgpu_bo        *drv_vram_usage_reserved_bo;
  97         void            *drv_vram_usage_va;
  98
  99         /* PAGE_SIZE'd BO for process memory r/w over SDMA. */
 100         struct amdgpu_bo        *sdma_access_bo;
 101         void                    *sdma_access_ptr;
 102 };
 103
 104 struct amdgpu_copy_mem {
 105         struct ttm_buffer_object        *bo;
 106         struct ttm_resource             *mem;
 107         unsigned long                   offset;
 108 };
 109
 110 int amdgpu_gtt_mgr_init(struct amdgpu_device *adev, uint64_t gtt_size);
 111 void amdgpu_gtt_mgr_fini(struct amdgpu_device *adev);
 112 int amdgpu_preempt_mgr_init(struct amdgpu_device *adev);
 113 void amdgpu_preempt_mgr_fini(struct amdgpu_device *adev);
 114 int amdgpu_vram_mgr_init(struct amdgpu_device *adev);
 115 void amdgpu_vram_mgr_fini(struct amdgpu_device *adev);
 116
 117 bool amdgpu_gtt_mgr_has_gart_addr(struct ttm_resource *mem);
 118 void amdgpu_gtt_mgr_recover(struct amdgpu_gtt_mgr *mgr);
 119
 120 uint64_t amdgpu_preempt_mgr_usage(struct ttm_resource_manager *man);
 121
 122 u64 amdgpu_vram_mgr_bo_visible_size(struct amdgpu_bo *bo);
 123 int amdgpu_vram_mgr_alloc_sgt(struct amdgpu_device *adev,
 124                               struct ttm_resource *mem,
 125                               u64 offset, u64 size,
 126                               struct device *dev,
 127                               enum dma_data_direction dir,
 128                               struct sg_table **sgt);
 129 void amdgpu_vram_mgr_free_sgt(struct device *dev,
 130                               enum dma_data_direction dir,
 131                               struct sg_table *sgt);
 132 uint64_t amdgpu_vram_mgr_vis_usage(struct amdgpu_vram_mgr *mgr);
 133 int amdgpu_vram_mgr_reserve_range(struct amdgpu_vram_mgr *mgr,
 134                                   uint64_t start, uint64_t size);
 135 int amdgpu_vram_mgr_query_page_status(struct amdgpu_vram_mgr *mgr,
 136                                       uint64_t start);
 137
 138 int amdgpu_ttm_init(struct amdgpu_device *adev);
 139 void amdgpu_ttm_fini(struct amdgpu_device *adev);
 140 void amdgpu_ttm_set_buffer_funcs_status(struct amdgpu_device *adev,
 141                                         bool enable);
 142
 143 int amdgpu_copy_buffer(struct amdgpu_ring *ring, uint64_t src_offset,
 144                        uint64_t dst_offset, uint32_t byte_count,
 145                        struct dma_resv *resv,
 146                        struct dma_fence **fence, bool direct_submit,
 147                        bool vm_needs_flush, bool tmz);
 148 int amdgpu_ttm_copy_mem_to_mem(struct amdgpu_device *adev,
 149                                const struct amdgpu_copy_mem *src,
 150                                const struct amdgpu_copy_mem *dst,
 151                                uint64_t size, bool tmz,
 152                                struct dma_resv *resv,
 153                                struct dma_fence **f);
 154 int amdgpu_fill_buffer(struct amdgpu_bo *bo,
 155                         uint32_t src_data,
 156                         struct dma_resv *resv,
 157                         struct dma_fence **fence,
 158                         bool delayed);
 159
 160 int amdgpu_ttm_alloc_gart(struct ttm_buffer_object *bo);
 161 void amdgpu_ttm_recover_gart(struct ttm_buffer_object *tbo);
 162 uint64_t amdgpu_ttm_domain_start(struct amdgpu_device *adev, uint32_t type);
 163
 164 #if IS_ENABLED(CONFIG_DRM_AMDGPU_USERPTR)
 165 int amdgpu_ttm_tt_get_user_pages(struct amdgpu_bo *bo, struct page **pages,
 166                                  struct hmm_range **range);
 167 void amdgpu_ttm_tt_discard_user_pages(struct ttm_tt *ttm,
 168                                       struct hmm_range *range);
 169 bool amdgpu_ttm_tt_get_user_pages_done(struct ttm_tt *ttm,
 170                                        struct hmm_range *range);
 171 #else
 172 static inline int amdgpu_ttm_tt_get_user_pages(struct amdgpu_bo *bo,
 173                                                struct page **pages,
 174                                                struct hmm_range **range)
 175 {
 176         return -EPERM;
 177 }
 178 static inline void amdgpu_ttm_tt_discard_user_pages(struct ttm_tt *ttm,
 179                                                     struct hmm_range *range)
 180 {
 181 }
 182 static inline bool amdgpu_ttm_tt_get_user_pages_done(struct ttm_tt *ttm,
 183                                                      struct hmm_range *range)
 184 {
 185         return false;
 186 }
 187 #endif
 188
 189 void amdgpu_ttm_tt_set_user_pages(struct ttm_tt *ttm, struct page **pages);
 190 int amdgpu_ttm_tt_get_userptr(const struct ttm_buffer_object *tbo,
 191                               uint64_t *user_addr);
 192 int amdgpu_ttm_tt_set_userptr(struct ttm_buffer_object *bo,
 193                               uint64_t addr, uint32_t flags);
 194 bool amdgpu_ttm_tt_has_userptr(struct ttm_tt *ttm);
 195 struct mm_struct *amdgpu_ttm_tt_get_usermm(struct ttm_tt *ttm);
 196 bool amdgpu_ttm_tt_affect_userptr(struct ttm_tt *ttm, unsigned long start,
 197                                   unsigned long end, unsigned long *userptr);
 198 bool amdgpu_ttm_tt_userptr_invalidated(struct ttm_tt *ttm,
 199                                        int *last_invalidated);
 200 bool amdgpu_ttm_tt_is_userptr(struct ttm_tt *ttm);
 201 bool amdgpu_ttm_tt_is_readonly(struct ttm_tt *ttm);
 202 uint64_t amdgpu_ttm_tt_pde_flags(struct ttm_tt *ttm, struct ttm_resource *mem);
 203 uint64_t amdgpu_ttm_tt_pte_flags(struct amdgpu_device *adev, struct ttm_tt *ttm,
 204                                  struct ttm_resource *mem);
 205 int amdgpu_ttm_evict_resources(struct amdgpu_device *adev, int mem_type);
 206
 207 void amdgpu_ttm_debugfs_init(struct amdgpu_device *adev);
 208
 209 #endif