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1 /*
2  * Copyright 2014 Advanced Micro Devices, Inc.
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice shall be included in
12  * all copies or substantial portions of the Software.
13  *
14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20  * OTHER DEALINGS IN THE SOFTWARE.
21  */
22
23 #include "amdgpu_amdkfd.h"
24 #include "amd_shared.h"
25 #include <drm/drmP.h>
26 #include "amdgpu.h"
27 #include "amdgpu_gfx.h"
28 #include <linux/module.h>
29
30 const struct kgd2kfd_calls *kgd2kfd;
31 bool (*kgd2kfd_init_p)(unsigned int, const struct kgd2kfd_calls**);
32
33 static const unsigned int compute_vmid_bitmap = 0xFF00;
34
35 int amdgpu_amdkfd_init(void)
36 {
37         int ret;
38
39 #if defined(CONFIG_HSA_AMD_MODULE)
40         int (*kgd2kfd_init_p)(unsigned int, const struct kgd2kfd_calls**);
41
42         kgd2kfd_init_p = symbol_request(kgd2kfd_init);
43
44         if (kgd2kfd_init_p == NULL)
45                 return -ENOENT;
46
47         ret = kgd2kfd_init_p(KFD_INTERFACE_VERSION, &kgd2kfd);
48         if (ret) {
49                 symbol_put(kgd2kfd_init);
50                 kgd2kfd = NULL;
51         }
52
53 #elif defined(CONFIG_HSA_AMD)
54         ret = kgd2kfd_init(KFD_INTERFACE_VERSION, &kgd2kfd);
55         if (ret)
56                 kgd2kfd = NULL;
57
58 #else
59         ret = -ENOENT;
60 #endif
61         amdgpu_amdkfd_gpuvm_init_mem_limits();
62
63         return ret;
64 }
65
66 void amdgpu_amdkfd_fini(void)
67 {
68         if (kgd2kfd) {
69                 kgd2kfd->exit();
70                 symbol_put(kgd2kfd_init);
71         }
72 }
73
74 void amdgpu_amdkfd_device_probe(struct amdgpu_device *adev)
75 {
76         const struct kfd2kgd_calls *kfd2kgd;
77
78         if (!kgd2kfd)
79                 return;
80
81         switch (adev->asic_type) {
82 #ifdef CONFIG_DRM_AMDGPU_CIK
83         case CHIP_KAVERI:
84         case CHIP_HAWAII:
85                 kfd2kgd = amdgpu_amdkfd_gfx_7_get_functions();
86                 break;
87 #endif
88         case CHIP_CARRIZO:
89         case CHIP_TONGA:
90         case CHIP_FIJI:
91         case CHIP_POLARIS10:
92         case CHIP_POLARIS11:
93                 kfd2kgd = amdgpu_amdkfd_gfx_8_0_get_functions();
94                 break;
95         default:
96                 dev_dbg(adev->dev, "kfd not supported on this ASIC\n");
97                 return;
98         }
99
100         adev->kfd = kgd2kfd->probe((struct kgd_dev *)adev,
101                                    adev->pdev, kfd2kgd);
102 }
103
104 /**
105  * amdgpu_doorbell_get_kfd_info - Report doorbell configuration required to
106  *                                setup amdkfd
107  *
108  * @adev: amdgpu_device pointer
109  * @aperture_base: output returning doorbell aperture base physical address
110  * @aperture_size: output returning doorbell aperture size in bytes
111  * @start_offset: output returning # of doorbell bytes reserved for amdgpu.
112  *
113  * amdgpu and amdkfd share the doorbell aperture. amdgpu sets it up,
114  * takes doorbells required for its own rings and reports the setup to amdkfd.
115  * amdgpu reserved doorbells are at the start of the doorbell aperture.
116  */
117 static void amdgpu_doorbell_get_kfd_info(struct amdgpu_device *adev,
118                                          phys_addr_t *aperture_base,
119                                          size_t *aperture_size,
120                                          size_t *start_offset)
121 {
122         /*
123          * The first num_doorbells are used by amdgpu.
124          * amdkfd takes whatever's left in the aperture.
125          */
126         if (adev->doorbell.size > adev->doorbell.num_doorbells * sizeof(u32)) {
127                 *aperture_base = adev->doorbell.base;
128                 *aperture_size = adev->doorbell.size;
129                 *start_offset = adev->doorbell.num_doorbells * sizeof(u32);
130         } else {
131                 *aperture_base = 0;
132                 *aperture_size = 0;
133                 *start_offset = 0;
134         }
135 }
136
137 void amdgpu_amdkfd_device_init(struct amdgpu_device *adev)
138 {
139         int i;
140         int last_valid_bit;
141         if (adev->kfd) {
142                 struct kgd2kfd_shared_resources gpu_resources = {
143                         .compute_vmid_bitmap = compute_vmid_bitmap,
144                         .num_pipe_per_mec = adev->gfx.mec.num_pipe_per_mec,
145                         .num_queue_per_pipe = adev->gfx.mec.num_queue_per_pipe,
146                         .gpuvm_size = min(adev->vm_manager.max_pfn
147                                           << AMDGPU_GPU_PAGE_SHIFT,
148                                           AMDGPU_VA_HOLE_START),
149                         .drm_render_minor = adev->ddev->render->index
150                 };
151
152                 /* this is going to have a few of the MSBs set that we need to
153                  * clear */
154                 bitmap_complement(gpu_resources.queue_bitmap,
155                                   adev->gfx.mec.queue_bitmap,
156                                   KGD_MAX_QUEUES);
157
158                 /* remove the KIQ bit as well */
159                 if (adev->gfx.kiq.ring.ready)
160                         clear_bit(amdgpu_gfx_queue_to_bit(adev,
161                                                           adev->gfx.kiq.ring.me - 1,
162                                                           adev->gfx.kiq.ring.pipe,
163                                                           adev->gfx.kiq.ring.queue),
164                                   gpu_resources.queue_bitmap);
165
166                 /* According to linux/bitmap.h we shouldn't use bitmap_clear if
167                  * nbits is not compile time constant */
168                 last_valid_bit = 1 /* only first MEC can have compute queues */
169                                 * adev->gfx.mec.num_pipe_per_mec
170                                 * adev->gfx.mec.num_queue_per_pipe;
171                 for (i = last_valid_bit; i < KGD_MAX_QUEUES; ++i)
172                         clear_bit(i, gpu_resources.queue_bitmap);
173
174                 amdgpu_doorbell_get_kfd_info(adev,
175                                 &gpu_resources.doorbell_physical_address,
176                                 &gpu_resources.doorbell_aperture_size,
177                                 &gpu_resources.doorbell_start_offset);
178
179                 kgd2kfd->device_init(adev->kfd, &gpu_resources);
180         }
181 }
182
183 void amdgpu_amdkfd_device_fini(struct amdgpu_device *adev)
184 {
185         if (adev->kfd) {
186                 kgd2kfd->device_exit(adev->kfd);
187                 adev->kfd = NULL;
188         }
189 }
190
191 void amdgpu_amdkfd_interrupt(struct amdgpu_device *adev,
192                 const void *ih_ring_entry)
193 {
194         if (adev->kfd)
195                 kgd2kfd->interrupt(adev->kfd, ih_ring_entry);
196 }
197
198 void amdgpu_amdkfd_suspend(struct amdgpu_device *adev)
199 {
200         if (adev->kfd)
201                 kgd2kfd->suspend(adev->kfd);
202 }
203
204 int amdgpu_amdkfd_resume(struct amdgpu_device *adev)
205 {
206         int r = 0;
207
208         if (adev->kfd)
209                 r = kgd2kfd->resume(adev->kfd);
210
211         return r;
212 }
213
214 int alloc_gtt_mem(struct kgd_dev *kgd, size_t size,
215                         void **mem_obj, uint64_t *gpu_addr,
216                         void **cpu_ptr)
217 {
218         struct amdgpu_device *adev = (struct amdgpu_device *)kgd;
219         struct amdgpu_bo *bo = NULL;
220         struct amdgpu_bo_param bp;
221         int r;
222         uint64_t gpu_addr_tmp = 0;
223         void *cpu_ptr_tmp = NULL;
224
225         memset(&bp, 0, sizeof(bp));
226         bp.size = size;
227         bp.byte_align = PAGE_SIZE;
228         bp.domain = AMDGPU_GEM_DOMAIN_GTT;
229         bp.flags = AMDGPU_GEM_CREATE_CPU_GTT_USWC;
230         bp.type = ttm_bo_type_kernel;
231         bp.resv = NULL;
232         r = amdgpu_bo_create(adev, &bp, &bo);
233         if (r) {
234                 dev_err(adev->dev,
235                         "failed to allocate BO for amdkfd (%d)\n", r);
236                 return r;
237         }
238
239         /* map the buffer */
240         r = amdgpu_bo_reserve(bo, true);
241         if (r) {
242                 dev_err(adev->dev, "(%d) failed to reserve bo for amdkfd\n", r);
243                 goto allocate_mem_reserve_bo_failed;
244         }
245
246         r = amdgpu_bo_pin(bo, AMDGPU_GEM_DOMAIN_GTT,
247                                 &gpu_addr_tmp);
248         if (r) {
249                 dev_err(adev->dev, "(%d) failed to pin bo for amdkfd\n", r);
250                 goto allocate_mem_pin_bo_failed;
251         }
252
253         r = amdgpu_bo_kmap(bo, &cpu_ptr_tmp);
254         if (r) {
255                 dev_err(adev->dev,
256                         "(%d) failed to map bo to kernel for amdkfd\n", r);
257                 goto allocate_mem_kmap_bo_failed;
258         }
259
260         *mem_obj = bo;
261         *gpu_addr = gpu_addr_tmp;
262         *cpu_ptr = cpu_ptr_tmp;
263
264         amdgpu_bo_unreserve(bo);
265
266         return 0;
267
268 allocate_mem_kmap_bo_failed:
269         amdgpu_bo_unpin(bo);
270 allocate_mem_pin_bo_failed:
271         amdgpu_bo_unreserve(bo);
272 allocate_mem_reserve_bo_failed:
273         amdgpu_bo_unref(&bo);
274
275         return r;
276 }
277
278 void free_gtt_mem(struct kgd_dev *kgd, void *mem_obj)
279 {
280         struct amdgpu_bo *bo = (struct amdgpu_bo *) mem_obj;
281
282         amdgpu_bo_reserve(bo, true);
283         amdgpu_bo_kunmap(bo);
284         amdgpu_bo_unpin(bo);
285         amdgpu_bo_unreserve(bo);
286         amdgpu_bo_unref(&(bo));
287 }
288
289 void get_local_mem_info(struct kgd_dev *kgd,
290                         struct kfd_local_mem_info *mem_info)
291 {
292         struct amdgpu_device *adev = (struct amdgpu_device *)kgd;
293         uint64_t address_mask = adev->dev->dma_mask ? ~*adev->dev->dma_mask :
294                                              ~((1ULL << 32) - 1);
295         resource_size_t aper_limit = adev->gmc.aper_base + adev->gmc.aper_size;
296
297         memset(mem_info, 0, sizeof(*mem_info));
298         if (!(adev->gmc.aper_base & address_mask || aper_limit & address_mask)) {
299                 mem_info->local_mem_size_public = adev->gmc.visible_vram_size;
300                 mem_info->local_mem_size_private = adev->gmc.real_vram_size -
301                                 adev->gmc.visible_vram_size;
302         } else {
303                 mem_info->local_mem_size_public = 0;
304                 mem_info->local_mem_size_private = adev->gmc.real_vram_size;
305         }
306         mem_info->vram_width = adev->gmc.vram_width;
307
308         pr_debug("Address base: %pap limit %pap public 0x%llx private 0x%llx\n",
309                         &adev->gmc.aper_base, &aper_limit,
310                         mem_info->local_mem_size_public,
311                         mem_info->local_mem_size_private);
312
313         if (amdgpu_emu_mode == 1) {
314                 mem_info->mem_clk_max = 100;
315                 return;
316         }
317
318         if (amdgpu_sriov_vf(adev))
319                 mem_info->mem_clk_max = adev->clock.default_mclk / 100;
320         else
321                 mem_info->mem_clk_max = amdgpu_dpm_get_mclk(adev, false) / 100;
322 }
323
324 uint64_t get_gpu_clock_counter(struct kgd_dev *kgd)
325 {
326         struct amdgpu_device *adev = (struct amdgpu_device *)kgd;
327
328         if (adev->gfx.funcs->get_gpu_clock_counter)
329                 return adev->gfx.funcs->get_gpu_clock_counter(adev);
330         return 0;
331 }
332
333 uint32_t get_max_engine_clock_in_mhz(struct kgd_dev *kgd)
334 {
335         struct amdgpu_device *adev = (struct amdgpu_device *)kgd;
336
337         /* the sclk is in quantas of 10kHz */
338         if (amdgpu_emu_mode == 1)
339                 return 100;
340
341         if (amdgpu_sriov_vf(adev))
342                 return adev->clock.default_sclk / 100;
343
344         return amdgpu_dpm_get_sclk(adev, false) / 100;
345 }
346
347 void get_cu_info(struct kgd_dev *kgd, struct kfd_cu_info *cu_info)
348 {
349         struct amdgpu_device *adev = (struct amdgpu_device *)kgd;
350         struct amdgpu_cu_info acu_info = adev->gfx.cu_info;
351
352         memset(cu_info, 0, sizeof(*cu_info));
353         if (sizeof(cu_info->cu_bitmap) != sizeof(acu_info.bitmap))
354                 return;
355
356         cu_info->cu_active_number = acu_info.number;
357         cu_info->cu_ao_mask = acu_info.ao_cu_mask;
358         memcpy(&cu_info->cu_bitmap[0], &acu_info.bitmap[0],
359                sizeof(acu_info.bitmap));
360         cu_info->num_shader_engines = adev->gfx.config.max_shader_engines;
361         cu_info->num_shader_arrays_per_engine = adev->gfx.config.max_sh_per_se;
362         cu_info->num_cu_per_sh = adev->gfx.config.max_cu_per_sh;
363         cu_info->simd_per_cu = acu_info.simd_per_cu;
364         cu_info->max_waves_per_simd = acu_info.max_waves_per_simd;
365         cu_info->wave_front_size = acu_info.wave_front_size;
366         cu_info->max_scratch_slots_per_cu = acu_info.max_scratch_slots_per_cu;
367         cu_info->lds_size = acu_info.lds_size;
368 }
369
370 uint64_t amdgpu_amdkfd_get_vram_usage(struct kgd_dev *kgd)
371 {
372         struct amdgpu_device *adev = (struct amdgpu_device *)kgd;
373
374         return amdgpu_vram_mgr_usage(&adev->mman.bdev.man[TTM_PL_VRAM]);
375 }
376
377 int amdgpu_amdkfd_submit_ib(struct kgd_dev *kgd, enum kgd_engine_type engine,
378                                 uint32_t vmid, uint64_t gpu_addr,
379                                 uint32_t *ib_cmd, uint32_t ib_len)
380 {
381         struct amdgpu_device *adev = (struct amdgpu_device *)kgd;
382         struct amdgpu_job *job;
383         struct amdgpu_ib *ib;
384         struct amdgpu_ring *ring;
385         struct dma_fence *f = NULL;
386         int ret;
387
388         switch (engine) {
389         case KGD_ENGINE_MEC1:
390                 ring = &adev->gfx.compute_ring[0];
391                 break;
392         case KGD_ENGINE_SDMA1:
393                 ring = &adev->sdma.instance[0].ring;
394                 break;
395         case KGD_ENGINE_SDMA2:
396                 ring = &adev->sdma.instance[1].ring;
397                 break;
398         default:
399                 pr_err("Invalid engine in IB submission: %d\n", engine);
400                 ret = -EINVAL;
401                 goto err;
402         }
403
404         ret = amdgpu_job_alloc(adev, 1, &job, NULL);
405         if (ret)
406                 goto err;
407
408         ib = &job->ibs[0];
409         memset(ib, 0, sizeof(struct amdgpu_ib));
410
411         ib->gpu_addr = gpu_addr;
412         ib->ptr = ib_cmd;
413         ib->length_dw = ib_len;
414         /* This works for NO_HWS. TODO: need to handle without knowing VMID */
415         job->vmid = vmid;
416
417         ret = amdgpu_ib_schedule(ring, 1, ib, job, &f);
418         if (ret) {
419                 DRM_ERROR("amdgpu: failed to schedule IB.\n");
420                 goto err_ib_sched;
421         }
422
423         ret = dma_fence_wait(f, false);
424
425 err_ib_sched:
426         dma_fence_put(f);
427         amdgpu_job_free(job);
428 err:
429         return ret;
430 }
431
432 bool amdgpu_amdkfd_is_kfd_vmid(struct amdgpu_device *adev, u32 vmid)
433 {
434         if (adev->kfd) {
435                 if ((1 << vmid) & compute_vmid_bitmap)
436                         return true;
437         }
438
439         return false;
440 }
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