2 * Copyright © 2011-2012 Intel Corporation
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5 * copy of this software and associated documentation files (the "Software"),
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9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
29 * This file implements HW context support. On gen5+ a HW context consists of an
30 * opaque GPU object which is referenced at times of context saves and restores.
31 * With RC6 enabled, the context is also referenced as the GPU enters and exists
32 * from RC6 (GPU has it's own internal power context, except on gen5). Though
33 * something like a context does exist for the media ring, the code only
34 * supports contexts for the render ring.
36 * In software, there is a distinction between contexts created by the user,
37 * and the default HW context. The default HW context is used by GPU clients
38 * that do not request setup of their own hardware context. The default
39 * context's state is never restored to help prevent programming errors. This
40 * would happen if a client ran and piggy-backed off another clients GPU state.
41 * The default context only exists to give the GPU some offset to load as the
42 * current to invoke a save of the context we actually care about. In fact, the
43 * code could likely be constructed, albeit in a more complicated fashion, to
44 * never use the default context, though that limits the driver's ability to
45 * swap out, and/or destroy other contexts.
47 * All other contexts are created as a request by the GPU client. These contexts
48 * store GPU state, and thus allow GPU clients to not re-emit state (and
49 * potentially query certain state) at any time. The kernel driver makes
50 * certain that the appropriate commands are inserted.
52 * The context life cycle is semi-complicated in that context BOs may live
53 * longer than the context itself because of the way the hardware, and object
54 * tracking works. Below is a very crude representation of the state machine
55 * describing the context life.
56 * refcount pincount active
57 * S0: initial state 0 0 0
58 * S1: context created 1 0 0
59 * S2: context is currently running 2 1 X
60 * S3: GPU referenced, but not current 2 0 1
61 * S4: context is current, but destroyed 1 1 0
62 * S5: like S3, but destroyed 1 0 1
64 * The most common (but not all) transitions:
65 * S0->S1: client creates a context
66 * S1->S2: client submits execbuf with context
67 * S2->S3: other clients submits execbuf with context
68 * S3->S1: context object was retired
69 * S3->S2: clients submits another execbuf
70 * S2->S4: context destroy called with current context
71 * S3->S5->S0: destroy path
72 * S4->S5->S0: destroy path on current context
74 * There are two confusing terms used above:
75 * The "current context" means the context which is currently running on the
76 * GPU. The GPU has loaded its state already and has stored away the gtt
77 * offset of the BO. The GPU is not actively referencing the data at this
78 * offset, but it will on the next context switch. The only way to avoid this
79 * is to do a GPU reset.
81 * An "active context' is one which was previously the "current context" and is
82 * on the active list waiting for the next context switch to occur. Until this
83 * happens, the object must remain at the same gtt offset. It is therefore
84 * possible to destroy a context, but it is still active.
88 #include <linux/log2.h>
90 #include <drm/i915_drm.h>
92 #include "i915_trace.h"
93 #include "intel_workarounds.h"
95 #define ALL_L3_SLICES(dev) (1 << NUM_L3_SLICES(dev)) - 1
97 static void lut_close(struct i915_gem_context *ctx)
99 struct i915_lut_handle *lut, *ln;
100 struct radix_tree_iter iter;
103 list_for_each_entry_safe(lut, ln, &ctx->handles_list, ctx_link) {
104 list_del(&lut->obj_link);
105 kmem_cache_free(ctx->i915->luts, lut);
109 radix_tree_for_each_slot(slot, &ctx->handles_vma, &iter, 0) {
110 struct i915_vma *vma = rcu_dereference_raw(*slot);
112 radix_tree_iter_delete(&ctx->handles_vma, &iter, slot);
113 __i915_gem_object_release_unless_active(vma->obj);
118 static inline int new_hw_id(struct drm_i915_private *i915, gfp_t gfp)
122 lockdep_assert_held(&i915->contexts.mutex);
124 if (INTEL_GEN(i915) >= 11)
125 max = GEN11_MAX_CONTEXT_HW_ID;
126 else if (USES_GUC_SUBMISSION(i915))
128 * When using GuC in proxy submission, GuC consumes the
129 * highest bit in the context id to indicate proxy submission.
131 max = MAX_GUC_CONTEXT_HW_ID;
133 max = MAX_CONTEXT_HW_ID;
135 return ida_simple_get(&i915->contexts.hw_ida, 0, max, gfp);
138 static int steal_hw_id(struct drm_i915_private *i915)
140 struct i915_gem_context *ctx, *cn;
144 lockdep_assert_held(&i915->contexts.mutex);
146 list_for_each_entry_safe(ctx, cn,
147 &i915->contexts.hw_id_list, hw_id_link) {
148 if (atomic_read(&ctx->hw_id_pin_count)) {
149 list_move_tail(&ctx->hw_id_link, &pinned);
153 GEM_BUG_ON(!ctx->hw_id); /* perma-pinned kernel context */
154 list_del_init(&ctx->hw_id_link);
160 * Remember how far we got up on the last repossesion scan, so the
161 * list is kept in a "least recently scanned" order.
163 list_splice_tail(&pinned, &i915->contexts.hw_id_list);
167 static int assign_hw_id(struct drm_i915_private *i915, unsigned int *out)
171 lockdep_assert_held(&i915->contexts.mutex);
174 * We prefer to steal/stall ourselves and our users over that of the
175 * entire system. That may be a little unfair to our users, and
176 * even hurt high priority clients. The choice is whether to oomkill
177 * something else, or steal a context id.
179 ret = new_hw_id(i915, GFP_KERNEL | __GFP_RETRY_MAYFAIL | __GFP_NOWARN);
180 if (unlikely(ret < 0)) {
181 ret = steal_hw_id(i915);
182 if (ret < 0) /* once again for the correct errno code */
183 ret = new_hw_id(i915, GFP_KERNEL);
192 static void release_hw_id(struct i915_gem_context *ctx)
194 struct drm_i915_private *i915 = ctx->i915;
196 if (list_empty(&ctx->hw_id_link))
199 mutex_lock(&i915->contexts.mutex);
200 if (!list_empty(&ctx->hw_id_link)) {
201 ida_simple_remove(&i915->contexts.hw_ida, ctx->hw_id);
202 list_del_init(&ctx->hw_id_link);
204 mutex_unlock(&i915->contexts.mutex);
207 static void i915_gem_context_free(struct i915_gem_context *ctx)
211 lockdep_assert_held(&ctx->i915->drm.struct_mutex);
212 GEM_BUG_ON(!i915_gem_context_is_closed(ctx));
215 i915_ppgtt_put(ctx->ppgtt);
217 for (n = 0; n < ARRAY_SIZE(ctx->__engine); n++) {
218 struct intel_context *ce = &ctx->__engine[n];
221 ce->ops->destroy(ce);
227 list_del(&ctx->link);
232 static void contexts_free(struct drm_i915_private *i915)
234 struct llist_node *freed = llist_del_all(&i915->contexts.free_list);
235 struct i915_gem_context *ctx, *cn;
237 lockdep_assert_held(&i915->drm.struct_mutex);
239 llist_for_each_entry_safe(ctx, cn, freed, free_link)
240 i915_gem_context_free(ctx);
243 static void contexts_free_first(struct drm_i915_private *i915)
245 struct i915_gem_context *ctx;
246 struct llist_node *freed;
248 lockdep_assert_held(&i915->drm.struct_mutex);
250 freed = llist_del_first(&i915->contexts.free_list);
254 ctx = container_of(freed, typeof(*ctx), free_link);
255 i915_gem_context_free(ctx);
258 static void contexts_free_worker(struct work_struct *work)
260 struct drm_i915_private *i915 =
261 container_of(work, typeof(*i915), contexts.free_work);
263 mutex_lock(&i915->drm.struct_mutex);
265 mutex_unlock(&i915->drm.struct_mutex);
268 void i915_gem_context_release(struct kref *ref)
270 struct i915_gem_context *ctx = container_of(ref, typeof(*ctx), ref);
271 struct drm_i915_private *i915 = ctx->i915;
273 trace_i915_context_free(ctx);
274 if (llist_add(&ctx->free_link, &i915->contexts.free_list))
275 queue_work(i915->wq, &i915->contexts.free_work);
278 static void context_close(struct i915_gem_context *ctx)
280 i915_gem_context_set_closed(ctx);
283 * This context will never again be assinged to HW, so we can
284 * reuse its ID for the next context.
289 * The LUT uses the VMA as a backpointer to unref the object,
290 * so we need to clear the LUT before we close all the VMA (inside
295 i915_ppgtt_close(&ctx->ppgtt->vm);
297 ctx->file_priv = ERR_PTR(-EBADF);
298 i915_gem_context_put(ctx);
301 static u32 default_desc_template(const struct drm_i915_private *i915,
302 const struct i915_hw_ppgtt *ppgtt)
307 desc = GEN8_CTX_VALID | GEN8_CTX_PRIVILEGE;
309 address_mode = INTEL_LEGACY_32B_CONTEXT;
310 if (ppgtt && i915_vm_is_48bit(&ppgtt->vm))
311 address_mode = INTEL_LEGACY_64B_CONTEXT;
312 desc |= address_mode << GEN8_CTX_ADDRESSING_MODE_SHIFT;
315 desc |= GEN8_CTX_L3LLC_COHERENT;
317 /* TODO: WaDisableLiteRestore when we start using semaphore
318 * signalling between Command Streamers
319 * ring->ctx_desc_template |= GEN8_CTX_FORCE_RESTORE;
325 static struct i915_gem_context *
326 __create_hw_context(struct drm_i915_private *dev_priv,
327 struct drm_i915_file_private *file_priv)
329 struct i915_gem_context *ctx;
333 ctx = kzalloc(sizeof(*ctx), GFP_KERNEL);
335 return ERR_PTR(-ENOMEM);
337 kref_init(&ctx->ref);
338 list_add_tail(&ctx->link, &dev_priv->contexts.list);
339 ctx->i915 = dev_priv;
340 ctx->sched.priority = I915_PRIORITY_NORMAL;
342 for (n = 0; n < ARRAY_SIZE(ctx->__engine); n++) {
343 struct intel_context *ce = &ctx->__engine[n];
345 ce->gem_context = ctx;
348 INIT_RADIX_TREE(&ctx->handles_vma, GFP_KERNEL);
349 INIT_LIST_HEAD(&ctx->handles_list);
350 INIT_LIST_HEAD(&ctx->hw_id_link);
352 /* Default context will never have a file_priv */
353 ret = DEFAULT_CONTEXT_HANDLE;
355 ret = idr_alloc(&file_priv->context_idr, ctx,
356 DEFAULT_CONTEXT_HANDLE, 0, GFP_KERNEL);
360 ctx->user_handle = ret;
362 ctx->file_priv = file_priv;
364 ctx->pid = get_task_pid(current, PIDTYPE_PID);
365 ctx->name = kasprintf(GFP_KERNEL, "%s[%d]/%x",
375 /* NB: Mark all slices as needing a remap so that when the context first
376 * loads it will restore whatever remap state already exists. If there
377 * is no remap info, it will be a NOP. */
378 ctx->remap_slice = ALL_L3_SLICES(dev_priv);
380 i915_gem_context_set_bannable(ctx);
381 ctx->ring_size = 4 * PAGE_SIZE;
383 default_desc_template(dev_priv, dev_priv->mm.aliasing_ppgtt);
389 idr_remove(&file_priv->context_idr, ctx->user_handle);
395 static void __destroy_hw_context(struct i915_gem_context *ctx,
396 struct drm_i915_file_private *file_priv)
398 idr_remove(&file_priv->context_idr, ctx->user_handle);
402 static struct i915_gem_context *
403 i915_gem_create_context(struct drm_i915_private *dev_priv,
404 struct drm_i915_file_private *file_priv)
406 struct i915_gem_context *ctx;
408 lockdep_assert_held(&dev_priv->drm.struct_mutex);
410 /* Reap the most stale context */
411 contexts_free_first(dev_priv);
413 ctx = __create_hw_context(dev_priv, file_priv);
417 if (USES_FULL_PPGTT(dev_priv)) {
418 struct i915_hw_ppgtt *ppgtt;
420 ppgtt = i915_ppgtt_create(dev_priv, file_priv);
422 DRM_DEBUG_DRIVER("PPGTT setup failed (%ld)\n",
424 __destroy_hw_context(ctx, file_priv);
425 return ERR_CAST(ppgtt);
429 ctx->desc_template = default_desc_template(dev_priv, ppgtt);
432 trace_i915_context_create(ctx);
438 * i915_gem_context_create_gvt - create a GVT GEM context
441 * This function is used to create a GVT specific GEM context.
444 * pointer to i915_gem_context on success, error pointer if failed
447 struct i915_gem_context *
448 i915_gem_context_create_gvt(struct drm_device *dev)
450 struct i915_gem_context *ctx;
453 if (!IS_ENABLED(CONFIG_DRM_I915_GVT))
454 return ERR_PTR(-ENODEV);
456 ret = i915_mutex_lock_interruptible(dev);
460 ctx = __create_hw_context(to_i915(dev), NULL);
464 ctx->file_priv = ERR_PTR(-EBADF);
465 i915_gem_context_set_closed(ctx); /* not user accessible */
466 i915_gem_context_clear_bannable(ctx);
467 i915_gem_context_set_force_single_submission(ctx);
468 if (!USES_GUC_SUBMISSION(to_i915(dev)))
469 ctx->ring_size = 512 * PAGE_SIZE; /* Max ring buffer size */
471 GEM_BUG_ON(i915_gem_context_is_kernel(ctx));
473 mutex_unlock(&dev->struct_mutex);
478 destroy_kernel_context(struct i915_gem_context **ctxp)
480 struct i915_gem_context *ctx;
482 /* Keep the context ref so that we can free it immediately ourselves */
483 ctx = i915_gem_context_get(fetch_and_zero(ctxp));
484 GEM_BUG_ON(!i915_gem_context_is_kernel(ctx));
487 i915_gem_context_free(ctx);
490 struct i915_gem_context *
491 i915_gem_context_create_kernel(struct drm_i915_private *i915, int prio)
493 struct i915_gem_context *ctx;
496 ctx = i915_gem_create_context(i915, NULL);
500 err = i915_gem_context_pin_hw_id(ctx);
502 destroy_kernel_context(&ctx);
506 i915_gem_context_clear_bannable(ctx);
507 ctx->sched.priority = prio;
508 ctx->ring_size = PAGE_SIZE;
510 GEM_BUG_ON(!i915_gem_context_is_kernel(ctx));
515 static void init_contexts(struct drm_i915_private *i915)
517 mutex_init(&i915->contexts.mutex);
518 INIT_LIST_HEAD(&i915->contexts.list);
520 /* Using the simple ida interface, the max is limited by sizeof(int) */
521 BUILD_BUG_ON(MAX_CONTEXT_HW_ID > INT_MAX);
522 BUILD_BUG_ON(GEN11_MAX_CONTEXT_HW_ID > INT_MAX);
523 ida_init(&i915->contexts.hw_ida);
524 INIT_LIST_HEAD(&i915->contexts.hw_id_list);
526 INIT_WORK(&i915->contexts.free_work, contexts_free_worker);
527 init_llist_head(&i915->contexts.free_list);
530 static bool needs_preempt_context(struct drm_i915_private *i915)
532 return HAS_LOGICAL_RING_PREEMPTION(i915);
535 int i915_gem_contexts_init(struct drm_i915_private *dev_priv)
537 struct i915_gem_context *ctx;
540 /* Reassure ourselves we are only called once */
541 GEM_BUG_ON(dev_priv->kernel_context);
542 GEM_BUG_ON(dev_priv->preempt_context);
544 ret = intel_ctx_workarounds_init(dev_priv);
548 init_contexts(dev_priv);
550 /* lowest priority; idle task */
551 ctx = i915_gem_context_create_kernel(dev_priv, I915_PRIORITY_MIN);
553 DRM_ERROR("Failed to create default global context\n");
557 * For easy recognisablity, we want the kernel context to be 0 and then
558 * all user contexts will have non-zero hw_id. Kernel contexts are
559 * permanently pinned, so that we never suffer a stall and can
560 * use them from any allocation context (e.g. for evicting other
561 * contexts and from inside the shrinker).
563 GEM_BUG_ON(ctx->hw_id);
564 GEM_BUG_ON(!atomic_read(&ctx->hw_id_pin_count));
565 dev_priv->kernel_context = ctx;
567 /* highest priority; preempting task */
568 if (needs_preempt_context(dev_priv)) {
569 ctx = i915_gem_context_create_kernel(dev_priv, INT_MAX);
571 dev_priv->preempt_context = ctx;
573 DRM_ERROR("Failed to create preempt context; disabling preemption\n");
576 DRM_DEBUG_DRIVER("%s context support initialized\n",
577 DRIVER_CAPS(dev_priv)->has_logical_contexts ?
582 void i915_gem_contexts_lost(struct drm_i915_private *dev_priv)
584 struct intel_engine_cs *engine;
585 enum intel_engine_id id;
587 lockdep_assert_held(&dev_priv->drm.struct_mutex);
589 for_each_engine(engine, dev_priv, id)
590 intel_engine_lost_context(engine);
593 void i915_gem_contexts_fini(struct drm_i915_private *i915)
595 lockdep_assert_held(&i915->drm.struct_mutex);
597 if (i915->preempt_context)
598 destroy_kernel_context(&i915->preempt_context);
599 destroy_kernel_context(&i915->kernel_context);
601 /* Must free all deferred contexts (via flush_workqueue) first */
602 GEM_BUG_ON(!list_empty(&i915->contexts.hw_id_list));
603 ida_destroy(&i915->contexts.hw_ida);
606 static int context_idr_cleanup(int id, void *p, void *data)
608 struct i915_gem_context *ctx = p;
614 int i915_gem_context_open(struct drm_i915_private *i915,
615 struct drm_file *file)
617 struct drm_i915_file_private *file_priv = file->driver_priv;
618 struct i915_gem_context *ctx;
620 idr_init(&file_priv->context_idr);
622 mutex_lock(&i915->drm.struct_mutex);
623 ctx = i915_gem_create_context(i915, file_priv);
624 mutex_unlock(&i915->drm.struct_mutex);
626 idr_destroy(&file_priv->context_idr);
630 GEM_BUG_ON(i915_gem_context_is_kernel(ctx));
635 void i915_gem_context_close(struct drm_file *file)
637 struct drm_i915_file_private *file_priv = file->driver_priv;
639 lockdep_assert_held(&file_priv->dev_priv->drm.struct_mutex);
641 idr_for_each(&file_priv->context_idr, context_idr_cleanup, NULL);
642 idr_destroy(&file_priv->context_idr);
645 static struct i915_request *
646 last_request_on_engine(struct i915_timeline *timeline,
647 struct intel_engine_cs *engine)
649 struct i915_request *rq;
651 GEM_BUG_ON(timeline == &engine->timeline);
653 rq = i915_gem_active_raw(&timeline->last_request,
654 &engine->i915->drm.struct_mutex);
655 if (rq && rq->engine == engine) {
656 GEM_TRACE("last request for %s on engine %s: %llx:%d\n",
657 timeline->name, engine->name,
658 rq->fence.context, rq->fence.seqno);
659 GEM_BUG_ON(rq->timeline != timeline);
666 static bool engine_has_kernel_context_barrier(struct intel_engine_cs *engine)
668 struct drm_i915_private *i915 = engine->i915;
669 const struct intel_context * const ce =
670 to_intel_context(i915->kernel_context, engine);
671 struct i915_timeline *barrier = ce->ring->timeline;
672 struct intel_ring *ring;
673 bool any_active = false;
675 lockdep_assert_held(&i915->drm.struct_mutex);
676 list_for_each_entry(ring, &i915->gt.active_rings, active_link) {
677 struct i915_request *rq;
679 rq = last_request_on_engine(ring->timeline, engine);
685 if (rq->hw_context == ce)
689 * Was this request submitted after the previous
690 * switch-to-kernel-context?
692 if (!i915_timeline_sync_is_later(barrier, &rq->fence)) {
693 GEM_TRACE("%s needs barrier for %llx:%d\n",
694 ring->timeline->name,
700 GEM_TRACE("%s has barrier after %llx:%d\n",
701 ring->timeline->name,
707 * If any other timeline was still active and behind the last barrier,
708 * then our last switch-to-kernel-context must still be queued and
709 * will run last (leaving the engine in the kernel context when it
715 /* The engine is idle; check that it is idling in the kernel context. */
716 return engine->last_retired_context == ce;
719 int i915_gem_switch_to_kernel_context(struct drm_i915_private *i915)
721 struct intel_engine_cs *engine;
722 enum intel_engine_id id;
724 GEM_TRACE("awake?=%s\n", yesno(i915->gt.awake));
726 lockdep_assert_held(&i915->drm.struct_mutex);
727 GEM_BUG_ON(!i915->kernel_context);
729 i915_retire_requests(i915);
731 for_each_engine(engine, i915, id) {
732 struct intel_ring *ring;
733 struct i915_request *rq;
735 GEM_BUG_ON(!to_intel_context(i915->kernel_context, engine));
736 if (engine_has_kernel_context_barrier(engine))
739 GEM_TRACE("emit barrier on %s\n", engine->name);
741 rq = i915_request_alloc(engine, i915->kernel_context);
745 /* Queue this switch after all other activity */
746 list_for_each_entry(ring, &i915->gt.active_rings, active_link) {
747 struct i915_request *prev;
749 prev = last_request_on_engine(ring->timeline, engine);
753 if (prev->gem_context == i915->kernel_context)
756 GEM_TRACE("add barrier on %s for %llx:%d\n",
760 i915_sw_fence_await_sw_fence_gfp(&rq->submit,
763 i915_timeline_sync_set(rq->timeline, &prev->fence);
766 i915_request_add(rq);
772 static bool client_is_banned(struct drm_i915_file_private *file_priv)
774 return atomic_read(&file_priv->ban_score) >= I915_CLIENT_SCORE_BANNED;
777 int i915_gem_context_create_ioctl(struct drm_device *dev, void *data,
778 struct drm_file *file)
780 struct drm_i915_private *dev_priv = to_i915(dev);
781 struct drm_i915_gem_context_create *args = data;
782 struct drm_i915_file_private *file_priv = file->driver_priv;
783 struct i915_gem_context *ctx;
786 if (!DRIVER_CAPS(dev_priv)->has_logical_contexts)
792 if (client_is_banned(file_priv)) {
793 DRM_DEBUG("client %s[%d] banned from creating ctx\n",
795 pid_nr(get_task_pid(current, PIDTYPE_PID)));
800 ret = i915_mutex_lock_interruptible(dev);
804 ctx = i915_gem_create_context(dev_priv, file_priv);
805 mutex_unlock(&dev->struct_mutex);
809 GEM_BUG_ON(i915_gem_context_is_kernel(ctx));
811 args->ctx_id = ctx->user_handle;
812 DRM_DEBUG("HW context %d created\n", args->ctx_id);
817 int i915_gem_context_destroy_ioctl(struct drm_device *dev, void *data,
818 struct drm_file *file)
820 struct drm_i915_gem_context_destroy *args = data;
821 struct drm_i915_file_private *file_priv = file->driver_priv;
822 struct i915_gem_context *ctx;
828 if (args->ctx_id == DEFAULT_CONTEXT_HANDLE)
831 ctx = i915_gem_context_lookup(file_priv, args->ctx_id);
835 ret = mutex_lock_interruptible(&dev->struct_mutex);
839 __destroy_hw_context(ctx, file_priv);
840 mutex_unlock(&dev->struct_mutex);
843 i915_gem_context_put(ctx);
847 int i915_gem_context_getparam_ioctl(struct drm_device *dev, void *data,
848 struct drm_file *file)
850 struct drm_i915_file_private *file_priv = file->driver_priv;
851 struct drm_i915_gem_context_param *args = data;
852 struct i915_gem_context *ctx;
855 ctx = i915_gem_context_lookup(file_priv, args->ctx_id);
860 switch (args->param) {
861 case I915_CONTEXT_PARAM_BAN_PERIOD:
864 case I915_CONTEXT_PARAM_NO_ZEROMAP:
865 args->value = test_bit(UCONTEXT_NO_ZEROMAP, &ctx->user_flags);
867 case I915_CONTEXT_PARAM_GTT_SIZE:
869 args->value = ctx->ppgtt->vm.total;
870 else if (to_i915(dev)->mm.aliasing_ppgtt)
871 args->value = to_i915(dev)->mm.aliasing_ppgtt->vm.total;
873 args->value = to_i915(dev)->ggtt.vm.total;
875 case I915_CONTEXT_PARAM_NO_ERROR_CAPTURE:
876 args->value = i915_gem_context_no_error_capture(ctx);
878 case I915_CONTEXT_PARAM_BANNABLE:
879 args->value = i915_gem_context_is_bannable(ctx);
881 case I915_CONTEXT_PARAM_PRIORITY:
882 args->value = ctx->sched.priority;
889 i915_gem_context_put(ctx);
893 int i915_gem_context_setparam_ioctl(struct drm_device *dev, void *data,
894 struct drm_file *file)
896 struct drm_i915_file_private *file_priv = file->driver_priv;
897 struct drm_i915_gem_context_param *args = data;
898 struct i915_gem_context *ctx;
901 ctx = i915_gem_context_lookup(file_priv, args->ctx_id);
905 switch (args->param) {
906 case I915_CONTEXT_PARAM_BAN_PERIOD:
909 case I915_CONTEXT_PARAM_NO_ZEROMAP:
912 else if (args->value)
913 set_bit(UCONTEXT_NO_ZEROMAP, &ctx->user_flags);
915 clear_bit(UCONTEXT_NO_ZEROMAP, &ctx->user_flags);
917 case I915_CONTEXT_PARAM_NO_ERROR_CAPTURE:
920 else if (args->value)
921 i915_gem_context_set_no_error_capture(ctx);
923 i915_gem_context_clear_no_error_capture(ctx);
925 case I915_CONTEXT_PARAM_BANNABLE:
928 else if (!capable(CAP_SYS_ADMIN) && !args->value)
930 else if (args->value)
931 i915_gem_context_set_bannable(ctx);
933 i915_gem_context_clear_bannable(ctx);
936 case I915_CONTEXT_PARAM_PRIORITY:
938 s64 priority = args->value;
942 else if (!(to_i915(dev)->caps.scheduler & I915_SCHEDULER_CAP_PRIORITY))
944 else if (priority > I915_CONTEXT_MAX_USER_PRIORITY ||
945 priority < I915_CONTEXT_MIN_USER_PRIORITY)
947 else if (priority > I915_CONTEXT_DEFAULT_PRIORITY &&
948 !capable(CAP_SYS_NICE))
951 ctx->sched.priority = priority;
960 i915_gem_context_put(ctx);
964 int i915_gem_context_reset_stats_ioctl(struct drm_device *dev,
965 void *data, struct drm_file *file)
967 struct drm_i915_private *dev_priv = to_i915(dev);
968 struct drm_i915_reset_stats *args = data;
969 struct i915_gem_context *ctx;
972 if (args->flags || args->pad)
977 ctx = __i915_gem_context_lookup_rcu(file->driver_priv, args->ctx_id);
982 * We opt for unserialised reads here. This may result in tearing
983 * in the extremely unlikely event of a GPU hang on this context
984 * as we are querying them. If we need that extra layer of protection,
985 * we should wrap the hangstats with a seqlock.
988 if (capable(CAP_SYS_ADMIN))
989 args->reset_count = i915_reset_count(&dev_priv->gpu_error);
991 args->reset_count = 0;
993 args->batch_active = atomic_read(&ctx->guilty_count);
994 args->batch_pending = atomic_read(&ctx->active_count);
1002 int __i915_gem_context_pin_hw_id(struct i915_gem_context *ctx)
1004 struct drm_i915_private *i915 = ctx->i915;
1007 mutex_lock(&i915->contexts.mutex);
1009 GEM_BUG_ON(i915_gem_context_is_closed(ctx));
1011 if (list_empty(&ctx->hw_id_link)) {
1012 GEM_BUG_ON(atomic_read(&ctx->hw_id_pin_count));
1014 err = assign_hw_id(i915, &ctx->hw_id);
1018 list_add_tail(&ctx->hw_id_link, &i915->contexts.hw_id_list);
1021 GEM_BUG_ON(atomic_read(&ctx->hw_id_pin_count) == ~0u);
1022 atomic_inc(&ctx->hw_id_pin_count);
1025 mutex_unlock(&i915->contexts.mutex);
1029 #if IS_ENABLED(CONFIG_DRM_I915_SELFTEST)
1030 #include "selftests/mock_context.c"
1031 #include "selftests/i915_gem_context.c"