1 // SPDX-License-Identifier: MIT
3 * Copyright © 2019 Intel Corporation
7 #include "intel_memory_region.h"
8 #include "intel_region_lmem.h"
9 #include "intel_region_ttm.h"
10 #include "gem/i915_gem_lmem.h"
11 #include "gem/i915_gem_region.h"
12 #include "gem/i915_gem_ttm.h"
13 #include "gt/intel_gt.h"
15 static int init_fake_lmem_bar(struct intel_memory_region *mem)
17 struct drm_i915_private *i915 = mem->i915;
18 struct i915_ggtt *ggtt = &i915->ggtt;
22 /* We want to 1:1 map the mappable aperture to our reserved region */
24 mem->fake_mappable.start = 0;
25 mem->fake_mappable.size = resource_size(&mem->region);
26 mem->fake_mappable.color = I915_COLOR_UNEVICTABLE;
28 ret = drm_mm_reserve_node(&ggtt->vm.mm, &mem->fake_mappable);
32 mem->remap_addr = dma_map_resource(i915->drm.dev,
34 mem->fake_mappable.size,
35 PCI_DMA_BIDIRECTIONAL,
36 DMA_ATTR_FORCE_CONTIGUOUS);
37 if (dma_mapping_error(i915->drm.dev, mem->remap_addr)) {
38 drm_mm_remove_node(&mem->fake_mappable);
42 for (n = 0; n < mem->fake_mappable.size >> PAGE_SHIFT; ++n) {
43 ggtt->vm.insert_page(&ggtt->vm,
44 mem->remap_addr + (n << PAGE_SHIFT),
49 mem->region = (struct resource)DEFINE_RES_MEM(mem->remap_addr,
50 mem->fake_mappable.size);
55 static void release_fake_lmem_bar(struct intel_memory_region *mem)
57 if (!drm_mm_node_allocated(&mem->fake_mappable))
60 drm_mm_remove_node(&mem->fake_mappable);
62 dma_unmap_resource(mem->i915->drm.dev,
64 mem->fake_mappable.size,
65 PCI_DMA_BIDIRECTIONAL,
66 DMA_ATTR_FORCE_CONTIGUOUS);
70 region_lmem_release(struct intel_memory_region *mem)
72 intel_region_ttm_fini(mem);
73 io_mapping_fini(&mem->iomap);
74 release_fake_lmem_bar(mem);
78 region_lmem_init(struct intel_memory_region *mem)
82 if (mem->i915->params.fake_lmem_start) {
83 ret = init_fake_lmem_bar(mem);
87 if (!io_mapping_init_wc(&mem->iomap,
89 resource_size(&mem->region))) {
94 ret = intel_region_ttm_init(mem);
101 io_mapping_fini(&mem->iomap);
103 release_fake_lmem_bar(mem);
108 static const struct intel_memory_region_ops intel_region_lmem_ops = {
109 .init = region_lmem_init,
110 .release = region_lmem_release,
111 .init_object = __i915_gem_ttm_object_init,
114 struct intel_memory_region *
115 intel_gt_setup_fake_lmem(struct intel_gt *gt)
117 struct drm_i915_private *i915 = gt->i915;
118 struct pci_dev *pdev = to_pci_dev(i915->drm.dev);
119 struct intel_memory_region *mem;
120 resource_size_t mappable_end;
121 resource_size_t io_start;
122 resource_size_t start;
125 return ERR_PTR(-ENODEV);
127 if (!i915->params.fake_lmem_start)
128 return ERR_PTR(-ENODEV);
130 GEM_BUG_ON(i915_ggtt_has_aperture(&i915->ggtt));
132 /* Your mappable aperture belongs to me now! */
133 mappable_end = pci_resource_len(pdev, 2);
134 io_start = pci_resource_start(pdev, 2);
135 start = i915->params.fake_lmem_start;
137 mem = intel_memory_region_create(i915,
144 &intel_region_lmem_ops);
146 drm_info(&i915->drm, "Intel graphics fake LMEM: %pR\n",
149 "Intel graphics fake LMEM IO start: %llx\n",
151 drm_info(&i915->drm, "Intel graphics fake LMEM size: %llx\n",
152 (u64)resource_size(&mem->region));
158 static bool get_legacy_lowmem_region(struct intel_uncore *uncore,
159 u64 *start, u32 *size)
161 if (!IS_DG1_GT_STEP(uncore->i915, STEP_A0, STEP_C0))
167 drm_dbg(&uncore->i915->drm, "LMEM: reserved legacy low-memory [0x%llx-0x%llx]\n",
168 *start, *start + *size);
173 static int reserve_lowmem_region(struct intel_uncore *uncore,
174 struct intel_memory_region *mem)
180 if (!get_legacy_lowmem_region(uncore, &reserve_start, &reserve_size))
183 ret = intel_memory_region_reserve(mem, reserve_start, reserve_size);
185 drm_err(&uncore->i915->drm, "LMEM: reserving low memory region failed\n");
190 static struct intel_memory_region *setup_lmem(struct intel_gt *gt)
192 struct drm_i915_private *i915 = gt->i915;
193 struct intel_uncore *uncore = gt->uncore;
194 struct pci_dev *pdev = to_pci_dev(i915->drm.dev);
195 struct intel_memory_region *mem;
196 resource_size_t io_start;
197 resource_size_t lmem_size;
201 return ERR_PTR(-ENODEV);
203 /* Stolen starts from GSMBASE on DG1 */
204 lmem_size = intel_uncore_read64(uncore, GEN12_GSMBASE);
206 io_start = pci_resource_start(pdev, 2);
207 if (GEM_WARN_ON(lmem_size > pci_resource_len(pdev, 2)))
208 return ERR_PTR(-ENODEV);
210 mem = intel_memory_region_create(i915,
213 I915_GTT_PAGE_SIZE_4K,
217 &intel_region_lmem_ops);
221 err = reserve_lowmem_region(uncore, mem);
225 drm_dbg(&i915->drm, "Local memory: %pR\n", &mem->region);
226 drm_dbg(&i915->drm, "Local memory IO start: %pa\n",
228 drm_info(&i915->drm, "Local memory available: %pa\n",
234 intel_memory_region_put(mem);
238 struct intel_memory_region *intel_gt_setup_lmem(struct intel_gt *gt)
240 return setup_lmem(gt);