1 // SPDX-License-Identifier: GPL-2.0
3 /* Copyright (c) 2014-2018, The Linux Foundation. All rights reserved.
4 * Copyright (C) 2018-2020 Linaro Ltd.
9 * The IPA has an interrupt line distinct from the interrupt used by the GSI
10 * code. Whereas GSI interrupts are generally related to channel events (like
11 * transfer completions), IPA interrupts are related to other events related
12 * to the IPA. Some of the IPA interrupts come from a microcontroller
13 * embedded in the IPA. Each IPA interrupt type can be both masked and
14 * acknowledged independent of the others.
16 * Two of the IPA interrupts are initiated by the microcontroller. A third
17 * can be generated to signal the need for a wakeup/resume when an IPA
18 * endpoint has been suspended. There are other IPA events, but at this
19 * time only these three are supported.
22 #include <linux/types.h>
23 #include <linux/interrupt.h>
24 #include <linux/pm_runtime.h>
28 #include "ipa_endpoint.h"
29 #include "ipa_interrupt.h"
32 * struct ipa_interrupt - IPA interrupt information
34 * @irq: Linux IRQ number used for IPA interrupts
35 * @enabled: Mask indicating which interrupts are enabled
36 * @handler: Array of handlers indexed by IPA interrupt ID
38 struct ipa_interrupt {
42 ipa_irq_handler_t handler[IPA_IRQ_COUNT];
45 /* Returns true if the interrupt type is associated with the microcontroller */
46 static bool ipa_interrupt_uc(struct ipa_interrupt *interrupt, u32 irq_id)
48 return irq_id == IPA_IRQ_UC_0 || irq_id == IPA_IRQ_UC_1;
51 /* Process a particular interrupt type that has been received */
52 static void ipa_interrupt_process(struct ipa_interrupt *interrupt, u32 irq_id)
54 bool uc_irq = ipa_interrupt_uc(interrupt, irq_id);
55 struct ipa *ipa = interrupt->ipa;
56 u32 mask = BIT(irq_id);
59 /* For microcontroller interrupts, clear the interrupt right away,
60 * "to avoid clearing unhandled interrupts."
62 offset = ipa_reg_irq_clr_offset(ipa->version);
64 iowrite32(mask, ipa->reg_virt + offset);
66 if (irq_id < IPA_IRQ_COUNT && interrupt->handler[irq_id])
67 interrupt->handler[irq_id](interrupt->ipa, irq_id);
69 /* Clearing the SUSPEND_TX interrupt also clears the register
70 * that tells us which suspended endpoint(s) caused the interrupt,
71 * so defer clearing until after the handler has been called.
74 iowrite32(mask, ipa->reg_virt + offset);
77 /* IPA IRQ handler is threaded */
78 static irqreturn_t ipa_isr_thread(int irq, void *dev_id)
80 struct ipa_interrupt *interrupt = dev_id;
81 struct ipa *ipa = interrupt->ipa;
82 u32 enabled = interrupt->enabled;
89 dev = &ipa->pdev->dev;
90 ret = pm_runtime_get_sync(dev);
94 /* The status register indicates which conditions are present,
95 * including conditions whose interrupt is not enabled. Handle
96 * only the enabled ones.
98 offset = ipa_reg_irq_stts_offset(ipa->version);
99 pending = ioread32(ipa->reg_virt + offset);
100 while ((mask = pending & enabled)) {
102 u32 irq_id = __ffs(mask);
106 ipa_interrupt_process(interrupt, irq_id);
108 pending = ioread32(ipa->reg_virt + offset);
111 /* If any disabled interrupts are pending, clear them */
113 dev_dbg(dev, "clearing disabled IPA interrupts 0x%08x\n",
115 offset = ipa_reg_irq_clr_offset(ipa->version);
116 iowrite32(pending, ipa->reg_virt + offset);
119 pm_runtime_mark_last_busy(dev);
120 (void)pm_runtime_put_autosuspend(dev);
125 /* Common function used to enable/disable TX_SUSPEND for an endpoint */
126 static void ipa_interrupt_suspend_control(struct ipa_interrupt *interrupt,
127 u32 endpoint_id, bool enable)
129 struct ipa *ipa = interrupt->ipa;
130 u32 mask = BIT(endpoint_id);
134 WARN_ON(!(mask & ipa->available));
136 /* IPA version 3.0 does not support TX_SUSPEND interrupt control */
137 if (ipa->version == IPA_VERSION_3_0)
140 offset = ipa_reg_irq_suspend_en_offset(ipa->version);
141 val = ioread32(ipa->reg_virt + offset);
146 iowrite32(val, ipa->reg_virt + offset);
149 /* Enable TX_SUSPEND for an endpoint */
151 ipa_interrupt_suspend_enable(struct ipa_interrupt *interrupt, u32 endpoint_id)
153 ipa_interrupt_suspend_control(interrupt, endpoint_id, true);
156 /* Disable TX_SUSPEND for an endpoint */
158 ipa_interrupt_suspend_disable(struct ipa_interrupt *interrupt, u32 endpoint_id)
160 ipa_interrupt_suspend_control(interrupt, endpoint_id, false);
163 /* Clear the suspend interrupt for all endpoints that signaled it */
164 void ipa_interrupt_suspend_clear_all(struct ipa_interrupt *interrupt)
166 struct ipa *ipa = interrupt->ipa;
170 offset = ipa_reg_irq_suspend_info_offset(ipa->version);
171 val = ioread32(ipa->reg_virt + offset);
173 /* SUSPEND interrupt status isn't cleared on IPA version 3.0 */
174 if (ipa->version == IPA_VERSION_3_0)
177 offset = ipa_reg_irq_suspend_clr_offset(ipa->version);
178 iowrite32(val, ipa->reg_virt + offset);
181 /* Simulate arrival of an IPA TX_SUSPEND interrupt */
182 void ipa_interrupt_simulate_suspend(struct ipa_interrupt *interrupt)
184 ipa_interrupt_process(interrupt, IPA_IRQ_TX_SUSPEND);
187 /* Add a handler for an IPA interrupt */
188 void ipa_interrupt_add(struct ipa_interrupt *interrupt,
189 enum ipa_irq_id ipa_irq, ipa_irq_handler_t handler)
191 struct ipa *ipa = interrupt->ipa;
194 WARN_ON(ipa_irq >= IPA_IRQ_COUNT);
196 interrupt->handler[ipa_irq] = handler;
198 /* Update the IPA interrupt mask to enable it */
199 interrupt->enabled |= BIT(ipa_irq);
200 offset = ipa_reg_irq_en_offset(ipa->version);
201 iowrite32(interrupt->enabled, ipa->reg_virt + offset);
204 /* Remove the handler for an IPA interrupt type */
206 ipa_interrupt_remove(struct ipa_interrupt *interrupt, enum ipa_irq_id ipa_irq)
208 struct ipa *ipa = interrupt->ipa;
211 WARN_ON(ipa_irq >= IPA_IRQ_COUNT);
213 /* Update the IPA interrupt mask to disable it */
214 interrupt->enabled &= ~BIT(ipa_irq);
215 offset = ipa_reg_irq_en_offset(ipa->version);
216 iowrite32(interrupt->enabled, ipa->reg_virt + offset);
218 interrupt->handler[ipa_irq] = NULL;
221 /* Configure the IPA interrupt framework */
222 struct ipa_interrupt *ipa_interrupt_config(struct ipa *ipa)
224 struct device *dev = &ipa->pdev->dev;
225 struct ipa_interrupt *interrupt;
230 ret = platform_get_irq_byname(ipa->pdev, "ipa");
232 dev_err(dev, "DT error %d getting \"ipa\" IRQ property\n",
234 return ERR_PTR(ret ? : -EINVAL);
238 interrupt = kzalloc(sizeof(*interrupt), GFP_KERNEL);
240 return ERR_PTR(-ENOMEM);
241 interrupt->ipa = ipa;
242 interrupt->irq = irq;
244 /* Start with all IPA interrupts disabled */
245 offset = ipa_reg_irq_en_offset(ipa->version);
246 iowrite32(0, ipa->reg_virt + offset);
248 ret = request_threaded_irq(irq, NULL, ipa_isr_thread, IRQF_ONESHOT,
251 dev_err(dev, "error %d requesting \"ipa\" IRQ\n", ret);
255 ret = enable_irq_wake(irq);
257 dev_err(dev, "error %d enabling wakeup for \"ipa\" IRQ\n", ret);
264 free_irq(interrupt->irq, interrupt);
271 /* Inverse of ipa_interrupt_config() */
272 void ipa_interrupt_deconfig(struct ipa_interrupt *interrupt)
274 struct device *dev = &interrupt->ipa->pdev->dev;
277 ret = disable_irq_wake(interrupt->irq);
279 dev_err(dev, "error %d disabling \"ipa\" IRQ wakeup\n", ret);
280 free_irq(interrupt->irq, interrupt);