1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Machine check exception handling.
5 * Copyright 2013 IBM Corporation
10 #define pr_fmt(fmt) "mce: " fmt
12 #include <linux/hardirq.h>
13 #include <linux/types.h>
14 #include <linux/ptrace.h>
15 #include <linux/percpu.h>
16 #include <linux/export.h>
17 #include <linux/irq_work.h>
19 #include <asm/machdep.h>
23 static DEFINE_PER_CPU(int, mce_nest_count);
24 static DEFINE_PER_CPU(struct machine_check_event[MAX_MC_EVT], mce_event);
26 /* Queue for delayed MCE events. */
27 static DEFINE_PER_CPU(int, mce_queue_count);
28 static DEFINE_PER_CPU(struct machine_check_event[MAX_MC_EVT], mce_event_queue);
30 /* Queue for delayed MCE UE events. */
31 static DEFINE_PER_CPU(int, mce_ue_count);
32 static DEFINE_PER_CPU(struct machine_check_event[MAX_MC_EVT],
35 static void machine_check_process_queued_event(struct irq_work *work);
36 void machine_check_ue_event(struct machine_check_event *evt);
37 static void machine_process_ue_event(struct work_struct *work);
39 static struct irq_work mce_event_process_work = {
40 .func = machine_check_process_queued_event,
43 DECLARE_WORK(mce_ue_event_work, machine_process_ue_event);
45 static void mce_set_error_info(struct machine_check_event *mce,
46 struct mce_error_info *mce_err)
48 mce->error_type = mce_err->error_type;
49 switch (mce_err->error_type) {
50 case MCE_ERROR_TYPE_UE:
51 mce->u.ue_error.ue_error_type = mce_err->u.ue_error_type;
53 case MCE_ERROR_TYPE_SLB:
54 mce->u.slb_error.slb_error_type = mce_err->u.slb_error_type;
56 case MCE_ERROR_TYPE_ERAT:
57 mce->u.erat_error.erat_error_type = mce_err->u.erat_error_type;
59 case MCE_ERROR_TYPE_TLB:
60 mce->u.tlb_error.tlb_error_type = mce_err->u.tlb_error_type;
62 case MCE_ERROR_TYPE_USER:
63 mce->u.user_error.user_error_type = mce_err->u.user_error_type;
65 case MCE_ERROR_TYPE_RA:
66 mce->u.ra_error.ra_error_type = mce_err->u.ra_error_type;
68 case MCE_ERROR_TYPE_LINK:
69 mce->u.link_error.link_error_type = mce_err->u.link_error_type;
71 case MCE_ERROR_TYPE_UNKNOWN:
78 * Decode and save high level MCE information into per cpu buffer which
79 * is an array of machine_check_event structure.
81 void save_mce_event(struct pt_regs *regs, long handled,
82 struct mce_error_info *mce_err,
83 uint64_t nip, uint64_t addr, uint64_t phys_addr)
85 int index = __this_cpu_inc_return(mce_nest_count) - 1;
86 struct machine_check_event *mce = this_cpu_ptr(&mce_event[index]);
89 * Return if we don't have enough space to log mce event.
90 * mce_nest_count may go beyond MAX_MC_EVT but that's ok,
91 * the check below will stop buffer overrun.
93 if (index >= MAX_MC_EVT)
96 /* Populate generic machine check info */
97 mce->version = MCE_V1;
99 mce->srr1 = regs->msr;
100 mce->gpr3 = regs->gpr[3];
102 mce->cpu = get_paca()->paca_index;
104 /* Mark it recovered if we have handled it and MSR(RI=1). */
105 if (handled && (regs->msr & MSR_RI))
106 mce->disposition = MCE_DISPOSITION_RECOVERED;
108 mce->disposition = MCE_DISPOSITION_NOT_RECOVERED;
110 mce->initiator = mce_err->initiator;
111 mce->severity = mce_err->severity;
112 mce->sync_error = mce_err->sync_error;
113 mce->error_class = mce_err->error_class;
116 * Populate the mce error_type and type-specific error_type.
118 mce_set_error_info(mce, mce_err);
123 if (mce->error_type == MCE_ERROR_TYPE_TLB) {
124 mce->u.tlb_error.effective_address_provided = true;
125 mce->u.tlb_error.effective_address = addr;
126 } else if (mce->error_type == MCE_ERROR_TYPE_SLB) {
127 mce->u.slb_error.effective_address_provided = true;
128 mce->u.slb_error.effective_address = addr;
129 } else if (mce->error_type == MCE_ERROR_TYPE_ERAT) {
130 mce->u.erat_error.effective_address_provided = true;
131 mce->u.erat_error.effective_address = addr;
132 } else if (mce->error_type == MCE_ERROR_TYPE_USER) {
133 mce->u.user_error.effective_address_provided = true;
134 mce->u.user_error.effective_address = addr;
135 } else if (mce->error_type == MCE_ERROR_TYPE_RA) {
136 mce->u.ra_error.effective_address_provided = true;
137 mce->u.ra_error.effective_address = addr;
138 } else if (mce->error_type == MCE_ERROR_TYPE_LINK) {
139 mce->u.link_error.effective_address_provided = true;
140 mce->u.link_error.effective_address = addr;
141 } else if (mce->error_type == MCE_ERROR_TYPE_UE) {
142 mce->u.ue_error.effective_address_provided = true;
143 mce->u.ue_error.effective_address = addr;
144 if (phys_addr != ULONG_MAX) {
145 mce->u.ue_error.physical_address_provided = true;
146 mce->u.ue_error.physical_address = phys_addr;
147 machine_check_ue_event(mce);
155 * mce Pointer to machine_check_event structure to be filled.
156 * release Flag to indicate whether to free the event slot or not.
157 * 0 <= do not release the mce event. Caller will invoke
158 * release_mce_event() once event has been consumed.
159 * 1 <= release the slot.
164 * get_mce_event() will be called by platform specific machine check
165 * handle routine and in KVM.
166 * When we call get_mce_event(), we are still in interrupt context and
167 * preemption will not be scheduled until ret_from_expect() routine
170 int get_mce_event(struct machine_check_event *mce, bool release)
172 int index = __this_cpu_read(mce_nest_count) - 1;
173 struct machine_check_event *mc_evt;
180 /* Check if we have MCE info to process. */
181 if (index < MAX_MC_EVT) {
182 mc_evt = this_cpu_ptr(&mce_event[index]);
183 /* Copy the event structure and release the original */
190 /* Decrement the count to free the slot. */
192 __this_cpu_dec(mce_nest_count);
197 void release_mce_event(void)
199 get_mce_event(NULL, true);
204 * Queue up the MCE event which then can be handled later.
206 void machine_check_ue_event(struct machine_check_event *evt)
210 index = __this_cpu_inc_return(mce_ue_count) - 1;
211 /* If queue is full, just return for now. */
212 if (index >= MAX_MC_EVT) {
213 __this_cpu_dec(mce_ue_count);
216 memcpy(this_cpu_ptr(&mce_ue_event_queue[index]), evt, sizeof(*evt));
218 /* Queue work to process this event later. */
219 schedule_work(&mce_ue_event_work);
223 * Queue up the MCE event which then can be handled later.
225 void machine_check_queue_event(void)
228 struct machine_check_event evt;
230 if (!get_mce_event(&evt, MCE_EVENT_RELEASE))
233 index = __this_cpu_inc_return(mce_queue_count) - 1;
234 /* If queue is full, just return for now. */
235 if (index >= MAX_MC_EVT) {
236 __this_cpu_dec(mce_queue_count);
239 memcpy(this_cpu_ptr(&mce_event_queue[index]), &evt, sizeof(evt));
241 /* Queue irq work to process this event later. */
242 irq_work_queue(&mce_event_process_work);
245 * process pending MCE event from the mce event queue. This function will be
246 * called during syscall exit.
248 static void machine_process_ue_event(struct work_struct *work)
251 struct machine_check_event *evt;
253 while (__this_cpu_read(mce_ue_count) > 0) {
254 index = __this_cpu_read(mce_ue_count) - 1;
255 evt = this_cpu_ptr(&mce_ue_event_queue[index]);
256 #ifdef CONFIG_MEMORY_FAILURE
258 * This should probably queued elsewhere, but
261 if (evt->error_type == MCE_ERROR_TYPE_UE) {
262 if (evt->u.ue_error.physical_address_provided) {
265 pfn = evt->u.ue_error.physical_address >>
267 memory_failure(pfn, 0);
269 pr_warn("Failed to identify bad address from "
270 "where the uncorrectable error (UE) "
274 __this_cpu_dec(mce_ue_count);
278 * process pending MCE event from the mce event queue. This function will be
279 * called during syscall exit.
281 static void machine_check_process_queued_event(struct irq_work *work)
284 struct machine_check_event *evt;
286 add_taint(TAINT_MACHINE_CHECK, LOCKDEP_NOW_UNRELIABLE);
289 * For now just print it to console.
290 * TODO: log this error event to FSP or nvram.
292 while (__this_cpu_read(mce_queue_count) > 0) {
293 index = __this_cpu_read(mce_queue_count) - 1;
294 evt = this_cpu_ptr(&mce_event_queue[index]);
295 machine_check_print_event_info(evt, false, false);
296 __this_cpu_dec(mce_queue_count);
300 void machine_check_print_event_info(struct machine_check_event *evt,
301 bool user_mode, bool in_guest)
303 const char *level, *sevstr, *subtype, *err_type;
304 uint64_t ea = 0, pa = 0;
308 static const char *mc_ue_types[] = {
311 "Page table walk ifetch",
313 "Page table walk Load/Store",
315 static const char *mc_slb_types[] = {
320 static const char *mc_erat_types[] = {
325 static const char *mc_tlb_types[] = {
330 static const char *mc_user_types[] = {
334 static const char *mc_ra_types[] = {
336 "Instruction fetch (bad)",
337 "Instruction fetch (foreign)",
338 "Page table walk ifetch (bad)",
339 "Page table walk ifetch (foreign)",
342 "Page table walk Load/Store (bad)",
343 "Page table walk Load/Store (foreign)",
344 "Load/Store (foreign)",
346 static const char *mc_link_types[] = {
348 "Instruction fetch (timeout)",
349 "Page table walk ifetch (timeout)",
352 "Page table walk Load/Store (timeout)",
354 static const char *mc_error_class[] = {
357 "Probable Hardware error (some chance of software cause)",
359 "Probable Software error (some chance of hardware cause)",
362 /* Print things out */
363 if (evt->version != MCE_V1) {
364 pr_err("Machine Check Exception, Unknown event version %d !\n",
368 switch (evt->severity) {
369 case MCE_SEV_NO_ERROR:
373 case MCE_SEV_WARNING:
374 level = KERN_WARNING;
388 switch (evt->error_type) {
389 case MCE_ERROR_TYPE_UE:
391 subtype = evt->u.ue_error.ue_error_type <
392 ARRAY_SIZE(mc_ue_types) ?
393 mc_ue_types[evt->u.ue_error.ue_error_type]
395 if (evt->u.ue_error.effective_address_provided)
396 ea = evt->u.ue_error.effective_address;
397 if (evt->u.ue_error.physical_address_provided)
398 pa = evt->u.ue_error.physical_address;
400 case MCE_ERROR_TYPE_SLB:
402 subtype = evt->u.slb_error.slb_error_type <
403 ARRAY_SIZE(mc_slb_types) ?
404 mc_slb_types[evt->u.slb_error.slb_error_type]
406 if (evt->u.slb_error.effective_address_provided)
407 ea = evt->u.slb_error.effective_address;
409 case MCE_ERROR_TYPE_ERAT:
411 subtype = evt->u.erat_error.erat_error_type <
412 ARRAY_SIZE(mc_erat_types) ?
413 mc_erat_types[evt->u.erat_error.erat_error_type]
415 if (evt->u.erat_error.effective_address_provided)
416 ea = evt->u.erat_error.effective_address;
418 case MCE_ERROR_TYPE_TLB:
420 subtype = evt->u.tlb_error.tlb_error_type <
421 ARRAY_SIZE(mc_tlb_types) ?
422 mc_tlb_types[evt->u.tlb_error.tlb_error_type]
424 if (evt->u.tlb_error.effective_address_provided)
425 ea = evt->u.tlb_error.effective_address;
427 case MCE_ERROR_TYPE_USER:
429 subtype = evt->u.user_error.user_error_type <
430 ARRAY_SIZE(mc_user_types) ?
431 mc_user_types[evt->u.user_error.user_error_type]
433 if (evt->u.user_error.effective_address_provided)
434 ea = evt->u.user_error.effective_address;
436 case MCE_ERROR_TYPE_RA:
437 err_type = "Real address";
438 subtype = evt->u.ra_error.ra_error_type <
439 ARRAY_SIZE(mc_ra_types) ?
440 mc_ra_types[evt->u.ra_error.ra_error_type]
442 if (evt->u.ra_error.effective_address_provided)
443 ea = evt->u.ra_error.effective_address;
445 case MCE_ERROR_TYPE_LINK:
447 subtype = evt->u.link_error.link_error_type <
448 ARRAY_SIZE(mc_link_types) ?
449 mc_link_types[evt->u.link_error.link_error_type]
451 if (evt->u.link_error.effective_address_provided)
452 ea = evt->u.link_error.effective_address;
455 case MCE_ERROR_TYPE_UNKNOWN:
456 err_type = "Unknown";
461 dar_str[0] = pa_str[0] = '\0';
462 if (ea && evt->srr0 != ea) {
463 /* Load/Store address */
464 n = sprintf(dar_str, "DAR: %016llx ", ea);
466 sprintf(dar_str + n, "paddr: %016llx ", pa);
468 sprintf(pa_str, " paddr: %016llx", pa);
471 printk("%sMCE: CPU%d: machine check (%s) %s %s %s %s[%s]\n",
472 level, evt->cpu, sevstr, in_guest ? "Guest" : "Host",
473 err_type, subtype, dar_str,
474 evt->disposition == MCE_DISPOSITION_RECOVERED ?
475 "Recovered" : "Not recovered");
477 if (in_guest || user_mode) {
478 printk("%sMCE: CPU%d: PID: %d Comm: %s %sNIP: [%016llx]%s\n",
479 level, evt->cpu, current->pid, current->comm,
480 in_guest ? "Guest " : "", evt->srr0, pa_str);
482 printk("%sMCE: CPU%d: NIP: [%016llx] %pS%s\n",
483 level, evt->cpu, evt->srr0, (void *)evt->srr0, pa_str);
486 subtype = evt->error_class < ARRAY_SIZE(mc_error_class) ?
487 mc_error_class[evt->error_class] : "Unknown";
488 printk("%sMCE: CPU%d: %s\n", level, evt->cpu, subtype);
490 EXPORT_SYMBOL_GPL(machine_check_print_event_info);
493 * This function is called in real mode. Strictly no printk's please.
495 * regs->nip and regs->msr contains srr0 and ssr1.
497 long machine_check_early(struct pt_regs *regs)
501 hv_nmi_check_nonrecoverable(regs);
504 * See if platform is capable of handling machine check.
506 if (ppc_md.machine_check_early)
507 handled = ppc_md.machine_check_early(regs);
511 /* Possible meanings for HMER_DEBUG_TRIG bit being set on POWER9 */
514 DTRIG_VECTOR_CI, /* need to emulate vector CI load instr */
515 DTRIG_SUSPEND_ESCAPE, /* need to escape from TM suspend mode */
516 } hmer_debug_trig_function;
518 static int init_debug_trig_function(void)
521 struct device_node *cpun;
522 struct property *prop = NULL;
525 /* First look in the device tree */
527 cpun = of_get_cpu_node(smp_processor_id(), NULL);
529 of_property_for_each_string(cpun, "ibm,hmi-special-triggers",
531 if (strcmp(str, "bit17-vector-ci-load") == 0)
532 hmer_debug_trig_function = DTRIG_VECTOR_CI;
533 else if (strcmp(str, "bit17-tm-suspend-escape") == 0)
534 hmer_debug_trig_function = DTRIG_SUSPEND_ESCAPE;
540 /* If we found the property, don't look at PVR */
544 pvr = mfspr(SPRN_PVR);
545 /* Check for POWER9 Nimbus (scale-out) */
546 if ((PVR_VER(pvr) == PVR_POWER9) && (pvr & 0xe000) == 0) {
547 /* DD2.2 and later */
548 if ((pvr & 0xfff) >= 0x202)
549 hmer_debug_trig_function = DTRIG_SUSPEND_ESCAPE;
550 /* DD2.0 and DD2.1 - used for vector CI load emulation */
551 else if ((pvr & 0xfff) >= 0x200)
552 hmer_debug_trig_function = DTRIG_VECTOR_CI;
556 switch (hmer_debug_trig_function) {
557 case DTRIG_VECTOR_CI:
558 pr_debug("HMI debug trigger used for vector CI load\n");
560 case DTRIG_SUSPEND_ESCAPE:
561 pr_debug("HMI debug trigger used for TM suspend escape\n");
568 __initcall(init_debug_trig_function);
571 * Handle HMIs that occur as a result of a debug trigger.
573 * -1 means this is not a HMI cause that we know about
574 * 0 means no further handling is required
575 * 1 means further handling is required
577 long hmi_handle_debugtrig(struct pt_regs *regs)
579 unsigned long hmer = mfspr(SPRN_HMER);
582 /* HMER_DEBUG_TRIG bit is used for various workarounds on P9 */
583 if (!((hmer & HMER_DEBUG_TRIG)
584 && hmer_debug_trig_function != DTRIG_UNKNOWN))
587 hmer &= ~HMER_DEBUG_TRIG;
588 /* HMER is a write-AND register */
589 mtspr(SPRN_HMER, ~HMER_DEBUG_TRIG);
591 switch (hmer_debug_trig_function) {
592 case DTRIG_VECTOR_CI:
594 * Now to avoid problems with soft-disable we
595 * only do the emulation if we are coming from
598 if (regs && user_mode(regs))
599 ret = local_paca->hmi_p9_special_emu = 1;
608 * See if any other HMI causes remain to be handled
610 if (hmer & mfspr(SPRN_HMEER))
619 long hmi_exception_realmode(struct pt_regs *regs)
623 __this_cpu_inc(irq_stat.hmi_exceptions);
625 ret = hmi_handle_debugtrig(regs);
629 wait_for_subcore_guest_exit();
631 if (ppc_md.hmi_exception_early)
632 ppc_md.hmi_exception_early(regs);
634 wait_for_tb_resync();