2 * Copyright 2014-2015 Analog Devices Inc.
5 * Licensed under the GPL-2 or later.
8 #include <linux/slab.h>
9 #include <linux/kernel.h>
10 #include <linux/dmaengine.h>
11 #include <linux/dma-mapping.h>
12 #include <linux/spinlock.h>
13 #include <linux/err.h>
15 #include <linux/iio/iio.h>
16 #include <linux/iio/buffer.h>
17 #include <linux/iio/buffer-dma.h>
18 #include <linux/iio/buffer-dmaengine.h>
21 * The IIO DMAengine buffer combines the generic IIO DMA buffer infrastructure
22 * with the DMAengine framework. The generic IIO DMA buffer infrastructure is
23 * used to manage the buffer memory and implement the IIO buffer operations
24 * while the DMAengine framework is used to perform the DMA transfers. Combined
25 * this results in a device independent fully functional DMA buffer
26 * implementation that can be used by device drivers for peripherals which are
27 * connected to a DMA controller which has a DMAengine driver implementation.
30 struct dmaengine_buffer {
31 struct iio_dma_buffer_queue queue;
33 struct dma_chan *chan;
34 struct list_head active;
40 static struct dmaengine_buffer *iio_buffer_to_dmaengine_buffer(
41 struct iio_buffer *buffer)
43 return container_of(buffer, struct dmaengine_buffer, queue.buffer);
46 static void iio_dmaengine_buffer_block_done(void *data)
48 struct iio_dma_buffer_block *block = data;
51 spin_lock_irqsave(&block->queue->list_lock, flags);
52 list_del(&block->head);
53 spin_unlock_irqrestore(&block->queue->list_lock, flags);
54 iio_dma_buffer_block_done(block);
57 static int iio_dmaengine_buffer_submit_block(struct iio_dma_buffer_queue *queue,
58 struct iio_dma_buffer_block *block)
60 struct dmaengine_buffer *dmaengine_buffer =
61 iio_buffer_to_dmaengine_buffer(&queue->buffer);
62 struct dma_async_tx_descriptor *desc;
65 block->bytes_used = min(block->size, dmaengine_buffer->max_size);
66 block->bytes_used = rounddown(block->bytes_used,
67 dmaengine_buffer->align);
69 desc = dmaengine_prep_slave_single(dmaengine_buffer->chan,
70 block->phys_addr, block->bytes_used, DMA_DEV_TO_MEM,
75 desc->callback = iio_dmaengine_buffer_block_done;
76 desc->callback_param = block;
78 cookie = dmaengine_submit(desc);
79 if (dma_submit_error(cookie))
80 return dma_submit_error(cookie);
82 spin_lock_irq(&dmaengine_buffer->queue.list_lock);
83 list_add_tail(&block->head, &dmaengine_buffer->active);
84 spin_unlock_irq(&dmaengine_buffer->queue.list_lock);
86 dma_async_issue_pending(dmaengine_buffer->chan);
91 static void iio_dmaengine_buffer_abort(struct iio_dma_buffer_queue *queue)
93 struct dmaengine_buffer *dmaengine_buffer =
94 iio_buffer_to_dmaengine_buffer(&queue->buffer);
96 dmaengine_terminate_all(dmaengine_buffer->chan);
97 /* FIXME: There is a slight chance of a race condition here.
98 * dmaengine_terminate_all() does not guarantee that all transfer
99 * callbacks have finished running. Need to introduce a
100 * dmaengine_terminate_all_sync().
102 iio_dma_buffer_block_list_abort(queue, &dmaengine_buffer->active);
105 static void iio_dmaengine_buffer_release(struct iio_buffer *buf)
107 struct dmaengine_buffer *dmaengine_buffer =
108 iio_buffer_to_dmaengine_buffer(buf);
110 iio_dma_buffer_release(&dmaengine_buffer->queue);
111 kfree(dmaengine_buffer);
114 static const struct iio_buffer_access_funcs iio_dmaengine_buffer_ops = {
115 .read_first_n = iio_dma_buffer_read,
116 .set_bytes_per_datum = iio_dma_buffer_set_bytes_per_datum,
117 .set_length = iio_dma_buffer_set_length,
118 .request_update = iio_dma_buffer_request_update,
119 .enable = iio_dma_buffer_enable,
120 .disable = iio_dma_buffer_disable,
121 .data_available = iio_dma_buffer_data_available,
122 .release = iio_dmaengine_buffer_release,
124 .modes = INDIO_BUFFER_HARDWARE,
125 .flags = INDIO_BUFFER_FLAG_FIXED_WATERMARK,
128 static const struct iio_dma_buffer_ops iio_dmaengine_default_ops = {
129 .submit = iio_dmaengine_buffer_submit_block,
130 .abort = iio_dmaengine_buffer_abort,
134 * iio_dmaengine_buffer_alloc() - Allocate new buffer which uses DMAengine
135 * @dev: Parent device for the buffer
136 * @channel: DMA channel name, typically "rx".
138 * This allocates a new IIO buffer which internally uses the DMAengine framework
139 * to perform its transfers. The parent device will be used to request the DMA
142 * Once done using the buffer iio_dmaengine_buffer_free() should be used to
145 struct iio_buffer *iio_dmaengine_buffer_alloc(struct device *dev,
148 struct dmaengine_buffer *dmaengine_buffer;
149 unsigned int width, src_width, dest_width;
150 struct dma_slave_caps caps;
151 struct dma_chan *chan;
154 dmaengine_buffer = kzalloc(sizeof(*dmaengine_buffer), GFP_KERNEL);
155 if (!dmaengine_buffer)
156 return ERR_PTR(-ENOMEM);
158 chan = dma_request_slave_channel_reason(dev, channel);
164 ret = dma_get_slave_caps(chan, &caps);
168 /* Needs to be aligned to the maximum of the minimums */
169 if (caps.src_addr_widths)
170 src_width = __ffs(caps.src_addr_widths);
173 if (caps.dst_addr_widths)
174 dest_width = __ffs(caps.dst_addr_widths);
177 width = max(src_width, dest_width);
179 INIT_LIST_HEAD(&dmaengine_buffer->active);
180 dmaengine_buffer->chan = chan;
181 dmaengine_buffer->align = width;
182 dmaengine_buffer->max_size = dma_get_max_seg_size(chan->device->dev);
184 iio_dma_buffer_init(&dmaengine_buffer->queue, chan->device->dev,
185 &iio_dmaengine_default_ops);
187 dmaengine_buffer->queue.buffer.access = &iio_dmaengine_buffer_ops;
189 return &dmaengine_buffer->queue.buffer;
192 kfree(dmaengine_buffer);
195 EXPORT_SYMBOL(iio_dmaengine_buffer_alloc);
198 * iio_dmaengine_buffer_free() - Free dmaengine buffer
199 * @buffer: Buffer to free
201 * Frees a buffer previously allocated with iio_dmaengine_buffer_alloc().
203 void iio_dmaengine_buffer_free(struct iio_buffer *buffer)
205 struct dmaengine_buffer *dmaengine_buffer =
206 iio_buffer_to_dmaengine_buffer(buffer);
208 iio_dma_buffer_exit(&dmaengine_buffer->queue);
209 dma_release_channel(dmaengine_buffer->chan);
211 iio_buffer_put(buffer);
213 EXPORT_SYMBOL_GPL(iio_dmaengine_buffer_free);