1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright (C) 2016 BayLibre, SAS
5 * Copyright (C) 2014 Endless Mobile
11 #include <linux/component.h>
12 #include <linux/module.h>
13 #include <linux/of_graph.h>
14 #include <linux/sys_soc.h>
15 #include <linux/platform_device.h>
16 #include <linux/soc/amlogic/meson-canvas.h>
18 #include <drm/drm_aperture.h>
19 #include <drm/drm_atomic_helper.h>
20 #include <drm/drm_drv.h>
21 #include <drm/drm_fb_helper.h>
22 #include <drm/drm_gem_cma_helper.h>
23 #include <drm/drm_gem_framebuffer_helper.h>
24 #include <drm/drm_irq.h>
25 #include <drm/drm_modeset_helper_vtables.h>
26 #include <drm/drm_probe_helper.h>
27 #include <drm/drm_vblank.h>
29 #include "meson_crtc.h"
30 #include "meson_drv.h"
31 #include "meson_overlay.h"
32 #include "meson_plane.h"
33 #include "meson_osd_afbcd.h"
34 #include "meson_registers.h"
35 #include "meson_venc_cvbs.h"
36 #include "meson_viu.h"
37 #include "meson_vpp.h"
38 #include "meson_rdma.h"
40 #define DRIVER_NAME "meson"
41 #define DRIVER_DESC "Amlogic Meson DRM driver"
44 * DOC: Video Processing Unit
46 * VPU Handles the Global Video Processing, it includes management of the
47 * clocks gates, blocks reset lines and power domains.
51 * - Full reset of entire video processing HW blocks
52 * - Scaling and setup of the VPU clock
54 * - Powering up video processing HW blocks
55 * - Powering Up HDMI controller and PHY
58 static const struct drm_mode_config_funcs meson_mode_config_funcs = {
59 .atomic_check = drm_atomic_helper_check,
60 .atomic_commit = drm_atomic_helper_commit,
61 .fb_create = drm_gem_fb_create,
64 static const struct drm_mode_config_helper_funcs meson_mode_config_helpers = {
65 .atomic_commit_tail = drm_atomic_helper_commit_tail_rpm,
68 static irqreturn_t meson_irq(int irq, void *arg)
70 struct drm_device *dev = arg;
71 struct meson_drm *priv = dev->dev_private;
73 (void)readl_relaxed(priv->io_base + _REG(VENC_INTFLAG));
80 static int meson_dumb_create(struct drm_file *file, struct drm_device *dev,
81 struct drm_mode_create_dumb *args)
84 * We need 64bytes aligned stride, and PAGE aligned size
86 args->pitch = ALIGN(DIV_ROUND_UP(args->width * args->bpp, 8), SZ_64);
87 args->size = PAGE_ALIGN(args->pitch * args->height);
89 return drm_gem_cma_dumb_create_internal(file, dev, args);
92 DEFINE_DRM_GEM_CMA_FOPS(fops);
94 static const struct drm_driver meson_driver = {
95 .driver_features = DRIVER_GEM | DRIVER_MODESET | DRIVER_ATOMIC,
98 .irq_handler = meson_irq,
101 DRM_GEM_CMA_DRIVER_OPS_WITH_DUMB_CREATE(meson_dumb_create),
112 static bool meson_vpu_has_available_connectors(struct device *dev)
114 struct device_node *ep, *remote;
116 /* Parses each endpoint and check if remote exists */
117 for_each_endpoint_of_node(dev->of_node, ep) {
118 /* If the endpoint node exists, consider it enabled */
119 remote = of_graph_get_remote_port(ep);
127 static struct regmap_config meson_regmap_config = {
131 .max_register = 0x1000,
134 static void meson_vpu_init(struct meson_drm *priv)
139 * Slave dc0 and dc5 connected to master port 1.
140 * By default other slaves are connected to master port 0.
142 value = VPU_RDARB_SLAVE_TO_MASTER_PORT(0, 1) |
143 VPU_RDARB_SLAVE_TO_MASTER_PORT(5, 1);
144 writel_relaxed(value, priv->io_base + _REG(VPU_RDARB_MODE_L1C1));
146 /* Slave dc0 connected to master port 1 */
147 value = VPU_RDARB_SLAVE_TO_MASTER_PORT(0, 1);
148 writel_relaxed(value, priv->io_base + _REG(VPU_RDARB_MODE_L1C2));
150 /* Slave dc4 and dc7 connected to master port 1 */
151 value = VPU_RDARB_SLAVE_TO_MASTER_PORT(4, 1) |
152 VPU_RDARB_SLAVE_TO_MASTER_PORT(7, 1);
153 writel_relaxed(value, priv->io_base + _REG(VPU_RDARB_MODE_L2C1));
155 /* Slave dc1 connected to master port 1 */
156 value = VPU_RDARB_SLAVE_TO_MASTER_PORT(1, 1);
157 writel_relaxed(value, priv->io_base + _REG(VPU_WRARB_MODE_L2C1));
160 struct meson_drm_soc_attr {
161 struct meson_drm_soc_limits limits;
162 const struct soc_device_attribute *attrs;
165 static const struct meson_drm_soc_attr meson_drm_soc_attrs[] = {
166 /* S805X/S805Y HDMI PLL won't lock for HDMI PHY freq > 1,65GHz */
169 .max_hdmi_phy_freq = 1650000,
171 .attrs = (const struct soc_device_attribute []) {
172 { .soc_id = "GXL (S805*)", },
178 static int meson_drv_bind_master(struct device *dev, bool has_components)
180 struct platform_device *pdev = to_platform_device(dev);
181 const struct meson_drm_match_data *match;
182 struct meson_drm *priv;
183 struct drm_device *drm;
184 struct resource *res;
188 /* Checks if an output connector is available */
189 if (!meson_vpu_has_available_connectors(dev)) {
190 dev_err(dev, "No output connector available\n");
194 match = of_device_get_match_data(dev);
198 drm = drm_dev_alloc(&meson_driver, dev);
202 priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
207 drm->dev_private = priv;
210 priv->compat = match->compat;
211 priv->afbcd.ops = match->afbcd_ops;
213 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "vpu");
214 regs = devm_ioremap_resource(dev, res);
220 priv->io_base = regs;
222 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "hhi");
227 /* Simply ioremap since it may be a shared register zone */
228 regs = devm_ioremap(dev, res->start, resource_size(res));
230 ret = -EADDRNOTAVAIL;
234 priv->hhi = devm_regmap_init_mmio(dev, regs,
235 &meson_regmap_config);
236 if (IS_ERR(priv->hhi)) {
237 dev_err(&pdev->dev, "Couldn't create the HHI regmap\n");
238 ret = PTR_ERR(priv->hhi);
242 priv->canvas = meson_canvas_get(dev);
243 if (IS_ERR(priv->canvas)) {
244 ret = PTR_ERR(priv->canvas);
248 ret = meson_canvas_alloc(priv->canvas, &priv->canvas_id_osd1);
251 ret = meson_canvas_alloc(priv->canvas, &priv->canvas_id_vd1_0);
253 meson_canvas_free(priv->canvas, priv->canvas_id_osd1);
256 ret = meson_canvas_alloc(priv->canvas, &priv->canvas_id_vd1_1);
258 meson_canvas_free(priv->canvas, priv->canvas_id_osd1);
259 meson_canvas_free(priv->canvas, priv->canvas_id_vd1_0);
262 ret = meson_canvas_alloc(priv->canvas, &priv->canvas_id_vd1_2);
264 meson_canvas_free(priv->canvas, priv->canvas_id_osd1);
265 meson_canvas_free(priv->canvas, priv->canvas_id_vd1_0);
266 meson_canvas_free(priv->canvas, priv->canvas_id_vd1_1);
270 priv->vsync_irq = platform_get_irq(pdev, 0);
272 ret = drm_vblank_init(drm, 1);
276 /* Assign limits per soc revision/package */
277 for (i = 0 ; i < ARRAY_SIZE(meson_drm_soc_attrs) ; ++i) {
278 if (soc_device_match(meson_drm_soc_attrs[i].attrs)) {
279 priv->limits = &meson_drm_soc_attrs[i].limits;
285 * Remove early framebuffers (ie. simplefb). The framebuffer can be
286 * located anywhere in RAM
288 ret = drm_aperture_remove_framebuffers(false, "meson-drm-fb");
292 ret = drmm_mode_config_init(drm);
295 drm->mode_config.max_width = 3840;
296 drm->mode_config.max_height = 2160;
297 drm->mode_config.funcs = &meson_mode_config_funcs;
298 drm->mode_config.helper_private = &meson_mode_config_helpers;
300 /* Hardware Initialization */
302 meson_vpu_init(priv);
303 meson_venc_init(priv);
304 meson_vpp_init(priv);
305 meson_viu_init(priv);
306 if (priv->afbcd.ops) {
307 ret = priv->afbcd.ops->init(priv);
312 /* Encoder Initialization */
314 ret = meson_venc_cvbs_create(priv);
318 if (has_components) {
319 ret = component_bind_all(drm->dev, drm);
321 dev_err(drm->dev, "Couldn't bind all components\n");
326 ret = meson_plane_create(priv);
330 ret = meson_overlay_create(priv);
334 ret = meson_crtc_create(priv);
338 ret = drm_irq_install(drm, priv->vsync_irq);
342 drm_mode_config_reset(drm);
344 drm_kms_helper_poll_init(drm);
346 platform_set_drvdata(pdev, priv);
348 ret = drm_dev_register(drm, 0);
352 drm_fbdev_generic_setup(drm, 32);
357 drm_irq_uninstall(drm);
364 static int meson_drv_bind(struct device *dev)
366 return meson_drv_bind_master(dev, true);
369 static void meson_drv_unbind(struct device *dev)
371 struct meson_drm *priv = dev_get_drvdata(dev);
372 struct drm_device *drm = priv->drm;
375 meson_canvas_free(priv->canvas, priv->canvas_id_osd1);
376 meson_canvas_free(priv->canvas, priv->canvas_id_vd1_0);
377 meson_canvas_free(priv->canvas, priv->canvas_id_vd1_1);
378 meson_canvas_free(priv->canvas, priv->canvas_id_vd1_2);
381 drm_dev_unregister(drm);
382 drm_kms_helper_poll_fini(drm);
383 drm_atomic_helper_shutdown(drm);
384 component_unbind_all(dev, drm);
385 drm_irq_uninstall(drm);
388 if (priv->afbcd.ops) {
389 priv->afbcd.ops->reset(priv);
390 meson_rdma_free(priv);
394 static const struct component_master_ops meson_drv_master_ops = {
395 .bind = meson_drv_bind,
396 .unbind = meson_drv_unbind,
399 static int __maybe_unused meson_drv_pm_suspend(struct device *dev)
401 struct meson_drm *priv = dev_get_drvdata(dev);
406 return drm_mode_config_helper_suspend(priv->drm);
409 static int __maybe_unused meson_drv_pm_resume(struct device *dev)
411 struct meson_drm *priv = dev_get_drvdata(dev);
416 meson_vpu_init(priv);
417 meson_venc_init(priv);
418 meson_vpp_init(priv);
419 meson_viu_init(priv);
421 priv->afbcd.ops->init(priv);
423 return drm_mode_config_helper_resume(priv->drm);
426 static int compare_of(struct device *dev, void *data)
428 DRM_DEBUG_DRIVER("Comparing of node %pOF with %pOF\n",
431 return dev->of_node == data;
434 /* Possible connectors nodes to ignore */
435 static const struct of_device_id connectors_match[] = {
436 { .compatible = "composite-video-connector" },
437 { .compatible = "svideo-connector" },
438 { .compatible = "hdmi-connector" },
439 { .compatible = "dvi-connector" },
443 static int meson_probe_remote(struct platform_device *pdev,
444 struct component_match **match,
445 struct device_node *parent,
446 struct device_node *remote)
448 struct device_node *ep, *remote_node;
451 /* If node is a connector, return and do not add to match table */
452 if (of_match_node(connectors_match, remote))
455 component_match_add(&pdev->dev, match, compare_of, remote);
457 for_each_endpoint_of_node(remote, ep) {
458 remote_node = of_graph_get_remote_port_parent(ep);
460 remote_node == parent || /* Ignore parent endpoint */
461 !of_device_is_available(remote_node)) {
462 of_node_put(remote_node);
466 count += meson_probe_remote(pdev, match, remote, remote_node);
468 of_node_put(remote_node);
474 static void meson_drv_shutdown(struct platform_device *pdev)
476 struct meson_drm *priv = dev_get_drvdata(&pdev->dev);
481 drm_kms_helper_poll_fini(priv->drm);
482 drm_atomic_helper_shutdown(priv->drm);
485 static int meson_drv_probe(struct platform_device *pdev)
487 struct component_match *match = NULL;
488 struct device_node *np = pdev->dev.of_node;
489 struct device_node *ep, *remote;
492 for_each_endpoint_of_node(np, ep) {
493 remote = of_graph_get_remote_port_parent(ep);
494 if (!remote || !of_device_is_available(remote)) {
499 count += meson_probe_remote(pdev, &match, np, remote);
504 return meson_drv_bind_master(&pdev->dev, false);
506 /* If some endpoints were found, initialize the nodes */
508 dev_info(&pdev->dev, "Queued %d outputs on vpu\n", count);
510 return component_master_add_with_match(&pdev->dev,
511 &meson_drv_master_ops,
515 /* If no output endpoints were available, simply bail out */
519 static struct meson_drm_match_data meson_drm_gxbb_data = {
520 .compat = VPU_COMPATIBLE_GXBB,
523 static struct meson_drm_match_data meson_drm_gxl_data = {
524 .compat = VPU_COMPATIBLE_GXL,
527 static struct meson_drm_match_data meson_drm_gxm_data = {
528 .compat = VPU_COMPATIBLE_GXM,
529 .afbcd_ops = &meson_afbcd_gxm_ops,
532 static struct meson_drm_match_data meson_drm_g12a_data = {
533 .compat = VPU_COMPATIBLE_G12A,
534 .afbcd_ops = &meson_afbcd_g12a_ops,
537 static const struct of_device_id dt_match[] = {
538 { .compatible = "amlogic,meson-gxbb-vpu",
539 .data = (void *)&meson_drm_gxbb_data },
540 { .compatible = "amlogic,meson-gxl-vpu",
541 .data = (void *)&meson_drm_gxl_data },
542 { .compatible = "amlogic,meson-gxm-vpu",
543 .data = (void *)&meson_drm_gxm_data },
544 { .compatible = "amlogic,meson-g12a-vpu",
545 .data = (void *)&meson_drm_g12a_data },
548 MODULE_DEVICE_TABLE(of, dt_match);
550 static const struct dev_pm_ops meson_drv_pm_ops = {
551 SET_SYSTEM_SLEEP_PM_OPS(meson_drv_pm_suspend, meson_drv_pm_resume)
554 static struct platform_driver meson_drm_platform_driver = {
555 .probe = meson_drv_probe,
556 .shutdown = meson_drv_shutdown,
559 .of_match_table = dt_match,
560 .pm = &meson_drv_pm_ops,
564 module_platform_driver(meson_drm_platform_driver);
568 MODULE_DESCRIPTION(DRIVER_DESC);
569 MODULE_LICENSE("GPL");