2 * Copyright (C) 2014 Traphandler
3 * Copyright (C) 2014 Free Electrons
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License version 2 as published by
10 * the Free Software Foundation.
12 * This program is distributed in the hope that it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
17 * You should have received a copy of the GNU General Public License along with
18 * this program. If not, see <http://www.gnu.org/licenses/>.
21 #include <linux/clk.h>
23 #include <linux/pm_runtime.h>
24 #include <linux/pinctrl/consumer.h>
26 #include <drm/drm_crtc.h>
27 #include <drm/drm_crtc_helper.h>
30 #include <video/videomode.h>
32 #include "atmel_hlcdc_dc.h"
35 * Atmel HLCDC CRTC structure
37 * @base: base DRM CRTC structure
38 * @hlcdc: pointer to the atmel_hlcdc structure provided by the MFD device
39 * @event: pointer to the current page flip event
40 * @id: CRTC id (returned by drm_crtc_index)
41 * @enabled: CRTC state
43 struct atmel_hlcdc_crtc {
45 struct atmel_hlcdc_dc *dc;
46 struct drm_pending_vblank_event *event;
51 static inline struct atmel_hlcdc_crtc *
52 drm_crtc_to_atmel_hlcdc_crtc(struct drm_crtc *crtc)
54 return container_of(crtc, struct atmel_hlcdc_crtc, base);
57 static void atmel_hlcdc_crtc_mode_set_nofb(struct drm_crtc *c)
59 struct atmel_hlcdc_crtc *crtc = drm_crtc_to_atmel_hlcdc_crtc(c);
60 struct regmap *regmap = crtc->dc->hlcdc->regmap;
61 struct drm_display_mode *adj = &c->state->adjusted_mode;
62 unsigned long mode_rate;
68 vm.vfront_porch = adj->crtc_vsync_start - adj->crtc_vdisplay;
69 vm.vback_porch = adj->crtc_vtotal - adj->crtc_vsync_end;
70 vm.vsync_len = adj->crtc_vsync_end - adj->crtc_vsync_start;
71 vm.hfront_porch = adj->crtc_hsync_start - adj->crtc_hdisplay;
72 vm.hback_porch = adj->crtc_htotal - adj->crtc_hsync_end;
73 vm.hsync_len = adj->crtc_hsync_end - adj->crtc_hsync_start;
75 regmap_write(regmap, ATMEL_HLCDC_CFG(1),
76 (vm.hsync_len - 1) | ((vm.vsync_len - 1) << 16));
78 regmap_write(regmap, ATMEL_HLCDC_CFG(2),
79 (vm.vfront_porch - 1) | (vm.vback_porch << 16));
81 regmap_write(regmap, ATMEL_HLCDC_CFG(3),
82 (vm.hfront_porch - 1) | ((vm.hback_porch - 1) << 16));
84 regmap_write(regmap, ATMEL_HLCDC_CFG(4),
85 (adj->crtc_hdisplay - 1) |
86 ((adj->crtc_vdisplay - 1) << 16));
90 prate = clk_get_rate(crtc->dc->hlcdc->sys_clk);
91 mode_rate = adj->crtc_clock * 1000;
92 if ((prate / 2) < mode_rate) {
94 cfg |= ATMEL_HLCDC_CLKSEL;
97 div = DIV_ROUND_UP(prate, mode_rate);
101 cfg |= ATMEL_HLCDC_CLKDIV(div);
103 regmap_update_bits(regmap, ATMEL_HLCDC_CFG(0),
104 ATMEL_HLCDC_CLKSEL | ATMEL_HLCDC_CLKDIV_MASK |
105 ATMEL_HLCDC_CLKPOL, cfg);
109 if (adj->flags & DRM_MODE_FLAG_NVSYNC)
110 cfg |= ATMEL_HLCDC_VSPOL;
112 if (adj->flags & DRM_MODE_FLAG_NHSYNC)
113 cfg |= ATMEL_HLCDC_HSPOL;
115 regmap_update_bits(regmap, ATMEL_HLCDC_CFG(5),
116 ATMEL_HLCDC_HSPOL | ATMEL_HLCDC_VSPOL |
117 ATMEL_HLCDC_VSPDLYS | ATMEL_HLCDC_VSPDLYE |
118 ATMEL_HLCDC_DISPPOL | ATMEL_HLCDC_DISPDLY |
119 ATMEL_HLCDC_VSPSU | ATMEL_HLCDC_VSPHO |
120 ATMEL_HLCDC_GUARDTIME_MASK,
124 static bool atmel_hlcdc_crtc_mode_fixup(struct drm_crtc *crtc,
125 const struct drm_display_mode *mode,
126 struct drm_display_mode *adjusted_mode)
131 static void atmel_hlcdc_crtc_disable(struct drm_crtc *c)
133 struct drm_device *dev = c->dev;
134 struct atmel_hlcdc_crtc *crtc = drm_crtc_to_atmel_hlcdc_crtc(c);
135 struct regmap *regmap = crtc->dc->hlcdc->regmap;
141 drm_crtc_vblank_off(c);
143 pm_runtime_get_sync(dev->dev);
145 regmap_write(regmap, ATMEL_HLCDC_DIS, ATMEL_HLCDC_DISP);
146 while (!regmap_read(regmap, ATMEL_HLCDC_SR, &status) &&
147 (status & ATMEL_HLCDC_DISP))
150 regmap_write(regmap, ATMEL_HLCDC_DIS, ATMEL_HLCDC_SYNC);
151 while (!regmap_read(regmap, ATMEL_HLCDC_SR, &status) &&
152 (status & ATMEL_HLCDC_SYNC))
155 regmap_write(regmap, ATMEL_HLCDC_DIS, ATMEL_HLCDC_PIXEL_CLK);
156 while (!regmap_read(regmap, ATMEL_HLCDC_SR, &status) &&
157 (status & ATMEL_HLCDC_PIXEL_CLK))
160 clk_disable_unprepare(crtc->dc->hlcdc->sys_clk);
161 pinctrl_pm_select_sleep_state(dev->dev);
163 pm_runtime_allow(dev->dev);
165 pm_runtime_put_sync(dev->dev);
167 crtc->enabled = false;
170 static void atmel_hlcdc_crtc_enable(struct drm_crtc *c)
172 struct drm_device *dev = c->dev;
173 struct atmel_hlcdc_crtc *crtc = drm_crtc_to_atmel_hlcdc_crtc(c);
174 struct regmap *regmap = crtc->dc->hlcdc->regmap;
180 pm_runtime_get_sync(dev->dev);
182 pm_runtime_forbid(dev->dev);
184 pinctrl_pm_select_default_state(dev->dev);
185 clk_prepare_enable(crtc->dc->hlcdc->sys_clk);
187 regmap_write(regmap, ATMEL_HLCDC_EN, ATMEL_HLCDC_PIXEL_CLK);
188 while (!regmap_read(regmap, ATMEL_HLCDC_SR, &status) &&
189 !(status & ATMEL_HLCDC_PIXEL_CLK))
193 regmap_write(regmap, ATMEL_HLCDC_EN, ATMEL_HLCDC_SYNC);
194 while (!regmap_read(regmap, ATMEL_HLCDC_SR, &status) &&
195 !(status & ATMEL_HLCDC_SYNC))
198 regmap_write(regmap, ATMEL_HLCDC_EN, ATMEL_HLCDC_DISP);
199 while (!regmap_read(regmap, ATMEL_HLCDC_SR, &status) &&
200 !(status & ATMEL_HLCDC_DISP))
203 pm_runtime_put_sync(dev->dev);
205 drm_crtc_vblank_on(c);
207 crtc->enabled = true;
210 void atmel_hlcdc_crtc_suspend(struct drm_crtc *c)
212 struct atmel_hlcdc_crtc *crtc = drm_crtc_to_atmel_hlcdc_crtc(c);
215 atmel_hlcdc_crtc_disable(c);
216 /* save enable state for resume */
217 crtc->enabled = true;
221 void atmel_hlcdc_crtc_resume(struct drm_crtc *c)
223 struct atmel_hlcdc_crtc *crtc = drm_crtc_to_atmel_hlcdc_crtc(c);
226 crtc->enabled = false;
227 atmel_hlcdc_crtc_enable(c);
231 static int atmel_hlcdc_crtc_atomic_check(struct drm_crtc *c,
232 struct drm_crtc_state *s)
234 struct atmel_hlcdc_crtc *crtc = drm_crtc_to_atmel_hlcdc_crtc(c);
236 if (atmel_hlcdc_dc_mode_valid(crtc->dc, &s->adjusted_mode) != MODE_OK)
239 return atmel_hlcdc_plane_prepare_disc_area(s);
242 static void atmel_hlcdc_crtc_atomic_begin(struct drm_crtc *c)
244 struct atmel_hlcdc_crtc *crtc = drm_crtc_to_atmel_hlcdc_crtc(c);
246 if (c->state->event) {
247 c->state->event->pipe = drm_crtc_index(c);
249 WARN_ON(drm_crtc_vblank_get(c) != 0);
251 crtc->event = c->state->event;
252 c->state->event = NULL;
256 static void atmel_hlcdc_crtc_atomic_flush(struct drm_crtc *crtc)
258 /* TODO: write common plane control register if available */
261 static const struct drm_crtc_helper_funcs lcdc_crtc_helper_funcs = {
262 .mode_fixup = atmel_hlcdc_crtc_mode_fixup,
263 .mode_set = drm_helper_crtc_mode_set,
264 .mode_set_nofb = atmel_hlcdc_crtc_mode_set_nofb,
265 .mode_set_base = drm_helper_crtc_mode_set_base,
266 .disable = atmel_hlcdc_crtc_disable,
267 .enable = atmel_hlcdc_crtc_enable,
268 .atomic_check = atmel_hlcdc_crtc_atomic_check,
269 .atomic_begin = atmel_hlcdc_crtc_atomic_begin,
270 .atomic_flush = atmel_hlcdc_crtc_atomic_flush,
273 static void atmel_hlcdc_crtc_destroy(struct drm_crtc *c)
275 struct atmel_hlcdc_crtc *crtc = drm_crtc_to_atmel_hlcdc_crtc(c);
281 void atmel_hlcdc_crtc_cancel_page_flip(struct drm_crtc *c,
282 struct drm_file *file)
284 struct atmel_hlcdc_crtc *crtc = drm_crtc_to_atmel_hlcdc_crtc(c);
285 struct drm_pending_vblank_event *event;
286 struct drm_device *dev = c->dev;
289 spin_lock_irqsave(&dev->event_lock, flags);
291 if (event && event->base.file_priv == file) {
292 event->base.destroy(&event->base);
293 drm_vblank_put(dev, crtc->id);
296 spin_unlock_irqrestore(&dev->event_lock, flags);
299 static void atmel_hlcdc_crtc_finish_page_flip(struct atmel_hlcdc_crtc *crtc)
301 struct drm_device *dev = crtc->base.dev;
304 spin_lock_irqsave(&dev->event_lock, flags);
306 drm_send_vblank_event(dev, crtc->id, crtc->event);
307 drm_vblank_put(dev, crtc->id);
310 spin_unlock_irqrestore(&dev->event_lock, flags);
313 void atmel_hlcdc_crtc_irq(struct drm_crtc *c)
315 drm_handle_vblank(c->dev, 0);
316 atmel_hlcdc_crtc_finish_page_flip(drm_crtc_to_atmel_hlcdc_crtc(c));
319 static const struct drm_crtc_funcs atmel_hlcdc_crtc_funcs = {
320 .page_flip = drm_atomic_helper_page_flip,
321 .set_config = drm_atomic_helper_set_config,
322 .destroy = atmel_hlcdc_crtc_destroy,
323 .reset = drm_atomic_helper_crtc_reset,
324 .atomic_duplicate_state = drm_atomic_helper_crtc_duplicate_state,
325 .atomic_destroy_state = drm_atomic_helper_crtc_destroy_state,
328 int atmel_hlcdc_crtc_create(struct drm_device *dev)
330 struct atmel_hlcdc_dc *dc = dev->dev_private;
331 struct atmel_hlcdc_planes *planes = dc->planes;
332 struct atmel_hlcdc_crtc *crtc;
336 crtc = kzalloc(sizeof(*crtc), GFP_KERNEL);
342 ret = drm_crtc_init_with_planes(dev, &crtc->base,
343 &planes->primary->base,
344 planes->cursor ? &planes->cursor->base : NULL,
345 &atmel_hlcdc_crtc_funcs);
349 crtc->id = drm_crtc_index(&crtc->base);
352 planes->cursor->base.possible_crtcs = 1 << crtc->id;
354 for (i = 0; i < planes->noverlays; i++)
355 planes->overlays[i]->base.possible_crtcs = 1 << crtc->id;
357 drm_crtc_helper_add(&crtc->base, &lcdc_crtc_helper_funcs);
358 drm_crtc_vblank_reset(&crtc->base);
360 dc->crtc = &crtc->base;
365 atmel_hlcdc_crtc_destroy(&crtc->base);