drivers/tty/serial/cpm_uart/cpm_uart_core.c

   1 // SPDX-License-Identifier: GPL-2.0+
   2 /*
   3  *  Driver for CPM (SCC/SMC) serial ports; core driver
   4  *
   5  *  Based on arch/ppc/cpm2_io/uart.c by Dan Malek
   6  *  Based on ppc8xx.c by Thomas Gleixner
   7  *  Based on drivers/serial/amba.c by Russell King
   8  *
   9  *  Maintainer: Kumar Gala ([email protected]) (CPM2)
  10  *              Pantelis Antoniou ([email protected]) (CPM1)
  11  *
  12  *  Copyright (C) 2004, 2007 Freescale Semiconductor, Inc.
  13  *            (C) 2004 Intracom, S.A.
  14  *            (C) 2005-2006 MontaVista Software, Inc.
  15  *              Vitaly Bordug <[email protected]>
  16  */
  17
  18 #include <linux/module.h>
  19 #include <linux/tty.h>
  20 #include <linux/tty_flip.h>
  21 #include <linux/ioport.h>
  22 #include <linux/init.h>
  23 #include <linux/serial.h>
  24 #include <linux/console.h>
  25 #include <linux/sysrq.h>
  26 #include <linux/device.h>
  27 #include <linux/memblock.h>
  28 #include <linux/dma-mapping.h>
  29 #include <linux/fs_uart_pd.h>
  30 #include <linux/of_address.h>
  31 #include <linux/of_irq.h>
  32 #include <linux/of_platform.h>
  33 #include <linux/gpio/consumer.h>
  34 #include <linux/clk.h>
  35
  36 #include <asm/io.h>
  37 #include <asm/irq.h>
  38 #include <asm/delay.h>
  39 #include <asm/fs_pd.h>
  40 #include <asm/udbg.h>
  41
  42 #include <linux/serial_core.h>
  43 #include <linux/kernel.h>
  44
  45 #include "cpm_uart.h"
  46
  47
  48 /**************************************************************/
  49
  50 static int  cpm_uart_tx_pump(struct uart_port *port);
  51 static void cpm_uart_init_smc(struct uart_cpm_port *pinfo);
  52 static void cpm_uart_init_scc(struct uart_cpm_port *pinfo);
  53 static void cpm_uart_initbd(struct uart_cpm_port *pinfo);
  54
  55 /**************************************************************/
  56
  57 #define HW_BUF_SPD_THRESHOLD    2400
  58
  59 /*
  60  * Check, if transmit buffers are processed
  61 */
  62 static unsigned int cpm_uart_tx_empty(struct uart_port *port)
  63 {
  64         struct uart_cpm_port *pinfo =
  65                 container_of(port, struct uart_cpm_port, port);
  66         cbd_t __iomem *bdp = pinfo->tx_bd_base;
  67         int ret = 0;
  68
  69         while (1) {
  70                 if (in_be16(&bdp->cbd_sc) & BD_SC_READY)
  71                         break;
  72
  73                 if (in_be16(&bdp->cbd_sc) & BD_SC_WRAP) {
  74                         ret = TIOCSER_TEMT;
  75                         break;
  76                 }
  77                 bdp++;
  78         }
  79
  80         pr_debug("CPM uart[%d]:tx_empty: %d\n", port->line, ret);
  81
  82         return ret;
  83 }
  84
  85 static void cpm_uart_set_mctrl(struct uart_port *port, unsigned int mctrl)
  86 {
  87         struct uart_cpm_port *pinfo =
  88                 container_of(port, struct uart_cpm_port, port);
  89
  90         if (pinfo->gpios[GPIO_RTS])
  91                 gpiod_set_value(pinfo->gpios[GPIO_RTS], !(mctrl & TIOCM_RTS));
  92
  93         if (pinfo->gpios[GPIO_DTR])
  94                 gpiod_set_value(pinfo->gpios[GPIO_DTR], !(mctrl & TIOCM_DTR));
  95 }
  96
  97 static unsigned int cpm_uart_get_mctrl(struct uart_port *port)
  98 {
  99         struct uart_cpm_port *pinfo =
 100                 container_of(port, struct uart_cpm_port, port);
 101         unsigned int mctrl = TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
 102
 103         if (pinfo->gpios[GPIO_CTS]) {
 104                 if (gpiod_get_value(pinfo->gpios[GPIO_CTS]))
 105                         mctrl &= ~TIOCM_CTS;
 106         }
 107
 108         if (pinfo->gpios[GPIO_DSR]) {
 109                 if (gpiod_get_value(pinfo->gpios[GPIO_DSR]))
 110                         mctrl &= ~TIOCM_DSR;
 111         }
 112
 113         if (pinfo->gpios[GPIO_DCD]) {
 114                 if (gpiod_get_value(pinfo->gpios[GPIO_DCD]))
 115                         mctrl &= ~TIOCM_CAR;
 116         }
 117
 118         if (pinfo->gpios[GPIO_RI]) {
 119                 if (!gpiod_get_value(pinfo->gpios[GPIO_RI]))
 120                         mctrl |= TIOCM_RNG;
 121         }
 122
 123         return mctrl;
 124 }
 125
 126 /*
 127  * Stop transmitter
 128  */
 129 static void cpm_uart_stop_tx(struct uart_port *port)
 130 {
 131         struct uart_cpm_port *pinfo =
 132                 container_of(port, struct uart_cpm_port, port);
 133         smc_t __iomem *smcp = pinfo->smcp;
 134         scc_t __iomem *sccp = pinfo->sccp;
 135
 136         pr_debug("CPM uart[%d]:stop tx\n", port->line);
 137
 138         if (IS_SMC(pinfo))
 139                 clrbits8(&smcp->smc_smcm, SMCM_TX);
 140         else
 141                 clrbits16(&sccp->scc_sccm, UART_SCCM_TX);
 142 }
 143
 144 /*
 145  * Start transmitter
 146  */
 147 static void cpm_uart_start_tx(struct uart_port *port)
 148 {
 149         struct uart_cpm_port *pinfo =
 150                 container_of(port, struct uart_cpm_port, port);
 151         smc_t __iomem *smcp = pinfo->smcp;
 152         scc_t __iomem *sccp = pinfo->sccp;
 153
 154         pr_debug("CPM uart[%d]:start tx\n", port->line);
 155
 156         if (IS_SMC(pinfo)) {
 157                 if (in_8(&smcp->smc_smcm) & SMCM_TX)
 158                         return;
 159         } else {
 160                 if (in_be16(&sccp->scc_sccm) & UART_SCCM_TX)
 161                         return;
 162         }
 163
 164         if (cpm_uart_tx_pump(port) != 0) {
 165                 if (IS_SMC(pinfo)) {
 166                         setbits8(&smcp->smc_smcm, SMCM_TX);
 167                 } else {
 168                         setbits16(&sccp->scc_sccm, UART_SCCM_TX);
 169                 }
 170         }
 171 }
 172
 173 /*
 174  * Stop receiver
 175  */
 176 static void cpm_uart_stop_rx(struct uart_port *port)
 177 {
 178         struct uart_cpm_port *pinfo =
 179                 container_of(port, struct uart_cpm_port, port);
 180         smc_t __iomem *smcp = pinfo->smcp;
 181         scc_t __iomem *sccp = pinfo->sccp;
 182
 183         pr_debug("CPM uart[%d]:stop rx\n", port->line);
 184
 185         if (IS_SMC(pinfo))
 186                 clrbits8(&smcp->smc_smcm, SMCM_RX);
 187         else
 188                 clrbits16(&sccp->scc_sccm, UART_SCCM_RX);
 189 }
 190
 191 /*
 192  * Generate a break.
 193  */
 194 static void cpm_uart_break_ctl(struct uart_port *port, int break_state)
 195 {
 196         struct uart_cpm_port *pinfo =
 197                 container_of(port, struct uart_cpm_port, port);
 198
 199         pr_debug("CPM uart[%d]:break ctrl, break_state: %d\n", port->line,
 200                 break_state);
 201
 202         if (break_state)
 203                 cpm_line_cr_cmd(pinfo, CPM_CR_STOP_TX);
 204         else
 205                 cpm_line_cr_cmd(pinfo, CPM_CR_RESTART_TX);
 206 }
 207
 208 /*
 209  * Transmit characters, refill buffer descriptor, if possible
 210  */
 211 static void cpm_uart_int_tx(struct uart_port *port)
 212 {
 213         pr_debug("CPM uart[%d]:TX INT\n", port->line);
 214
 215         cpm_uart_tx_pump(port);
 216 }
 217
 218 #ifdef CONFIG_CONSOLE_POLL
 219 static int serial_polled;
 220 #endif
 221
 222 /*
 223  * Receive characters
 224  */
 225 static void cpm_uart_int_rx(struct uart_port *port)
 226 {
 227         int i;
 228         unsigned char ch;
 229         u8 *cp;
 230         struct tty_port *tport = &port->state->port;
 231         struct uart_cpm_port *pinfo =
 232                 container_of(port, struct uart_cpm_port, port);
 233         cbd_t __iomem *bdp;
 234         u16 status;
 235         unsigned int flg;
 236
 237         pr_debug("CPM uart[%d]:RX INT\n", port->line);
 238
 239         /* Just loop through the closed BDs and copy the characters into
 240          * the buffer.
 241          */
 242         bdp = pinfo->rx_cur;
 243         for (;;) {
 244 #ifdef CONFIG_CONSOLE_POLL
 245                 if (unlikely(serial_polled)) {
 246                         serial_polled = 0;
 247                         return;
 248                 }
 249 #endif
 250                 /* get status */
 251                 status = in_be16(&bdp->cbd_sc);
 252                 /* If this one is empty, return happy */
 253                 if (status & BD_SC_EMPTY)
 254                         break;
 255
 256                 /* get number of characters, and check spce in flip-buffer */
 257                 i = in_be16(&bdp->cbd_datlen);
 258
 259                 /* If we have not enough room in tty flip buffer, then we try
 260                  * later, which will be the next rx-interrupt or a timeout
 261                  */
 262                 if (tty_buffer_request_room(tport, i) < i) {
 263                         printk(KERN_WARNING "No room in flip buffer\n");
 264                         return;
 265                 }
 266
 267                 /* get pointer */
 268                 cp = cpm2cpu_addr(in_be32(&bdp->cbd_bufaddr), pinfo);
 269
 270                 /* loop through the buffer */
 271                 while (i-- > 0) {
 272                         ch = *cp++;
 273                         port->icount.rx++;
 274                         flg = TTY_NORMAL;
 275
 276                         if (status &
 277                             (BD_SC_BR | BD_SC_FR | BD_SC_PR | BD_SC_OV))
 278                                 goto handle_error;
 279                         if (uart_handle_sysrq_char(port, ch))
 280                                 continue;
 281 #ifdef CONFIG_CONSOLE_POLL
 282                         if (unlikely(serial_polled)) {
 283                                 serial_polled = 0;
 284                                 return;
 285                         }
 286 #endif
 287                       error_return:
 288                         tty_insert_flip_char(tport, ch, flg);
 289
 290                 }               /* End while (i--) */
 291
 292                 /* This BD is ready to be used again. Clear status. get next */
 293                 clrbits16(&bdp->cbd_sc, BD_SC_BR | BD_SC_FR | BD_SC_PR |
 294                                         BD_SC_OV | BD_SC_ID);
 295                 setbits16(&bdp->cbd_sc, BD_SC_EMPTY);
 296
 297                 if (in_be16(&bdp->cbd_sc) & BD_SC_WRAP)
 298                         bdp = pinfo->rx_bd_base;
 299                 else
 300                         bdp++;
 301
 302         } /* End for (;;) */
 303
 304         /* Write back buffer pointer */
 305         pinfo->rx_cur = bdp;
 306
 307         /* activate BH processing */
 308         tty_flip_buffer_push(tport);
 309
 310         return;
 311
 312         /* Error processing */
 313
 314       handle_error:
 315         /* Statistics */
 316         if (status & BD_SC_BR)
 317                 port->icount.brk++;
 318         if (status & BD_SC_PR)
 319                 port->icount.parity++;
 320         if (status & BD_SC_FR)
 321                 port->icount.frame++;
 322         if (status & BD_SC_OV)
 323                 port->icount.overrun++;
 324
 325         /* Mask out ignored conditions */
 326         status &= port->read_status_mask;
 327
 328         /* Handle the remaining ones */
 329         if (status & BD_SC_BR)
 330                 flg = TTY_BREAK;
 331         else if (status & BD_SC_PR)
 332                 flg = TTY_PARITY;
 333         else if (status & BD_SC_FR)
 334                 flg = TTY_FRAME;
 335
 336         /* overrun does not affect the current character ! */
 337         if (status & BD_SC_OV) {
 338                 ch = 0;
 339                 flg = TTY_OVERRUN;
 340                 /* We skip this buffer */
 341                 /* CHECK: Is really nothing senseful there */
 342                 /* ASSUMPTION: it contains nothing valid */
 343                 i = 0;
 344         }
 345         port->sysrq = 0;
 346         goto error_return;
 347 }
 348
 349 /*
 350  * Asynchron mode interrupt handler
 351  */
 352 static irqreturn_t cpm_uart_int(int irq, void *data)
 353 {
 354         u8 events;
 355         struct uart_port *port = data;
 356         struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port;
 357         smc_t __iomem *smcp = pinfo->smcp;
 358         scc_t __iomem *sccp = pinfo->sccp;
 359
 360         pr_debug("CPM uart[%d]:IRQ\n", port->line);
 361
 362         if (IS_SMC(pinfo)) {
 363                 events = in_8(&smcp->smc_smce);
 364                 out_8(&smcp->smc_smce, events);
 365                 if (events & SMCM_BRKE)
 366                         uart_handle_break(port);
 367                 if (events & SMCM_RX)
 368                         cpm_uart_int_rx(port);
 369                 if (events & SMCM_TX)
 370                         cpm_uart_int_tx(port);
 371         } else {
 372                 events = in_be16(&sccp->scc_scce);
 373                 out_be16(&sccp->scc_scce, events);
 374                 if (events & UART_SCCM_BRKE)
 375                         uart_handle_break(port);
 376                 if (events & UART_SCCM_RX)
 377                         cpm_uart_int_rx(port);
 378                 if (events & UART_SCCM_TX)
 379                         cpm_uart_int_tx(port);
 380         }
 381         return (events) ? IRQ_HANDLED : IRQ_NONE;
 382 }
 383
 384 static int cpm_uart_startup(struct uart_port *port)
 385 {
 386         int retval;
 387         struct uart_cpm_port *pinfo =
 388                 container_of(port, struct uart_cpm_port, port);
 389
 390         pr_debug("CPM uart[%d]:startup\n", port->line);
 391
 392         /* If the port is not the console, make sure rx is disabled. */
 393         if (!(pinfo->flags & FLAG_CONSOLE)) {
 394                 /* Disable UART rx */
 395                 if (IS_SMC(pinfo)) {
 396                         clrbits16(&pinfo->smcp->smc_smcmr, SMCMR_REN);
 397                         clrbits8(&pinfo->smcp->smc_smcm, SMCM_RX);
 398                 } else {
 399                         clrbits32(&pinfo->sccp->scc_gsmrl, SCC_GSMRL_ENR);
 400                         clrbits16(&pinfo->sccp->scc_sccm, UART_SCCM_RX);
 401                 }
 402                 cpm_uart_initbd(pinfo);
 403                 if (IS_SMC(pinfo)) {
 404                         out_be32(&pinfo->smcup->smc_rstate, 0);
 405                         out_be32(&pinfo->smcup->smc_tstate, 0);
 406                         out_be16(&pinfo->smcup->smc_rbptr,
 407                                  in_be16(&pinfo->smcup->smc_rbase));
 408                         out_be16(&pinfo->smcup->smc_tbptr,
 409                                  in_be16(&pinfo->smcup->smc_tbase));
 410                 } else {
 411                         cpm_line_cr_cmd(pinfo, CPM_CR_INIT_TRX);
 412                 }
 413         }
 414         /* Install interrupt handler. */
 415         retval = request_irq(port->irq, cpm_uart_int, 0, "cpm_uart", port);
 416         if (retval)
 417                 return retval;
 418
 419         /* Startup rx-int */
 420         if (IS_SMC(pinfo)) {
 421                 setbits8(&pinfo->smcp->smc_smcm, SMCM_RX);
 422                 setbits16(&pinfo->smcp->smc_smcmr, (SMCMR_REN | SMCMR_TEN));
 423         } else {
 424                 setbits16(&pinfo->sccp->scc_sccm, UART_SCCM_RX);
 425                 setbits32(&pinfo->sccp->scc_gsmrl, (SCC_GSMRL_ENR | SCC_GSMRL_ENT));
 426         }
 427
 428         return 0;
 429 }
 430
 431 inline void cpm_uart_wait_until_send(struct uart_cpm_port *pinfo)
 432 {
 433         set_current_state(TASK_UNINTERRUPTIBLE);
 434         schedule_timeout(pinfo->wait_closing);
 435 }
 436
 437 /*
 438  * Shutdown the uart
 439  */
 440 static void cpm_uart_shutdown(struct uart_port *port)
 441 {
 442         struct uart_cpm_port *pinfo =
 443                 container_of(port, struct uart_cpm_port, port);
 444
 445         pr_debug("CPM uart[%d]:shutdown\n", port->line);
 446
 447         /* free interrupt handler */
 448         free_irq(port->irq, port);
 449
 450         /* If the port is not the console, disable Rx and Tx. */
 451         if (!(pinfo->flags & FLAG_CONSOLE)) {
 452                 /* Wait for all the BDs marked sent */
 453                 while(!cpm_uart_tx_empty(port)) {
 454                         set_current_state(TASK_UNINTERRUPTIBLE);
 455                         schedule_timeout(2);
 456                 }
 457
 458                 if (pinfo->wait_closing)
 459                         cpm_uart_wait_until_send(pinfo);
 460
 461                 /* Stop uarts */
 462                 if (IS_SMC(pinfo)) {
 463                         smc_t __iomem *smcp = pinfo->smcp;
 464                         clrbits16(&smcp->smc_smcmr, SMCMR_REN | SMCMR_TEN);
 465                         clrbits8(&smcp->smc_smcm, SMCM_RX | SMCM_TX);
 466                 } else {
 467                         scc_t __iomem *sccp = pinfo->sccp;
 468                         clrbits32(&sccp->scc_gsmrl, SCC_GSMRL_ENR | SCC_GSMRL_ENT);
 469                         clrbits16(&sccp->scc_sccm, UART_SCCM_TX | UART_SCCM_RX);
 470                 }
 471
 472                 /* Shut them really down and reinit buffer descriptors */
 473                 if (IS_SMC(pinfo)) {
 474                         out_be16(&pinfo->smcup->smc_brkcr, 0);
 475                         cpm_line_cr_cmd(pinfo, CPM_CR_STOP_TX);
 476                 } else {
 477                         out_be16(&pinfo->sccup->scc_brkcr, 0);
 478                         cpm_line_cr_cmd(pinfo, CPM_CR_GRA_STOP_TX);
 479                 }
 480
 481                 cpm_uart_initbd(pinfo);
 482         }
 483 }
 484
 485 static void cpm_uart_set_termios(struct uart_port *port,
 486                                  struct ktermios *termios,
 487                                  struct ktermios *old)
 488 {
 489         int baud;
 490         unsigned long flags;
 491         u16 cval, scval, prev_mode;
 492         int bits, sbits;
 493         struct uart_cpm_port *pinfo =
 494                 container_of(port, struct uart_cpm_port, port);
 495         smc_t __iomem *smcp = pinfo->smcp;
 496         scc_t __iomem *sccp = pinfo->sccp;
 497         int maxidl;
 498
 499         pr_debug("CPM uart[%d]:set_termios\n", port->line);
 500
 501         baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk / 16);
 502         if (baud < HW_BUF_SPD_THRESHOLD || port->flags & UPF_LOW_LATENCY)
 503                 pinfo->rx_fifosize = 1;
 504         else
 505                 pinfo->rx_fifosize = RX_BUF_SIZE;
 506
 507         /* MAXIDL is the timeout after which a receive buffer is closed
 508          * when not full if no more characters are received.
 509          * We calculate it from the baudrate so that the duration is
 510          * always the same at standard rates: about 4ms.
 511          */
 512         maxidl = baud / 2400;
 513         if (maxidl < 1)
 514                 maxidl = 1;
 515         if (maxidl > 0x10)
 516                 maxidl = 0x10;
 517
 518         /* Character length programmed into the mode register is the
 519          * sum of: 1 start bit, number of data bits, 0 or 1 parity bit,
 520          * 1 or 2 stop bits, minus 1.
 521          * The value 'bits' counts this for us.
 522          */
 523         cval = 0;
 524         scval = 0;
 525
 526         /* byte size */
 527         switch (termios->c_cflag & CSIZE) {
 528         case CS5:
 529                 bits = 5;
 530                 break;
 531         case CS6:
 532                 bits = 6;
 533                 break;
 534         case CS7:
 535                 bits = 7;
 536                 break;
 537         case CS8:
 538                 bits = 8;
 539                 break;
 540                 /* Never happens, but GCC is too dumb to figure it out */
 541         default:
 542                 bits = 8;
 543                 break;
 544         }
 545         sbits = bits - 5;
 546
 547         if (termios->c_cflag & CSTOPB) {
 548                 cval |= SMCMR_SL;       /* Two stops */
 549                 scval |= SCU_PSMR_SL;
 550                 bits++;
 551         }
 552
 553         if (termios->c_cflag & PARENB) {
 554                 cval |= SMCMR_PEN;
 555                 scval |= SCU_PSMR_PEN;
 556                 bits++;
 557                 if (!(termios->c_cflag & PARODD)) {
 558                         cval |= SMCMR_PM_EVEN;
 559                         scval |= (SCU_PSMR_REVP | SCU_PSMR_TEVP);
 560                 }
 561         }
 562
 563         /*
 564          * Update the timeout
 565          */
 566         uart_update_timeout(port, termios->c_cflag, baud);
 567
 568         /*
 569          * Set up parity check flag
 570          */
 571         port->read_status_mask = (BD_SC_EMPTY | BD_SC_OV);
 572         if (termios->c_iflag & INPCK)
 573                 port->read_status_mask |= BD_SC_FR | BD_SC_PR;
 574         if ((termios->c_iflag & BRKINT) || (termios->c_iflag & PARMRK))
 575                 port->read_status_mask |= BD_SC_BR;
 576
 577         /*
 578          * Characters to ignore
 579          */
 580         port->ignore_status_mask = 0;
 581         if (termios->c_iflag & IGNPAR)
 582                 port->ignore_status_mask |= BD_SC_PR | BD_SC_FR;
 583         if (termios->c_iflag & IGNBRK) {
 584                 port->ignore_status_mask |= BD_SC_BR;
 585                 /*
 586                  * If we're ignore parity and break indicators, ignore
 587                  * overruns too.  (For real raw support).
 588                  */
 589                 if (termios->c_iflag & IGNPAR)
 590                         port->ignore_status_mask |= BD_SC_OV;
 591         }
 592         /*
 593          * !!! ignore all characters if CREAD is not set
 594          */
 595         if ((termios->c_cflag & CREAD) == 0)
 596                 port->read_status_mask &= ~BD_SC_EMPTY;
 597
 598         spin_lock_irqsave(&port->lock, flags);
 599
 600         /* Start bit has not been added (so don't, because we would just
 601          * subtract it later), and we need to add one for the number of
 602          * stops bits (there is always at least one).
 603          */
 604         bits++;
 605         if (IS_SMC(pinfo)) {
 606                 /*
 607                  * MRBLR can be changed while an SMC/SCC is operating only
 608                  * if it is done in a single bus cycle with one 16-bit move
 609                  * (not two 8-bit bus cycles back-to-back). This occurs when
 610                  * the cp shifts control to the next RxBD, so the change does
 611                  * not take effect immediately. To guarantee the exact RxBD
 612                  * on which the change occurs, change MRBLR only while the
 613                  * SMC/SCC receiver is disabled.
 614                  */
 615                 out_be16(&pinfo->smcup->smc_mrblr, pinfo->rx_fifosize);
 616                 out_be16(&pinfo->smcup->smc_maxidl, maxidl);
 617
 618                 /* Set the mode register.  We want to keep a copy of the
 619                  * enables, because we want to put them back if they were
 620                  * present.
 621                  */
 622                 prev_mode = in_be16(&smcp->smc_smcmr) & (SMCMR_REN | SMCMR_TEN);
 623                 /* Output in *one* operation, so we don't interrupt RX/TX if they
 624                  * were already enabled. */
 625                 out_be16(&smcp->smc_smcmr, smcr_mk_clen(bits) | cval |
 626                     SMCMR_SM_UART | prev_mode);
 627         } else {
 628                 out_be16(&pinfo->sccup->scc_genscc.scc_mrblr, pinfo->rx_fifosize);
 629                 out_be16(&pinfo->sccup->scc_maxidl, maxidl);
 630                 out_be16(&sccp->scc_psmr, (sbits << 12) | scval);
 631         }
 632
 633         if (pinfo->clk)
 634                 clk_set_rate(pinfo->clk, baud);
 635         else
 636                 cpm_set_brg(pinfo->brg - 1, baud);
 637         spin_unlock_irqrestore(&port->lock, flags);
 638 }
 639
 640 static const char *cpm_uart_type(struct uart_port *port)
 641 {
 642         pr_debug("CPM uart[%d]:uart_type\n", port->line);
 643
 644         return port->type == PORT_CPM ? "CPM UART" : NULL;
 645 }
 646
 647 /*
 648  * verify the new serial_struct (for TIOCSSERIAL).
 649  */
 650 static int cpm_uart_verify_port(struct uart_port *port,
 651                                 struct serial_struct *ser)
 652 {
 653         int ret = 0;
 654
 655         pr_debug("CPM uart[%d]:verify_port\n", port->line);
 656
 657         if (ser->type != PORT_UNKNOWN && ser->type != PORT_CPM)
 658                 ret = -EINVAL;
 659         if (ser->irq < 0 || ser->irq >= nr_irqs)
 660                 ret = -EINVAL;
 661         if (ser->baud_base < 9600)
 662                 ret = -EINVAL;
 663         return ret;
 664 }
 665
 666 /*
 667  * Transmit characters, refill buffer descriptor, if possible
 668  */
 669 static int cpm_uart_tx_pump(struct uart_port *port)
 670 {
 671         cbd_t __iomem *bdp;
 672         u8 *p;
 673         int count;
 674         struct uart_cpm_port *pinfo =
 675                 container_of(port, struct uart_cpm_port, port);
 676         struct circ_buf *xmit = &port->state->xmit;
 677
 678         /* Handle xon/xoff */
 679         if (port->x_char) {
 680                 /* Pick next descriptor and fill from buffer */
 681                 bdp = pinfo->tx_cur;
 682
 683                 p = cpm2cpu_addr(in_be32(&bdp->cbd_bufaddr), pinfo);
 684
 685                 *p++ = port->x_char;
 686
 687                 out_be16(&bdp->cbd_datlen, 1);
 688                 setbits16(&bdp->cbd_sc, BD_SC_READY);
 689                 /* Get next BD. */
 690                 if (in_be16(&bdp->cbd_sc) & BD_SC_WRAP)
 691                         bdp = pinfo->tx_bd_base;
 692                 else
 693                         bdp++;
 694                 pinfo->tx_cur = bdp;
 695
 696                 port->icount.tx++;
 697                 port->x_char = 0;
 698                 return 1;
 699         }
 700
 701         if (uart_circ_empty(xmit) || uart_tx_stopped(port)) {
 702                 cpm_uart_stop_tx(port);
 703                 return 0;
 704         }
 705
 706         /* Pick next descriptor and fill from buffer */
 707         bdp = pinfo->tx_cur;
 708
 709         while (!(in_be16(&bdp->cbd_sc) & BD_SC_READY) &&
 710                xmit->tail != xmit->head) {
 711                 count = 0;
 712                 p = cpm2cpu_addr(in_be32(&bdp->cbd_bufaddr), pinfo);
 713                 while (count < pinfo->tx_fifosize) {
 714                         *p++ = xmit->buf[xmit->tail];
 715                         xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
 716                         port->icount.tx++;
 717                         count++;
 718                         if (xmit->head == xmit->tail)
 719                                 break;
 720                 }
 721                 out_be16(&bdp->cbd_datlen, count);
 722                 setbits16(&bdp->cbd_sc, BD_SC_READY);
 723                 /* Get next BD. */
 724                 if (in_be16(&bdp->cbd_sc) & BD_SC_WRAP)
 725                         bdp = pinfo->tx_bd_base;
 726                 else
 727                         bdp++;
 728         }
 729         pinfo->tx_cur = bdp;
 730
 731         if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
 732                 uart_write_wakeup(port);
 733
 734         if (uart_circ_empty(xmit)) {
 735                 cpm_uart_stop_tx(port);
 736                 return 0;
 737         }
 738
 739         return 1;
 740 }
 741
 742 /*
 743  * init buffer descriptors
 744  */
 745 static void cpm_uart_initbd(struct uart_cpm_port *pinfo)
 746 {
 747         int i;
 748         u8 *mem_addr;
 749         cbd_t __iomem *bdp;
 750
 751         pr_debug("CPM uart[%d]:initbd\n", pinfo->port.line);
 752
 753         /* Set the physical address of the host memory
 754          * buffers in the buffer descriptors, and the
 755          * virtual address for us to work with.
 756          */
 757         mem_addr = pinfo->mem_addr;
 758         bdp = pinfo->rx_cur = pinfo->rx_bd_base;
 759         for (i = 0; i < (pinfo->rx_nrfifos - 1); i++, bdp++) {
 760                 out_be32(&bdp->cbd_bufaddr, cpu2cpm_addr(mem_addr, pinfo));
 761                 out_be16(&bdp->cbd_sc, BD_SC_EMPTY | BD_SC_INTRPT);
 762                 mem_addr += pinfo->rx_fifosize;
 763         }
 764
 765         out_be32(&bdp->cbd_bufaddr, cpu2cpm_addr(mem_addr, pinfo));
 766         out_be16(&bdp->cbd_sc, BD_SC_WRAP | BD_SC_EMPTY | BD_SC_INTRPT);
 767
 768         /* Set the physical address of the host memory
 769          * buffers in the buffer descriptors, and the
 770          * virtual address for us to work with.
 771          */
 772         mem_addr = pinfo->mem_addr + L1_CACHE_ALIGN(pinfo->rx_nrfifos * pinfo->rx_fifosize);
 773         bdp = pinfo->tx_cur = pinfo->tx_bd_base;
 774         for (i = 0; i < (pinfo->tx_nrfifos - 1); i++, bdp++) {
 775                 out_be32(&bdp->cbd_bufaddr, cpu2cpm_addr(mem_addr, pinfo));
 776                 out_be16(&bdp->cbd_sc, BD_SC_INTRPT);
 777                 mem_addr += pinfo->tx_fifosize;
 778         }
 779
 780         out_be32(&bdp->cbd_bufaddr, cpu2cpm_addr(mem_addr, pinfo));
 781         out_be16(&bdp->cbd_sc, BD_SC_WRAP | BD_SC_INTRPT);
 782 }
 783
 784 static void cpm_uart_init_scc(struct uart_cpm_port *pinfo)
 785 {
 786         scc_t __iomem *scp;
 787         scc_uart_t __iomem *sup;
 788
 789         pr_debug("CPM uart[%d]:init_scc\n", pinfo->port.line);
 790
 791         scp = pinfo->sccp;
 792         sup = pinfo->sccup;
 793
 794         /* Store address */
 795         out_be16(&pinfo->sccup->scc_genscc.scc_rbase,
 796                  (u8 __iomem *)pinfo->rx_bd_base - DPRAM_BASE);
 797         out_be16(&pinfo->sccup->scc_genscc.scc_tbase,
 798                  (u8 __iomem *)pinfo->tx_bd_base - DPRAM_BASE);
 799
 800         /* Set up the uart parameters in the
 801          * parameter ram.
 802          */
 803
 804         cpm_set_scc_fcr(sup);
 805
 806         out_be16(&sup->scc_genscc.scc_mrblr, pinfo->rx_fifosize);
 807         out_be16(&sup->scc_maxidl, 0x10);
 808         out_be16(&sup->scc_brkcr, 1);
 809         out_be16(&sup->scc_parec, 0);
 810         out_be16(&sup->scc_frmec, 0);
 811         out_be16(&sup->scc_nosec, 0);
 812         out_be16(&sup->scc_brkec, 0);
 813         out_be16(&sup->scc_uaddr1, 0);
 814         out_be16(&sup->scc_uaddr2, 0);
 815         out_be16(&sup->scc_toseq, 0);
 816         out_be16(&sup->scc_char1, 0x8000);
 817         out_be16(&sup->scc_char2, 0x8000);
 818         out_be16(&sup->scc_char3, 0x8000);
 819         out_be16(&sup->scc_char4, 0x8000);
 820         out_be16(&sup->scc_char5, 0x8000);
 821         out_be16(&sup->scc_char6, 0x8000);
 822         out_be16(&sup->scc_char7, 0x8000);
 823         out_be16(&sup->scc_char8, 0x8000);
 824         out_be16(&sup->scc_rccm, 0xc0ff);
 825
 826         /* Send the CPM an initialize command.
 827          */
 828         cpm_line_cr_cmd(pinfo, CPM_CR_INIT_TRX);
 829
 830         /* Set UART mode, 8 bit, no parity, one stop.
 831          * Enable receive and transmit.
 832          */
 833         out_be32(&scp->scc_gsmrh, 0);
 834         out_be32(&scp->scc_gsmrl,
 835                  SCC_GSMRL_MODE_UART | SCC_GSMRL_TDCR_16 | SCC_GSMRL_RDCR_16);
 836
 837         /* Enable rx interrupts  and clear all pending events.  */
 838         out_be16(&scp->scc_sccm, 0);
 839         out_be16(&scp->scc_scce, 0xffff);
 840         out_be16(&scp->scc_dsr, 0x7e7e);
 841         out_be16(&scp->scc_psmr, 0x3000);
 842
 843         setbits32(&scp->scc_gsmrl, SCC_GSMRL_ENR | SCC_GSMRL_ENT);
 844 }
 845
 846 static void cpm_uart_init_smc(struct uart_cpm_port *pinfo)
 847 {
 848         smc_t __iomem *sp;
 849         smc_uart_t __iomem *up;
 850
 851         pr_debug("CPM uart[%d]:init_smc\n", pinfo->port.line);
 852
 853         sp = pinfo->smcp;
 854         up = pinfo->smcup;
 855
 856         /* Store address */
 857         out_be16(&pinfo->smcup->smc_rbase,
 858                  (u8 __iomem *)pinfo->rx_bd_base - DPRAM_BASE);
 859         out_be16(&pinfo->smcup->smc_tbase,
 860                  (u8 __iomem *)pinfo->tx_bd_base - DPRAM_BASE);
 861
 862 /*
 863  *  In case SMC is being relocated...
 864  */
 865         out_be16(&up->smc_rbptr, in_be16(&pinfo->smcup->smc_rbase));
 866         out_be16(&up->smc_tbptr, in_be16(&pinfo->smcup->smc_tbase));
 867         out_be32(&up->smc_rstate, 0);
 868         out_be32(&up->smc_tstate, 0);
 869         out_be16(&up->smc_brkcr, 1);              /* number of break chars */
 870         out_be16(&up->smc_brkec, 0);
 871
 872         /* Set up the uart parameters in the
 873          * parameter ram.
 874          */
 875         cpm_set_smc_fcr(up);
 876
 877         /* Using idle character time requires some additional tuning.  */
 878         out_be16(&up->smc_mrblr, pinfo->rx_fifosize);
 879         out_be16(&up->smc_maxidl, 0x10);
 880         out_be16(&up->smc_brklen, 0);
 881         out_be16(&up->smc_brkec, 0);
 882         out_be16(&up->smc_brkcr, 1);
 883
 884         /* Set UART mode, 8 bit, no parity, one stop.
 885          * Enable receive and transmit.
 886          */
 887         out_be16(&sp->smc_smcmr, smcr_mk_clen(9) | SMCMR_SM_UART);
 888
 889         /* Enable only rx interrupts clear all pending events. */
 890         out_8(&sp->smc_smcm, 0);
 891         out_8(&sp->smc_smce, 0xff);
 892
 893         setbits16(&sp->smc_smcmr, SMCMR_REN | SMCMR_TEN);
 894 }
 895
 896 /*
 897  * Initialize port. This is called from early_console stuff
 898  * so we have to be careful here !
 899  */
 900 static int cpm_uart_request_port(struct uart_port *port)
 901 {
 902         struct uart_cpm_port *pinfo =
 903                 container_of(port, struct uart_cpm_port, port);
 904         int ret;
 905
 906         pr_debug("CPM uart[%d]:request port\n", port->line);
 907
 908         if (pinfo->flags & FLAG_CONSOLE)
 909                 return 0;
 910
 911         if (IS_SMC(pinfo)) {
 912                 clrbits8(&pinfo->smcp->smc_smcm, SMCM_RX | SMCM_TX);
 913                 clrbits16(&pinfo->smcp->smc_smcmr, SMCMR_REN | SMCMR_TEN);
 914         } else {
 915                 clrbits16(&pinfo->sccp->scc_sccm, UART_SCCM_TX | UART_SCCM_RX);
 916                 clrbits32(&pinfo->sccp->scc_gsmrl, SCC_GSMRL_ENR | SCC_GSMRL_ENT);
 917         }
 918
 919         ret = cpm_uart_allocbuf(pinfo, 0);
 920
 921         if (ret)
 922                 return ret;
 923
 924         cpm_uart_initbd(pinfo);
 925         if (IS_SMC(pinfo))
 926                 cpm_uart_init_smc(pinfo);
 927         else
 928                 cpm_uart_init_scc(pinfo);
 929
 930         return 0;
 931 }
 932
 933 static void cpm_uart_release_port(struct uart_port *port)
 934 {
 935         struct uart_cpm_port *pinfo =
 936                 container_of(port, struct uart_cpm_port, port);
 937
 938         if (!(pinfo->flags & FLAG_CONSOLE))
 939                 cpm_uart_freebuf(pinfo);
 940 }
 941
 942 /*
 943  * Configure/autoconfigure the port.
 944  */
 945 static void cpm_uart_config_port(struct uart_port *port, int flags)
 946 {
 947         pr_debug("CPM uart[%d]:config_port\n", port->line);
 948
 949         if (flags & UART_CONFIG_TYPE) {
 950                 port->type = PORT_CPM;
 951                 cpm_uart_request_port(port);
 952         }
 953 }
 954
 955 #if defined(CONFIG_CONSOLE_POLL) || defined(CONFIG_SERIAL_CPM_CONSOLE)
 956 /*
 957  * Write a string to the serial port
 958  * Note that this is called with interrupts already disabled
 959  */
 960 static void cpm_uart_early_write(struct uart_cpm_port *pinfo,
 961                 const char *string, u_int count, bool handle_linefeed)
 962 {
 963         unsigned int i;
 964         cbd_t __iomem *bdp, *bdbase;
 965         unsigned char *cpm_outp_addr;
 966
 967         /* Get the address of the host memory buffer.
 968          */
 969         bdp = pinfo->tx_cur;
 970         bdbase = pinfo->tx_bd_base;
 971
 972         /*
 973          * Now, do each character.  This is not as bad as it looks
 974          * since this is a holding FIFO and not a transmitting FIFO.
 975          * We could add the complexity of filling the entire transmit
 976          * buffer, but we would just wait longer between accesses......
 977          */
 978         for (i = 0; i < count; i++, string++) {
 979                 /* Wait for transmitter fifo to empty.
 980                  * Ready indicates output is ready, and xmt is doing
 981                  * that, not that it is ready for us to send.
 982                  */
 983                 while ((in_be16(&bdp->cbd_sc) & BD_SC_READY) != 0)
 984                         ;
 985
 986                 /* Send the character out.
 987                  * If the buffer address is in the CPM DPRAM, don't
 988                  * convert it.
 989                  */
 990                 cpm_outp_addr = cpm2cpu_addr(in_be32(&bdp->cbd_bufaddr),
 991                                         pinfo);
 992                 *cpm_outp_addr = *string;
 993
 994                 out_be16(&bdp->cbd_datlen, 1);
 995                 setbits16(&bdp->cbd_sc, BD_SC_READY);
 996
 997                 if (in_be16(&bdp->cbd_sc) & BD_SC_WRAP)
 998                         bdp = bdbase;
 999                 else
1000                         bdp++;
1001
1002                 /* if a LF, also do CR... */
1003                 if (handle_linefeed && *string == 10) {
1004                         while ((in_be16(&bdp->cbd_sc) & BD_SC_READY) != 0)
1005                                 ;
1006
1007                         cpm_outp_addr = cpm2cpu_addr(in_be32(&bdp->cbd_bufaddr),
1008                                                 pinfo);
1009                         *cpm_outp_addr = 13;
1010
1011                         out_be16(&bdp->cbd_datlen, 1);
1012                         setbits16(&bdp->cbd_sc, BD_SC_READY);
1013
1014                         if (in_be16(&bdp->cbd_sc) & BD_SC_WRAP)
1015                                 bdp = bdbase;
1016                         else
1017                                 bdp++;
1018                 }
1019         }
1020
1021         /*
1022          * Finally, Wait for transmitter & holding register to empty
1023          *  and restore the IER
1024          */
1025         while ((in_be16(&bdp->cbd_sc) & BD_SC_READY) != 0)
1026                 ;
1027
1028         pinfo->tx_cur = bdp;
1029 }
1030 #endif
1031
1032 #ifdef CONFIG_CONSOLE_POLL
1033 /* Serial polling routines for writing and reading from the uart while
1034  * in an interrupt or debug context.
1035  */
1036
1037 #define GDB_BUF_SIZE    512     /* power of 2, please */
1038
1039 static char poll_buf[GDB_BUF_SIZE];
1040 static char *pollp;
1041 static int poll_chars;
1042
1043 static int poll_wait_key(char *obuf, struct uart_cpm_port *pinfo)
1044 {
1045         u_char          c, *cp;
1046         volatile cbd_t  *bdp;
1047         int             i;
1048
1049         /* Get the address of the host memory buffer.
1050          */
1051         bdp = pinfo->rx_cur;
1052         if (bdp->cbd_sc & BD_SC_EMPTY)
1053                 return NO_POLL_CHAR;
1054
1055         /* If the buffer address is in the CPM DPRAM, don't
1056          * convert it.
1057          */
1058         cp = cpm2cpu_addr(bdp->cbd_bufaddr, pinfo);
1059
1060         if (obuf) {
1061                 i = c = bdp->cbd_datlen;
1062                 while (i-- > 0)
1063                         *obuf++ = *cp++;
1064         } else
1065                 c = *cp;
1066         bdp->cbd_sc &= ~(BD_SC_BR | BD_SC_FR | BD_SC_PR | BD_SC_OV | BD_SC_ID);
1067         bdp->cbd_sc |= BD_SC_EMPTY;
1068
1069         if (bdp->cbd_sc & BD_SC_WRAP)
1070                 bdp = pinfo->rx_bd_base;
1071         else
1072                 bdp++;
1073         pinfo->rx_cur = (cbd_t *)bdp;
1074
1075         return (int)c;
1076 }
1077
1078 static int cpm_get_poll_char(struct uart_port *port)
1079 {
1080         struct uart_cpm_port *pinfo =
1081                 container_of(port, struct uart_cpm_port, port);
1082
1083         if (!serial_polled) {
1084                 serial_polled = 1;
1085                 poll_chars = 0;
1086         }
1087         if (poll_chars <= 0) {
1088                 int ret = poll_wait_key(poll_buf, pinfo);
1089
1090                 if (ret == NO_POLL_CHAR)
1091                         return ret;
1092                 poll_chars = ret;
1093                 pollp = poll_buf;
1094         }
1095         poll_chars--;
1096         return *pollp++;
1097 }
1098
1099 static void cpm_put_poll_char(struct uart_port *port,
1100                          unsigned char c)
1101 {
1102         struct uart_cpm_port *pinfo =
1103                 container_of(port, struct uart_cpm_port, port);
1104         static char ch[2];
1105
1106         ch[0] = (char)c;
1107         cpm_uart_early_write(pinfo, ch, 1, false);
1108 }
1109
1110 static struct uart_port *udbg_port;
1111
1112 static void udbg_cpm_putc(char c)
1113 {
1114         if (c == '\n')
1115                 cpm_put_poll_char(udbg_port, '\r');
1116         cpm_put_poll_char(udbg_port, c);
1117 }
1118
1119 static int udbg_cpm_getc_poll(void)
1120 {
1121         int c = cpm_get_poll_char(udbg_port);
1122
1123         return c == NO_POLL_CHAR ? -1 : c;
1124 }
1125
1126 static int udbg_cpm_getc(void)
1127 {
1128         int c;
1129
1130         while ((c = udbg_cpm_getc_poll()) == -1)
1131                 cpu_relax();
1132         return c;
1133 }
1134
1135 #endif /* CONFIG_CONSOLE_POLL */
1136
1137 static const struct uart_ops cpm_uart_pops = {
1138         .tx_empty       = cpm_uart_tx_empty,
1139         .set_mctrl      = cpm_uart_set_mctrl,
1140         .get_mctrl      = cpm_uart_get_mctrl,
1141         .stop_tx        = cpm_uart_stop_tx,
1142         .start_tx       = cpm_uart_start_tx,
1143         .stop_rx        = cpm_uart_stop_rx,
1144         .break_ctl      = cpm_uart_break_ctl,
1145         .startup        = cpm_uart_startup,
1146         .shutdown       = cpm_uart_shutdown,
1147         .set_termios    = cpm_uart_set_termios,
1148         .type           = cpm_uart_type,
1149         .release_port   = cpm_uart_release_port,
1150         .request_port   = cpm_uart_request_port,
1151         .config_port    = cpm_uart_config_port,
1152         .verify_port    = cpm_uart_verify_port,
1153 #ifdef CONFIG_CONSOLE_POLL
1154         .poll_get_char = cpm_get_poll_char,
1155         .poll_put_char = cpm_put_poll_char,
1156 #endif
1157 };
1158
1159 struct uart_cpm_port cpm_uart_ports[UART_NR];
1160
1161 static int cpm_uart_init_port(struct device_node *np,
1162                               struct uart_cpm_port *pinfo)
1163 {
1164         const u32 *data;
1165         void __iomem *mem, *pram;
1166         struct device *dev = pinfo->port.dev;
1167         int len;
1168         int ret;
1169         int i;
1170
1171         data = of_get_property(np, "clock", NULL);
1172         if (data) {
1173                 struct clk *clk = clk_get(NULL, (const char*)data);
1174                 if (!IS_ERR(clk))
1175                         pinfo->clk = clk;
1176         }
1177         if (!pinfo->clk) {
1178                 data = of_get_property(np, "fsl,cpm-brg", &len);
1179                 if (!data || len != 4) {
1180                         printk(KERN_ERR "CPM UART %pOFn has no/invalid "
1181                                         "fsl,cpm-brg property.\n", np);
1182                         return -EINVAL;
1183                 }
1184                 pinfo->brg = *data;
1185         }
1186
1187         data = of_get_property(np, "fsl,cpm-command", &len);
1188         if (!data || len != 4) {
1189                 printk(KERN_ERR "CPM UART %pOFn has no/invalid "
1190                                 "fsl,cpm-command property.\n", np);
1191                 return -EINVAL;
1192         }
1193         pinfo->command = *data;
1194
1195         mem = of_iomap(np, 0);
1196         if (!mem)
1197                 return -ENOMEM;
1198
1199         if (of_device_is_compatible(np, "fsl,cpm1-scc-uart") ||
1200             of_device_is_compatible(np, "fsl,cpm2-scc-uart")) {
1201                 pinfo->sccp = mem;
1202                 pinfo->sccup = pram = cpm_uart_map_pram(pinfo, np);
1203         } else if (of_device_is_compatible(np, "fsl,cpm1-smc-uart") ||
1204                    of_device_is_compatible(np, "fsl,cpm2-smc-uart")) {
1205                 pinfo->flags |= FLAG_SMC;
1206                 pinfo->smcp = mem;
1207                 pinfo->smcup = pram = cpm_uart_map_pram(pinfo, np);
1208         } else {
1209                 ret = -ENODEV;
1210                 goto out_mem;
1211         }
1212
1213         if (!pram) {
1214                 ret = -ENOMEM;
1215                 goto out_mem;
1216         }
1217
1218         pinfo->tx_nrfifos = TX_NUM_FIFO;
1219         pinfo->tx_fifosize = TX_BUF_SIZE;
1220         pinfo->rx_nrfifos = RX_NUM_FIFO;
1221         pinfo->rx_fifosize = RX_BUF_SIZE;
1222
1223         pinfo->port.uartclk = ppc_proc_freq;
1224         pinfo->port.mapbase = (unsigned long)mem;
1225         pinfo->port.type = PORT_CPM;
1226         pinfo->port.ops = &cpm_uart_pops;
1227         pinfo->port.has_sysrq = IS_ENABLED(CONFIG_SERIAL_CPM_CONSOLE);
1228         pinfo->port.iotype = UPIO_MEM;
1229         pinfo->port.fifosize = pinfo->tx_nrfifos * pinfo->tx_fifosize;
1230         spin_lock_init(&pinfo->port.lock);
1231
1232         pinfo->port.irq = irq_of_parse_and_map(np, 0);
1233         if (pinfo->port.irq == NO_IRQ) {
1234                 ret = -EINVAL;
1235                 goto out_pram;
1236         }
1237
1238         for (i = 0; i < NUM_GPIOS; i++) {
1239                 struct gpio_desc *gpiod;
1240
1241                 pinfo->gpios[i] = NULL;
1242
1243                 gpiod = devm_gpiod_get_index_optional(dev, NULL, i, GPIOD_ASIS);
1244
1245                 if (IS_ERR(gpiod)) {
1246                         ret = PTR_ERR(gpiod);
1247                         goto out_irq;
1248                 }
1249
1250                 if (gpiod) {
1251                         if (i == GPIO_RTS || i == GPIO_DTR)
1252                                 ret = gpiod_direction_output(gpiod, 0);
1253                         else
1254                                 ret = gpiod_direction_input(gpiod);
1255                         if (ret) {
1256                                 pr_err("can't set direction for gpio #%d: %d\n",
1257                                         i, ret);
1258                                 continue;
1259                         }
1260                         pinfo->gpios[i] = gpiod;
1261                 }
1262         }
1263
1264 #ifdef CONFIG_PPC_EARLY_DEBUG_CPM
1265 #ifdef CONFIG_CONSOLE_POLL
1266         if (!udbg_port)
1267 #endif
1268                 udbg_putc = NULL;
1269 #endif
1270
1271         return cpm_uart_request_port(&pinfo->port);
1272
1273 out_irq:
1274         irq_dispose_mapping(pinfo->port.irq);
1275 out_pram:
1276         cpm_uart_unmap_pram(pinfo, pram);
1277 out_mem:
1278         iounmap(mem);
1279         return ret;
1280 }
1281
1282 #ifdef CONFIG_SERIAL_CPM_CONSOLE
1283 /*
1284  *      Print a string to the serial port trying not to disturb
1285  *      any possible real use of the port...
1286  *
1287  *      Note that this is called with interrupts already disabled
1288  */
1289 static void cpm_uart_console_write(struct console *co, const char *s,
1290                                    u_int count)
1291 {
1292         struct uart_cpm_port *pinfo = &cpm_uart_ports[co->index];
1293         unsigned long flags;
1294         int nolock = oops_in_progress;
1295
1296         if (unlikely(nolock)) {
1297                 local_irq_save(flags);
1298         } else {
1299                 spin_lock_irqsave(&pinfo->port.lock, flags);
1300         }
1301
1302         cpm_uart_early_write(pinfo, s, count, true);
1303
1304         if (unlikely(nolock)) {
1305                 local_irq_restore(flags);
1306         } else {
1307                 spin_unlock_irqrestore(&pinfo->port.lock, flags);
1308         }
1309 }
1310
1311
1312 static int __init cpm_uart_console_setup(struct console *co, char *options)
1313 {
1314         int baud = 38400;
1315         int bits = 8;
1316         int parity = 'n';
1317         int flow = 'n';
1318         int ret;
1319         struct uart_cpm_port *pinfo;
1320         struct uart_port *port;
1321
1322         struct device_node *np;
1323         int i = 0;
1324
1325         if (co->index >= UART_NR) {
1326                 printk(KERN_ERR "cpm_uart: console index %d too high\n",
1327                        co->index);
1328                 return -ENODEV;
1329         }
1330
1331         for_each_node_by_type(np, "serial") {
1332                 if (!of_device_is_compatible(np, "fsl,cpm1-smc-uart") &&
1333                     !of_device_is_compatible(np, "fsl,cpm1-scc-uart") &&
1334                     !of_device_is_compatible(np, "fsl,cpm2-smc-uart") &&
1335                     !of_device_is_compatible(np, "fsl,cpm2-scc-uart"))
1336                         continue;
1337
1338                 if (i++ == co->index)
1339                         break;
1340         }
1341
1342         if (!np)
1343                 return -ENODEV;
1344
1345         pinfo = &cpm_uart_ports[co->index];
1346
1347         pinfo->flags |= FLAG_CONSOLE;
1348         port = &pinfo->port;
1349
1350         ret = cpm_uart_init_port(np, pinfo);
1351         of_node_put(np);
1352         if (ret)
1353                 return ret;
1354
1355         if (options) {
1356                 uart_parse_options(options, &baud, &parity, &bits, &flow);
1357         } else {
1358                 if ((baud = uart_baudrate()) == -1)
1359                         baud = 9600;
1360         }
1361
1362         if (IS_SMC(pinfo)) {
1363                 out_be16(&pinfo->smcup->smc_brkcr, 0);
1364                 cpm_line_cr_cmd(pinfo, CPM_CR_STOP_TX);
1365                 clrbits8(&pinfo->smcp->smc_smcm, SMCM_RX | SMCM_TX);
1366                 clrbits16(&pinfo->smcp->smc_smcmr, SMCMR_REN | SMCMR_TEN);
1367         } else {
1368                 out_be16(&pinfo->sccup->scc_brkcr, 0);
1369                 cpm_line_cr_cmd(pinfo, CPM_CR_GRA_STOP_TX);
1370                 clrbits16(&pinfo->sccp->scc_sccm, UART_SCCM_TX | UART_SCCM_RX);
1371                 clrbits32(&pinfo->sccp->scc_gsmrl, SCC_GSMRL_ENR | SCC_GSMRL_ENT);
1372         }
1373
1374         ret = cpm_uart_allocbuf(pinfo, 1);
1375
1376         if (ret)
1377                 return ret;
1378
1379         cpm_uart_initbd(pinfo);
1380
1381         if (IS_SMC(pinfo))
1382                 cpm_uart_init_smc(pinfo);
1383         else
1384                 cpm_uart_init_scc(pinfo);
1385
1386         uart_set_options(port, co, baud, parity, bits, flow);
1387         cpm_line_cr_cmd(pinfo, CPM_CR_RESTART_TX);
1388
1389 #ifdef CONFIG_CONSOLE_POLL
1390         if (!udbg_port) {
1391                 udbg_port = &pinfo->port;
1392                 udbg_putc = udbg_cpm_putc;
1393                 udbg_getc = udbg_cpm_getc;
1394                 udbg_getc_poll = udbg_cpm_getc_poll;
1395         }
1396 #endif
1397
1398         return 0;
1399 }
1400
1401 static struct uart_driver cpm_reg;
1402 static struct console cpm_scc_uart_console = {
1403         .name           = "ttyCPM",
1404         .write          = cpm_uart_console_write,
1405         .device         = uart_console_device,
1406         .setup          = cpm_uart_console_setup,
1407         .flags          = CON_PRINTBUFFER,
1408         .index          = -1,
1409         .data           = &cpm_reg,
1410 };
1411
1412 static int __init cpm_uart_console_init(void)
1413 {
1414         cpm_muram_init();
1415         register_console(&cpm_scc_uart_console);
1416         return 0;
1417 }
1418
1419 console_initcall(cpm_uart_console_init);
1420
1421 #define CPM_UART_CONSOLE        &cpm_scc_uart_console
1422 #else
1423 #define CPM_UART_CONSOLE        NULL
1424 #endif
1425
1426 static struct uart_driver cpm_reg = {
1427         .owner          = THIS_MODULE,
1428         .driver_name    = "ttyCPM",
1429         .dev_name       = "ttyCPM",
1430         .major          = SERIAL_CPM_MAJOR,
1431         .minor          = SERIAL_CPM_MINOR,
1432         .cons           = CPM_UART_CONSOLE,
1433         .nr             = UART_NR,
1434 };
1435
1436 static int probe_index;
1437
1438 static int cpm_uart_probe(struct platform_device *ofdev)
1439 {
1440         int index = probe_index++;
1441         struct uart_cpm_port *pinfo = &cpm_uart_ports[index];
1442         int ret;
1443
1444         pinfo->port.line = index;
1445
1446         if (index >= UART_NR)
1447                 return -ENODEV;
1448
1449         platform_set_drvdata(ofdev, pinfo);
1450
1451         /* initialize the device pointer for the port */
1452         pinfo->port.dev = &ofdev->dev;
1453
1454         ret = cpm_uart_init_port(ofdev->dev.of_node, pinfo);
1455         if (ret)
1456                 return ret;
1457
1458         return uart_add_one_port(&cpm_reg, &pinfo->port);
1459 }
1460
1461 static int cpm_uart_remove(struct platform_device *ofdev)
1462 {
1463         struct uart_cpm_port *pinfo = platform_get_drvdata(ofdev);
1464         return uart_remove_one_port(&cpm_reg, &pinfo->port);
1465 }
1466
1467 static const struct of_device_id cpm_uart_match[] = {
1468         {
1469                 .compatible = "fsl,cpm1-smc-uart",
1470         },
1471         {
1472                 .compatible = "fsl,cpm1-scc-uart",
1473         },
1474         {
1475                 .compatible = "fsl,cpm2-smc-uart",
1476         },
1477         {
1478                 .compatible = "fsl,cpm2-scc-uart",
1479         },
1480         {}
1481 };
1482 MODULE_DEVICE_TABLE(of, cpm_uart_match);
1483
1484 static struct platform_driver cpm_uart_driver = {
1485         .driver = {
1486                 .name = "cpm_uart",
1487                 .of_match_table = cpm_uart_match,
1488         },
1489         .probe = cpm_uart_probe,
1490         .remove = cpm_uart_remove,
1491  };
1492
1493 static int __init cpm_uart_init(void)
1494 {
1495         int ret = uart_register_driver(&cpm_reg);
1496         if (ret)
1497                 return ret;
1498
1499         ret = platform_driver_register(&cpm_uart_driver);
1500         if (ret)
1501                 uart_unregister_driver(&cpm_reg);
1502
1503         return ret;
1504 }
1505
1506 static void __exit cpm_uart_exit(void)
1507 {
1508         platform_driver_unregister(&cpm_uart_driver);
1509         uart_unregister_driver(&cpm_reg);
1510 }
1511
1512 module_init(cpm_uart_init);
1513 module_exit(cpm_uart_exit);
1514
1515 MODULE_AUTHOR("Kumar Gala/Antoniou Pantelis");
1516 MODULE_DESCRIPTION("CPM SCC/SMC port driver $Revision: 0.01 $");
1517 MODULE_LICENSE("GPL");
1518 MODULE_ALIAS_CHARDEV(SERIAL_CPM_MAJOR, SERIAL_CPM_MINOR);