2 * NAND flash simulator.
6 * Copyright (C) 2004 Nokia Corporation
8 * Note: NS means "NAND Simulator".
9 * Note: Input means input TO flash chip, output means output FROM chip.
11 * This program is free software; you can redistribute it and/or modify it
12 * under the terms of the GNU General Public License as published by the
13 * Free Software Foundation; either version 2, or (at your option) any later
16 * This program is distributed in the hope that it will be useful, but
17 * WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General
19 * Public License for more details.
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307, USA
26 #define pr_fmt(fmt) "[nandsim]" fmt
28 #include <linux/init.h>
29 #include <linux/types.h>
30 #include <linux/module.h>
31 #include <linux/moduleparam.h>
32 #include <linux/vmalloc.h>
33 #include <linux/math64.h>
34 #include <linux/slab.h>
35 #include <linux/errno.h>
36 #include <linux/string.h>
37 #include <linux/mtd/mtd.h>
38 #include <linux/mtd/rawnand.h>
39 #include <linux/mtd/nand_bch.h>
40 #include <linux/mtd/partitions.h>
41 #include <linux/delay.h>
42 #include <linux/list.h>
43 #include <linux/random.h>
44 #include <linux/sched.h>
45 #include <linux/sched/mm.h>
47 #include <linux/pagemap.h>
48 #include <linux/seq_file.h>
49 #include <linux/debugfs.h>
51 /* Default simulator parameters values */
52 #if !defined(CONFIG_NANDSIM_FIRST_ID_BYTE) || \
53 !defined(CONFIG_NANDSIM_SECOND_ID_BYTE) || \
54 !defined(CONFIG_NANDSIM_THIRD_ID_BYTE) || \
55 !defined(CONFIG_NANDSIM_FOURTH_ID_BYTE)
56 #define CONFIG_NANDSIM_FIRST_ID_BYTE 0x98
57 #define CONFIG_NANDSIM_SECOND_ID_BYTE 0x39
58 #define CONFIG_NANDSIM_THIRD_ID_BYTE 0xFF /* No byte */
59 #define CONFIG_NANDSIM_FOURTH_ID_BYTE 0xFF /* No byte */
62 #ifndef CONFIG_NANDSIM_ACCESS_DELAY
63 #define CONFIG_NANDSIM_ACCESS_DELAY 25
65 #ifndef CONFIG_NANDSIM_PROGRAMM_DELAY
66 #define CONFIG_NANDSIM_PROGRAMM_DELAY 200
68 #ifndef CONFIG_NANDSIM_ERASE_DELAY
69 #define CONFIG_NANDSIM_ERASE_DELAY 2
71 #ifndef CONFIG_NANDSIM_OUTPUT_CYCLE
72 #define CONFIG_NANDSIM_OUTPUT_CYCLE 40
74 #ifndef CONFIG_NANDSIM_INPUT_CYCLE
75 #define CONFIG_NANDSIM_INPUT_CYCLE 50
77 #ifndef CONFIG_NANDSIM_BUS_WIDTH
78 #define CONFIG_NANDSIM_BUS_WIDTH 8
80 #ifndef CONFIG_NANDSIM_DO_DELAYS
81 #define CONFIG_NANDSIM_DO_DELAYS 0
83 #ifndef CONFIG_NANDSIM_LOG
84 #define CONFIG_NANDSIM_LOG 0
86 #ifndef CONFIG_NANDSIM_DBG
87 #define CONFIG_NANDSIM_DBG 0
89 #ifndef CONFIG_NANDSIM_MAX_PARTS
90 #define CONFIG_NANDSIM_MAX_PARTS 32
93 static uint access_delay = CONFIG_NANDSIM_ACCESS_DELAY;
94 static uint programm_delay = CONFIG_NANDSIM_PROGRAMM_DELAY;
95 static uint erase_delay = CONFIG_NANDSIM_ERASE_DELAY;
96 static uint output_cycle = CONFIG_NANDSIM_OUTPUT_CYCLE;
97 static uint input_cycle = CONFIG_NANDSIM_INPUT_CYCLE;
98 static uint bus_width = CONFIG_NANDSIM_BUS_WIDTH;
99 static uint do_delays = CONFIG_NANDSIM_DO_DELAYS;
100 static uint log = CONFIG_NANDSIM_LOG;
101 static uint dbg = CONFIG_NANDSIM_DBG;
102 static unsigned long parts[CONFIG_NANDSIM_MAX_PARTS];
103 static unsigned int parts_num;
104 static char *badblocks = NULL;
105 static char *weakblocks = NULL;
106 static char *weakpages = NULL;
107 static unsigned int bitflips = 0;
108 static char *gravepages = NULL;
109 static unsigned int overridesize = 0;
110 static char *cache_file = NULL;
111 static unsigned int bbt;
112 static unsigned int bch;
113 static u_char id_bytes[8] = {
114 [0] = CONFIG_NANDSIM_FIRST_ID_BYTE,
115 [1] = CONFIG_NANDSIM_SECOND_ID_BYTE,
116 [2] = CONFIG_NANDSIM_THIRD_ID_BYTE,
117 [3] = CONFIG_NANDSIM_FOURTH_ID_BYTE,
121 module_param_array(id_bytes, byte, NULL, 0400);
122 module_param_named(first_id_byte, id_bytes[0], byte, 0400);
123 module_param_named(second_id_byte, id_bytes[1], byte, 0400);
124 module_param_named(third_id_byte, id_bytes[2], byte, 0400);
125 module_param_named(fourth_id_byte, id_bytes[3], byte, 0400);
126 module_param(access_delay, uint, 0400);
127 module_param(programm_delay, uint, 0400);
128 module_param(erase_delay, uint, 0400);
129 module_param(output_cycle, uint, 0400);
130 module_param(input_cycle, uint, 0400);
131 module_param(bus_width, uint, 0400);
132 module_param(do_delays, uint, 0400);
133 module_param(log, uint, 0400);
134 module_param(dbg, uint, 0400);
135 module_param_array(parts, ulong, &parts_num, 0400);
136 module_param(badblocks, charp, 0400);
137 module_param(weakblocks, charp, 0400);
138 module_param(weakpages, charp, 0400);
139 module_param(bitflips, uint, 0400);
140 module_param(gravepages, charp, 0400);
141 module_param(overridesize, uint, 0400);
142 module_param(cache_file, charp, 0400);
143 module_param(bbt, uint, 0400);
144 module_param(bch, uint, 0400);
146 MODULE_PARM_DESC(id_bytes, "The ID bytes returned by NAND Flash 'read ID' command");
147 MODULE_PARM_DESC(first_id_byte, "The first byte returned by NAND Flash 'read ID' command (manufacturer ID) (obsolete)");
148 MODULE_PARM_DESC(second_id_byte, "The second byte returned by NAND Flash 'read ID' command (chip ID) (obsolete)");
149 MODULE_PARM_DESC(third_id_byte, "The third byte returned by NAND Flash 'read ID' command (obsolete)");
150 MODULE_PARM_DESC(fourth_id_byte, "The fourth byte returned by NAND Flash 'read ID' command (obsolete)");
151 MODULE_PARM_DESC(access_delay, "Initial page access delay (microseconds)");
152 MODULE_PARM_DESC(programm_delay, "Page programm delay (microseconds");
153 MODULE_PARM_DESC(erase_delay, "Sector erase delay (milliseconds)");
154 MODULE_PARM_DESC(output_cycle, "Word output (from flash) time (nanoseconds)");
155 MODULE_PARM_DESC(input_cycle, "Word input (to flash) time (nanoseconds)");
156 MODULE_PARM_DESC(bus_width, "Chip's bus width (8- or 16-bit)");
157 MODULE_PARM_DESC(do_delays, "Simulate NAND delays using busy-waits if not zero");
158 MODULE_PARM_DESC(log, "Perform logging if not zero");
159 MODULE_PARM_DESC(dbg, "Output debug information if not zero");
160 MODULE_PARM_DESC(parts, "Partition sizes (in erase blocks) separated by commas");
161 /* Page and erase block positions for the following parameters are independent of any partitions */
162 MODULE_PARM_DESC(badblocks, "Erase blocks that are initially marked bad, separated by commas");
163 MODULE_PARM_DESC(weakblocks, "Weak erase blocks [: remaining erase cycles (defaults to 3)]"
164 " separated by commas e.g. 113:2 means eb 113"
165 " can be erased only twice before failing");
166 MODULE_PARM_DESC(weakpages, "Weak pages [: maximum writes (defaults to 3)]"
167 " separated by commas e.g. 1401:2 means page 1401"
168 " can be written only twice before failing");
169 MODULE_PARM_DESC(bitflips, "Maximum number of random bit flips per page (zero by default)");
170 MODULE_PARM_DESC(gravepages, "Pages that lose data [: maximum reads (defaults to 3)]"
171 " separated by commas e.g. 1401:2 means page 1401"
172 " can be read only twice before failing");
173 MODULE_PARM_DESC(overridesize, "Specifies the NAND Flash size overriding the ID bytes. "
174 "The size is specified in erase blocks and as the exponent of a power of two"
175 " e.g. 5 means a size of 32 erase blocks");
176 MODULE_PARM_DESC(cache_file, "File to use to cache nand pages instead of memory");
177 MODULE_PARM_DESC(bbt, "0 OOB, 1 BBT with marker in OOB, 2 BBT with marker in data area");
178 MODULE_PARM_DESC(bch, "Enable BCH ecc and set how many bits should "
179 "be correctable in 512-byte blocks");
181 /* The largest possible page size */
182 #define NS_LARGEST_PAGE_SIZE 4096
184 /* Simulator's output macros (logging, debugging, warning, error) */
185 #define NS_LOG(args...) \
186 do { if (log) pr_debug(" log: " args); } while(0)
187 #define NS_DBG(args...) \
188 do { if (dbg) pr_debug(" debug: " args); } while(0)
189 #define NS_WARN(args...) \
190 do { pr_warn(" warning: " args); } while(0)
191 #define NS_ERR(args...) \
192 do { pr_err(" error: " args); } while(0)
193 #define NS_INFO(args...) \
194 do { pr_info(" " args); } while(0)
196 /* Busy-wait delay macros (microseconds, milliseconds) */
197 #define NS_UDELAY(us) \
198 do { if (do_delays) udelay(us); } while(0)
199 #define NS_MDELAY(us) \
200 do { if (do_delays) mdelay(us); } while(0)
202 /* Is the nandsim structure initialized ? */
203 #define NS_IS_INITIALIZED(ns) ((ns)->geom.totsz != 0)
205 /* Good operation completion status */
206 #define NS_STATUS_OK(ns) (NAND_STATUS_READY | (NAND_STATUS_WP * ((ns)->lines.wp == 0)))
208 /* Operation failed completion status */
209 #define NS_STATUS_FAILED(ns) (NAND_STATUS_FAIL | NS_STATUS_OK(ns))
211 /* Calculate the page offset in flash RAM image by (row, column) address */
212 #define NS_RAW_OFFSET(ns) \
213 (((ns)->regs.row * (ns)->geom.pgszoob) + (ns)->regs.column)
215 /* Calculate the OOB offset in flash RAM image by (row, column) address */
216 #define NS_RAW_OFFSET_OOB(ns) (NS_RAW_OFFSET(ns) + ns->geom.pgsz)
218 /* After a command is input, the simulator goes to one of the following states */
219 #define STATE_CMD_READ0 0x00000001 /* read data from the beginning of page */
220 #define STATE_CMD_READ1 0x00000002 /* read data from the second half of page */
221 #define STATE_CMD_READSTART 0x00000003 /* read data second command (large page devices) */
222 #define STATE_CMD_PAGEPROG 0x00000004 /* start page program */
223 #define STATE_CMD_READOOB 0x00000005 /* read OOB area */
224 #define STATE_CMD_ERASE1 0x00000006 /* sector erase first command */
225 #define STATE_CMD_STATUS 0x00000007 /* read status */
226 #define STATE_CMD_SEQIN 0x00000009 /* sequential data input */
227 #define STATE_CMD_READID 0x0000000A /* read ID */
228 #define STATE_CMD_ERASE2 0x0000000B /* sector erase second command */
229 #define STATE_CMD_RESET 0x0000000C /* reset */
230 #define STATE_CMD_RNDOUT 0x0000000D /* random output command */
231 #define STATE_CMD_RNDOUTSTART 0x0000000E /* random output start command */
232 #define STATE_CMD_MASK 0x0000000F /* command states mask */
234 /* After an address is input, the simulator goes to one of these states */
235 #define STATE_ADDR_PAGE 0x00000010 /* full (row, column) address is accepted */
236 #define STATE_ADDR_SEC 0x00000020 /* sector address was accepted */
237 #define STATE_ADDR_COLUMN 0x00000030 /* column address was accepted */
238 #define STATE_ADDR_ZERO 0x00000040 /* one byte zero address was accepted */
239 #define STATE_ADDR_MASK 0x00000070 /* address states mask */
241 /* During data input/output the simulator is in these states */
242 #define STATE_DATAIN 0x00000100 /* waiting for data input */
243 #define STATE_DATAIN_MASK 0x00000100 /* data input states mask */
245 #define STATE_DATAOUT 0x00001000 /* waiting for page data output */
246 #define STATE_DATAOUT_ID 0x00002000 /* waiting for ID bytes output */
247 #define STATE_DATAOUT_STATUS 0x00003000 /* waiting for status output */
248 #define STATE_DATAOUT_MASK 0x00007000 /* data output states mask */
250 /* Previous operation is done, ready to accept new requests */
251 #define STATE_READY 0x00000000
253 /* This state is used to mark that the next state isn't known yet */
254 #define STATE_UNKNOWN 0x10000000
256 /* Simulator's actions bit masks */
257 #define ACTION_CPY 0x00100000 /* copy page/OOB to the internal buffer */
258 #define ACTION_PRGPAGE 0x00200000 /* program the internal buffer to flash */
259 #define ACTION_SECERASE 0x00300000 /* erase sector */
260 #define ACTION_ZEROOFF 0x00400000 /* don't add any offset to address */
261 #define ACTION_HALFOFF 0x00500000 /* add to address half of page */
262 #define ACTION_OOBOFF 0x00600000 /* add to address OOB offset */
263 #define ACTION_MASK 0x00700000 /* action mask */
265 #define NS_OPER_NUM 13 /* Number of operations supported by the simulator */
266 #define NS_OPER_STATES 6 /* Maximum number of states in operation */
268 #define OPT_ANY 0xFFFFFFFF /* any chip supports this operation */
269 #define OPT_PAGE512 0x00000002 /* 512-byte page chips */
270 #define OPT_PAGE2048 0x00000008 /* 2048-byte page chips */
271 #define OPT_PAGE512_8BIT 0x00000040 /* 512-byte page chips with 8-bit bus width */
272 #define OPT_PAGE4096 0x00000080 /* 4096-byte page chips */
273 #define OPT_LARGEPAGE (OPT_PAGE2048 | OPT_PAGE4096) /* 2048 & 4096-byte page chips */
274 #define OPT_SMALLPAGE (OPT_PAGE512) /* 512-byte page chips */
276 /* Remove action bits from state */
277 #define NS_STATE(x) ((x) & ~ACTION_MASK)
280 * Maximum previous states which need to be saved. Currently saving is
281 * only needed for page program operation with preceded read command
282 * (which is only valid for 512-byte pages).
284 #define NS_MAX_PREVSTATES 1
286 /* Maximum page cache pages needed to read or write a NAND page to the cache_file */
287 #define NS_MAX_HELD_PAGES 16
290 * A union to represent flash memory contents and flash buffer.
293 u_char *byte; /* for byte access */
294 uint16_t *word; /* for 16-bit word access */
298 * The structure which describes all the internal simulator data.
301 struct nand_chip chip;
302 struct nand_controller base;
303 struct mtd_partition partitions[CONFIG_NANDSIM_MAX_PARTS];
304 unsigned int nbparts;
306 uint busw; /* flash chip bus width (8 or 16) */
307 u_char ids[8]; /* chip's ID bytes */
308 uint32_t options; /* chip's characteristic bits */
309 uint32_t state; /* current chip state */
310 uint32_t nxstate; /* next expected state */
312 uint32_t *op; /* current operation, NULL operations isn't known yet */
313 uint32_t pstates[NS_MAX_PREVSTATES]; /* previous states */
314 uint16_t npstates; /* number of previous states saved */
315 uint16_t stateidx; /* current state index */
317 /* The simulated NAND flash pages array */
320 /* Slab allocator for nand pages */
321 struct kmem_cache *nand_pages_slab;
323 /* Internal buffer of page + OOB size bytes */
326 /* NAND flash "geometry" */
328 uint64_t totsz; /* total flash size, bytes */
329 uint32_t secsz; /* flash sector (erase block) size, bytes */
330 uint pgsz; /* NAND flash page size, bytes */
331 uint oobsz; /* page OOB area size, bytes */
332 uint64_t totszoob; /* total flash size including OOB, bytes */
333 uint pgszoob; /* page size including OOB , bytes*/
334 uint secszoob; /* sector size including OOB, bytes */
335 uint pgnum; /* total number of pages */
336 uint pgsec; /* number of pages per sector */
337 uint secshift; /* bits number in sector size */
338 uint pgshift; /* bits number in page size */
339 uint pgaddrbytes; /* bytes per page address */
340 uint secaddrbytes; /* bytes per sector address */
341 uint idbytes; /* the number ID bytes that this chip outputs */
344 /* NAND flash internal registers */
346 unsigned command; /* the command register */
347 u_char status; /* the status register */
348 uint row; /* the page number */
349 uint column; /* the offset within page */
350 uint count; /* internal counter */
351 uint num; /* number of bytes which must be processed */
352 uint off; /* fixed page offset */
355 /* NAND flash lines state */
357 int ce; /* chip Enable */
358 int cle; /* command Latch Enable */
359 int ale; /* address Latch Enable */
360 int wp; /* write Protect */
363 /* Fields needed when using a cache file */
364 struct file *cfile; /* Open file */
365 unsigned long *pages_written; /* Which pages have been written */
367 struct page *held_pages[NS_MAX_HELD_PAGES];
372 * Operations array. To perform any operation the simulator must pass
373 * through the correspondent states chain.
375 static struct nandsim_operations {
376 uint32_t reqopts; /* options which are required to perform the operation */
377 uint32_t states[NS_OPER_STATES]; /* operation's states */
378 } ops[NS_OPER_NUM] = {
379 /* Read page + OOB from the beginning */
380 {OPT_SMALLPAGE, {STATE_CMD_READ0 | ACTION_ZEROOFF, STATE_ADDR_PAGE | ACTION_CPY,
381 STATE_DATAOUT, STATE_READY}},
382 /* Read page + OOB from the second half */
383 {OPT_PAGE512_8BIT, {STATE_CMD_READ1 | ACTION_HALFOFF, STATE_ADDR_PAGE | ACTION_CPY,
384 STATE_DATAOUT, STATE_READY}},
386 {OPT_SMALLPAGE, {STATE_CMD_READOOB | ACTION_OOBOFF, STATE_ADDR_PAGE | ACTION_CPY,
387 STATE_DATAOUT, STATE_READY}},
388 /* Program page starting from the beginning */
389 {OPT_ANY, {STATE_CMD_SEQIN, STATE_ADDR_PAGE, STATE_DATAIN,
390 STATE_CMD_PAGEPROG | ACTION_PRGPAGE, STATE_READY}},
391 /* Program page starting from the beginning */
392 {OPT_SMALLPAGE, {STATE_CMD_READ0, STATE_CMD_SEQIN | ACTION_ZEROOFF, STATE_ADDR_PAGE,
393 STATE_DATAIN, STATE_CMD_PAGEPROG | ACTION_PRGPAGE, STATE_READY}},
394 /* Program page starting from the second half */
395 {OPT_PAGE512, {STATE_CMD_READ1, STATE_CMD_SEQIN | ACTION_HALFOFF, STATE_ADDR_PAGE,
396 STATE_DATAIN, STATE_CMD_PAGEPROG | ACTION_PRGPAGE, STATE_READY}},
398 {OPT_SMALLPAGE, {STATE_CMD_READOOB, STATE_CMD_SEQIN | ACTION_OOBOFF, STATE_ADDR_PAGE,
399 STATE_DATAIN, STATE_CMD_PAGEPROG | ACTION_PRGPAGE, STATE_READY}},
401 {OPT_ANY, {STATE_CMD_ERASE1, STATE_ADDR_SEC, STATE_CMD_ERASE2 | ACTION_SECERASE, STATE_READY}},
403 {OPT_ANY, {STATE_CMD_STATUS, STATE_DATAOUT_STATUS, STATE_READY}},
405 {OPT_ANY, {STATE_CMD_READID, STATE_ADDR_ZERO, STATE_DATAOUT_ID, STATE_READY}},
406 /* Large page devices read page */
407 {OPT_LARGEPAGE, {STATE_CMD_READ0, STATE_ADDR_PAGE, STATE_CMD_READSTART | ACTION_CPY,
408 STATE_DATAOUT, STATE_READY}},
409 /* Large page devices random page read */
410 {OPT_LARGEPAGE, {STATE_CMD_RNDOUT, STATE_ADDR_COLUMN, STATE_CMD_RNDOUTSTART | ACTION_CPY,
411 STATE_DATAOUT, STATE_READY}},
415 struct list_head list;
416 unsigned int erase_block_no;
417 unsigned int max_erases;
418 unsigned int erases_done;
421 static LIST_HEAD(weak_blocks);
424 struct list_head list;
425 unsigned int page_no;
426 unsigned int max_writes;
427 unsigned int writes_done;
430 static LIST_HEAD(weak_pages);
433 struct list_head list;
434 unsigned int page_no;
435 unsigned int max_reads;
436 unsigned int reads_done;
439 static LIST_HEAD(grave_pages);
441 static unsigned long *erase_block_wear = NULL;
442 static unsigned int wear_eb_count = 0;
443 static unsigned long total_wear = 0;
445 /* MTD structure for NAND controller */
446 static struct mtd_info *nsmtd;
448 static int nandsim_show(struct seq_file *m, void *private)
450 unsigned long wmin = -1, wmax = 0, avg;
451 unsigned long deciles[10], decile_max[10], tot = 0;
454 /* Calc wear stats */
455 for (i = 0; i < wear_eb_count; ++i) {
456 unsigned long wear = erase_block_wear[i];
464 for (i = 0; i < 9; ++i) {
466 decile_max[i] = (wmax * (i + 1) + 5) / 10;
469 decile_max[9] = wmax;
470 for (i = 0; i < wear_eb_count; ++i) {
472 unsigned long wear = erase_block_wear[i];
473 for (d = 0; d < 10; ++d)
474 if (wear <= decile_max[d]) {
479 avg = tot / wear_eb_count;
481 /* Output wear report */
482 seq_printf(m, "Total numbers of erases: %lu\n", tot);
483 seq_printf(m, "Number of erase blocks: %u\n", wear_eb_count);
484 seq_printf(m, "Average number of erases: %lu\n", avg);
485 seq_printf(m, "Maximum number of erases: %lu\n", wmax);
486 seq_printf(m, "Minimum number of erases: %lu\n", wmin);
487 for (i = 0; i < 10; ++i) {
488 unsigned long from = (i ? decile_max[i - 1] + 1 : 0);
489 if (from > decile_max[i])
491 seq_printf(m, "Number of ebs with erase counts from %lu to %lu : %lu\n",
499 DEFINE_SHOW_ATTRIBUTE(nandsim);
502 * nandsim_debugfs_create - initialize debugfs
503 * @dev: nandsim device description object
505 * This function creates all debugfs files for UBI device @ubi. Returns zero in
506 * case of success and a negative error code in case of failure.
508 static int nandsim_debugfs_create(struct nandsim *dev)
510 struct dentry *root = nsmtd->dbg.dfs_dir;
514 * Just skip debugfs initialization when the debugfs directory is
517 if (IS_ERR_OR_NULL(root)) {
518 if (IS_ENABLED(CONFIG_DEBUG_FS) &&
519 !IS_ENABLED(CONFIG_MTD_PARTITIONED_MASTER))
520 NS_WARN("CONFIG_MTD_PARTITIONED_MASTER must be enabled to expose debugfs stuff\n");
524 dent = debugfs_create_file("nandsim_wear_report", S_IRUSR,
525 root, dev, &nandsim_fops);
526 if (IS_ERR_OR_NULL(dent)) {
527 NS_ERR("cannot create \"nandsim_wear_report\" debugfs entry\n");
535 * Allocate array of page pointers, create slab allocation for an array
536 * and initialize the array by NULL pointers.
538 * RETURNS: 0 if success, -ENOMEM if memory alloc fails.
540 static int __init alloc_device(struct nandsim *ns)
546 cfile = filp_open(cache_file, O_CREAT | O_RDWR | O_LARGEFILE, 0600);
548 return PTR_ERR(cfile);
549 if (!(cfile->f_mode & FMODE_CAN_READ)) {
550 NS_ERR("alloc_device: cache file not readable\n");
554 if (!(cfile->f_mode & FMODE_CAN_WRITE)) {
555 NS_ERR("alloc_device: cache file not writeable\n");
560 vzalloc(array_size(sizeof(unsigned long),
561 BITS_TO_LONGS(ns->geom.pgnum)));
562 if (!ns->pages_written) {
563 NS_ERR("alloc_device: unable to allocate pages written array\n");
567 ns->file_buf = kmalloc(ns->geom.pgszoob, GFP_KERNEL);
569 NS_ERR("alloc_device: unable to allocate file buf\n");
577 ns->pages = vmalloc(array_size(sizeof(union ns_mem), ns->geom.pgnum));
579 NS_ERR("alloc_device: unable to allocate page array\n");
582 for (i = 0; i < ns->geom.pgnum; i++) {
583 ns->pages[i].byte = NULL;
585 ns->nand_pages_slab = kmem_cache_create("nandsim",
586 ns->geom.pgszoob, 0, 0, NULL);
587 if (!ns->nand_pages_slab) {
588 NS_ERR("cache_create: unable to create kmem_cache\n");
595 vfree(ns->pages_written);
597 filp_close(cfile, NULL);
602 * Free any allocated pages, and free the array of page pointers.
604 static void free_device(struct nandsim *ns)
610 vfree(ns->pages_written);
611 filp_close(ns->cfile, NULL);
616 for (i = 0; i < ns->geom.pgnum; i++) {
617 if (ns->pages[i].byte)
618 kmem_cache_free(ns->nand_pages_slab,
621 kmem_cache_destroy(ns->nand_pages_slab);
626 static char __init *get_partition_name(int i)
628 return kasprintf(GFP_KERNEL, "NAND simulator partition %d", i);
632 * Initialize the nandsim structure.
634 * RETURNS: 0 if success, -ERRNO if failure.
636 static int __init init_nandsim(struct mtd_info *mtd)
638 struct nand_chip *chip = mtd_to_nand(mtd);
639 struct nandsim *ns = nand_get_controller_data(chip);
642 uint64_t next_offset;
644 if (NS_IS_INITIALIZED(ns)) {
645 NS_ERR("init_nandsim: nandsim is already initialized\n");
649 /* Initialize the NAND flash parameters */
650 ns->busw = chip->options & NAND_BUSWIDTH_16 ? 16 : 8;
651 ns->geom.totsz = mtd->size;
652 ns->geom.pgsz = mtd->writesize;
653 ns->geom.oobsz = mtd->oobsize;
654 ns->geom.secsz = mtd->erasesize;
655 ns->geom.pgszoob = ns->geom.pgsz + ns->geom.oobsz;
656 ns->geom.pgnum = div_u64(ns->geom.totsz, ns->geom.pgsz);
657 ns->geom.totszoob = ns->geom.totsz + (uint64_t)ns->geom.pgnum * ns->geom.oobsz;
658 ns->geom.secshift = ffs(ns->geom.secsz) - 1;
659 ns->geom.pgshift = chip->page_shift;
660 ns->geom.pgsec = ns->geom.secsz / ns->geom.pgsz;
661 ns->geom.secszoob = ns->geom.secsz + ns->geom.oobsz * ns->geom.pgsec;
664 if (ns->geom.pgsz == 512) {
665 ns->options |= OPT_PAGE512;
667 ns->options |= OPT_PAGE512_8BIT;
668 } else if (ns->geom.pgsz == 2048) {
669 ns->options |= OPT_PAGE2048;
670 } else if (ns->geom.pgsz == 4096) {
671 ns->options |= OPT_PAGE4096;
673 NS_ERR("init_nandsim: unknown page size %u\n", ns->geom.pgsz);
677 if (ns->options & OPT_SMALLPAGE) {
678 if (ns->geom.totsz <= (32 << 20)) {
679 ns->geom.pgaddrbytes = 3;
680 ns->geom.secaddrbytes = 2;
682 ns->geom.pgaddrbytes = 4;
683 ns->geom.secaddrbytes = 3;
686 if (ns->geom.totsz <= (128 << 20)) {
687 ns->geom.pgaddrbytes = 4;
688 ns->geom.secaddrbytes = 2;
690 ns->geom.pgaddrbytes = 5;
691 ns->geom.secaddrbytes = 3;
695 /* Fill the partition_info structure */
696 if (parts_num > ARRAY_SIZE(ns->partitions)) {
697 NS_ERR("too many partitions.\n");
700 remains = ns->geom.totsz;
702 for (i = 0; i < parts_num; ++i) {
703 uint64_t part_sz = (uint64_t)parts[i] * ns->geom.secsz;
705 if (!part_sz || part_sz > remains) {
706 NS_ERR("bad partition size.\n");
709 ns->partitions[i].name = get_partition_name(i);
710 if (!ns->partitions[i].name) {
711 NS_ERR("unable to allocate memory.\n");
714 ns->partitions[i].offset = next_offset;
715 ns->partitions[i].size = part_sz;
716 next_offset += ns->partitions[i].size;
717 remains -= ns->partitions[i].size;
719 ns->nbparts = parts_num;
721 if (parts_num + 1 > ARRAY_SIZE(ns->partitions)) {
722 NS_ERR("too many partitions.\n");
725 ns->partitions[i].name = get_partition_name(i);
726 if (!ns->partitions[i].name) {
727 NS_ERR("unable to allocate memory.\n");
730 ns->partitions[i].offset = next_offset;
731 ns->partitions[i].size = remains;
736 NS_WARN("16-bit flashes support wasn't tested\n");
738 printk("flash size: %llu MiB\n",
739 (unsigned long long)ns->geom.totsz >> 20);
740 printk("page size: %u bytes\n", ns->geom.pgsz);
741 printk("OOB area size: %u bytes\n", ns->geom.oobsz);
742 printk("sector size: %u KiB\n", ns->geom.secsz >> 10);
743 printk("pages number: %u\n", ns->geom.pgnum);
744 printk("pages per sector: %u\n", ns->geom.pgsec);
745 printk("bus width: %u\n", ns->busw);
746 printk("bits in sector size: %u\n", ns->geom.secshift);
747 printk("bits in page size: %u\n", ns->geom.pgshift);
748 printk("bits in OOB size: %u\n", ffs(ns->geom.oobsz) - 1);
749 printk("flash size with OOB: %llu KiB\n",
750 (unsigned long long)ns->geom.totszoob >> 10);
751 printk("page address bytes: %u\n", ns->geom.pgaddrbytes);
752 printk("sector address bytes: %u\n", ns->geom.secaddrbytes);
753 printk("options: %#x\n", ns->options);
755 if ((ret = alloc_device(ns)) != 0)
758 /* Allocate / initialize the internal buffer */
759 ns->buf.byte = kmalloc(ns->geom.pgszoob, GFP_KERNEL);
761 NS_ERR("init_nandsim: unable to allocate %u bytes for the internal buffer\n",
765 memset(ns->buf.byte, 0xFF, ns->geom.pgszoob);
771 * Free the nandsim structure.
773 static void free_nandsim(struct nandsim *ns)
781 static int parse_badblocks(struct nandsim *ns, struct mtd_info *mtd)
785 unsigned int erase_block_no;
792 zero_ok = (*w == '0' ? 1 : 0);
793 erase_block_no = simple_strtoul(w, &w, 0);
794 if (!zero_ok && !erase_block_no) {
795 NS_ERR("invalid badblocks.\n");
798 offset = (loff_t)erase_block_no * ns->geom.secsz;
799 if (mtd_block_markbad(mtd, offset)) {
800 NS_ERR("invalid badblocks.\n");
809 static int parse_weakblocks(void)
813 unsigned int erase_block_no;
814 unsigned int max_erases;
815 struct weak_block *wb;
821 zero_ok = (*w == '0' ? 1 : 0);
822 erase_block_no = simple_strtoul(w, &w, 0);
823 if (!zero_ok && !erase_block_no) {
824 NS_ERR("invalid weakblocks.\n");
830 max_erases = simple_strtoul(w, &w, 0);
834 wb = kzalloc(sizeof(*wb), GFP_KERNEL);
836 NS_ERR("unable to allocate memory.\n");
839 wb->erase_block_no = erase_block_no;
840 wb->max_erases = max_erases;
841 list_add(&wb->list, &weak_blocks);
846 static int erase_error(unsigned int erase_block_no)
848 struct weak_block *wb;
850 list_for_each_entry(wb, &weak_blocks, list)
851 if (wb->erase_block_no == erase_block_no) {
852 if (wb->erases_done >= wb->max_erases)
854 wb->erases_done += 1;
860 static int parse_weakpages(void)
864 unsigned int page_no;
865 unsigned int max_writes;
866 struct weak_page *wp;
872 zero_ok = (*w == '0' ? 1 : 0);
873 page_no = simple_strtoul(w, &w, 0);
874 if (!zero_ok && !page_no) {
875 NS_ERR("invalid weakpages.\n");
881 max_writes = simple_strtoul(w, &w, 0);
885 wp = kzalloc(sizeof(*wp), GFP_KERNEL);
887 NS_ERR("unable to allocate memory.\n");
890 wp->page_no = page_no;
891 wp->max_writes = max_writes;
892 list_add(&wp->list, &weak_pages);
897 static int write_error(unsigned int page_no)
899 struct weak_page *wp;
901 list_for_each_entry(wp, &weak_pages, list)
902 if (wp->page_no == page_no) {
903 if (wp->writes_done >= wp->max_writes)
905 wp->writes_done += 1;
911 static int parse_gravepages(void)
915 unsigned int page_no;
916 unsigned int max_reads;
917 struct grave_page *gp;
923 zero_ok = (*g == '0' ? 1 : 0);
924 page_no = simple_strtoul(g, &g, 0);
925 if (!zero_ok && !page_no) {
926 NS_ERR("invalid gravepagess.\n");
932 max_reads = simple_strtoul(g, &g, 0);
936 gp = kzalloc(sizeof(*gp), GFP_KERNEL);
938 NS_ERR("unable to allocate memory.\n");
941 gp->page_no = page_no;
942 gp->max_reads = max_reads;
943 list_add(&gp->list, &grave_pages);
948 static int read_error(unsigned int page_no)
950 struct grave_page *gp;
952 list_for_each_entry(gp, &grave_pages, list)
953 if (gp->page_no == page_no) {
954 if (gp->reads_done >= gp->max_reads)
962 static void free_lists(void)
964 struct list_head *pos, *n;
965 list_for_each_safe(pos, n, &weak_blocks) {
967 kfree(list_entry(pos, struct weak_block, list));
969 list_for_each_safe(pos, n, &weak_pages) {
971 kfree(list_entry(pos, struct weak_page, list));
973 list_for_each_safe(pos, n, &grave_pages) {
975 kfree(list_entry(pos, struct grave_page, list));
977 kfree(erase_block_wear);
980 static int setup_wear_reporting(struct mtd_info *mtd)
984 wear_eb_count = div_u64(mtd->size, mtd->erasesize);
985 mem = wear_eb_count * sizeof(unsigned long);
986 if (mem / sizeof(unsigned long) != wear_eb_count) {
987 NS_ERR("Too many erase blocks for wear reporting\n");
990 erase_block_wear = kzalloc(mem, GFP_KERNEL);
991 if (!erase_block_wear) {
992 NS_ERR("Too many erase blocks for wear reporting\n");
998 static void update_wear(unsigned int erase_block_no)
1000 if (!erase_block_wear)
1004 * TODO: Notify this through a debugfs entry,
1005 * instead of showing an error message.
1007 if (total_wear == 0)
1008 NS_ERR("Erase counter total overflow\n");
1009 erase_block_wear[erase_block_no] += 1;
1010 if (erase_block_wear[erase_block_no] == 0)
1011 NS_ERR("Erase counter overflow for erase block %u\n", erase_block_no);
1015 * Returns the string representation of 'state' state.
1017 static char *get_state_name(uint32_t state)
1019 switch (NS_STATE(state)) {
1020 case STATE_CMD_READ0:
1021 return "STATE_CMD_READ0";
1022 case STATE_CMD_READ1:
1023 return "STATE_CMD_READ1";
1024 case STATE_CMD_PAGEPROG:
1025 return "STATE_CMD_PAGEPROG";
1026 case STATE_CMD_READOOB:
1027 return "STATE_CMD_READOOB";
1028 case STATE_CMD_READSTART:
1029 return "STATE_CMD_READSTART";
1030 case STATE_CMD_ERASE1:
1031 return "STATE_CMD_ERASE1";
1032 case STATE_CMD_STATUS:
1033 return "STATE_CMD_STATUS";
1034 case STATE_CMD_SEQIN:
1035 return "STATE_CMD_SEQIN";
1036 case STATE_CMD_READID:
1037 return "STATE_CMD_READID";
1038 case STATE_CMD_ERASE2:
1039 return "STATE_CMD_ERASE2";
1040 case STATE_CMD_RESET:
1041 return "STATE_CMD_RESET";
1042 case STATE_CMD_RNDOUT:
1043 return "STATE_CMD_RNDOUT";
1044 case STATE_CMD_RNDOUTSTART:
1045 return "STATE_CMD_RNDOUTSTART";
1046 case STATE_ADDR_PAGE:
1047 return "STATE_ADDR_PAGE";
1048 case STATE_ADDR_SEC:
1049 return "STATE_ADDR_SEC";
1050 case STATE_ADDR_ZERO:
1051 return "STATE_ADDR_ZERO";
1052 case STATE_ADDR_COLUMN:
1053 return "STATE_ADDR_COLUMN";
1055 return "STATE_DATAIN";
1057 return "STATE_DATAOUT";
1058 case STATE_DATAOUT_ID:
1059 return "STATE_DATAOUT_ID";
1060 case STATE_DATAOUT_STATUS:
1061 return "STATE_DATAOUT_STATUS";
1063 return "STATE_READY";
1065 return "STATE_UNKNOWN";
1068 NS_ERR("get_state_name: unknown state, BUG\n");
1073 * Check if command is valid.
1075 * RETURNS: 1 if wrong command, 0 if right.
1077 static int check_command(int cmd)
1081 case NAND_CMD_READ0:
1082 case NAND_CMD_READ1:
1083 case NAND_CMD_READSTART:
1084 case NAND_CMD_PAGEPROG:
1085 case NAND_CMD_READOOB:
1086 case NAND_CMD_ERASE1:
1087 case NAND_CMD_STATUS:
1088 case NAND_CMD_SEQIN:
1089 case NAND_CMD_READID:
1090 case NAND_CMD_ERASE2:
1091 case NAND_CMD_RESET:
1092 case NAND_CMD_RNDOUT:
1093 case NAND_CMD_RNDOUTSTART:
1102 * Returns state after command is accepted by command number.
1104 static uint32_t get_state_by_command(unsigned command)
1107 case NAND_CMD_READ0:
1108 return STATE_CMD_READ0;
1109 case NAND_CMD_READ1:
1110 return STATE_CMD_READ1;
1111 case NAND_CMD_PAGEPROG:
1112 return STATE_CMD_PAGEPROG;
1113 case NAND_CMD_READSTART:
1114 return STATE_CMD_READSTART;
1115 case NAND_CMD_READOOB:
1116 return STATE_CMD_READOOB;
1117 case NAND_CMD_ERASE1:
1118 return STATE_CMD_ERASE1;
1119 case NAND_CMD_STATUS:
1120 return STATE_CMD_STATUS;
1121 case NAND_CMD_SEQIN:
1122 return STATE_CMD_SEQIN;
1123 case NAND_CMD_READID:
1124 return STATE_CMD_READID;
1125 case NAND_CMD_ERASE2:
1126 return STATE_CMD_ERASE2;
1127 case NAND_CMD_RESET:
1128 return STATE_CMD_RESET;
1129 case NAND_CMD_RNDOUT:
1130 return STATE_CMD_RNDOUT;
1131 case NAND_CMD_RNDOUTSTART:
1132 return STATE_CMD_RNDOUTSTART;
1135 NS_ERR("get_state_by_command: unknown command, BUG\n");
1140 * Move an address byte to the correspondent internal register.
1142 static inline void accept_addr_byte(struct nandsim *ns, u_char bt)
1144 uint byte = (uint)bt;
1146 if (ns->regs.count < (ns->geom.pgaddrbytes - ns->geom.secaddrbytes))
1147 ns->regs.column |= (byte << 8 * ns->regs.count);
1149 ns->regs.row |= (byte << 8 * (ns->regs.count -
1150 ns->geom.pgaddrbytes +
1151 ns->geom.secaddrbytes));
1158 * Switch to STATE_READY state.
1160 static inline void switch_to_ready_state(struct nandsim *ns, u_char status)
1162 NS_DBG("switch_to_ready_state: switch to %s state\n", get_state_name(STATE_READY));
1164 ns->state = STATE_READY;
1165 ns->nxstate = STATE_UNKNOWN;
1173 ns->regs.column = 0;
1174 ns->regs.status = status;
1178 * If the operation isn't known yet, try to find it in the global array
1179 * of supported operations.
1181 * Operation can be unknown because of the following.
1182 * 1. New command was accepted and this is the first call to find the
1183 * correspondent states chain. In this case ns->npstates = 0;
1184 * 2. There are several operations which begin with the same command(s)
1185 * (for example program from the second half and read from the
1186 * second half operations both begin with the READ1 command). In this
1187 * case the ns->pstates[] array contains previous states.
1189 * Thus, the function tries to find operation containing the following
1190 * states (if the 'flag' parameter is 0):
1191 * ns->pstates[0], ... ns->pstates[ns->npstates], ns->state
1193 * If (one and only one) matching operation is found, it is accepted (
1194 * ns->ops, ns->state, ns->nxstate are initialized, ns->npstate is
1197 * If there are several matches, the current state is pushed to the
1200 * The operation can be unknown only while commands are input to the chip.
1201 * As soon as address command is accepted, the operation must be known.
1202 * In such situation the function is called with 'flag' != 0, and the
1203 * operation is searched using the following pattern:
1204 * ns->pstates[0], ... ns->pstates[ns->npstates], <address input>
1206 * It is supposed that this pattern must either match one operation or
1207 * none. There can't be ambiguity in that case.
1209 * If no matches found, the function does the following:
1210 * 1. if there are saved states present, try to ignore them and search
1211 * again only using the last command. If nothing was found, switch
1212 * to the STATE_READY state.
1213 * 2. if there are no saved states, switch to the STATE_READY state.
1215 * RETURNS: -2 - no matched operations found.
1216 * -1 - several matches.
1217 * 0 - operation is found.
1219 static int find_operation(struct nandsim *ns, uint32_t flag)
1224 for (i = 0; i < NS_OPER_NUM; i++) {
1228 if (!(ns->options & ops[i].reqopts))
1229 /* Ignore operations we can't perform */
1233 if (!(ops[i].states[ns->npstates] & STATE_ADDR_MASK))
1236 if (NS_STATE(ns->state) != NS_STATE(ops[i].states[ns->npstates]))
1240 for (j = 0; j < ns->npstates; j++)
1241 if (NS_STATE(ops[i].states[j]) != NS_STATE(ns->pstates[j])
1242 && (ns->options & ops[idx].reqopts)) {
1253 if (opsfound == 1) {
1255 ns->op = &ops[idx].states[0];
1258 * In this case the find_operation function was
1259 * called when address has just began input. But it isn't
1260 * yet fully input and the current state must
1261 * not be one of STATE_ADDR_*, but the STATE_ADDR_*
1262 * state must be the next state (ns->nxstate).
1264 ns->stateidx = ns->npstates - 1;
1266 ns->stateidx = ns->npstates;
1269 ns->state = ns->op[ns->stateidx];
1270 ns->nxstate = ns->op[ns->stateidx + 1];
1271 NS_DBG("find_operation: operation found, index: %d, state: %s, nxstate %s\n",
1272 idx, get_state_name(ns->state), get_state_name(ns->nxstate));
1276 if (opsfound == 0) {
1277 /* Nothing was found. Try to ignore previous commands (if any) and search again */
1278 if (ns->npstates != 0) {
1279 NS_DBG("find_operation: no operation found, try again with state %s\n",
1280 get_state_name(ns->state));
1282 return find_operation(ns, 0);
1285 NS_DBG("find_operation: no operations found\n");
1286 switch_to_ready_state(ns, NS_STATUS_FAILED(ns));
1291 /* This shouldn't happen */
1292 NS_DBG("find_operation: BUG, operation must be known if address is input\n");
1296 NS_DBG("find_operation: there is still ambiguity\n");
1298 ns->pstates[ns->npstates++] = ns->state;
1303 static void put_pages(struct nandsim *ns)
1307 for (i = 0; i < ns->held_cnt; i++)
1308 put_page(ns->held_pages[i]);
1311 /* Get page cache pages in advance to provide NOFS memory allocation */
1312 static int get_pages(struct nandsim *ns, struct file *file, size_t count, loff_t pos)
1314 pgoff_t index, start_index, end_index;
1316 struct address_space *mapping = file->f_mapping;
1318 start_index = pos >> PAGE_SHIFT;
1319 end_index = (pos + count - 1) >> PAGE_SHIFT;
1320 if (end_index - start_index + 1 > NS_MAX_HELD_PAGES)
1323 for (index = start_index; index <= end_index; index++) {
1324 page = find_get_page(mapping, index);
1326 page = find_or_create_page(mapping, index, GFP_NOFS);
1328 write_inode_now(mapping->host, 1);
1329 page = find_or_create_page(mapping, index, GFP_NOFS);
1337 ns->held_pages[ns->held_cnt++] = page;
1342 static ssize_t read_file(struct nandsim *ns, struct file *file, void *buf, size_t count, loff_t pos)
1346 unsigned int noreclaim_flag;
1348 err = get_pages(ns, file, count, pos);
1351 noreclaim_flag = memalloc_noreclaim_save();
1352 tx = kernel_read(file, buf, count, &pos);
1353 memalloc_noreclaim_restore(noreclaim_flag);
1358 static ssize_t write_file(struct nandsim *ns, struct file *file, void *buf, size_t count, loff_t pos)
1362 unsigned int noreclaim_flag;
1364 err = get_pages(ns, file, count, pos);
1367 noreclaim_flag = memalloc_noreclaim_save();
1368 tx = kernel_write(file, buf, count, &pos);
1369 memalloc_noreclaim_restore(noreclaim_flag);
1375 * Returns a pointer to the current page.
1377 static inline union ns_mem *NS_GET_PAGE(struct nandsim *ns)
1379 return &(ns->pages[ns->regs.row]);
1383 * Retuns a pointer to the current byte, within the current page.
1385 static inline u_char *NS_PAGE_BYTE_OFF(struct nandsim *ns)
1387 return NS_GET_PAGE(ns)->byte + ns->regs.column + ns->regs.off;
1390 static int do_read_error(struct nandsim *ns, int num)
1392 unsigned int page_no = ns->regs.row;
1394 if (read_error(page_no)) {
1395 prandom_bytes(ns->buf.byte, num);
1396 NS_WARN("simulating read error in page %u\n", page_no);
1402 static void do_bit_flips(struct nandsim *ns, int num)
1404 if (bitflips && prandom_u32() < (1 << 22)) {
1407 flips = (prandom_u32() % (int) bitflips) + 1;
1409 int pos = prandom_u32() % (num * 8);
1410 ns->buf.byte[pos / 8] ^= (1 << (pos % 8));
1411 NS_WARN("read_page: flipping bit %d in page %d "
1412 "reading from %d ecc: corrected=%u failed=%u\n",
1413 pos, ns->regs.row, ns->regs.column + ns->regs.off,
1414 nsmtd->ecc_stats.corrected, nsmtd->ecc_stats.failed);
1420 * Fill the NAND buffer with data read from the specified page.
1422 static void read_page(struct nandsim *ns, int num)
1424 union ns_mem *mypage;
1427 if (!test_bit(ns->regs.row, ns->pages_written)) {
1428 NS_DBG("read_page: page %d not written\n", ns->regs.row);
1429 memset(ns->buf.byte, 0xFF, num);
1434 NS_DBG("read_page: page %d written, reading from %d\n",
1435 ns->regs.row, ns->regs.column + ns->regs.off);
1436 if (do_read_error(ns, num))
1438 pos = (loff_t)NS_RAW_OFFSET(ns) + ns->regs.off;
1439 tx = read_file(ns, ns->cfile, ns->buf.byte, num, pos);
1441 NS_ERR("read_page: read error for page %d ret %ld\n", ns->regs.row, (long)tx);
1444 do_bit_flips(ns, num);
1449 mypage = NS_GET_PAGE(ns);
1450 if (mypage->byte == NULL) {
1451 NS_DBG("read_page: page %d not allocated\n", ns->regs.row);
1452 memset(ns->buf.byte, 0xFF, num);
1454 NS_DBG("read_page: page %d allocated, reading from %d\n",
1455 ns->regs.row, ns->regs.column + ns->regs.off);
1456 if (do_read_error(ns, num))
1458 memcpy(ns->buf.byte, NS_PAGE_BYTE_OFF(ns), num);
1459 do_bit_flips(ns, num);
1464 * Erase all pages in the specified sector.
1466 static void erase_sector(struct nandsim *ns)
1468 union ns_mem *mypage;
1472 for (i = 0; i < ns->geom.pgsec; i++)
1473 if (__test_and_clear_bit(ns->regs.row + i,
1474 ns->pages_written)) {
1475 NS_DBG("erase_sector: freeing page %d\n", ns->regs.row + i);
1480 mypage = NS_GET_PAGE(ns);
1481 for (i = 0; i < ns->geom.pgsec; i++) {
1482 if (mypage->byte != NULL) {
1483 NS_DBG("erase_sector: freeing page %d\n", ns->regs.row+i);
1484 kmem_cache_free(ns->nand_pages_slab, mypage->byte);
1485 mypage->byte = NULL;
1492 * Program the specified page with the contents from the NAND buffer.
1494 static int prog_page(struct nandsim *ns, int num)
1497 union ns_mem *mypage;
1505 NS_DBG("prog_page: writing page %d\n", ns->regs.row);
1506 pg_off = ns->file_buf + ns->regs.column + ns->regs.off;
1507 off = (loff_t)NS_RAW_OFFSET(ns) + ns->regs.off;
1508 if (!test_bit(ns->regs.row, ns->pages_written)) {
1510 memset(ns->file_buf, 0xff, ns->geom.pgszoob);
1513 tx = read_file(ns, ns->cfile, pg_off, num, off);
1515 NS_ERR("prog_page: read error for page %d ret %ld\n", ns->regs.row, (long)tx);
1519 for (i = 0; i < num; i++)
1520 pg_off[i] &= ns->buf.byte[i];
1522 loff_t pos = (loff_t)ns->regs.row * ns->geom.pgszoob;
1523 tx = write_file(ns, ns->cfile, ns->file_buf, ns->geom.pgszoob, pos);
1524 if (tx != ns->geom.pgszoob) {
1525 NS_ERR("prog_page: write error for page %d ret %ld\n", ns->regs.row, (long)tx);
1528 __set_bit(ns->regs.row, ns->pages_written);
1530 tx = write_file(ns, ns->cfile, pg_off, num, off);
1532 NS_ERR("prog_page: write error for page %d ret %ld\n", ns->regs.row, (long)tx);
1539 mypage = NS_GET_PAGE(ns);
1540 if (mypage->byte == NULL) {
1541 NS_DBG("prog_page: allocating page %d\n", ns->regs.row);
1543 * We allocate memory with GFP_NOFS because a flash FS may
1544 * utilize this. If it is holding an FS lock, then gets here,
1545 * then kernel memory alloc runs writeback which goes to the FS
1546 * again and deadlocks. This was seen in practice.
1548 mypage->byte = kmem_cache_alloc(ns->nand_pages_slab, GFP_NOFS);
1549 if (mypage->byte == NULL) {
1550 NS_ERR("prog_page: error allocating memory for page %d\n", ns->regs.row);
1553 memset(mypage->byte, 0xFF, ns->geom.pgszoob);
1556 pg_off = NS_PAGE_BYTE_OFF(ns);
1557 for (i = 0; i < num; i++)
1558 pg_off[i] &= ns->buf.byte[i];
1564 * If state has any action bit, perform this action.
1566 * RETURNS: 0 if success, -1 if error.
1568 static int do_state_action(struct nandsim *ns, uint32_t action)
1571 int busdiv = ns->busw == 8 ? 1 : 2;
1572 unsigned int erase_block_no, page_no;
1574 action &= ACTION_MASK;
1576 /* Check that page address input is correct */
1577 if (action != ACTION_SECERASE && ns->regs.row >= ns->geom.pgnum) {
1578 NS_WARN("do_state_action: wrong page number (%#x)\n", ns->regs.row);
1586 * Copy page data to the internal buffer.
1589 /* Column shouldn't be very large */
1590 if (ns->regs.column >= (ns->geom.pgszoob - ns->regs.off)) {
1591 NS_ERR("do_state_action: column number is too large\n");
1594 num = ns->geom.pgszoob - ns->regs.off - ns->regs.column;
1597 NS_DBG("do_state_action: (ACTION_CPY:) copy %d bytes to int buf, raw offset %d\n",
1598 num, NS_RAW_OFFSET(ns) + ns->regs.off);
1600 if (ns->regs.off == 0)
1601 NS_LOG("read page %d\n", ns->regs.row);
1602 else if (ns->regs.off < ns->geom.pgsz)
1603 NS_LOG("read page %d (second half)\n", ns->regs.row);
1605 NS_LOG("read OOB of page %d\n", ns->regs.row);
1607 NS_UDELAY(access_delay);
1608 NS_UDELAY(input_cycle * ns->geom.pgsz / 1000 / busdiv);
1612 case ACTION_SECERASE:
1618 NS_ERR("do_state_action: device is write-protected, ignore sector erase\n");
1622 if (ns->regs.row >= ns->geom.pgnum - ns->geom.pgsec
1623 || (ns->regs.row & ~(ns->geom.secsz - 1))) {
1624 NS_ERR("do_state_action: wrong sector address (%#x)\n", ns->regs.row);
1628 ns->regs.row = (ns->regs.row <<
1629 8 * (ns->geom.pgaddrbytes - ns->geom.secaddrbytes)) | ns->regs.column;
1630 ns->regs.column = 0;
1632 erase_block_no = ns->regs.row >> (ns->geom.secshift - ns->geom.pgshift);
1634 NS_DBG("do_state_action: erase sector at address %#x, off = %d\n",
1635 ns->regs.row, NS_RAW_OFFSET(ns));
1636 NS_LOG("erase sector %u\n", erase_block_no);
1640 NS_MDELAY(erase_delay);
1642 if (erase_block_wear)
1643 update_wear(erase_block_no);
1645 if (erase_error(erase_block_no)) {
1646 NS_WARN("simulating erase failure in erase block %u\n", erase_block_no);
1652 case ACTION_PRGPAGE:
1654 * Program page - move internal buffer data to the page.
1658 NS_WARN("do_state_action: device is write-protected, programm\n");
1662 num = ns->geom.pgszoob - ns->regs.off - ns->regs.column;
1663 if (num != ns->regs.count) {
1664 NS_ERR("do_state_action: too few bytes were input (%d instead of %d)\n",
1665 ns->regs.count, num);
1669 if (prog_page(ns, num) == -1)
1672 page_no = ns->regs.row;
1674 NS_DBG("do_state_action: copy %d bytes from int buf to (%#x, %#x), raw off = %d\n",
1675 num, ns->regs.row, ns->regs.column, NS_RAW_OFFSET(ns) + ns->regs.off);
1676 NS_LOG("programm page %d\n", ns->regs.row);
1678 NS_UDELAY(programm_delay);
1679 NS_UDELAY(output_cycle * ns->geom.pgsz / 1000 / busdiv);
1681 if (write_error(page_no)) {
1682 NS_WARN("simulating write failure in page %u\n", page_no);
1688 case ACTION_ZEROOFF:
1689 NS_DBG("do_state_action: set internal offset to 0\n");
1693 case ACTION_HALFOFF:
1694 if (!(ns->options & OPT_PAGE512_8BIT)) {
1695 NS_ERR("do_state_action: BUG! can't skip half of page for non-512"
1696 "byte page size 8x chips\n");
1699 NS_DBG("do_state_action: set internal offset to %d\n", ns->geom.pgsz/2);
1700 ns->regs.off = ns->geom.pgsz/2;
1704 NS_DBG("do_state_action: set internal offset to %d\n", ns->geom.pgsz);
1705 ns->regs.off = ns->geom.pgsz;
1709 NS_DBG("do_state_action: BUG! unknown action\n");
1716 * Switch simulator's state.
1718 static void switch_state(struct nandsim *ns)
1722 * The current operation have already been identified.
1723 * Just follow the states chain.
1727 ns->state = ns->nxstate;
1728 ns->nxstate = ns->op[ns->stateidx + 1];
1730 NS_DBG("switch_state: operation is known, switch to the next state, "
1731 "state: %s, nxstate: %s\n",
1732 get_state_name(ns->state), get_state_name(ns->nxstate));
1734 /* See, whether we need to do some action */
1735 if ((ns->state & ACTION_MASK) && do_state_action(ns, ns->state) < 0) {
1736 switch_to_ready_state(ns, NS_STATUS_FAILED(ns));
1742 * We don't yet know which operation we perform.
1743 * Try to identify it.
1747 * The only event causing the switch_state function to
1748 * be called with yet unknown operation is new command.
1750 ns->state = get_state_by_command(ns->regs.command);
1752 NS_DBG("switch_state: operation is unknown, try to find it\n");
1754 if (find_operation(ns, 0) != 0)
1757 if ((ns->state & ACTION_MASK) && do_state_action(ns, ns->state) < 0) {
1758 switch_to_ready_state(ns, NS_STATUS_FAILED(ns));
1763 /* For 16x devices column means the page offset in words */
1764 if ((ns->nxstate & STATE_ADDR_MASK) && ns->busw == 16) {
1765 NS_DBG("switch_state: double the column number for 16x device\n");
1766 ns->regs.column <<= 1;
1769 if (NS_STATE(ns->nxstate) == STATE_READY) {
1771 * The current state is the last. Return to STATE_READY
1774 u_char status = NS_STATUS_OK(ns);
1776 /* In case of data states, see if all bytes were input/output */
1777 if ((ns->state & (STATE_DATAIN_MASK | STATE_DATAOUT_MASK))
1778 && ns->regs.count != ns->regs.num) {
1779 NS_WARN("switch_state: not all bytes were processed, %d left\n",
1780 ns->regs.num - ns->regs.count);
1781 status = NS_STATUS_FAILED(ns);
1784 NS_DBG("switch_state: operation complete, switch to STATE_READY state\n");
1786 switch_to_ready_state(ns, status);
1789 } else if (ns->nxstate & (STATE_DATAIN_MASK | STATE_DATAOUT_MASK)) {
1791 * If the next state is data input/output, switch to it now
1794 ns->state = ns->nxstate;
1795 ns->nxstate = ns->op[++ns->stateidx + 1];
1796 ns->regs.num = ns->regs.count = 0;
1798 NS_DBG("switch_state: the next state is data I/O, switch, "
1799 "state: %s, nxstate: %s\n",
1800 get_state_name(ns->state), get_state_name(ns->nxstate));
1803 * Set the internal register to the count of bytes which
1804 * are expected to be input or output
1806 switch (NS_STATE(ns->state)) {
1809 ns->regs.num = ns->geom.pgszoob - ns->regs.off - ns->regs.column;
1812 case STATE_DATAOUT_ID:
1813 ns->regs.num = ns->geom.idbytes;
1816 case STATE_DATAOUT_STATUS:
1817 ns->regs.count = ns->regs.num = 0;
1821 NS_ERR("switch_state: BUG! unknown data state\n");
1824 } else if (ns->nxstate & STATE_ADDR_MASK) {
1826 * If the next state is address input, set the internal
1827 * register to the number of expected address bytes
1832 switch (NS_STATE(ns->nxstate)) {
1833 case STATE_ADDR_PAGE:
1834 ns->regs.num = ns->geom.pgaddrbytes;
1837 case STATE_ADDR_SEC:
1838 ns->regs.num = ns->geom.secaddrbytes;
1841 case STATE_ADDR_ZERO:
1845 case STATE_ADDR_COLUMN:
1846 /* Column address is always 2 bytes */
1847 ns->regs.num = ns->geom.pgaddrbytes - ns->geom.secaddrbytes;
1851 NS_ERR("switch_state: BUG! unknown address state\n");
1855 * Just reset internal counters.
1863 static u_char ns_nand_read_byte(struct nand_chip *chip)
1865 struct nandsim *ns = nand_get_controller_data(chip);
1868 /* Sanity and correctness checks */
1869 if (!ns->lines.ce) {
1870 NS_ERR("read_byte: chip is disabled, return %#x\n", (uint)outb);
1873 if (ns->lines.ale || ns->lines.cle) {
1874 NS_ERR("read_byte: ALE or CLE pin is high, return %#x\n", (uint)outb);
1877 if (!(ns->state & STATE_DATAOUT_MASK)) {
1878 NS_WARN("read_byte: unexpected data output cycle, state is %s "
1879 "return %#x\n", get_state_name(ns->state), (uint)outb);
1883 /* Status register may be read as many times as it is wanted */
1884 if (NS_STATE(ns->state) == STATE_DATAOUT_STATUS) {
1885 NS_DBG("read_byte: return %#x status\n", ns->regs.status);
1886 return ns->regs.status;
1889 /* Check if there is any data in the internal buffer which may be read */
1890 if (ns->regs.count == ns->regs.num) {
1891 NS_WARN("read_byte: no more data to output, return %#x\n", (uint)outb);
1895 switch (NS_STATE(ns->state)) {
1897 if (ns->busw == 8) {
1898 outb = ns->buf.byte[ns->regs.count];
1899 ns->regs.count += 1;
1901 outb = (u_char)cpu_to_le16(ns->buf.word[ns->regs.count >> 1]);
1902 ns->regs.count += 2;
1905 case STATE_DATAOUT_ID:
1906 NS_DBG("read_byte: read ID byte %d, total = %d\n", ns->regs.count, ns->regs.num);
1907 outb = ns->ids[ns->regs.count];
1908 ns->regs.count += 1;
1914 if (ns->regs.count == ns->regs.num) {
1915 NS_DBG("read_byte: all bytes were read\n");
1917 if (NS_STATE(ns->nxstate) == STATE_READY)
1924 static void ns_nand_write_byte(struct nand_chip *chip, u_char byte)
1926 struct nandsim *ns = nand_get_controller_data(chip);
1928 /* Sanity and correctness checks */
1929 if (!ns->lines.ce) {
1930 NS_ERR("write_byte: chip is disabled, ignore write\n");
1933 if (ns->lines.ale && ns->lines.cle) {
1934 NS_ERR("write_byte: ALE and CLE pins are high simultaneously, ignore write\n");
1938 if (ns->lines.cle == 1) {
1940 * The byte written is a command.
1943 if (byte == NAND_CMD_RESET) {
1944 NS_LOG("reset chip\n");
1945 switch_to_ready_state(ns, NS_STATUS_OK(ns));
1949 /* Check that the command byte is correct */
1950 if (check_command(byte)) {
1951 NS_ERR("write_byte: unknown command %#x\n", (uint)byte);
1955 if (NS_STATE(ns->state) == STATE_DATAOUT_STATUS
1956 || NS_STATE(ns->state) == STATE_DATAOUT) {
1957 int row = ns->regs.row;
1960 if (byte == NAND_CMD_RNDOUT)
1964 /* Check if chip is expecting command */
1965 if (NS_STATE(ns->nxstate) != STATE_UNKNOWN && !(ns->nxstate & STATE_CMD_MASK)) {
1966 /* Do not warn if only 2 id bytes are read */
1967 if (!(ns->regs.command == NAND_CMD_READID &&
1968 NS_STATE(ns->state) == STATE_DATAOUT_ID && ns->regs.count == 2)) {
1970 * We are in situation when something else (not command)
1971 * was expected but command was input. In this case ignore
1972 * previous command(s)/state(s) and accept the last one.
1974 NS_WARN("write_byte: command (%#x) wasn't expected, expected state is %s, "
1975 "ignore previous states\n", (uint)byte, get_state_name(ns->nxstate));
1977 switch_to_ready_state(ns, NS_STATUS_FAILED(ns));
1980 NS_DBG("command byte corresponding to %s state accepted\n",
1981 get_state_name(get_state_by_command(byte)));
1982 ns->regs.command = byte;
1985 } else if (ns->lines.ale == 1) {
1987 * The byte written is an address.
1990 if (NS_STATE(ns->nxstate) == STATE_UNKNOWN) {
1992 NS_DBG("write_byte: operation isn't known yet, identify it\n");
1994 if (find_operation(ns, 1) < 0)
1997 if ((ns->state & ACTION_MASK) && do_state_action(ns, ns->state) < 0) {
1998 switch_to_ready_state(ns, NS_STATUS_FAILED(ns));
2003 switch (NS_STATE(ns->nxstate)) {
2004 case STATE_ADDR_PAGE:
2005 ns->regs.num = ns->geom.pgaddrbytes;
2007 case STATE_ADDR_SEC:
2008 ns->regs.num = ns->geom.secaddrbytes;
2010 case STATE_ADDR_ZERO:
2018 /* Check that chip is expecting address */
2019 if (!(ns->nxstate & STATE_ADDR_MASK)) {
2020 NS_ERR("write_byte: address (%#x) isn't expected, expected state is %s, "
2021 "switch to STATE_READY\n", (uint)byte, get_state_name(ns->nxstate));
2022 switch_to_ready_state(ns, NS_STATUS_FAILED(ns));
2026 /* Check if this is expected byte */
2027 if (ns->regs.count == ns->regs.num) {
2028 NS_ERR("write_byte: no more address bytes expected\n");
2029 switch_to_ready_state(ns, NS_STATUS_FAILED(ns));
2033 accept_addr_byte(ns, byte);
2035 ns->regs.count += 1;
2037 NS_DBG("write_byte: address byte %#x was accepted (%d bytes input, %d expected)\n",
2038 (uint)byte, ns->regs.count, ns->regs.num);
2040 if (ns->regs.count == ns->regs.num) {
2041 NS_DBG("address (%#x, %#x) is accepted\n", ns->regs.row, ns->regs.column);
2047 * The byte written is an input data.
2050 /* Check that chip is expecting data input */
2051 if (!(ns->state & STATE_DATAIN_MASK)) {
2052 NS_ERR("write_byte: data input (%#x) isn't expected, state is %s, "
2053 "switch to %s\n", (uint)byte,
2054 get_state_name(ns->state), get_state_name(STATE_READY));
2055 switch_to_ready_state(ns, NS_STATUS_FAILED(ns));
2059 /* Check if this is expected byte */
2060 if (ns->regs.count == ns->regs.num) {
2061 NS_WARN("write_byte: %u input bytes has already been accepted, ignore write\n",
2066 if (ns->busw == 8) {
2067 ns->buf.byte[ns->regs.count] = byte;
2068 ns->regs.count += 1;
2070 ns->buf.word[ns->regs.count >> 1] = cpu_to_le16((uint16_t)byte);
2071 ns->regs.count += 2;
2078 static void ns_nand_write_buf(struct nand_chip *chip, const u_char *buf,
2081 struct nandsim *ns = nand_get_controller_data(chip);
2083 /* Check that chip is expecting data input */
2084 if (!(ns->state & STATE_DATAIN_MASK)) {
2085 NS_ERR("write_buf: data input isn't expected, state is %s, "
2086 "switch to STATE_READY\n", get_state_name(ns->state));
2087 switch_to_ready_state(ns, NS_STATUS_FAILED(ns));
2091 /* Check if these are expected bytes */
2092 if (ns->regs.count + len > ns->regs.num) {
2093 NS_ERR("write_buf: too many input bytes\n");
2094 switch_to_ready_state(ns, NS_STATUS_FAILED(ns));
2098 memcpy(ns->buf.byte + ns->regs.count, buf, len);
2099 ns->regs.count += len;
2101 if (ns->regs.count == ns->regs.num) {
2102 NS_DBG("write_buf: %d bytes were written\n", ns->regs.count);
2106 static void ns_nand_read_buf(struct nand_chip *chip, u_char *buf, int len)
2108 struct nandsim *ns = nand_get_controller_data(chip);
2110 /* Sanity and correctness checks */
2111 if (!ns->lines.ce) {
2112 NS_ERR("read_buf: chip is disabled\n");
2115 if (ns->lines.ale || ns->lines.cle) {
2116 NS_ERR("read_buf: ALE or CLE pin is high\n");
2119 if (!(ns->state & STATE_DATAOUT_MASK)) {
2120 NS_WARN("read_buf: unexpected data output cycle, current state is %s\n",
2121 get_state_name(ns->state));
2125 if (NS_STATE(ns->state) != STATE_DATAOUT) {
2128 for (i = 0; i < len; i++)
2129 buf[i] = ns_nand_read_byte(chip);
2134 /* Check if these are expected bytes */
2135 if (ns->regs.count + len > ns->regs.num) {
2136 NS_ERR("read_buf: too many bytes to read\n");
2137 switch_to_ready_state(ns, NS_STATUS_FAILED(ns));
2141 memcpy(buf, ns->buf.byte + ns->regs.count, len);
2142 ns->regs.count += len;
2144 if (ns->regs.count == ns->regs.num) {
2145 if (NS_STATE(ns->nxstate) == STATE_READY)
2152 static int ns_exec_op(struct nand_chip *chip, const struct nand_operation *op,
2157 const struct nand_op_instr *instr = NULL;
2158 struct nandsim *ns = nand_get_controller_data(chip);
2162 for (op_id = 0; op_id < op->ninstrs; op_id++) {
2163 instr = &op->instrs[op_id];
2167 switch (instr->type) {
2168 case NAND_OP_CMD_INSTR:
2170 ns_nand_write_byte(chip, instr->ctx.cmd.opcode);
2172 case NAND_OP_ADDR_INSTR:
2174 for (i = 0; i < instr->ctx.addr.naddrs; i++)
2175 ns_nand_write_byte(chip, instr->ctx.addr.addrs[i]);
2177 case NAND_OP_DATA_IN_INSTR:
2178 ns_nand_read_buf(chip, instr->ctx.data.buf.in, instr->ctx.data.len);
2180 case NAND_OP_DATA_OUT_INSTR:
2181 ns_nand_write_buf(chip, instr->ctx.data.buf.out, instr->ctx.data.len);
2183 case NAND_OP_WAITRDY_INSTR:
2184 /* we are always ready */
2192 static int ns_attach_chip(struct nand_chip *chip)
2194 unsigned int eccsteps, eccbytes;
2199 if (!mtd_nand_has_bch()) {
2200 NS_ERR("BCH ECC support is disabled\n");
2204 /* Use 512-byte ecc blocks */
2205 eccsteps = nsmtd->writesize / 512;
2206 eccbytes = ((bch * 13) + 7) / 8;
2208 /* Do not bother supporting small page devices */
2209 if (nsmtd->oobsize < 64 || !eccsteps) {
2210 NS_ERR("BCH not available on small page devices\n");
2214 if (((eccbytes * eccsteps) + 2) > nsmtd->oobsize) {
2215 NS_ERR("Invalid BCH value %u\n", bch);
2219 chip->ecc.mode = NAND_ECC_SOFT;
2220 chip->ecc.algo = NAND_ECC_BCH;
2221 chip->ecc.size = 512;
2222 chip->ecc.strength = bch;
2223 chip->ecc.bytes = eccbytes;
2225 NS_INFO("Using %u-bit/%u bytes BCH ECC\n", bch, chip->ecc.size);
2230 static const struct nand_controller_ops ns_controller_ops = {
2231 .attach_chip = ns_attach_chip,
2232 .exec_op = ns_exec_op,
2236 * Module initialization function
2238 static int __init ns_init_module(void)
2240 struct nand_chip *chip;
2242 int retval = -ENOMEM, i;
2244 if (bus_width != 8 && bus_width != 16) {
2245 NS_ERR("wrong bus width (%d), use only 8 or 16\n", bus_width);
2249 ns = kzalloc(sizeof(struct nandsim), GFP_KERNEL);
2251 NS_ERR("unable to allocate core structures.\n");
2255 nsmtd = nand_to_mtd(chip);
2256 nand_set_controller_data(chip, (void *)ns);
2258 chip->ecc.mode = NAND_ECC_SOFT;
2259 chip->ecc.algo = NAND_ECC_HAMMING;
2260 /* The NAND_SKIP_BBTSCAN option is necessary for 'overridesize' */
2261 /* and 'badblocks' parameters to work */
2262 chip->options |= NAND_SKIP_BBTSCAN;
2266 chip->bbt_options |= NAND_BBT_NO_OOB;
2269 chip->bbt_options |= NAND_BBT_USE_FLASH;
2274 NS_ERR("bbt has to be 0..2\n");
2279 * Perform minimum nandsim structure initialization to handle
2280 * the initial ID read command correctly
2282 if (id_bytes[6] != 0xFF || id_bytes[7] != 0xFF)
2283 ns->geom.idbytes = 8;
2284 else if (id_bytes[4] != 0xFF || id_bytes[5] != 0xFF)
2285 ns->geom.idbytes = 6;
2286 else if (id_bytes[2] != 0xFF || id_bytes[3] != 0xFF)
2287 ns->geom.idbytes = 4;
2289 ns->geom.idbytes = 2;
2290 ns->regs.status = NS_STATUS_OK(ns);
2291 ns->nxstate = STATE_UNKNOWN;
2292 ns->options |= OPT_PAGE512; /* temporary value */
2293 memcpy(ns->ids, id_bytes, sizeof(ns->ids));
2294 if (bus_width == 16) {
2296 chip->options |= NAND_BUSWIDTH_16;
2299 nsmtd->owner = THIS_MODULE;
2301 if ((retval = parse_weakblocks()) != 0)
2304 if ((retval = parse_weakpages()) != 0)
2307 if ((retval = parse_gravepages()) != 0)
2310 nand_controller_init(&ns->base);
2311 ns->base.ops = &ns_controller_ops;
2312 chip->controller = &ns->base;
2314 retval = nand_scan(chip, 1);
2316 NS_ERR("Could not scan NAND Simulator device\n");
2321 uint64_t new_size = (uint64_t)nsmtd->erasesize << overridesize;
2322 struct nand_memory_organization *memorg;
2325 memorg = nanddev_get_memorg(&chip->base);
2327 if (new_size >> overridesize != nsmtd->erasesize) {
2328 NS_ERR("overridesize is too big\n");
2333 /* N.B. This relies on nand_scan not doing anything with the size before we change it */
2334 nsmtd->size = new_size;
2335 memorg->eraseblocks_per_lun = 1 << overridesize;
2336 targetsize = nanddev_target_size(&chip->base);
2337 chip->chip_shift = ffs(nsmtd->erasesize) + overridesize - 1;
2338 chip->pagemask = (targetsize >> chip->page_shift) - 1;
2341 if ((retval = setup_wear_reporting(nsmtd)) != 0)
2344 if ((retval = init_nandsim(nsmtd)) != 0)
2347 if ((retval = nand_create_bbt(chip)) != 0)
2350 if ((retval = parse_badblocks(ns, nsmtd)) != 0)
2353 /* Register NAND partitions */
2354 retval = mtd_device_register(nsmtd, &ns->partitions[0],
2359 if ((retval = nandsim_debugfs_create(ns)) != 0)
2367 for (i = 0;i < ARRAY_SIZE(ns->partitions); ++i)
2368 kfree(ns->partitions[i].name);
2376 module_init(ns_init_module);
2379 * Module clean-up function
2381 static void __exit ns_cleanup_module(void)
2383 struct nand_chip *chip = mtd_to_nand(nsmtd);
2384 struct nandsim *ns = nand_get_controller_data(chip);
2387 free_nandsim(ns); /* Free nandsim private resources */
2388 nand_release(chip); /* Unregister driver */
2389 for (i = 0;i < ARRAY_SIZE(ns->partitions); ++i)
2390 kfree(ns->partitions[i].name);
2391 kfree(ns); /* Free other structures */
2395 module_exit(ns_cleanup_module);
2397 MODULE_LICENSE ("GPL");
2398 MODULE_AUTHOR ("Artem B. Bityuckiy");
2399 MODULE_DESCRIPTION ("The NAND flash simulator");