drivers/media/platform/aspeed-video.c

   1 // SPDX-License-Identifier: GPL-2.0+
   2
   3 #include <linux/atomic.h>
   4 #include <linux/bitfield.h>
   5 #include <linux/clk.h>
   6 #include <linux/delay.h>
   7 #include <linux/device.h>
   8 #include <linux/dma-mapping.h>
   9 #include <linux/interrupt.h>
  10 #include <linux/jiffies.h>
  11 #include <linux/module.h>
  12 #include <linux/mutex.h>
  13 #include <linux/of.h>
  14 #include <linux/of_irq.h>
  15 #include <linux/of_reserved_mem.h>
  16 #include <linux/platform_device.h>
  17 #include <linux/sched.h>
  18 #include <linux/spinlock.h>
  19 #include <linux/string.h>
  20 #include <linux/v4l2-controls.h>
  21 #include <linux/videodev2.h>
  22 #include <linux/wait.h>
  23 #include <linux/workqueue.h>
  24 #include <media/v4l2-ctrls.h>
  25 #include <media/v4l2-dev.h>
  26 #include <media/v4l2-device.h>
  27 #include <media/v4l2-dv-timings.h>
  28 #include <media/v4l2-event.h>
  29 #include <media/v4l2-ioctl.h>
  30 #include <media/videobuf2-dma-contig.h>
  31
  32 #define DEVICE_NAME                     "aspeed-video"
  33
  34 #define ASPEED_VIDEO_JPEG_NUM_QUALITIES 12
  35 #define ASPEED_VIDEO_JPEG_HEADER_SIZE   10
  36 #define ASPEED_VIDEO_JPEG_QUANT_SIZE    116
  37 #define ASPEED_VIDEO_JPEG_DCT_SIZE      34
  38
  39 #define MAX_FRAME_RATE                  60
  40 #define MAX_HEIGHT                      1200
  41 #define MAX_WIDTH                       1920
  42 #define MIN_HEIGHT                      480
  43 #define MIN_WIDTH                       640
  44
  45 #define NUM_POLARITY_CHECKS             10
  46 #define INVALID_RESOLUTION_RETRIES      2
  47 #define INVALID_RESOLUTION_DELAY        msecs_to_jiffies(250)
  48 #define RESOLUTION_CHANGE_DELAY         msecs_to_jiffies(500)
  49 #define MODE_DETECT_TIMEOUT             msecs_to_jiffies(500)
  50 #define STOP_TIMEOUT                    msecs_to_jiffies(1000)
  51 #define DIRECT_FETCH_THRESHOLD          0x0c0000 /* 1024 * 768 */
  52
  53 #define VE_MAX_SRC_BUFFER_SIZE          0x8ca000 /* 1920 * 1200, 32bpp */
  54 #define VE_JPEG_HEADER_SIZE             0x006000 /* 512 * 12 * 4 */
  55
  56 #define VE_PROTECTION_KEY               0x000
  57 #define  VE_PROTECTION_KEY_UNLOCK       0x1a038aa8
  58
  59 #define VE_SEQ_CTRL                     0x004
  60 #define  VE_SEQ_CTRL_TRIG_MODE_DET      BIT(0)
  61 #define  VE_SEQ_CTRL_TRIG_CAPTURE       BIT(1)
  62 #define  VE_SEQ_CTRL_FORCE_IDLE         BIT(2)
  63 #define  VE_SEQ_CTRL_MULT_FRAME         BIT(3)
  64 #define  VE_SEQ_CTRL_TRIG_COMP          BIT(4)
  65 #define  VE_SEQ_CTRL_AUTO_COMP          BIT(5)
  66 #define  VE_SEQ_CTRL_EN_WATCHDOG        BIT(7)
  67 #define  VE_SEQ_CTRL_YUV420             BIT(10)
  68 #define  VE_SEQ_CTRL_COMP_FMT           GENMASK(11, 10)
  69 #define  VE_SEQ_CTRL_HALT               BIT(12)
  70 #define  VE_SEQ_CTRL_EN_WATCHDOG_COMP   BIT(14)
  71 #define  VE_SEQ_CTRL_TRIG_JPG           BIT(15)
  72 #define  VE_SEQ_CTRL_CAP_BUSY           BIT(16)
  73 #define  VE_SEQ_CTRL_COMP_BUSY          BIT(18)
  74
  75 #ifdef CONFIG_MACH_ASPEED_G5
  76 #define  VE_SEQ_CTRL_JPEG_MODE          BIT(13) /* AST2500 */
  77 #else
  78 #define  VE_SEQ_CTRL_JPEG_MODE          BIT(8)  /* AST2400 */
  79 #endif /* CONFIG_MACH_ASPEED_G5 */
  80
  81 #define VE_CTRL                         0x008
  82 #define  VE_CTRL_HSYNC_POL              BIT(0)
  83 #define  VE_CTRL_VSYNC_POL              BIT(1)
  84 #define  VE_CTRL_SOURCE                 BIT(2)
  85 #define  VE_CTRL_INT_DE                 BIT(4)
  86 #define  VE_CTRL_DIRECT_FETCH           BIT(5)
  87 #define  VE_CTRL_YUV                    BIT(6)
  88 #define  VE_CTRL_RGB                    BIT(7)
  89 #define  VE_CTRL_CAPTURE_FMT            GENMASK(7, 6)
  90 #define  VE_CTRL_AUTO_OR_CURSOR         BIT(8)
  91 #define  VE_CTRL_CLK_INVERSE            BIT(11)
  92 #define  VE_CTRL_CLK_DELAY              GENMASK(11, 9)
  93 #define  VE_CTRL_INTERLACE              BIT(14)
  94 #define  VE_CTRL_HSYNC_POL_CTRL         BIT(15)
  95 #define  VE_CTRL_FRC                    GENMASK(23, 16)
  96
  97 #define VE_TGS_0                        0x00c
  98 #define VE_TGS_1                        0x010
  99 #define  VE_TGS_FIRST                   GENMASK(28, 16)
 100 #define  VE_TGS_LAST                    GENMASK(12, 0)
 101
 102 #define VE_SCALING_FACTOR               0x014
 103 #define VE_SCALING_FILTER0              0x018
 104 #define VE_SCALING_FILTER1              0x01c
 105 #define VE_SCALING_FILTER2              0x020
 106 #define VE_SCALING_FILTER3              0x024
 107
 108 #define VE_CAP_WINDOW                   0x030
 109 #define VE_COMP_WINDOW                  0x034
 110 #define VE_COMP_PROC_OFFSET             0x038
 111 #define VE_COMP_OFFSET                  0x03c
 112 #define VE_JPEG_ADDR                    0x040
 113 #define VE_SRC0_ADDR                    0x044
 114 #define VE_SRC_SCANLINE_OFFSET          0x048
 115 #define VE_SRC1_ADDR                    0x04c
 116 #define VE_COMP_ADDR                    0x054
 117
 118 #define VE_STREAM_BUF_SIZE              0x058
 119 #define  VE_STREAM_BUF_SIZE_N_PACKETS   GENMASK(5, 3)
 120 #define  VE_STREAM_BUF_SIZE_P_SIZE      GENMASK(2, 0)
 121
 122 #define VE_COMP_CTRL                    0x060
 123 #define  VE_COMP_CTRL_VQ_DCT_ONLY       BIT(0)
 124 #define  VE_COMP_CTRL_VQ_4COLOR         BIT(1)
 125 #define  VE_COMP_CTRL_QUANTIZE          BIT(2)
 126 #define  VE_COMP_CTRL_EN_BQ             BIT(4)
 127 #define  VE_COMP_CTRL_EN_CRYPTO         BIT(5)
 128 #define  VE_COMP_CTRL_DCT_CHR           GENMASK(10, 6)
 129 #define  VE_COMP_CTRL_DCT_LUM           GENMASK(15, 11)
 130 #define  VE_COMP_CTRL_EN_HQ             BIT(16)
 131 #define  VE_COMP_CTRL_RSVD              BIT(19)
 132 #define  VE_COMP_CTRL_ENCODE            GENMASK(21, 20)
 133 #define  VE_COMP_CTRL_HQ_DCT_CHR        GENMASK(26, 22)
 134 #define  VE_COMP_CTRL_HQ_DCT_LUM        GENMASK(31, 27)
 135
 136 #define VE_OFFSET_COMP_STREAM           0x078
 137
 138 #define VE_SRC_LR_EDGE_DET              0x090
 139 #define  VE_SRC_LR_EDGE_DET_LEFT        GENMASK(11, 0)
 140 #define  VE_SRC_LR_EDGE_DET_NO_V        BIT(12)
 141 #define  VE_SRC_LR_EDGE_DET_NO_H        BIT(13)
 142 #define  VE_SRC_LR_EDGE_DET_NO_DISP     BIT(14)
 143 #define  VE_SRC_LR_EDGE_DET_NO_CLK      BIT(15)
 144 #define  VE_SRC_LR_EDGE_DET_RT_SHF      16
 145 #define  VE_SRC_LR_EDGE_DET_RT          GENMASK(27, VE_SRC_LR_EDGE_DET_RT_SHF)
 146 #define  VE_SRC_LR_EDGE_DET_INTERLACE   BIT(31)
 147
 148 #define VE_SRC_TB_EDGE_DET              0x094
 149 #define  VE_SRC_TB_EDGE_DET_TOP         GENMASK(12, 0)
 150 #define  VE_SRC_TB_EDGE_DET_BOT_SHF     16
 151 #define  VE_SRC_TB_EDGE_DET_BOT         GENMASK(28, VE_SRC_TB_EDGE_DET_BOT_SHF)
 152
 153 #define VE_MODE_DETECT_STATUS           0x098
 154 #define  VE_MODE_DETECT_H_PIXELS        GENMASK(11, 0)
 155 #define  VE_MODE_DETECT_V_LINES_SHF     16
 156 #define  VE_MODE_DETECT_V_LINES         GENMASK(27, VE_MODE_DETECT_V_LINES_SHF)
 157 #define  VE_MODE_DETECT_STATUS_VSYNC    BIT(28)
 158 #define  VE_MODE_DETECT_STATUS_HSYNC    BIT(29)
 159
 160 #define VE_SYNC_STATUS                  0x09c
 161 #define  VE_SYNC_STATUS_HSYNC           GENMASK(11, 0)
 162 #define  VE_SYNC_STATUS_VSYNC_SHF       16
 163 #define  VE_SYNC_STATUS_VSYNC           GENMASK(27, VE_SYNC_STATUS_VSYNC_SHF)
 164
 165 #define VE_INTERRUPT_CTRL               0x304
 166 #define VE_INTERRUPT_STATUS             0x308
 167 #define  VE_INTERRUPT_MODE_DETECT_WD    BIT(0)
 168 #define  VE_INTERRUPT_CAPTURE_COMPLETE  BIT(1)
 169 #define  VE_INTERRUPT_COMP_READY        BIT(2)
 170 #define  VE_INTERRUPT_COMP_COMPLETE     BIT(3)
 171 #define  VE_INTERRUPT_MODE_DETECT       BIT(4)
 172 #define  VE_INTERRUPT_FRAME_COMPLETE    BIT(5)
 173 #define  VE_INTERRUPT_DECODE_ERR        BIT(6)
 174 #define  VE_INTERRUPT_HALT_READY        BIT(8)
 175 #define  VE_INTERRUPT_HANG_WD           BIT(9)
 176 #define  VE_INTERRUPT_STREAM_DESC       BIT(10)
 177 #define  VE_INTERRUPT_VSYNC_DESC        BIT(11)
 178
 179 #define VE_MODE_DETECT                  0x30c
 180 #define VE_MEM_RESTRICT_START           0x310
 181 #define VE_MEM_RESTRICT_END             0x314
 182
 183 enum {
 184         VIDEO_MODE_DETECT_DONE,
 185         VIDEO_RES_CHANGE,
 186         VIDEO_RES_DETECT,
 187         VIDEO_STREAMING,
 188         VIDEO_FRAME_INPRG,
 189         VIDEO_STOPPED,
 190 };
 191
 192 struct aspeed_video_addr {
 193         unsigned int size;
 194         dma_addr_t dma;
 195         void *virt;
 196 };
 197
 198 struct aspeed_video_buffer {
 199         struct vb2_v4l2_buffer vb;
 200         struct list_head link;
 201 };
 202
 203 #define to_aspeed_video_buffer(x) \
 204         container_of((x), struct aspeed_video_buffer, vb)
 205
 206 struct aspeed_video {
 207         void __iomem *base;
 208         struct clk *eclk;
 209         struct clk *vclk;
 210
 211         struct device *dev;
 212         struct v4l2_ctrl_handler ctrl_handler;
 213         struct v4l2_device v4l2_dev;
 214         struct v4l2_pix_format pix_fmt;
 215         struct v4l2_bt_timings active_timings;
 216         struct v4l2_bt_timings detected_timings;
 217         u32 v4l2_input_status;
 218         struct vb2_queue queue;
 219         struct video_device vdev;
 220         struct mutex video_lock;        /* v4l2 and videobuf2 lock */
 221
 222         wait_queue_head_t wait;
 223         spinlock_t lock;                /* buffer list lock */
 224         struct delayed_work res_work;
 225         struct list_head buffers;
 226         unsigned long flags;
 227         unsigned int sequence;
 228
 229         unsigned int max_compressed_size;
 230         struct aspeed_video_addr srcs[2];
 231         struct aspeed_video_addr jpeg;
 232
 233         bool yuv420;
 234         unsigned int frame_rate;
 235         unsigned int jpeg_quality;
 236
 237         unsigned int frame_bottom;
 238         unsigned int frame_left;
 239         unsigned int frame_right;
 240         unsigned int frame_top;
 241 };
 242
 243 #define to_aspeed_video(x) container_of((x), struct aspeed_video, v4l2_dev)
 244
 245 static const u32 aspeed_video_jpeg_header[ASPEED_VIDEO_JPEG_HEADER_SIZE] = {
 246         0xe0ffd8ff, 0x464a1000, 0x01004649, 0x60000101, 0x00006000, 0x0f00feff,
 247         0x00002d05, 0x00000000, 0x00000000, 0x00dbff00
 248 };
 249
 250 static const u32 aspeed_video_jpeg_quant[ASPEED_VIDEO_JPEG_QUANT_SIZE] = {
 251         0x081100c0, 0x00000000, 0x00110103, 0x03011102, 0xc4ff0111, 0x00001f00,
 252         0x01010501, 0x01010101, 0x00000000, 0x00000000, 0x04030201, 0x08070605,
 253         0xff0b0a09, 0x10b500c4, 0x03010200, 0x03040203, 0x04040505, 0x7d010000,
 254         0x00030201, 0x12051104, 0x06413121, 0x07615113, 0x32147122, 0x08a19181,
 255         0xc1b14223, 0xf0d15215, 0x72623324, 0x160a0982, 0x1a191817, 0x28272625,
 256         0x35342a29, 0x39383736, 0x4544433a, 0x49484746, 0x5554534a, 0x59585756,
 257         0x6564635a, 0x69686766, 0x7574736a, 0x79787776, 0x8584837a, 0x89888786,
 258         0x9493928a, 0x98979695, 0xa3a29a99, 0xa7a6a5a4, 0xb2aaa9a8, 0xb6b5b4b3,
 259         0xbab9b8b7, 0xc5c4c3c2, 0xc9c8c7c6, 0xd4d3d2ca, 0xd8d7d6d5, 0xe2e1dad9,
 260         0xe6e5e4e3, 0xeae9e8e7, 0xf4f3f2f1, 0xf8f7f6f5, 0xc4fffaf9, 0x00011f00,
 261         0x01010103, 0x01010101, 0x00000101, 0x00000000, 0x04030201, 0x08070605,
 262         0xff0b0a09, 0x11b500c4, 0x02010200, 0x04030404, 0x04040507, 0x77020100,
 263         0x03020100, 0x21050411, 0x41120631, 0x71610751, 0x81322213, 0x91421408,
 264         0x09c1b1a1, 0xf0523323, 0xd1726215, 0x3424160a, 0x17f125e1, 0x261a1918,
 265         0x2a292827, 0x38373635, 0x44433a39, 0x48474645, 0x54534a49, 0x58575655,
 266         0x64635a59, 0x68676665, 0x74736a69, 0x78777675, 0x83827a79, 0x87868584,
 267         0x928a8988, 0x96959493, 0x9a999897, 0xa5a4a3a2, 0xa9a8a7a6, 0xb4b3b2aa,
 268         0xb8b7b6b5, 0xc3c2bab9, 0xc7c6c5c4, 0xd2cac9c8, 0xd6d5d4d3, 0xdad9d8d7,
 269         0xe5e4e3e2, 0xe9e8e7e6, 0xf4f3f2ea, 0xf8f7f6f5, 0xdafffaf9, 0x01030c00,
 270         0x03110200, 0x003f0011
 271 };
 272
 273 static const u32 aspeed_video_jpeg_dct[ASPEED_VIDEO_JPEG_NUM_QUALITIES]
 274                                       [ASPEED_VIDEO_JPEG_DCT_SIZE] = {
 275         { 0x0d140043, 0x0c0f110f, 0x11101114, 0x17141516, 0x1e20321e,
 276           0x3d1e1b1b, 0x32242e2b, 0x4b4c3f48, 0x44463f47, 0x61735a50,
 277           0x566c5550, 0x88644644, 0x7a766c65, 0x4d808280, 0x8c978d60,
 278           0x7e73967d, 0xdbff7b80, 0x1f014300, 0x272d2121, 0x3030582d,
 279           0x697bb958, 0xb8b9b97b, 0xb9b8a6a6, 0xb9b9b9b9, 0xb9b9b9b9,
 280           0xb9b9b9b9, 0xb9b9b9b9, 0xb9b9b9b9, 0xb9b9b9b9, 0xb9b9b9b9,
 281           0xb9b9b9b9, 0xb9b9b9b9, 0xb9b9b9b9, 0xffb9b9b9 },
 282         { 0x0c110043, 0x0a0d0f0d, 0x0f0e0f11, 0x14111213, 0x1a1c2b1a,
 283           0x351a1818, 0x2b1f2826, 0x4142373f, 0x3c3d373e, 0x55644e46,
 284           0x4b5f4a46, 0x77573d3c, 0x6b675f58, 0x43707170, 0x7a847b54,
 285           0x6e64836d, 0xdbff6c70, 0x1b014300, 0x22271d1d, 0x2a2a4c27,
 286           0x5b6ba04c, 0xa0a0a06b, 0xa0a0a0a0, 0xa0a0a0a0, 0xa0a0a0a0,
 287           0xa0a0a0a0, 0xa0a0a0a0, 0xa0a0a0a0, 0xa0a0a0a0, 0xa0a0a0a0,
 288           0xa0a0a0a0, 0xa0a0a0a0, 0xa0a0a0a0, 0xffa0a0a0 },
 289         { 0x090e0043, 0x090a0c0a, 0x0c0b0c0e, 0x110e0f10, 0x15172415,
 290           0x2c151313, 0x241a211f, 0x36372e34, 0x31322e33, 0x4653413a,
 291           0x3e4e3d3a, 0x62483231, 0x58564e49, 0x385d5e5d, 0x656d6645,
 292           0x5b536c5a, 0xdbff595d, 0x16014300, 0x1c201818, 0x22223f20,
 293           0x4b58853f, 0x85858558, 0x85858585, 0x85858585, 0x85858585,
 294           0x85858585, 0x85858585, 0x85858585, 0x85858585, 0x85858585,
 295           0x85858585, 0x85858585, 0x85858585, 0xff858585 },
 296         { 0x070b0043, 0x07080a08, 0x0a090a0b, 0x0d0b0c0c, 0x11121c11,
 297           0x23110f0f, 0x1c141a19, 0x2b2b2429, 0x27282428, 0x3842332e,
 298           0x313e302e, 0x4e392827, 0x46443e3a, 0x2c4a4a4a, 0x50565137,
 299           0x48425647, 0xdbff474a, 0x12014300, 0x161a1313, 0x1c1c331a,
 300           0x3d486c33, 0x6c6c6c48, 0x6c6c6c6c, 0x6c6c6c6c, 0x6c6c6c6c,
 301           0x6c6c6c6c, 0x6c6c6c6c, 0x6c6c6c6c, 0x6c6c6c6c, 0x6c6c6c6c,
 302           0x6c6c6c6c, 0x6c6c6c6c, 0x6c6c6c6c, 0xff6c6c6c },
 303         { 0x06090043, 0x05060706, 0x07070709, 0x0a09090a, 0x0d0e160d,
 304           0x1b0d0c0c, 0x16101413, 0x21221c20, 0x1e1f1c20, 0x2b332824,
 305           0x26302624, 0x3d2d1f1e, 0x3735302d, 0x22393a39, 0x3f443f2b,
 306           0x38334338, 0xdbff3739, 0x0d014300, 0x11130e0e, 0x15152613,
 307           0x2d355026, 0x50505035, 0x50505050, 0x50505050, 0x50505050,
 308           0x50505050, 0x50505050, 0x50505050, 0x50505050, 0x50505050,
 309           0x50505050, 0x50505050, 0x50505050, 0xff505050 },
 310         { 0x04060043, 0x03040504, 0x05040506, 0x07060606, 0x09090f09,
 311           0x12090808, 0x0f0a0d0d, 0x16161315, 0x14151315, 0x1d221b18,
 312           0x19201918, 0x281e1514, 0x2423201e, 0x17262726, 0x2a2d2a1c,
 313           0x25222d25, 0xdbff2526, 0x09014300, 0x0b0d0a0a, 0x0e0e1a0d,
 314           0x1f25371a, 0x37373725, 0x37373737, 0x37373737, 0x37373737,
 315           0x37373737, 0x37373737, 0x37373737, 0x37373737, 0x37373737,
 316           0x37373737, 0x37373737, 0x37373737, 0xff373737 },
 317         { 0x02030043, 0x01020202, 0x02020203, 0x03030303, 0x04040704,
 318           0x09040404, 0x07050606, 0x0b0b090a, 0x0a0a090a, 0x0e110d0c,
 319           0x0c100c0c, 0x140f0a0a, 0x1211100f, 0x0b131313, 0x1516150e,
 320           0x12111612, 0xdbff1213, 0x04014300, 0x05060505, 0x07070d06,
 321           0x0f121b0d, 0x1b1b1b12, 0x1b1b1b1b, 0x1b1b1b1b, 0x1b1b1b1b,
 322           0x1b1b1b1b, 0x1b1b1b1b, 0x1b1b1b1b, 0x1b1b1b1b, 0x1b1b1b1b,
 323           0x1b1b1b1b, 0x1b1b1b1b, 0x1b1b1b1b, 0xff1b1b1b },
 324         { 0x01020043, 0x01010101, 0x01010102, 0x02020202, 0x03030503,
 325           0x06030202, 0x05030404, 0x07070607, 0x06070607, 0x090b0908,
 326           0x080a0808, 0x0d0a0706, 0x0c0b0a0a, 0x070c0d0c, 0x0e0f0e09,
 327           0x0c0b0f0c, 0xdbff0c0c, 0x03014300, 0x03040303, 0x04040804,
 328           0x0a0c1208, 0x1212120c, 0x12121212, 0x12121212, 0x12121212,
 329           0x12121212, 0x12121212, 0x12121212, 0x12121212, 0x12121212,
 330           0x12121212, 0x12121212, 0x12121212, 0xff121212 },
 331         { 0x01020043, 0x01010101, 0x01010102, 0x02020202, 0x03030503,
 332           0x06030202, 0x05030404, 0x07070607, 0x06070607, 0x090b0908,
 333           0x080a0808, 0x0d0a0706, 0x0c0b0a0a, 0x070c0d0c, 0x0e0f0e09,
 334           0x0c0b0f0c, 0xdbff0c0c, 0x02014300, 0x03030202, 0x04040703,
 335           0x080a0f07, 0x0f0f0f0a, 0x0f0f0f0f, 0x0f0f0f0f, 0x0f0f0f0f,
 336           0x0f0f0f0f, 0x0f0f0f0f, 0x0f0f0f0f, 0x0f0f0f0f, 0x0f0f0f0f,
 337           0x0f0f0f0f, 0x0f0f0f0f, 0x0f0f0f0f, 0xff0f0f0f },
 338         { 0x01010043, 0x01010101, 0x01010101, 0x01010101, 0x02020302,
 339           0x04020202, 0x03020303, 0x05050405, 0x05050405, 0x07080606,
 340           0x06080606, 0x0a070505, 0x09080807, 0x05090909, 0x0a0b0a07,
 341           0x09080b09, 0xdbff0909, 0x02014300, 0x02030202, 0x03030503,
 342           0x07080c05, 0x0c0c0c08, 0x0c0c0c0c, 0x0c0c0c0c, 0x0c0c0c0c,
 343           0x0c0c0c0c, 0x0c0c0c0c, 0x0c0c0c0c, 0x0c0c0c0c, 0x0c0c0c0c,
 344           0x0c0c0c0c, 0x0c0c0c0c, 0x0c0c0c0c, 0xff0c0c0c },
 345         { 0x01010043, 0x01010101, 0x01010101, 0x01010101, 0x01010201,
 346           0x03010101, 0x02010202, 0x03030303, 0x03030303, 0x04050404,
 347           0x04050404, 0x06050303, 0x06050505, 0x03060606, 0x07070704,
 348           0x06050706, 0xdbff0606, 0x01014300, 0x01020101, 0x02020402,
 349           0x05060904, 0x09090906, 0x09090909, 0x09090909, 0x09090909,
 350           0x09090909, 0x09090909, 0x09090909, 0x09090909, 0x09090909,
 351           0x09090909, 0x09090909, 0x09090909, 0xff090909 },
 352         { 0x01010043, 0x01010101, 0x01010101, 0x01010101, 0x01010101,
 353           0x01010101, 0x01010101, 0x01010101, 0x01010101, 0x02020202,
 354           0x02020202, 0x03020101, 0x03020202, 0x01030303, 0x03030302,
 355           0x03020303, 0xdbff0403, 0x01014300, 0x01010101, 0x01010201,
 356           0x03040602, 0x06060604, 0x06060606, 0x06060606, 0x06060606,
 357           0x06060606, 0x06060606, 0x06060606, 0x06060606, 0x06060606,
 358           0x06060606, 0x06060606, 0x06060606, 0xff060606 }
 359 };
 360
 361 static const struct v4l2_dv_timings_cap aspeed_video_timings_cap = {
 362         .type = V4L2_DV_BT_656_1120,
 363         .bt = {
 364                 .min_width = MIN_WIDTH,
 365                 .max_width = MAX_WIDTH,
 366                 .min_height = MIN_HEIGHT,
 367                 .max_height = MAX_HEIGHT,
 368                 .min_pixelclock = 6574080, /* 640 x 480 x 24Hz */
 369                 .max_pixelclock = 138240000, /* 1920 x 1200 x 60Hz */
 370                 .standards = V4L2_DV_BT_STD_CEA861 | V4L2_DV_BT_STD_DMT |
 371                         V4L2_DV_BT_STD_CVT | V4L2_DV_BT_STD_GTF,
 372                 .capabilities = V4L2_DV_BT_CAP_PROGRESSIVE |
 373                         V4L2_DV_BT_CAP_REDUCED_BLANKING |
 374                         V4L2_DV_BT_CAP_CUSTOM,
 375         },
 376 };
 377
 378 static void aspeed_video_init_jpeg_table(u32 *table, bool yuv420)
 379 {
 380         int i;
 381         unsigned int base;
 382
 383         for (i = 0; i < ASPEED_VIDEO_JPEG_NUM_QUALITIES; i++) {
 384                 base = 256 * i; /* AST HW requires this header spacing */
 385                 memcpy(&table[base], aspeed_video_jpeg_header,
 386                        sizeof(aspeed_video_jpeg_header));
 387
 388                 base += ASPEED_VIDEO_JPEG_HEADER_SIZE;
 389                 memcpy(&table[base], aspeed_video_jpeg_dct[i],
 390                        sizeof(aspeed_video_jpeg_dct[i]));
 391
 392                 base += ASPEED_VIDEO_JPEG_DCT_SIZE;
 393                 memcpy(&table[base], aspeed_video_jpeg_quant,
 394                        sizeof(aspeed_video_jpeg_quant));
 395
 396                 if (yuv420)
 397                         table[base + 2] = 0x00220103;
 398         }
 399 }
 400
 401 static void aspeed_video_update(struct aspeed_video *video, u32 reg, u32 clear,
 402                                 u32 bits)
 403 {
 404         u32 t = readl(video->base + reg);
 405         u32 before = t;
 406
 407         t &= ~clear;
 408         t |= bits;
 409         writel(t, video->base + reg);
 410         dev_dbg(video->dev, "update %03x[%08x -> %08x]\n", reg, before,
 411                 readl(video->base + reg));
 412 }
 413
 414 static u32 aspeed_video_read(struct aspeed_video *video, u32 reg)
 415 {
 416         u32 t = readl(video->base + reg);
 417
 418         dev_dbg(video->dev, "read %03x[%08x]\n", reg, t);
 419         return t;
 420 }
 421
 422 static void aspeed_video_write(struct aspeed_video *video, u32 reg, u32 val)
 423 {
 424         writel(val, video->base + reg);
 425         dev_dbg(video->dev, "write %03x[%08x]\n", reg,
 426                 readl(video->base + reg));
 427 }
 428
 429 static int aspeed_video_start_frame(struct aspeed_video *video)
 430 {
 431         dma_addr_t addr;
 432         unsigned long flags;
 433         struct aspeed_video_buffer *buf;
 434         u32 seq_ctrl = aspeed_video_read(video, VE_SEQ_CTRL);
 435
 436         if (video->v4l2_input_status) {
 437                 dev_dbg(video->dev, "No signal; don't start frame\n");
 438                 return 0;
 439         }
 440
 441         if (!(seq_ctrl & VE_SEQ_CTRL_COMP_BUSY) ||
 442             !(seq_ctrl & VE_SEQ_CTRL_CAP_BUSY)) {
 443                 dev_err(video->dev, "Engine busy; don't start frame\n");
 444                 return -EBUSY;
 445         }
 446
 447         spin_lock_irqsave(&video->lock, flags);
 448         buf = list_first_entry_or_null(&video->buffers,
 449                                        struct aspeed_video_buffer, link);
 450         if (!buf) {
 451                 spin_unlock_irqrestore(&video->lock, flags);
 452                 dev_dbg(video->dev, "No buffers; don't start frame\n");
 453                 return -EPROTO;
 454         }
 455
 456         set_bit(VIDEO_FRAME_INPRG, &video->flags);
 457         addr = vb2_dma_contig_plane_dma_addr(&buf->vb.vb2_buf, 0);
 458         spin_unlock_irqrestore(&video->lock, flags);
 459
 460         aspeed_video_write(video, VE_COMP_PROC_OFFSET, 0);
 461         aspeed_video_write(video, VE_COMP_OFFSET, 0);
 462         aspeed_video_write(video, VE_COMP_ADDR, addr);
 463
 464         aspeed_video_update(video, VE_INTERRUPT_CTRL, 0,
 465                             VE_INTERRUPT_COMP_COMPLETE |
 466                             VE_INTERRUPT_CAPTURE_COMPLETE);
 467
 468         aspeed_video_update(video, VE_SEQ_CTRL, 0,
 469                             VE_SEQ_CTRL_TRIG_CAPTURE | VE_SEQ_CTRL_TRIG_COMP);
 470
 471         return 0;
 472 }
 473
 474 static void aspeed_video_enable_mode_detect(struct aspeed_video *video)
 475 {
 476         /* Enable mode detect interrupts */
 477         aspeed_video_update(video, VE_INTERRUPT_CTRL, 0,
 478                             VE_INTERRUPT_MODE_DETECT);
 479
 480         /* Trigger mode detect */
 481         aspeed_video_update(video, VE_SEQ_CTRL, 0, VE_SEQ_CTRL_TRIG_MODE_DET);
 482 }
 483
 484 static void aspeed_video_off(struct aspeed_video *video)
 485 {
 486         /* Disable interrupts */
 487         aspeed_video_write(video, VE_INTERRUPT_CTRL, 0);
 488
 489         /* Turn off the relevant clocks */
 490         clk_disable_unprepare(video->vclk);
 491         clk_disable_unprepare(video->eclk);
 492 }
 493
 494 static void aspeed_video_on(struct aspeed_video *video)
 495 {
 496         /* Turn on the relevant clocks */
 497         clk_prepare_enable(video->eclk);
 498         clk_prepare_enable(video->vclk);
 499 }
 500
 501 static void aspeed_video_bufs_done(struct aspeed_video *video,
 502                                    enum vb2_buffer_state state)
 503 {
 504         unsigned long flags;
 505         struct aspeed_video_buffer *buf;
 506
 507         spin_lock_irqsave(&video->lock, flags);
 508         list_for_each_entry(buf, &video->buffers, link)
 509                 vb2_buffer_done(&buf->vb.vb2_buf, state);
 510         INIT_LIST_HEAD(&video->buffers);
 511         spin_unlock_irqrestore(&video->lock, flags);
 512 }
 513
 514 static void aspeed_video_irq_res_change(struct aspeed_video *video)
 515 {
 516         dev_dbg(video->dev, "Resolution changed; resetting\n");
 517
 518         set_bit(VIDEO_RES_CHANGE, &video->flags);
 519         clear_bit(VIDEO_FRAME_INPRG, &video->flags);
 520
 521         aspeed_video_off(video);
 522         aspeed_video_bufs_done(video, VB2_BUF_STATE_ERROR);
 523
 524         schedule_delayed_work(&video->res_work, RESOLUTION_CHANGE_DELAY);
 525 }
 526
 527 static irqreturn_t aspeed_video_irq(int irq, void *arg)
 528 {
 529         struct aspeed_video *video = arg;
 530         u32 sts = aspeed_video_read(video, VE_INTERRUPT_STATUS);
 531
 532         /*
 533          * Resolution changed or signal was lost; reset the engine and
 534          * re-initialize
 535          */
 536         if (sts & VE_INTERRUPT_MODE_DETECT_WD) {
 537                 aspeed_video_irq_res_change(video);
 538                 return IRQ_HANDLED;
 539         }
 540
 541         if (sts & VE_INTERRUPT_MODE_DETECT) {
 542                 if (test_bit(VIDEO_RES_DETECT, &video->flags)) {
 543                         aspeed_video_update(video, VE_INTERRUPT_CTRL,
 544                                             VE_INTERRUPT_MODE_DETECT, 0);
 545                         aspeed_video_write(video, VE_INTERRUPT_STATUS,
 546                                            VE_INTERRUPT_MODE_DETECT);
 547
 548                         set_bit(VIDEO_MODE_DETECT_DONE, &video->flags);
 549                         wake_up_interruptible_all(&video->wait);
 550                 } else {
 551                         /*
 552                          * Signal acquired while NOT doing resolution
 553                          * detection; reset the engine and re-initialize
 554                          */
 555                         aspeed_video_irq_res_change(video);
 556                         return IRQ_HANDLED;
 557                 }
 558         }
 559
 560         if ((sts & VE_INTERRUPT_COMP_COMPLETE) &&
 561             (sts & VE_INTERRUPT_CAPTURE_COMPLETE)) {
 562                 struct aspeed_video_buffer *buf;
 563                 u32 frame_size = aspeed_video_read(video,
 564                                                    VE_OFFSET_COMP_STREAM);
 565
 566                 spin_lock(&video->lock);
 567                 clear_bit(VIDEO_FRAME_INPRG, &video->flags);
 568                 buf = list_first_entry_or_null(&video->buffers,
 569                                                struct aspeed_video_buffer,
 570                                                link);
 571                 if (buf) {
 572                         vb2_set_plane_payload(&buf->vb.vb2_buf, 0, frame_size);
 573
 574                         if (!list_is_last(&buf->link, &video->buffers)) {
 575                                 buf->vb.vb2_buf.timestamp = ktime_get_ns();
 576                                 buf->vb.sequence = video->sequence++;
 577                                 buf->vb.field = V4L2_FIELD_NONE;
 578                                 vb2_buffer_done(&buf->vb.vb2_buf,
 579                                                 VB2_BUF_STATE_DONE);
 580                                 list_del(&buf->link);
 581                         }
 582                 }
 583                 spin_unlock(&video->lock);
 584
 585                 aspeed_video_update(video, VE_SEQ_CTRL,
 586                                     VE_SEQ_CTRL_TRIG_CAPTURE |
 587                                     VE_SEQ_CTRL_FORCE_IDLE |
 588                                     VE_SEQ_CTRL_TRIG_COMP, 0);
 589                 aspeed_video_update(video, VE_INTERRUPT_CTRL,
 590                                     VE_INTERRUPT_COMP_COMPLETE |
 591                                     VE_INTERRUPT_CAPTURE_COMPLETE, 0);
 592                 aspeed_video_write(video, VE_INTERRUPT_STATUS,
 593                                    VE_INTERRUPT_COMP_COMPLETE |
 594                                    VE_INTERRUPT_CAPTURE_COMPLETE);
 595
 596                 if (test_bit(VIDEO_STREAMING, &video->flags) && buf)
 597                         aspeed_video_start_frame(video);
 598         }
 599
 600         return IRQ_HANDLED;
 601 }
 602
 603 static void aspeed_video_check_and_set_polarity(struct aspeed_video *video)
 604 {
 605         int i;
 606         int hsync_counter = 0;
 607         int vsync_counter = 0;
 608         u32 sts;
 609
 610         for (i = 0; i < NUM_POLARITY_CHECKS; ++i) {
 611                 sts = aspeed_video_read(video, VE_MODE_DETECT_STATUS);
 612                 if (sts & VE_MODE_DETECT_STATUS_VSYNC)
 613                         vsync_counter--;
 614                 else
 615                         vsync_counter++;
 616
 617                 if (sts & VE_MODE_DETECT_STATUS_HSYNC)
 618                         hsync_counter--;
 619                 else
 620                         hsync_counter++;
 621         }
 622
 623         if (hsync_counter < 0 || vsync_counter < 0) {
 624                 u32 ctrl;
 625
 626                 if (hsync_counter < 0) {
 627                         ctrl = VE_CTRL_HSYNC_POL;
 628                         video->detected_timings.polarities &=
 629                                 ~V4L2_DV_HSYNC_POS_POL;
 630                 } else {
 631                         video->detected_timings.polarities |=
 632                                 V4L2_DV_HSYNC_POS_POL;
 633                 }
 634
 635                 if (vsync_counter < 0) {
 636                         ctrl = VE_CTRL_VSYNC_POL;
 637                         video->detected_timings.polarities &=
 638                                 ~V4L2_DV_VSYNC_POS_POL;
 639                 } else {
 640                         video->detected_timings.polarities |=
 641                                 V4L2_DV_VSYNC_POS_POL;
 642                 }
 643
 644                 aspeed_video_update(video, VE_CTRL, 0, ctrl);
 645         }
 646 }
 647
 648 static bool aspeed_video_alloc_buf(struct aspeed_video *video,
 649                                    struct aspeed_video_addr *addr,
 650                                    unsigned int size)
 651 {
 652         addr->virt = dma_alloc_coherent(video->dev, size, &addr->dma,
 653                                         GFP_KERNEL);
 654         if (!addr->virt)
 655                 return false;
 656
 657         addr->size = size;
 658         return true;
 659 }
 660
 661 static void aspeed_video_free_buf(struct aspeed_video *video,
 662                                   struct aspeed_video_addr *addr)
 663 {
 664         dma_free_coherent(video->dev, addr->size, addr->virt, addr->dma);
 665         addr->size = 0;
 666         addr->dma = 0ULL;
 667         addr->virt = NULL;
 668 }
 669
 670 /*
 671  * Get the minimum HW-supported compression buffer size for the frame size.
 672  * Assume worst-case JPEG compression size is 1/8 raw size. This should be
 673  * plenty even for maximum quality; any worse and the engine will simply return
 674  * incomplete JPEGs.
 675  */
 676 static void aspeed_video_calc_compressed_size(struct aspeed_video *video,
 677                                               unsigned int frame_size)
 678 {
 679         int i, j;
 680         u32 compression_buffer_size_reg = 0;
 681         unsigned int size;
 682         const unsigned int num_compression_packets = 4;
 683         const unsigned int compression_packet_size = 1024;
 684         const unsigned int max_compressed_size = frame_size / 2; /* 4bpp / 8 */
 685
 686         video->max_compressed_size = UINT_MAX;
 687
 688         for (i = 0; i < 6; ++i) {
 689                 for (j = 0; j < 8; ++j) {
 690                         size = (num_compression_packets << i) *
 691                                 (compression_packet_size << j);
 692                         if (size < max_compressed_size)
 693                                 continue;
 694
 695                         if (size < video->max_compressed_size) {
 696                                 compression_buffer_size_reg = (i << 3) | j;
 697                                 video->max_compressed_size = size;
 698                         }
 699                 }
 700         }
 701
 702         aspeed_video_write(video, VE_STREAM_BUF_SIZE,
 703                            compression_buffer_size_reg);
 704
 705         dev_dbg(video->dev, "Max compressed size: %x\n",
 706                 video->max_compressed_size);
 707 }
 708
 709 #define res_check(v) test_and_clear_bit(VIDEO_MODE_DETECT_DONE, &(v)->flags)
 710
 711 static void aspeed_video_get_resolution(struct aspeed_video *video)
 712 {
 713         bool invalid_resolution = true;
 714         int rc;
 715         int tries = 0;
 716         u32 mds;
 717         u32 src_lr_edge;
 718         u32 src_tb_edge;
 719         u32 sync;
 720         struct v4l2_bt_timings *det = &video->detected_timings;
 721
 722         det->width = MIN_WIDTH;
 723         det->height = MIN_HEIGHT;
 724         video->v4l2_input_status = V4L2_IN_ST_NO_SIGNAL;
 725
 726         /*
 727          * Since we need max buffer size for detection, free the second source
 728          * buffer first.
 729          */
 730         if (video->srcs[1].size)
 731                 aspeed_video_free_buf(video, &video->srcs[1]);
 732
 733         if (video->srcs[0].size < VE_MAX_SRC_BUFFER_SIZE) {
 734                 if (video->srcs[0].size)
 735                         aspeed_video_free_buf(video, &video->srcs[0]);
 736
 737                 if (!aspeed_video_alloc_buf(video, &video->srcs[0],
 738                                             VE_MAX_SRC_BUFFER_SIZE)) {
 739                         dev_err(video->dev,
 740                                 "Failed to allocate source buffers\n");
 741                         return;
 742                 }
 743         }
 744
 745         aspeed_video_write(video, VE_SRC0_ADDR, video->srcs[0].dma);
 746
 747         do {
 748                 if (tries) {
 749                         set_current_state(TASK_INTERRUPTIBLE);
 750                         if (schedule_timeout(INVALID_RESOLUTION_DELAY))
 751                                 return;
 752                 }
 753
 754                 set_bit(VIDEO_RES_DETECT, &video->flags);
 755                 aspeed_video_enable_mode_detect(video);
 756
 757                 rc = wait_event_interruptible_timeout(video->wait,
 758                                                       res_check(video),
 759                                                       MODE_DETECT_TIMEOUT);
 760                 if (!rc) {
 761                         dev_err(video->dev, "Timed out; first mode detect\n");
 762                         clear_bit(VIDEO_RES_DETECT, &video->flags);
 763                         return;
 764                 }
 765
 766                 /* Disable mode detect in order to re-trigger */
 767                 aspeed_video_update(video, VE_SEQ_CTRL,
 768                                     VE_SEQ_CTRL_TRIG_MODE_DET, 0);
 769
 770                 aspeed_video_check_and_set_polarity(video);
 771
 772                 aspeed_video_enable_mode_detect(video);
 773
 774                 rc = wait_event_interruptible_timeout(video->wait,
 775                                                       res_check(video),
 776                                                       MODE_DETECT_TIMEOUT);
 777                 clear_bit(VIDEO_RES_DETECT, &video->flags);
 778                 if (!rc) {
 779                         dev_err(video->dev, "Timed out; second mode detect\n");
 780                         return;
 781                 }
 782
 783                 src_lr_edge = aspeed_video_read(video, VE_SRC_LR_EDGE_DET);
 784                 src_tb_edge = aspeed_video_read(video, VE_SRC_TB_EDGE_DET);
 785                 mds = aspeed_video_read(video, VE_MODE_DETECT_STATUS);
 786                 sync = aspeed_video_read(video, VE_SYNC_STATUS);
 787
 788                 video->frame_bottom = (src_tb_edge & VE_SRC_TB_EDGE_DET_BOT) >>
 789                         VE_SRC_TB_EDGE_DET_BOT_SHF;
 790                 video->frame_top = src_tb_edge & VE_SRC_TB_EDGE_DET_TOP;
 791                 det->vfrontporch = video->frame_top;
 792                 det->vbackporch = ((mds & VE_MODE_DETECT_V_LINES) >>
 793                         VE_MODE_DETECT_V_LINES_SHF) - video->frame_bottom;
 794                 det->vsync = (sync & VE_SYNC_STATUS_VSYNC) >>
 795                         VE_SYNC_STATUS_VSYNC_SHF;
 796                 if (video->frame_top > video->frame_bottom)
 797                         continue;
 798
 799                 video->frame_right = (src_lr_edge & VE_SRC_LR_EDGE_DET_RT) >>
 800                         VE_SRC_LR_EDGE_DET_RT_SHF;
 801                 video->frame_left = src_lr_edge & VE_SRC_LR_EDGE_DET_LEFT;
 802                 det->hfrontporch = video->frame_left;
 803                 det->hbackporch = (mds & VE_MODE_DETECT_H_PIXELS) -
 804                         video->frame_right;
 805                 det->hsync = sync & VE_SYNC_STATUS_HSYNC;
 806                 if (video->frame_left > video->frame_right)
 807                         continue;
 808
 809                 invalid_resolution = false;
 810         } while (invalid_resolution && (tries++ < INVALID_RESOLUTION_RETRIES));
 811
 812         if (invalid_resolution) {
 813                 dev_err(video->dev, "Invalid resolution detected\n");
 814                 return;
 815         }
 816
 817         det->height = (video->frame_bottom - video->frame_top) + 1;
 818         det->width = (video->frame_right - video->frame_left) + 1;
 819         video->v4l2_input_status = 0;
 820
 821         /*
 822          * Enable mode-detect watchdog, resolution-change watchdog and
 823          * automatic compression after frame capture.
 824          */
 825         aspeed_video_update(video, VE_INTERRUPT_CTRL, 0,
 826                             VE_INTERRUPT_MODE_DETECT_WD);
 827         aspeed_video_update(video, VE_SEQ_CTRL, 0,
 828                             VE_SEQ_CTRL_AUTO_COMP | VE_SEQ_CTRL_EN_WATCHDOG);
 829
 830         dev_dbg(video->dev, "Got resolution: %dx%d\n", det->width,
 831                 det->height);
 832 }
 833
 834 static void aspeed_video_set_resolution(struct aspeed_video *video)
 835 {
 836         struct v4l2_bt_timings *act = &video->active_timings;
 837         unsigned int size = act->width * act->height;
 838
 839         aspeed_video_calc_compressed_size(video, size);
 840
 841         /* Don't use direct mode below 1024 x 768 (irqs don't fire) */
 842         if (size < DIRECT_FETCH_THRESHOLD) {
 843                 aspeed_video_write(video, VE_TGS_0,
 844                                    FIELD_PREP(VE_TGS_FIRST,
 845                                               video->frame_left - 1) |
 846                                    FIELD_PREP(VE_TGS_LAST,
 847                                               video->frame_right));
 848                 aspeed_video_write(video, VE_TGS_1,
 849                                    FIELD_PREP(VE_TGS_FIRST, video->frame_top) |
 850                                    FIELD_PREP(VE_TGS_LAST,
 851                                               video->frame_bottom + 1));
 852                 aspeed_video_update(video, VE_CTRL, 0, VE_CTRL_INT_DE);
 853         } else {
 854                 aspeed_video_update(video, VE_CTRL, 0, VE_CTRL_DIRECT_FETCH);
 855         }
 856
 857         /* Set capture/compression frame sizes */
 858         aspeed_video_write(video, VE_CAP_WINDOW,
 859                            act->width << 16 | act->height);
 860         aspeed_video_write(video, VE_COMP_WINDOW,
 861                            act->width << 16 | act->height);
 862         aspeed_video_write(video, VE_SRC_SCANLINE_OFFSET, act->width * 4);
 863
 864         size *= 4;
 865
 866         if (size == video->srcs[0].size / 2) {
 867                 aspeed_video_write(video, VE_SRC1_ADDR,
 868                                    video->srcs[0].dma + size);
 869         } else if (size == video->srcs[0].size) {
 870                 if (!aspeed_video_alloc_buf(video, &video->srcs[1], size))
 871                         goto err_mem;
 872
 873                 aspeed_video_write(video, VE_SRC1_ADDR, video->srcs[1].dma);
 874         } else {
 875                 aspeed_video_free_buf(video, &video->srcs[0]);
 876
 877                 if (!aspeed_video_alloc_buf(video, &video->srcs[0], size))
 878                         goto err_mem;
 879
 880                 if (!aspeed_video_alloc_buf(video, &video->srcs[1], size))
 881                         goto err_mem;
 882
 883                 aspeed_video_write(video, VE_SRC0_ADDR, video->srcs[0].dma);
 884                 aspeed_video_write(video, VE_SRC1_ADDR, video->srcs[1].dma);
 885         }
 886
 887         return;
 888
 889 err_mem:
 890         dev_err(video->dev, "Failed to allocate source buffers\n");
 891
 892         if (video->srcs[0].size)
 893                 aspeed_video_free_buf(video, &video->srcs[0]);
 894 }
 895
 896 static void aspeed_video_init_regs(struct aspeed_video *video)
 897 {
 898         u32 comp_ctrl = VE_COMP_CTRL_RSVD |
 899                 FIELD_PREP(VE_COMP_CTRL_DCT_LUM, video->jpeg_quality) |
 900                 FIELD_PREP(VE_COMP_CTRL_DCT_CHR, video->jpeg_quality | 0x10);
 901         u32 ctrl = VE_CTRL_AUTO_OR_CURSOR;
 902         u32 seq_ctrl = VE_SEQ_CTRL_JPEG_MODE;
 903
 904         if (video->frame_rate)
 905                 ctrl |= FIELD_PREP(VE_CTRL_FRC, video->frame_rate);
 906
 907         if (video->yuv420)
 908                 seq_ctrl |= VE_SEQ_CTRL_YUV420;
 909
 910         /* Unlock VE registers */
 911         aspeed_video_write(video, VE_PROTECTION_KEY, VE_PROTECTION_KEY_UNLOCK);
 912
 913         /* Disable interrupts */
 914         aspeed_video_write(video, VE_INTERRUPT_CTRL, 0);
 915         aspeed_video_write(video, VE_INTERRUPT_STATUS, 0xffffffff);
 916
 917         /* Clear the offset */
 918         aspeed_video_write(video, VE_COMP_PROC_OFFSET, 0);
 919         aspeed_video_write(video, VE_COMP_OFFSET, 0);
 920
 921         aspeed_video_write(video, VE_JPEG_ADDR, video->jpeg.dma);
 922
 923         /* Set control registers */
 924         aspeed_video_write(video, VE_SEQ_CTRL, seq_ctrl);
 925         aspeed_video_write(video, VE_CTRL, ctrl);
 926         aspeed_video_write(video, VE_COMP_CTRL, comp_ctrl);
 927
 928         /* Don't downscale */
 929         aspeed_video_write(video, VE_SCALING_FACTOR, 0x10001000);
 930         aspeed_video_write(video, VE_SCALING_FILTER0, 0x00200000);
 931         aspeed_video_write(video, VE_SCALING_FILTER1, 0x00200000);
 932         aspeed_video_write(video, VE_SCALING_FILTER2, 0x00200000);
 933         aspeed_video_write(video, VE_SCALING_FILTER3, 0x00200000);
 934
 935         /* Set mode detection defaults */
 936         aspeed_video_write(video, VE_MODE_DETECT, 0x22666500);
 937 }
 938
 939 static void aspeed_video_start(struct aspeed_video *video)
 940 {
 941         aspeed_video_on(video);
 942
 943         aspeed_video_init_regs(video);
 944
 945         /* Resolution set to 640x480 if no signal found */
 946         aspeed_video_get_resolution(video);
 947
 948         /* Set timings since the device is being opened for the first time */
 949         video->active_timings = video->detected_timings;
 950         aspeed_video_set_resolution(video);
 951
 952         video->pix_fmt.width = video->active_timings.width;
 953         video->pix_fmt.height = video->active_timings.height;
 954         video->pix_fmt.sizeimage = video->max_compressed_size;
 955 }
 956
 957 static void aspeed_video_stop(struct aspeed_video *video)
 958 {
 959         set_bit(VIDEO_STOPPED, &video->flags);
 960         cancel_delayed_work_sync(&video->res_work);
 961
 962         aspeed_video_off(video);
 963
 964         if (video->srcs[0].size)
 965                 aspeed_video_free_buf(video, &video->srcs[0]);
 966
 967         if (video->srcs[1].size)
 968                 aspeed_video_free_buf(video, &video->srcs[1]);
 969
 970         video->v4l2_input_status = V4L2_IN_ST_NO_SIGNAL;
 971         video->flags = 0;
 972 }
 973
 974 static int aspeed_video_querycap(struct file *file, void *fh,
 975                                  struct v4l2_capability *cap)
 976 {
 977         strscpy(cap->driver, DEVICE_NAME, sizeof(cap->driver));
 978         strscpy(cap->card, "Aspeed Video Engine", sizeof(cap->card));
 979         snprintf(cap->bus_info, sizeof(cap->bus_info), "platform:%s",
 980                  DEVICE_NAME);
 981
 982         return 0;
 983 }
 984
 985 static int aspeed_video_enum_format(struct file *file, void *fh,
 986                                     struct v4l2_fmtdesc *f)
 987 {
 988         if (f->index)
 989                 return -EINVAL;
 990
 991         f->pixelformat = V4L2_PIX_FMT_JPEG;
 992
 993         return 0;
 994 }
 995
 996 static int aspeed_video_get_format(struct file *file, void *fh,
 997                                    struct v4l2_format *f)
 998 {
 999         struct aspeed_video *video = video_drvdata(file);
1000
1001         f->fmt.pix = video->pix_fmt;
1002
1003         return 0;
1004 }
1005
1006 static int aspeed_video_enum_input(struct file *file, void *fh,
1007                                    struct v4l2_input *inp)
1008 {
1009         struct aspeed_video *video = video_drvdata(file);
1010
1011         if (inp->index)
1012                 return -EINVAL;
1013
1014         strscpy(inp->name, "Host VGA capture", sizeof(inp->name));
1015         inp->type = V4L2_INPUT_TYPE_CAMERA;
1016         inp->capabilities = V4L2_IN_CAP_DV_TIMINGS;
1017         inp->status = video->v4l2_input_status;
1018
1019         return 0;
1020 }
1021
1022 static int aspeed_video_get_input(struct file *file, void *fh, unsigned int *i)
1023 {
1024         *i = 0;
1025
1026         return 0;
1027 }
1028
1029 static int aspeed_video_set_input(struct file *file, void *fh, unsigned int i)
1030 {
1031         if (i)
1032                 return -EINVAL;
1033
1034         return 0;
1035 }
1036
1037 static int aspeed_video_get_parm(struct file *file, void *fh,
1038                                  struct v4l2_streamparm *a)
1039 {
1040         struct aspeed_video *video = video_drvdata(file);
1041
1042         a->parm.capture.capability = V4L2_CAP_TIMEPERFRAME;
1043         a->parm.capture.readbuffers = 3;
1044         a->parm.capture.timeperframe.numerator = 1;
1045         if (!video->frame_rate)
1046                 a->parm.capture.timeperframe.denominator = MAX_FRAME_RATE;
1047         else
1048                 a->parm.capture.timeperframe.denominator = video->frame_rate;
1049
1050         return 0;
1051 }
1052
1053 static int aspeed_video_set_parm(struct file *file, void *fh,
1054                                  struct v4l2_streamparm *a)
1055 {
1056         unsigned int frame_rate = 0;
1057         struct aspeed_video *video = video_drvdata(file);
1058
1059         a->parm.capture.capability = V4L2_CAP_TIMEPERFRAME;
1060         a->parm.capture.readbuffers = 3;
1061
1062         if (a->parm.capture.timeperframe.numerator)
1063                 frame_rate = a->parm.capture.timeperframe.denominator /
1064                         a->parm.capture.timeperframe.numerator;
1065
1066         if (!frame_rate || frame_rate > MAX_FRAME_RATE) {
1067                 frame_rate = 0;
1068                 a->parm.capture.timeperframe.denominator = MAX_FRAME_RATE;
1069                 a->parm.capture.timeperframe.numerator = 1;
1070         }
1071
1072         if (video->frame_rate != frame_rate) {
1073                 video->frame_rate = frame_rate;
1074                 aspeed_video_update(video, VE_CTRL, VE_CTRL_FRC,
1075                                     FIELD_PREP(VE_CTRL_FRC, frame_rate));
1076         }
1077
1078         return 0;
1079 }
1080
1081 static int aspeed_video_enum_framesizes(struct file *file, void *fh,
1082                                         struct v4l2_frmsizeenum *fsize)
1083 {
1084         struct aspeed_video *video = video_drvdata(file);
1085
1086         if (fsize->index)
1087                 return -EINVAL;
1088
1089         if (fsize->pixel_format != V4L2_PIX_FMT_JPEG)
1090                 return -EINVAL;
1091
1092         fsize->discrete.width = video->pix_fmt.width;
1093         fsize->discrete.height = video->pix_fmt.height;
1094         fsize->type = V4L2_FRMSIZE_TYPE_DISCRETE;
1095
1096         return 0;
1097 }
1098
1099 static int aspeed_video_enum_frameintervals(struct file *file, void *fh,
1100                                             struct v4l2_frmivalenum *fival)
1101 {
1102         struct aspeed_video *video = video_drvdata(file);
1103
1104         if (fival->index)
1105                 return -EINVAL;
1106
1107         if (fival->width != video->detected_timings.width ||
1108             fival->height != video->detected_timings.height)
1109                 return -EINVAL;
1110
1111         if (fival->pixel_format != V4L2_PIX_FMT_JPEG)
1112                 return -EINVAL;
1113
1114         fival->type = V4L2_FRMIVAL_TYPE_CONTINUOUS;
1115
1116         fival->stepwise.min.denominator = MAX_FRAME_RATE;
1117         fival->stepwise.min.numerator = 1;
1118         fival->stepwise.max.denominator = 1;
1119         fival->stepwise.max.numerator = 1;
1120         fival->stepwise.step = fival->stepwise.max;
1121
1122         return 0;
1123 }
1124
1125 static int aspeed_video_set_dv_timings(struct file *file, void *fh,
1126                                        struct v4l2_dv_timings *timings)
1127 {
1128         struct aspeed_video *video = video_drvdata(file);
1129
1130         if (timings->bt.width == video->active_timings.width &&
1131             timings->bt.height == video->active_timings.height)
1132                 return 0;
1133
1134         if (vb2_is_busy(&video->queue))
1135                 return -EBUSY;
1136
1137         video->active_timings = timings->bt;
1138
1139         aspeed_video_set_resolution(video);
1140
1141         video->pix_fmt.width = timings->bt.width;
1142         video->pix_fmt.height = timings->bt.height;
1143         video->pix_fmt.sizeimage = video->max_compressed_size;
1144
1145         timings->type = V4L2_DV_BT_656_1120;
1146
1147         return 0;
1148 }
1149
1150 static int aspeed_video_get_dv_timings(struct file *file, void *fh,
1151                                        struct v4l2_dv_timings *timings)
1152 {
1153         struct aspeed_video *video = video_drvdata(file);
1154
1155         timings->type = V4L2_DV_BT_656_1120;
1156         timings->bt = video->active_timings;
1157
1158         return 0;
1159 }
1160
1161 static int aspeed_video_query_dv_timings(struct file *file, void *fh,
1162                                          struct v4l2_dv_timings *timings)
1163 {
1164         int rc;
1165         struct aspeed_video *video = video_drvdata(file);
1166
1167         /*
1168          * This blocks only if the driver is currently in the process of
1169          * detecting a new resolution; in the event of no signal or timeout
1170          * this function is woken up.
1171          */
1172         if (file->f_flags & O_NONBLOCK) {
1173                 if (test_bit(VIDEO_RES_CHANGE, &video->flags))
1174                         return -EAGAIN;
1175         } else {
1176                 rc = wait_event_interruptible(video->wait,
1177                                               !test_bit(VIDEO_RES_CHANGE,
1178                                                         &video->flags));
1179                 if (rc)
1180                         return -EINTR;
1181         }
1182
1183         timings->type = V4L2_DV_BT_656_1120;
1184         timings->bt = video->detected_timings;
1185
1186         return video->v4l2_input_status ? -ENOLINK : 0;
1187 }
1188
1189 static int aspeed_video_enum_dv_timings(struct file *file, void *fh,
1190                                         struct v4l2_enum_dv_timings *timings)
1191 {
1192         return v4l2_enum_dv_timings_cap(timings, &aspeed_video_timings_cap,
1193                                         NULL, NULL);
1194 }
1195
1196 static int aspeed_video_dv_timings_cap(struct file *file, void *fh,
1197                                        struct v4l2_dv_timings_cap *cap)
1198 {
1199         *cap = aspeed_video_timings_cap;
1200
1201         return 0;
1202 }
1203
1204 static int aspeed_video_sub_event(struct v4l2_fh *fh,
1205                                   const struct v4l2_event_subscription *sub)
1206 {
1207         switch (sub->type) {
1208         case V4L2_EVENT_SOURCE_CHANGE:
1209                 return v4l2_src_change_event_subscribe(fh, sub);
1210         }
1211
1212         return v4l2_ctrl_subscribe_event(fh, sub);
1213 }
1214
1215 static const struct v4l2_ioctl_ops aspeed_video_ioctl_ops = {
1216         .vidioc_querycap = aspeed_video_querycap,
1217
1218         .vidioc_enum_fmt_vid_cap = aspeed_video_enum_format,
1219         .vidioc_g_fmt_vid_cap = aspeed_video_get_format,
1220         .vidioc_s_fmt_vid_cap = aspeed_video_get_format,
1221         .vidioc_try_fmt_vid_cap = aspeed_video_get_format,
1222
1223         .vidioc_reqbufs = vb2_ioctl_reqbufs,
1224         .vidioc_querybuf = vb2_ioctl_querybuf,
1225         .vidioc_qbuf = vb2_ioctl_qbuf,
1226         .vidioc_expbuf = vb2_ioctl_expbuf,
1227         .vidioc_dqbuf = vb2_ioctl_dqbuf,
1228         .vidioc_create_bufs = vb2_ioctl_create_bufs,
1229         .vidioc_prepare_buf = vb2_ioctl_prepare_buf,
1230         .vidioc_streamon = vb2_ioctl_streamon,
1231         .vidioc_streamoff = vb2_ioctl_streamoff,
1232
1233         .vidioc_enum_input = aspeed_video_enum_input,
1234         .vidioc_g_input = aspeed_video_get_input,
1235         .vidioc_s_input = aspeed_video_set_input,
1236
1237         .vidioc_g_parm = aspeed_video_get_parm,
1238         .vidioc_s_parm = aspeed_video_set_parm,
1239         .vidioc_enum_framesizes = aspeed_video_enum_framesizes,
1240         .vidioc_enum_frameintervals = aspeed_video_enum_frameintervals,
1241
1242         .vidioc_s_dv_timings = aspeed_video_set_dv_timings,
1243         .vidioc_g_dv_timings = aspeed_video_get_dv_timings,
1244         .vidioc_query_dv_timings = aspeed_video_query_dv_timings,
1245         .vidioc_enum_dv_timings = aspeed_video_enum_dv_timings,
1246         .vidioc_dv_timings_cap = aspeed_video_dv_timings_cap,
1247
1248         .vidioc_subscribe_event = aspeed_video_sub_event,
1249         .vidioc_unsubscribe_event = v4l2_event_unsubscribe,
1250 };
1251
1252 static void aspeed_video_update_jpeg_quality(struct aspeed_video *video)
1253 {
1254         u32 comp_ctrl = FIELD_PREP(VE_COMP_CTRL_DCT_LUM, video->jpeg_quality) |
1255                 FIELD_PREP(VE_COMP_CTRL_DCT_CHR, video->jpeg_quality | 0x10);
1256
1257         aspeed_video_update(video, VE_COMP_CTRL,
1258                             VE_COMP_CTRL_DCT_LUM | VE_COMP_CTRL_DCT_CHR,
1259                             comp_ctrl);
1260 }
1261
1262 static void aspeed_video_update_subsampling(struct aspeed_video *video)
1263 {
1264         if (video->jpeg.virt)
1265                 aspeed_video_init_jpeg_table(video->jpeg.virt, video->yuv420);
1266
1267         if (video->yuv420)
1268                 aspeed_video_update(video, VE_SEQ_CTRL, 0, VE_SEQ_CTRL_YUV420);
1269         else
1270                 aspeed_video_update(video, VE_SEQ_CTRL, VE_SEQ_CTRL_YUV420, 0);
1271 }
1272
1273 static int aspeed_video_set_ctrl(struct v4l2_ctrl *ctrl)
1274 {
1275         struct aspeed_video *video = container_of(ctrl->handler,
1276                                                   struct aspeed_video,
1277                                                   ctrl_handler);
1278
1279         switch (ctrl->id) {
1280         case V4L2_CID_JPEG_COMPRESSION_QUALITY:
1281                 video->jpeg_quality = ctrl->val;
1282                 aspeed_video_update_jpeg_quality(video);
1283                 break;
1284         case V4L2_CID_JPEG_CHROMA_SUBSAMPLING:
1285                 if (ctrl->val == V4L2_JPEG_CHROMA_SUBSAMPLING_420) {
1286                         video->yuv420 = true;
1287                         aspeed_video_update_subsampling(video);
1288                 } else {
1289                         video->yuv420 = false;
1290                         aspeed_video_update_subsampling(video);
1291                 }
1292                 break;
1293         default:
1294                 return -EINVAL;
1295         }
1296
1297         return 0;
1298 }
1299
1300 static const struct v4l2_ctrl_ops aspeed_video_ctrl_ops = {
1301         .s_ctrl = aspeed_video_set_ctrl,
1302 };
1303
1304 static void aspeed_video_resolution_work(struct work_struct *work)
1305 {
1306         struct delayed_work *dwork = to_delayed_work(work);
1307         struct aspeed_video *video = container_of(dwork, struct aspeed_video,
1308                                                   res_work);
1309         u32 input_status = video->v4l2_input_status;
1310
1311         aspeed_video_on(video);
1312
1313         /* Exit early in case no clients remain */
1314         if (test_bit(VIDEO_STOPPED, &video->flags))
1315                 goto done;
1316
1317         aspeed_video_init_regs(video);
1318
1319         aspeed_video_get_resolution(video);
1320
1321         if (video->detected_timings.width != video->active_timings.width ||
1322             video->detected_timings.height != video->active_timings.height ||
1323             input_status != video->v4l2_input_status) {
1324                 static const struct v4l2_event ev = {
1325                         .type = V4L2_EVENT_SOURCE_CHANGE,
1326                         .u.src_change.changes = V4L2_EVENT_SRC_CH_RESOLUTION,
1327                 };
1328
1329                 v4l2_event_queue(&video->vdev, &ev);
1330         } else if (test_bit(VIDEO_STREAMING, &video->flags)) {
1331                 /* No resolution change so just restart streaming */
1332                 aspeed_video_start_frame(video);
1333         }
1334
1335 done:
1336         clear_bit(VIDEO_RES_CHANGE, &video->flags);
1337         wake_up_interruptible_all(&video->wait);
1338 }
1339
1340 static int aspeed_video_open(struct file *file)
1341 {
1342         int rc;
1343         struct aspeed_video *video = video_drvdata(file);
1344
1345         mutex_lock(&video->video_lock);
1346
1347         rc = v4l2_fh_open(file);
1348         if (rc) {
1349                 mutex_unlock(&video->video_lock);
1350                 return rc;
1351         }
1352
1353         if (v4l2_fh_is_singular_file(file))
1354                 aspeed_video_start(video);
1355
1356         mutex_unlock(&video->video_lock);
1357
1358         return 0;
1359 }
1360
1361 static int aspeed_video_release(struct file *file)
1362 {
1363         int rc;
1364         struct aspeed_video *video = video_drvdata(file);
1365
1366         mutex_lock(&video->video_lock);
1367
1368         if (v4l2_fh_is_singular_file(file))
1369                 aspeed_video_stop(video);
1370
1371         rc = _vb2_fop_release(file, NULL);
1372
1373         mutex_unlock(&video->video_lock);
1374
1375         return rc;
1376 }
1377
1378 static const struct v4l2_file_operations aspeed_video_v4l2_fops = {
1379         .owner = THIS_MODULE,
1380         .read = vb2_fop_read,
1381         .poll = vb2_fop_poll,
1382         .unlocked_ioctl = video_ioctl2,
1383         .mmap = vb2_fop_mmap,
1384         .open = aspeed_video_open,
1385         .release = aspeed_video_release,
1386 };
1387
1388 static int aspeed_video_queue_setup(struct vb2_queue *q,
1389                                     unsigned int *num_buffers,
1390                                     unsigned int *num_planes,
1391                                     unsigned int sizes[],
1392                                     struct device *alloc_devs[])
1393 {
1394         struct aspeed_video *video = vb2_get_drv_priv(q);
1395
1396         if (*num_planes) {
1397                 if (sizes[0] < video->max_compressed_size)
1398                         return -EINVAL;
1399
1400                 return 0;
1401         }
1402
1403         *num_planes = 1;
1404         sizes[0] = video->max_compressed_size;
1405
1406         return 0;
1407 }
1408
1409 static int aspeed_video_buf_prepare(struct vb2_buffer *vb)
1410 {
1411         struct aspeed_video *video = vb2_get_drv_priv(vb->vb2_queue);
1412
1413         if (vb2_plane_size(vb, 0) < video->max_compressed_size)
1414                 return -EINVAL;
1415
1416         return 0;
1417 }
1418
1419 static int aspeed_video_start_streaming(struct vb2_queue *q,
1420                                         unsigned int count)
1421 {
1422         int rc;
1423         struct aspeed_video *video = vb2_get_drv_priv(q);
1424
1425         video->sequence = 0;
1426
1427         rc = aspeed_video_start_frame(video);
1428         if (rc) {
1429                 aspeed_video_bufs_done(video, VB2_BUF_STATE_QUEUED);
1430                 return rc;
1431         }
1432
1433         set_bit(VIDEO_STREAMING, &video->flags);
1434         return 0;
1435 }
1436
1437 static void aspeed_video_stop_streaming(struct vb2_queue *q)
1438 {
1439         int rc;
1440         struct aspeed_video *video = vb2_get_drv_priv(q);
1441
1442         clear_bit(VIDEO_STREAMING, &video->flags);
1443
1444         rc = wait_event_timeout(video->wait,
1445                                 !test_bit(VIDEO_FRAME_INPRG, &video->flags),
1446                                 STOP_TIMEOUT);
1447         if (!rc) {
1448                 dev_err(video->dev, "Timed out when stopping streaming\n");
1449
1450                 /*
1451                  * Need to force stop any DMA and try and get HW into a good
1452                  * state for future calls to start streaming again.
1453                  */
1454                 aspeed_video_off(video);
1455                 aspeed_video_on(video);
1456
1457                 aspeed_video_init_regs(video);
1458
1459                 aspeed_video_get_resolution(video);
1460         }
1461
1462         aspeed_video_bufs_done(video, VB2_BUF_STATE_ERROR);
1463 }
1464
1465 static void aspeed_video_buf_queue(struct vb2_buffer *vb)
1466 {
1467         bool empty;
1468         struct aspeed_video *video = vb2_get_drv_priv(vb->vb2_queue);
1469         struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb);
1470         struct aspeed_video_buffer *avb = to_aspeed_video_buffer(vbuf);
1471         unsigned long flags;
1472
1473         spin_lock_irqsave(&video->lock, flags);
1474         empty = list_empty(&video->buffers);
1475         list_add_tail(&avb->link, &video->buffers);
1476         spin_unlock_irqrestore(&video->lock, flags);
1477
1478         if (test_bit(VIDEO_STREAMING, &video->flags) &&
1479             !test_bit(VIDEO_FRAME_INPRG, &video->flags) && empty)
1480                 aspeed_video_start_frame(video);
1481 }
1482
1483 static const struct vb2_ops aspeed_video_vb2_ops = {
1484         .queue_setup = aspeed_video_queue_setup,
1485         .wait_prepare = vb2_ops_wait_prepare,
1486         .wait_finish = vb2_ops_wait_finish,
1487         .buf_prepare = aspeed_video_buf_prepare,
1488         .start_streaming = aspeed_video_start_streaming,
1489         .stop_streaming = aspeed_video_stop_streaming,
1490         .buf_queue =  aspeed_video_buf_queue,
1491 };
1492
1493 static int aspeed_video_setup_video(struct aspeed_video *video)
1494 {
1495         const u64 mask = ~(BIT(V4L2_JPEG_CHROMA_SUBSAMPLING_444) |
1496                            BIT(V4L2_JPEG_CHROMA_SUBSAMPLING_420));
1497         struct v4l2_device *v4l2_dev = &video->v4l2_dev;
1498         struct vb2_queue *vbq = &video->queue;
1499         struct video_device *vdev = &video->vdev;
1500         int rc;
1501
1502         video->pix_fmt.pixelformat = V4L2_PIX_FMT_JPEG;
1503         video->pix_fmt.field = V4L2_FIELD_NONE;
1504         video->pix_fmt.colorspace = V4L2_COLORSPACE_SRGB;
1505         video->pix_fmt.quantization = V4L2_QUANTIZATION_FULL_RANGE;
1506         video->v4l2_input_status = V4L2_IN_ST_NO_SIGNAL;
1507
1508         rc = v4l2_device_register(video->dev, v4l2_dev);
1509         if (rc) {
1510                 dev_err(video->dev, "Failed to register v4l2 device\n");
1511                 return rc;
1512         }
1513
1514         v4l2_ctrl_handler_init(&video->ctrl_handler, 2);
1515         v4l2_ctrl_new_std(&video->ctrl_handler, &aspeed_video_ctrl_ops,
1516                           V4L2_CID_JPEG_COMPRESSION_QUALITY, 0,
1517                           ASPEED_VIDEO_JPEG_NUM_QUALITIES - 1, 1, 0);
1518         v4l2_ctrl_new_std_menu(&video->ctrl_handler, &aspeed_video_ctrl_ops,
1519                                V4L2_CID_JPEG_CHROMA_SUBSAMPLING,
1520                                V4L2_JPEG_CHROMA_SUBSAMPLING_420, mask,
1521                                V4L2_JPEG_CHROMA_SUBSAMPLING_444);
1522
1523         if (video->ctrl_handler.error) {
1524                 v4l2_ctrl_handler_free(&video->ctrl_handler);
1525                 v4l2_device_unregister(v4l2_dev);
1526
1527                 dev_err(video->dev, "Failed to init controls: %d\n",
1528                         video->ctrl_handler.error);
1529                 return rc;
1530         }
1531
1532         v4l2_dev->ctrl_handler = &video->ctrl_handler;
1533
1534         vbq->type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
1535         vbq->io_modes = VB2_MMAP | VB2_READ | VB2_DMABUF;
1536         vbq->dev = v4l2_dev->dev;
1537         vbq->lock = &video->video_lock;
1538         vbq->ops = &aspeed_video_vb2_ops;
1539         vbq->mem_ops = &vb2_dma_contig_memops;
1540         vbq->drv_priv = video;
1541         vbq->buf_struct_size = sizeof(struct aspeed_video_buffer);
1542         vbq->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_MONOTONIC;
1543         vbq->min_buffers_needed = 3;
1544
1545         rc = vb2_queue_init(vbq);
1546         if (rc) {
1547                 v4l2_ctrl_handler_free(&video->ctrl_handler);
1548                 v4l2_device_unregister(v4l2_dev);
1549
1550                 dev_err(video->dev, "Failed to init vb2 queue\n");
1551                 return rc;
1552         }
1553
1554         vdev->queue = vbq;
1555         vdev->fops = &aspeed_video_v4l2_fops;
1556         vdev->device_caps = V4L2_CAP_VIDEO_CAPTURE | V4L2_CAP_READWRITE |
1557                 V4L2_CAP_STREAMING;
1558         vdev->v4l2_dev = v4l2_dev;
1559         strscpy(vdev->name, DEVICE_NAME, sizeof(vdev->name));
1560         vdev->vfl_type = VFL_TYPE_GRABBER;
1561         vdev->vfl_dir = VFL_DIR_RX;
1562         vdev->release = video_device_release_empty;
1563         vdev->ioctl_ops = &aspeed_video_ioctl_ops;
1564         vdev->lock = &video->video_lock;
1565
1566         video_set_drvdata(vdev, video);
1567         rc = video_register_device(vdev, VFL_TYPE_GRABBER, 0);
1568         if (rc) {
1569                 vb2_queue_release(vbq);
1570                 v4l2_ctrl_handler_free(&video->ctrl_handler);
1571                 v4l2_device_unregister(v4l2_dev);
1572
1573                 dev_err(video->dev, "Failed to register video device\n");
1574                 return rc;
1575         }
1576
1577         return 0;
1578 }
1579
1580 static int aspeed_video_init(struct aspeed_video *video)
1581 {
1582         int irq;
1583         int rc;
1584         struct device *dev = video->dev;
1585
1586         irq = irq_of_parse_and_map(dev->of_node, 0);
1587         if (!irq) {
1588                 dev_err(dev, "Unable to find IRQ\n");
1589                 return -ENODEV;
1590         }
1591
1592         rc = devm_request_irq(dev, irq, aspeed_video_irq, IRQF_SHARED,
1593                               DEVICE_NAME, video);
1594         if (rc < 0) {
1595                 dev_err(dev, "Unable to request IRQ %d\n", irq);
1596                 return rc;
1597         }
1598
1599         video->eclk = devm_clk_get(dev, "eclk");
1600         if (IS_ERR(video->eclk)) {
1601                 dev_err(dev, "Unable to get ECLK\n");
1602                 return PTR_ERR(video->eclk);
1603         }
1604
1605         video->vclk = devm_clk_get(dev, "vclk");
1606         if (IS_ERR(video->vclk)) {
1607                 dev_err(dev, "Unable to get VCLK\n");
1608                 return PTR_ERR(video->vclk);
1609         }
1610
1611         of_reserved_mem_device_init(dev);
1612
1613         rc = dma_set_mask_and_coherent(dev, DMA_BIT_MASK(32));
1614         if (rc) {
1615                 dev_err(dev, "Failed to set DMA mask\n");
1616                 of_reserved_mem_device_release(dev);
1617                 return rc;
1618         }
1619
1620         if (!aspeed_video_alloc_buf(video, &video->jpeg,
1621                                     VE_JPEG_HEADER_SIZE)) {
1622                 dev_err(dev, "Failed to allocate DMA for JPEG header\n");
1623                 of_reserved_mem_device_release(dev);
1624                 return rc;
1625         }
1626
1627         aspeed_video_init_jpeg_table(video->jpeg.virt, video->yuv420);
1628
1629         return 0;
1630 }
1631
1632 static int aspeed_video_probe(struct platform_device *pdev)
1633 {
1634         int rc;
1635         struct resource *res;
1636         struct aspeed_video *video = kzalloc(sizeof(*video), GFP_KERNEL);
1637
1638         if (!video)
1639                 return -ENOMEM;
1640
1641         video->frame_rate = 30;
1642         video->dev = &pdev->dev;
1643         spin_lock_init(&video->lock);
1644         mutex_init(&video->video_lock);
1645         init_waitqueue_head(&video->wait);
1646         INIT_DELAYED_WORK(&video->res_work, aspeed_video_resolution_work);
1647         INIT_LIST_HEAD(&video->buffers);
1648
1649         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1650
1651         video->base = devm_ioremap_resource(video->dev, res);
1652
1653         if (IS_ERR(video->base))
1654                 return PTR_ERR(video->base);
1655
1656         rc = aspeed_video_init(video);
1657         if (rc)
1658                 return rc;
1659
1660         rc = aspeed_video_setup_video(video);
1661         if (rc)
1662                 return rc;
1663
1664         return 0;
1665 }
1666
1667 static int aspeed_video_remove(struct platform_device *pdev)
1668 {
1669         struct device *dev = &pdev->dev;
1670         struct v4l2_device *v4l2_dev = dev_get_drvdata(dev);
1671         struct aspeed_video *video = to_aspeed_video(v4l2_dev);
1672
1673         video_unregister_device(&video->vdev);
1674
1675         vb2_queue_release(&video->queue);
1676
1677         v4l2_ctrl_handler_free(&video->ctrl_handler);
1678
1679         v4l2_device_unregister(v4l2_dev);
1680
1681         dma_free_coherent(video->dev, VE_JPEG_HEADER_SIZE, video->jpeg.virt,
1682                           video->jpeg.dma);
1683
1684         of_reserved_mem_device_release(dev);
1685
1686         return 0;
1687 }
1688
1689 static const struct of_device_id aspeed_video_of_match[] = {
1690         { .compatible = "aspeed,ast2400-video-engine" },
1691         { .compatible = "aspeed,ast2500-video-engine" },
1692         {}
1693 };
1694 MODULE_DEVICE_TABLE(of, aspeed_video_of_match);
1695
1696 static struct platform_driver aspeed_video_driver = {
1697         .driver = {
1698                 .name = DEVICE_NAME,
1699                 .of_match_table = aspeed_video_of_match,
1700         },
1701         .probe = aspeed_video_probe,
1702         .remove = aspeed_video_remove,
1703 };
1704
1705 module_platform_driver(aspeed_video_driver);
1706
1707 MODULE_DESCRIPTION("ASPEED Video Engine Driver");
1708 MODULE_AUTHOR("Eddie James");
1709 MODULE_LICENSE("GPL v2");