drivers/gpu/drm/i915/intel_breadcrumbs.c

   1 /*
   2  * Copyright © 2015 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  *
  23  */
  24
  25 #include <linux/kthread.h>
  26 #include <uapi/linux/sched/types.h>
  27
  28 #include "i915_drv.h"
  29
  30 #ifdef CONFIG_SMP
  31 #define task_asleep(tsk) ((tsk)->state & TASK_NORMAL && !(tsk)->on_cpu)
  32 #else
  33 #define task_asleep(tsk) ((tsk)->state & TASK_NORMAL)
  34 #endif
  35
  36 static unsigned int __intel_breadcrumbs_wakeup(struct intel_breadcrumbs *b)
  37 {
  38         struct intel_wait *wait;
  39         unsigned int result = 0;
  40
  41         lockdep_assert_held(&b->irq_lock);
  42
  43         wait = b->irq_wait;
  44         if (wait) {
  45                 /*
  46                  * N.B. Since task_asleep() and ttwu are not atomic, the
  47                  * waiter may actually go to sleep after the check, causing
  48                  * us to suppress a valid wakeup. We prefer to reduce the
  49                  * number of false positive missed_breadcrumb() warnings
  50                  * at the expense of a few false negatives, as it it easy
  51                  * to trigger a false positive under heavy load. Enough
  52                  * signal should remain from genuine missed_breadcrumb()
  53                  * for us to detect in CI.
  54                  */
  55                 bool was_asleep = task_asleep(wait->tsk);
  56
  57                 result = ENGINE_WAKEUP_WAITER;
  58                 if (wake_up_process(wait->tsk) && was_asleep)
  59                         result |= ENGINE_WAKEUP_ASLEEP;
  60         }
  61
  62         return result;
  63 }
  64
  65 unsigned int intel_engine_wakeup(struct intel_engine_cs *engine)
  66 {
  67         struct intel_breadcrumbs *b = &engine->breadcrumbs;
  68         unsigned long flags;
  69         unsigned int result;
  70
  71         spin_lock_irqsave(&b->irq_lock, flags);
  72         result = __intel_breadcrumbs_wakeup(b);
  73         spin_unlock_irqrestore(&b->irq_lock, flags);
  74
  75         return result;
  76 }
  77
  78 static unsigned long wait_timeout(void)
  79 {
  80         return round_jiffies_up(jiffies + DRM_I915_HANGCHECK_JIFFIES);
  81 }
  82
  83 static noinline void missed_breadcrumb(struct intel_engine_cs *engine)
  84 {
  85         if (GEM_SHOW_DEBUG()) {
  86                 struct drm_printer p = drm_debug_printer(__func__);
  87
  88                 intel_engine_dump(engine, &p,
  89                                   "%s missed breadcrumb at %pS\n",
  90                                   engine->name, __builtin_return_address(0));
  91         }
  92
  93         set_bit(engine->id, &engine->i915->gpu_error.missed_irq_rings);
  94 }
  95
  96 static void intel_breadcrumbs_hangcheck(struct timer_list *t)
  97 {
  98         struct intel_engine_cs *engine =
  99                 from_timer(engine, t, breadcrumbs.hangcheck);
 100         struct intel_breadcrumbs *b = &engine->breadcrumbs;
 101
 102         if (!b->irq_armed)
 103                 return;
 104
 105         if (b->hangcheck_interrupts != atomic_read(&engine->irq_count)) {
 106                 b->hangcheck_interrupts = atomic_read(&engine->irq_count);
 107                 mod_timer(&b->hangcheck, wait_timeout());
 108                 return;
 109         }
 110
 111         /* We keep the hangcheck timer alive until we disarm the irq, even
 112          * if there are no waiters at present.
 113          *
 114          * If the waiter was currently running, assume it hasn't had a chance
 115          * to process the pending interrupt (e.g, low priority task on a loaded
 116          * system) and wait until it sleeps before declaring a missed interrupt.
 117          *
 118          * If the waiter was asleep (and not even pending a wakeup), then we
 119          * must have missed an interrupt as the GPU has stopped advancing
 120          * but we still have a waiter. Assuming all batches complete within
 121          * DRM_I915_HANGCHECK_JIFFIES [1.5s]!
 122          */
 123         if (intel_engine_wakeup(engine) & ENGINE_WAKEUP_ASLEEP) {
 124                 missed_breadcrumb(engine);
 125                 mod_timer(&b->fake_irq, jiffies + 1);
 126         } else {
 127                 mod_timer(&b->hangcheck, wait_timeout());
 128         }
 129 }
 130
 131 static void intel_breadcrumbs_fake_irq(struct timer_list *t)
 132 {
 133         struct intel_engine_cs *engine =
 134                 from_timer(engine, t, breadcrumbs.fake_irq);
 135         struct intel_breadcrumbs *b = &engine->breadcrumbs;
 136
 137         /*
 138          * The timer persists in case we cannot enable interrupts,
 139          * or if we have previously seen seqno/interrupt incoherency
 140          * ("missed interrupt" syndrome, better known as a "missed breadcrumb").
 141          * Here the worker will wake up every jiffie in order to kick the
 142          * oldest waiter to do the coherent seqno check.
 143          */
 144
 145         spin_lock_irq(&b->irq_lock);
 146         if (b->irq_armed && !__intel_breadcrumbs_wakeup(b))
 147                 __intel_engine_disarm_breadcrumbs(engine);
 148         spin_unlock_irq(&b->irq_lock);
 149         if (!b->irq_armed)
 150                 return;
 151
 152         /* If the user has disabled the fake-irq, restore the hangchecking */
 153         if (!test_bit(engine->id, &engine->i915->gpu_error.missed_irq_rings)) {
 154                 mod_timer(&b->hangcheck, wait_timeout());
 155                 return;
 156         }
 157
 158         mod_timer(&b->fake_irq, jiffies + 1);
 159 }
 160
 161 static void irq_enable(struct intel_engine_cs *engine)
 162 {
 163         /*
 164          * FIXME: Ideally we want this on the API boundary, but for the
 165          * sake of testing with mock breadcrumbs (no HW so unable to
 166          * enable irqs) we place it deep within the bowels, at the point
 167          * of no return.
 168          */
 169         GEM_BUG_ON(!intel_irqs_enabled(engine->i915));
 170
 171         /* Enabling the IRQ may miss the generation of the interrupt, but
 172          * we still need to force the barrier before reading the seqno,
 173          * just in case.
 174          */
 175         set_bit(ENGINE_IRQ_BREADCRUMB, &engine->irq_posted);
 176
 177         /* Caller disables interrupts */
 178         if (engine->irq_enable) {
 179                 spin_lock(&engine->i915->irq_lock);
 180                 engine->irq_enable(engine);
 181                 spin_unlock(&engine->i915->irq_lock);
 182         }
 183 }
 184
 185 static void irq_disable(struct intel_engine_cs *engine)
 186 {
 187         /* Caller disables interrupts */
 188         if (engine->irq_disable) {
 189                 spin_lock(&engine->i915->irq_lock);
 190                 engine->irq_disable(engine);
 191                 spin_unlock(&engine->i915->irq_lock);
 192         }
 193 }
 194
 195 void __intel_engine_disarm_breadcrumbs(struct intel_engine_cs *engine)
 196 {
 197         struct intel_breadcrumbs *b = &engine->breadcrumbs;
 198
 199         lockdep_assert_held(&b->irq_lock);
 200         GEM_BUG_ON(b->irq_wait);
 201         GEM_BUG_ON(!b->irq_armed);
 202
 203         GEM_BUG_ON(!b->irq_enabled);
 204         if (!--b->irq_enabled)
 205                 irq_disable(engine);
 206
 207         b->irq_armed = false;
 208 }
 209
 210 void intel_engine_pin_breadcrumbs_irq(struct intel_engine_cs *engine)
 211 {
 212         struct intel_breadcrumbs *b = &engine->breadcrumbs;
 213
 214         spin_lock_irq(&b->irq_lock);
 215         if (!b->irq_enabled++)
 216                 irq_enable(engine);
 217         GEM_BUG_ON(!b->irq_enabled); /* no overflow! */
 218         spin_unlock_irq(&b->irq_lock);
 219 }
 220
 221 void intel_engine_unpin_breadcrumbs_irq(struct intel_engine_cs *engine)
 222 {
 223         struct intel_breadcrumbs *b = &engine->breadcrumbs;
 224
 225         spin_lock_irq(&b->irq_lock);
 226         GEM_BUG_ON(!b->irq_enabled); /* no underflow! */
 227         if (!--b->irq_enabled)
 228                 irq_disable(engine);
 229         spin_unlock_irq(&b->irq_lock);
 230 }
 231
 232 void intel_engine_disarm_breadcrumbs(struct intel_engine_cs *engine)
 233 {
 234         struct intel_breadcrumbs *b = &engine->breadcrumbs;
 235         struct intel_wait *wait, *n;
 236
 237         if (!b->irq_armed)
 238                 return;
 239
 240         /*
 241          * We only disarm the irq when we are idle (all requests completed),
 242          * so if the bottom-half remains asleep, it missed the request
 243          * completion.
 244          */
 245         if (intel_engine_wakeup(engine) & ENGINE_WAKEUP_ASLEEP)
 246                 missed_breadcrumb(engine);
 247
 248         spin_lock_irq(&b->rb_lock);
 249
 250         spin_lock(&b->irq_lock);
 251         b->irq_wait = NULL;
 252         if (b->irq_armed)
 253                 __intel_engine_disarm_breadcrumbs(engine);
 254         spin_unlock(&b->irq_lock);
 255
 256         rbtree_postorder_for_each_entry_safe(wait, n, &b->waiters, node) {
 257                 GEM_BUG_ON(!i915_seqno_passed(intel_engine_get_seqno(engine),
 258                                               wait->seqno));
 259                 RB_CLEAR_NODE(&wait->node);
 260                 wake_up_process(wait->tsk);
 261         }
 262         b->waiters = RB_ROOT;
 263
 264         spin_unlock_irq(&b->rb_lock);
 265 }
 266
 267 static bool use_fake_irq(const struct intel_breadcrumbs *b)
 268 {
 269         const struct intel_engine_cs *engine =
 270                 container_of(b, struct intel_engine_cs, breadcrumbs);
 271
 272         if (!test_bit(engine->id, &engine->i915->gpu_error.missed_irq_rings))
 273                 return false;
 274
 275         /* Only start with the heavy weight fake irq timer if we have not
 276          * seen any interrupts since enabling it the first time. If the
 277          * interrupts are still arriving, it means we made a mistake in our
 278          * engine->seqno_barrier(), a timing error that should be transient
 279          * and unlikely to reoccur.
 280          */
 281         return atomic_read(&engine->irq_count) == b->hangcheck_interrupts;
 282 }
 283
 284 static void enable_fake_irq(struct intel_breadcrumbs *b)
 285 {
 286         /* Ensure we never sleep indefinitely */
 287         if (!b->irq_enabled || use_fake_irq(b))
 288                 mod_timer(&b->fake_irq, jiffies + 1);
 289         else
 290                 mod_timer(&b->hangcheck, wait_timeout());
 291 }
 292
 293 static bool __intel_breadcrumbs_enable_irq(struct intel_breadcrumbs *b)
 294 {
 295         struct intel_engine_cs *engine =
 296                 container_of(b, struct intel_engine_cs, breadcrumbs);
 297         struct drm_i915_private *i915 = engine->i915;
 298         bool enabled;
 299
 300         lockdep_assert_held(&b->irq_lock);
 301         if (b->irq_armed)
 302                 return false;
 303
 304         /* The breadcrumb irq will be disarmed on the interrupt after the
 305          * waiters are signaled. This gives us a single interrupt window in
 306          * which we can add a new waiter and avoid the cost of re-enabling
 307          * the irq.
 308          */
 309         b->irq_armed = true;
 310
 311         if (I915_SELFTEST_ONLY(b->mock)) {
 312                 /* For our mock objects we want to avoid interaction
 313                  * with the real hardware (which is not set up). So
 314                  * we simply pretend we have enabled the powerwell
 315                  * and the irq, and leave it up to the mock
 316                  * implementation to call intel_engine_wakeup()
 317                  * itself when it wants to simulate a user interrupt,
 318                  */
 319                 return true;
 320         }
 321
 322         /* Since we are waiting on a request, the GPU should be busy
 323          * and should have its own rpm reference. This is tracked
 324          * by i915->gt.awake, we can forgo holding our own wakref
 325          * for the interrupt as before i915->gt.awake is released (when
 326          * the driver is idle) we disarm the breadcrumbs.
 327          */
 328
 329         /* No interrupts? Kick the waiter every jiffie! */
 330         enabled = false;
 331         if (!b->irq_enabled++ &&
 332             !test_bit(engine->id, &i915->gpu_error.test_irq_rings)) {
 333                 irq_enable(engine);
 334                 enabled = true;
 335         }
 336
 337         enable_fake_irq(b);
 338         return enabled;
 339 }
 340
 341 static inline struct intel_wait *to_wait(struct rb_node *node)
 342 {
 343         return rb_entry(node, struct intel_wait, node);
 344 }
 345
 346 static inline void __intel_breadcrumbs_finish(struct intel_breadcrumbs *b,
 347                                               struct intel_wait *wait)
 348 {
 349         lockdep_assert_held(&b->rb_lock);
 350         GEM_BUG_ON(b->irq_wait == wait);
 351
 352         /*
 353          * This request is completed, so remove it from the tree, mark it as
 354          * complete, and *then* wake up the associated task. N.B. when the
 355          * task wakes up, it will find the empty rb_node, discern that it
 356          * has already been removed from the tree and skip the serialisation
 357          * of the b->rb_lock and b->irq_lock. This means that the destruction
 358          * of the intel_wait is not serialised with the interrupt handler
 359          * by the waiter - it must instead be serialised by the caller.
 360          */
 361         rb_erase(&wait->node, &b->waiters);
 362         RB_CLEAR_NODE(&wait->node);
 363
 364         if (wait->tsk->state != TASK_RUNNING)
 365                 wake_up_process(wait->tsk); /* implicit smp_wmb() */
 366 }
 367
 368 static inline void __intel_breadcrumbs_next(struct intel_engine_cs *engine,
 369                                             struct rb_node *next)
 370 {
 371         struct intel_breadcrumbs *b = &engine->breadcrumbs;
 372
 373         spin_lock(&b->irq_lock);
 374         GEM_BUG_ON(!b->irq_armed);
 375         GEM_BUG_ON(!b->irq_wait);
 376         b->irq_wait = to_wait(next);
 377         spin_unlock(&b->irq_lock);
 378
 379         /* We always wake up the next waiter that takes over as the bottom-half
 380          * as we may delegate not only the irq-seqno barrier to the next waiter
 381          * but also the task of waking up concurrent waiters.
 382          */
 383         if (next)
 384                 wake_up_process(to_wait(next)->tsk);
 385 }
 386
 387 static bool __intel_engine_add_wait(struct intel_engine_cs *engine,
 388                                     struct intel_wait *wait)
 389 {
 390         struct intel_breadcrumbs *b = &engine->breadcrumbs;
 391         struct rb_node **p, *parent, *completed;
 392         bool first, armed;
 393         u32 seqno;
 394
 395         GEM_BUG_ON(!wait->seqno);
 396
 397         /* Insert the request into the retirement ordered list
 398          * of waiters by walking the rbtree. If we are the oldest
 399          * seqno in the tree (the first to be retired), then
 400          * set ourselves as the bottom-half.
 401          *
 402          * As we descend the tree, prune completed branches since we hold the
 403          * spinlock we know that the first_waiter must be delayed and can
 404          * reduce some of the sequential wake up latency if we take action
 405          * ourselves and wake up the completed tasks in parallel. Also, by
 406          * removing stale elements in the tree, we may be able to reduce the
 407          * ping-pong between the old bottom-half and ourselves as first-waiter.
 408          */
 409         armed = false;
 410         first = true;
 411         parent = NULL;
 412         completed = NULL;
 413         seqno = intel_engine_get_seqno(engine);
 414
 415          /* If the request completed before we managed to grab the spinlock,
 416           * return now before adding ourselves to the rbtree. We let the
 417           * current bottom-half handle any pending wakeups and instead
 418           * try and get out of the way quickly.
 419           */
 420         if (i915_seqno_passed(seqno, wait->seqno)) {
 421                 RB_CLEAR_NODE(&wait->node);
 422                 return first;
 423         }
 424
 425         p = &b->waiters.rb_node;
 426         while (*p) {
 427                 parent = *p;
 428                 if (wait->seqno == to_wait(parent)->seqno) {
 429                         /* We have multiple waiters on the same seqno, select
 430                          * the highest priority task (that with the smallest
 431                          * task->prio) to serve as the bottom-half for this
 432                          * group.
 433                          */
 434                         if (wait->tsk->prio > to_wait(parent)->tsk->prio) {
 435                                 p = &parent->rb_right;
 436                                 first = false;
 437                         } else {
 438                                 p = &parent->rb_left;
 439                         }
 440                 } else if (i915_seqno_passed(wait->seqno,
 441                                              to_wait(parent)->seqno)) {
 442                         p = &parent->rb_right;
 443                         if (i915_seqno_passed(seqno, to_wait(parent)->seqno))
 444                                 completed = parent;
 445                         else
 446                                 first = false;
 447                 } else {
 448                         p = &parent->rb_left;
 449                 }
 450         }
 451         rb_link_node(&wait->node, parent, p);
 452         rb_insert_color(&wait->node, &b->waiters);
 453
 454         if (first) {
 455                 spin_lock(&b->irq_lock);
 456                 b->irq_wait = wait;
 457                 /* After assigning ourselves as the new bottom-half, we must
 458                  * perform a cursory check to prevent a missed interrupt.
 459                  * Either we miss the interrupt whilst programming the hardware,
 460                  * or if there was a previous waiter (for a later seqno) they
 461                  * may be woken instead of us (due to the inherent race
 462                  * in the unlocked read of b->irq_seqno_bh in the irq handler)
 463                  * and so we miss the wake up.
 464                  */
 465                 armed = __intel_breadcrumbs_enable_irq(b);
 466                 spin_unlock(&b->irq_lock);
 467         }
 468
 469         if (completed) {
 470                 /* Advance the bottom-half (b->irq_wait) before we wake up
 471                  * the waiters who may scribble over their intel_wait
 472                  * just as the interrupt handler is dereferencing it via
 473                  * b->irq_wait.
 474                  */
 475                 if (!first) {
 476                         struct rb_node *next = rb_next(completed);
 477                         GEM_BUG_ON(next == &wait->node);
 478                         __intel_breadcrumbs_next(engine, next);
 479                 }
 480
 481                 do {
 482                         struct intel_wait *crumb = to_wait(completed);
 483                         completed = rb_prev(completed);
 484                         __intel_breadcrumbs_finish(b, crumb);
 485                 } while (completed);
 486         }
 487
 488         GEM_BUG_ON(!b->irq_wait);
 489         GEM_BUG_ON(!b->irq_armed);
 490         GEM_BUG_ON(rb_first(&b->waiters) != &b->irq_wait->node);
 491
 492         return armed;
 493 }
 494
 495 bool intel_engine_add_wait(struct intel_engine_cs *engine,
 496                            struct intel_wait *wait)
 497 {
 498         struct intel_breadcrumbs *b = &engine->breadcrumbs;
 499         bool armed;
 500
 501         spin_lock_irq(&b->rb_lock);
 502         armed = __intel_engine_add_wait(engine, wait);
 503         spin_unlock_irq(&b->rb_lock);
 504         if (armed)
 505                 return armed;
 506
 507         /* Make the caller recheck if its request has already started. */
 508         return i915_seqno_passed(intel_engine_get_seqno(engine),
 509                                  wait->seqno - 1);
 510 }
 511
 512 static inline bool chain_wakeup(struct rb_node *rb, int priority)
 513 {
 514         return rb && to_wait(rb)->tsk->prio <= priority;
 515 }
 516
 517 static inline int wakeup_priority(struct intel_breadcrumbs *b,
 518                                   struct task_struct *tsk)
 519 {
 520         if (tsk == b->signaler)
 521                 return INT_MIN;
 522         else
 523                 return tsk->prio;
 524 }
 525
 526 static void __intel_engine_remove_wait(struct intel_engine_cs *engine,
 527                                        struct intel_wait *wait)
 528 {
 529         struct intel_breadcrumbs *b = &engine->breadcrumbs;
 530
 531         lockdep_assert_held(&b->rb_lock);
 532
 533         if (RB_EMPTY_NODE(&wait->node))
 534                 goto out;
 535
 536         if (b->irq_wait == wait) {
 537                 const int priority = wakeup_priority(b, wait->tsk);
 538                 struct rb_node *next;
 539
 540                 /* We are the current bottom-half. Find the next candidate,
 541                  * the first waiter in the queue on the remaining oldest
 542                  * request. As multiple seqnos may complete in the time it
 543                  * takes us to wake up and find the next waiter, we have to
 544                  * wake up that waiter for it to perform its own coherent
 545                  * completion check.
 546                  */
 547                 next = rb_next(&wait->node);
 548                 if (chain_wakeup(next, priority)) {
 549                         /* If the next waiter is already complete,
 550                          * wake it up and continue onto the next waiter. So
 551                          * if have a small herd, they will wake up in parallel
 552                          * rather than sequentially, which should reduce
 553                          * the overall latency in waking all the completed
 554                          * clients.
 555                          *
 556                          * However, waking up a chain adds extra latency to
 557                          * the first_waiter. This is undesirable if that
 558                          * waiter is a high priority task.
 559                          */
 560                         u32 seqno = intel_engine_get_seqno(engine);
 561
 562                         while (i915_seqno_passed(seqno, to_wait(next)->seqno)) {
 563                                 struct rb_node *n = rb_next(next);
 564
 565                                 __intel_breadcrumbs_finish(b, to_wait(next));
 566                                 next = n;
 567                                 if (!chain_wakeup(next, priority))
 568                                         break;
 569                         }
 570                 }
 571
 572                 __intel_breadcrumbs_next(engine, next);
 573         } else {
 574                 GEM_BUG_ON(rb_first(&b->waiters) == &wait->node);
 575         }
 576
 577         GEM_BUG_ON(RB_EMPTY_NODE(&wait->node));
 578         rb_erase(&wait->node, &b->waiters);
 579         RB_CLEAR_NODE(&wait->node);
 580
 581 out:
 582         GEM_BUG_ON(b->irq_wait == wait);
 583         GEM_BUG_ON(rb_first(&b->waiters) !=
 584                    (b->irq_wait ? &b->irq_wait->node : NULL));
 585 }
 586
 587 void intel_engine_remove_wait(struct intel_engine_cs *engine,
 588                               struct intel_wait *wait)
 589 {
 590         struct intel_breadcrumbs *b = &engine->breadcrumbs;
 591
 592         /* Quick check to see if this waiter was already decoupled from
 593          * the tree by the bottom-half to avoid contention on the spinlock
 594          * by the herd.
 595          */
 596         if (RB_EMPTY_NODE(&wait->node)) {
 597                 GEM_BUG_ON(READ_ONCE(b->irq_wait) == wait);
 598                 return;
 599         }
 600
 601         spin_lock_irq(&b->rb_lock);
 602         __intel_engine_remove_wait(engine, wait);
 603         spin_unlock_irq(&b->rb_lock);
 604 }
 605
 606 static void signaler_set_rtpriority(void)
 607 {
 608          struct sched_param param = { .sched_priority = 1 };
 609
 610          sched_setscheduler_nocheck(current, SCHED_FIFO, &param);
 611 }
 612
 613 static int intel_breadcrumbs_signaler(void *arg)
 614 {
 615         struct intel_engine_cs *engine = arg;
 616         struct intel_breadcrumbs *b = &engine->breadcrumbs;
 617         struct i915_request *rq, *n;
 618
 619         /* Install ourselves with high priority to reduce signalling latency */
 620         signaler_set_rtpriority();
 621
 622         do {
 623                 bool do_schedule = true;
 624                 LIST_HEAD(list);
 625                 u32 seqno;
 626
 627                 set_current_state(TASK_INTERRUPTIBLE);
 628                 if (list_empty(&b->signals))
 629                         goto sleep;
 630
 631                 /*
 632                  * We are either woken up by the interrupt bottom-half,
 633                  * or by a client adding a new signaller. In both cases,
 634                  * the GPU seqno may have advanced beyond our oldest signal.
 635                  * If it has, propagate the signal, remove the waiter and
 636                  * check again with the next oldest signal. Otherwise we
 637                  * need to wait for a new interrupt from the GPU or for
 638                  * a new client.
 639                  */
 640                 seqno = intel_engine_get_seqno(engine);
 641
 642                 spin_lock_irq(&b->rb_lock);
 643                 list_for_each_entry_safe(rq, n, &b->signals, signaling.link) {
 644                         u32 this = rq->signaling.wait.seqno;
 645
 646                         GEM_BUG_ON(!rq->signaling.wait.seqno);
 647
 648                         if (!i915_seqno_passed(seqno, this))
 649                                 break;
 650
 651                         if (likely(this == i915_request_global_seqno(rq))) {
 652                                 __intel_engine_remove_wait(engine,
 653                                                            &rq->signaling.wait);
 654
 655                                 rq->signaling.wait.seqno = 0;
 656                                 __list_del_entry(&rq->signaling.link);
 657
 658                                 if (!test_bit(DMA_FENCE_FLAG_SIGNALED_BIT,
 659                                               &rq->fence.flags)) {
 660                                         list_add_tail(&rq->signaling.link,
 661                                                       &list);
 662                                         i915_request_get(rq);
 663                                 }
 664                         }
 665                 }
 666                 spin_unlock_irq(&b->rb_lock);
 667
 668                 if (!list_empty(&list)) {
 669                         local_bh_disable();
 670                         list_for_each_entry_safe(rq, n, &list, signaling.link) {
 671                                 dma_fence_signal(&rq->fence);
 672                                 GEM_BUG_ON(!i915_request_completed(rq));
 673                                 i915_request_put(rq);
 674                         }
 675                         local_bh_enable(); /* kick start the tasklets */
 676
 677                         /*
 678                          * If the engine is saturated we may be continually
 679                          * processing completed requests. This angers the
 680                          * NMI watchdog if we never let anything else
 681                          * have access to the CPU. Let's pretend to be nice
 682                          * and relinquish the CPU if we burn through the
 683                          * entire RT timeslice!
 684                          */
 685                         do_schedule = need_resched();
 686                 }
 687
 688                 if (unlikely(do_schedule)) {
 689                         /* Before we sleep, check for a missed seqno */
 690                         if (current->state & TASK_NORMAL &&
 691                             !list_empty(&b->signals) &&
 692                             engine->irq_seqno_barrier &&
 693                             test_and_clear_bit(ENGINE_IRQ_BREADCRUMB,
 694                                                &engine->irq_posted)) {
 695                                 engine->irq_seqno_barrier(engine);
 696                                 intel_engine_wakeup(engine);
 697                         }
 698
 699 sleep:
 700                         if (kthread_should_park())
 701                                 kthread_parkme();
 702
 703                         if (unlikely(kthread_should_stop()))
 704                                 break;
 705
 706                         schedule();
 707                 }
 708         } while (1);
 709         __set_current_state(TASK_RUNNING);
 710
 711         return 0;
 712 }
 713
 714 static void insert_signal(struct intel_breadcrumbs *b,
 715                           struct i915_request *request,
 716                           const u32 seqno)
 717 {
 718         struct i915_request *iter;
 719
 720         lockdep_assert_held(&b->rb_lock);
 721
 722         /*
 723          * A reasonable assumption is that we are called to add signals
 724          * in sequence, as the requests are submitted for execution and
 725          * assigned a global_seqno. This will be the case for the majority
 726          * of internally generated signals (inter-engine signaling).
 727          *
 728          * Out of order waiters triggering random signaling enabling will
 729          * be more problematic, but hopefully rare enough and the list
 730          * small enough that the O(N) insertion sort is not an issue.
 731          */
 732
 733         list_for_each_entry_reverse(iter, &b->signals, signaling.link)
 734                 if (i915_seqno_passed(seqno, iter->signaling.wait.seqno))
 735                         break;
 736
 737         list_add(&request->signaling.link, &iter->signaling.link);
 738 }
 739
 740 bool intel_engine_enable_signaling(struct i915_request *request, bool wakeup)
 741 {
 742         struct intel_engine_cs *engine = request->engine;
 743         struct intel_breadcrumbs *b = &engine->breadcrumbs;
 744         struct intel_wait *wait = &request->signaling.wait;
 745         u32 seqno;
 746
 747         /*
 748          * Note that we may be called from an interrupt handler on another
 749          * device (e.g. nouveau signaling a fence completion causing us
 750          * to submit a request, and so enable signaling). As such,
 751          * we need to make sure that all other users of b->rb_lock protect
 752          * against interrupts, i.e. use spin_lock_irqsave.
 753          */
 754
 755         /* locked by dma_fence_enable_sw_signaling() (irqsafe fence->lock) */
 756         GEM_BUG_ON(!irqs_disabled());
 757         lockdep_assert_held(&request->lock);
 758
 759         seqno = i915_request_global_seqno(request);
 760         if (!seqno) /* will be enabled later upon execution */
 761                 return true;
 762
 763         GEM_BUG_ON(wait->seqno);
 764         wait->tsk = b->signaler;
 765         wait->request = request;
 766         wait->seqno = seqno;
 767
 768         /*
 769          * Add ourselves into the list of waiters, but registering our
 770          * bottom-half as the signaller thread. As per usual, only the oldest
 771          * waiter (not just signaller) is tasked as the bottom-half waking
 772          * up all completed waiters after the user interrupt.
 773          *
 774          * If we are the oldest waiter, enable the irq (after which we
 775          * must double check that the seqno did not complete).
 776          */
 777         spin_lock(&b->rb_lock);
 778         insert_signal(b, request, seqno);
 779         wakeup &= __intel_engine_add_wait(engine, wait);
 780         spin_unlock(&b->rb_lock);
 781
 782         if (wakeup) {
 783                 wake_up_process(b->signaler);
 784                 return !intel_wait_complete(wait);
 785         }
 786
 787         return true;
 788 }
 789
 790 void intel_engine_cancel_signaling(struct i915_request *request)
 791 {
 792         struct intel_engine_cs *engine = request->engine;
 793         struct intel_breadcrumbs *b = &engine->breadcrumbs;
 794
 795         GEM_BUG_ON(!irqs_disabled());
 796         lockdep_assert_held(&request->lock);
 797
 798         if (!READ_ONCE(request->signaling.wait.seqno))
 799                 return;
 800
 801         spin_lock(&b->rb_lock);
 802         __intel_engine_remove_wait(engine, &request->signaling.wait);
 803         if (fetch_and_zero(&request->signaling.wait.seqno))
 804                 __list_del_entry(&request->signaling.link);
 805         spin_unlock(&b->rb_lock);
 806 }
 807
 808 int intel_engine_init_breadcrumbs(struct intel_engine_cs *engine)
 809 {
 810         struct intel_breadcrumbs *b = &engine->breadcrumbs;
 811         struct task_struct *tsk;
 812
 813         spin_lock_init(&b->rb_lock);
 814         spin_lock_init(&b->irq_lock);
 815
 816         timer_setup(&b->fake_irq, intel_breadcrumbs_fake_irq, 0);
 817         timer_setup(&b->hangcheck, intel_breadcrumbs_hangcheck, 0);
 818
 819         INIT_LIST_HEAD(&b->signals);
 820
 821         /* Spawn a thread to provide a common bottom-half for all signals.
 822          * As this is an asynchronous interface we cannot steal the current
 823          * task for handling the bottom-half to the user interrupt, therefore
 824          * we create a thread to do the coherent seqno dance after the
 825          * interrupt and then signal the waitqueue (via the dma-buf/fence).
 826          */
 827         tsk = kthread_run(intel_breadcrumbs_signaler, engine,
 828                           "i915/signal:%d", engine->id);
 829         if (IS_ERR(tsk))
 830                 return PTR_ERR(tsk);
 831
 832         b->signaler = tsk;
 833
 834         return 0;
 835 }
 836
 837 static void cancel_fake_irq(struct intel_engine_cs *engine)
 838 {
 839         struct intel_breadcrumbs *b = &engine->breadcrumbs;
 840
 841         del_timer_sync(&b->fake_irq); /* may queue b->hangcheck */
 842         del_timer_sync(&b->hangcheck);
 843         clear_bit(engine->id, &engine->i915->gpu_error.missed_irq_rings);
 844 }
 845
 846 void intel_engine_reset_breadcrumbs(struct intel_engine_cs *engine)
 847 {
 848         struct intel_breadcrumbs *b = &engine->breadcrumbs;
 849
 850         spin_lock_irq(&b->irq_lock);
 851
 852         /*
 853          * Leave the fake_irq timer enabled (if it is running), but clear the
 854          * bit so that it turns itself off on its next wake up and goes back
 855          * to the long hangcheck interval if still required.
 856          */
 857         clear_bit(engine->id, &engine->i915->gpu_error.missed_irq_rings);
 858
 859         if (b->irq_enabled)
 860                 irq_enable(engine);
 861         else
 862                 irq_disable(engine);
 863
 864         /*
 865          * We set the IRQ_BREADCRUMB bit when we enable the irq presuming the
 866          * GPU is active and may have already executed the MI_USER_INTERRUPT
 867          * before the CPU is ready to receive. However, the engine is currently
 868          * idle (we haven't started it yet), there is no possibility for a
 869          * missed interrupt as we enabled the irq and so we can clear the
 870          * immediate wakeup (until a real interrupt arrives for the waiter).
 871          */
 872         clear_bit(ENGINE_IRQ_BREADCRUMB, &engine->irq_posted);
 873
 874         spin_unlock_irq(&b->irq_lock);
 875 }
 876
 877 void intel_engine_fini_breadcrumbs(struct intel_engine_cs *engine)
 878 {
 879         struct intel_breadcrumbs *b = &engine->breadcrumbs;
 880
 881         /* The engines should be idle and all requests accounted for! */
 882         WARN_ON(READ_ONCE(b->irq_wait));
 883         WARN_ON(!RB_EMPTY_ROOT(&b->waiters));
 884         WARN_ON(!list_empty(&b->signals));
 885
 886         if (!IS_ERR_OR_NULL(b->signaler))
 887                 kthread_stop(b->signaler);
 888
 889         cancel_fake_irq(engine);
 890 }
 891
 892 #if IS_ENABLED(CONFIG_DRM_I915_SELFTEST)
 893 #include "selftests/intel_breadcrumbs.c"
 894 #endif