1 // SPDX-License-Identifier: GPL-2.0
3 * Cadence USBSS DRD Driver - gadget side.
5 * Copyright (C) 2018-2019 Cadence Design Systems.
6 * Copyright (C) 2017-2018 NXP
15 * At some situations, the controller may get stale data address in TRB
17 * 1. Controller read TRB includes data address
18 * 2. Software updates TRBs includes data address and Cycle bit
19 * 3. Controller read TRB which includes Cycle bit
20 * 4. DMA run with stale data address
22 * To fix this problem, driver needs to make the first TRB in TD as invalid.
23 * After preparing all TRBs driver needs to check the position of DMA and
24 * if the DMA point to the first just added TRB and doorbell is 1,
25 * then driver must defer making this TRB as valid. This TRB will be make
26 * as valid during adding next TRB only if DMA is stopped or at TRBERR
29 * Issue has been fixed in DEV_VER_V3 version of controller.
32 * Controller for OUT endpoints has shared on-chip buffers for all incoming
33 * packets, including ep0out. It's FIFO buffer, so packets must be handle by DMA
34 * in correct order. If the first packet in the buffer will not be handled,
35 * then the following packets directed for other endpoints and functions
37 * Additionally the packets directed to one endpoint can block entire on-chip
38 * buffers. In this case transfer to other endpoints also will blocked.
40 * To resolve this issue after raising the descriptor missing interrupt
41 * driver prepares internal usb_request object and use it to arm DMA transfer.
43 * The problematic situation was observed in case when endpoint has been enabled
44 * but no usb_request were queued. Driver try detects such endpoints and will
45 * use this workaround only for these endpoint.
47 * Driver use limited number of buffer. This number can be set by macro
48 * CDNS3_WA2_NUM_BUFFERS.
50 * Such blocking situation was observed on ACM gadget. For this function
51 * host send OUT data packet but ACM function is not prepared for this packet.
52 * It's cause that buffer placed in on chip memory block transfer to other
55 * Issue has been fixed in DEV_VER_V2 version of controller.
59 #include <linux/dma-mapping.h>
60 #include <linux/usb/gadget.h>
61 #include <linux/module.h>
62 #include <linux/dmapool.h>
63 #include <linux/iopoll.h>
64 #include <linux/property.h>
67 #include "gadget-export.h"
68 #include "cdns3-gadget.h"
69 #include "cdns3-trace.h"
72 static int __cdns3_gadget_ep_queue(struct usb_ep *ep,
73 struct usb_request *request,
76 static int cdns3_ep_run_transfer(struct cdns3_endpoint *priv_ep,
77 struct usb_request *request);
79 static int cdns3_ep_run_stream_transfer(struct cdns3_endpoint *priv_ep,
80 struct usb_request *request);
83 * cdns3_clear_register_bit - clear bit in given register.
84 * @ptr: address of device controller register to be read and changed
85 * @mask: bits requested to clar
87 static void cdns3_clear_register_bit(void __iomem *ptr, u32 mask)
89 mask = readl(ptr) & ~mask;
94 * cdns3_set_register_bit - set bit in given register.
95 * @ptr: address of device controller register to be read and changed
96 * @mask: bits requested to set
98 void cdns3_set_register_bit(void __iomem *ptr, u32 mask)
100 mask = readl(ptr) | mask;
105 * cdns3_ep_addr_to_index - Macro converts endpoint address to
106 * index of endpoint object in cdns3_device.eps[] container
107 * @ep_addr: endpoint address for which endpoint object is required
110 u8 cdns3_ep_addr_to_index(u8 ep_addr)
112 return (((ep_addr & 0x7F)) + ((ep_addr & USB_DIR_IN) ? 16 : 0));
115 static int cdns3_get_dma_pos(struct cdns3_device *priv_dev,
116 struct cdns3_endpoint *priv_ep)
120 dma_index = readl(&priv_dev->regs->ep_traddr) - priv_ep->trb_pool_dma;
122 return dma_index / TRB_SIZE;
126 * cdns3_next_request - returns next request from list
127 * @list: list containing requests
129 * Returns request or NULL if no requests in list
131 struct usb_request *cdns3_next_request(struct list_head *list)
133 return list_first_entry_or_null(list, struct usb_request, list);
137 * cdns3_next_align_buf - returns next buffer from list
138 * @list: list containing buffers
140 * Returns buffer or NULL if no buffers in list
142 static struct cdns3_aligned_buf *cdns3_next_align_buf(struct list_head *list)
144 return list_first_entry_or_null(list, struct cdns3_aligned_buf, list);
148 * cdns3_next_priv_request - returns next request from list
149 * @list: list containing requests
151 * Returns request or NULL if no requests in list
153 static struct cdns3_request *cdns3_next_priv_request(struct list_head *list)
155 return list_first_entry_or_null(list, struct cdns3_request, list);
159 * cdns3_select_ep - selects endpoint
160 * @priv_dev: extended gadget object
161 * @ep: endpoint address
163 void cdns3_select_ep(struct cdns3_device *priv_dev, u32 ep)
165 if (priv_dev->selected_ep == ep)
168 priv_dev->selected_ep = ep;
169 writel(ep, &priv_dev->regs->ep_sel);
173 * cdns3_get_tdl - gets current tdl for selected endpoint.
174 * @priv_dev: extended gadget object
176 * Before calling this function the appropriate endpoint must
177 * be selected by means of cdns3_select_ep function.
179 static int cdns3_get_tdl(struct cdns3_device *priv_dev)
181 if (priv_dev->dev_ver < DEV_VER_V3)
182 return EP_CMD_TDL_GET(readl(&priv_dev->regs->ep_cmd));
184 return readl(&priv_dev->regs->ep_tdl);
187 dma_addr_t cdns3_trb_virt_to_dma(struct cdns3_endpoint *priv_ep,
188 struct cdns3_trb *trb)
190 u32 offset = (char *)trb - (char *)priv_ep->trb_pool;
192 return priv_ep->trb_pool_dma + offset;
195 static void cdns3_free_trb_pool(struct cdns3_endpoint *priv_ep)
197 struct cdns3_device *priv_dev = priv_ep->cdns3_dev;
199 if (priv_ep->trb_pool) {
200 dma_pool_free(priv_dev->eps_dma_pool,
201 priv_ep->trb_pool, priv_ep->trb_pool_dma);
202 priv_ep->trb_pool = NULL;
207 * cdns3_allocate_trb_pool - Allocates TRB's pool for selected endpoint
208 * @priv_ep: endpoint object
210 * Function will return 0 on success or -ENOMEM on allocation error
212 int cdns3_allocate_trb_pool(struct cdns3_endpoint *priv_ep)
214 struct cdns3_device *priv_dev = priv_ep->cdns3_dev;
215 int ring_size = TRB_RING_SIZE;
216 int num_trbs = ring_size / TRB_SIZE;
217 struct cdns3_trb *link_trb;
219 if (priv_ep->trb_pool && priv_ep->alloc_ring_size < ring_size)
220 cdns3_free_trb_pool(priv_ep);
222 if (!priv_ep->trb_pool) {
223 priv_ep->trb_pool = dma_pool_alloc(priv_dev->eps_dma_pool,
225 &priv_ep->trb_pool_dma);
227 if (!priv_ep->trb_pool)
230 priv_ep->alloc_ring_size = ring_size;
233 memset(priv_ep->trb_pool, 0, ring_size);
235 priv_ep->num_trbs = num_trbs;
240 /* Initialize the last TRB as Link TRB */
241 link_trb = (priv_ep->trb_pool + (priv_ep->num_trbs - 1));
243 if (priv_ep->use_streams) {
245 * For stream capable endpoints driver use single correct TRB.
246 * The last trb has zeroed cycle bit
248 link_trb->control = 0;
250 link_trb->buffer = cpu_to_le32(TRB_BUFFER(priv_ep->trb_pool_dma));
251 link_trb->control = cpu_to_le32(TRB_CYCLE | TRB_TYPE(TRB_LINK) | TRB_TOGGLE);
257 * cdns3_ep_stall_flush - Stalls and flushes selected endpoint
258 * @priv_ep: endpoint object
260 * Endpoint must be selected before call to this function
262 static void cdns3_ep_stall_flush(struct cdns3_endpoint *priv_ep)
264 struct cdns3_device *priv_dev = priv_ep->cdns3_dev;
267 trace_cdns3_halt(priv_ep, 1, 1);
269 writel(EP_CMD_DFLUSH | EP_CMD_ERDY | EP_CMD_SSTALL,
270 &priv_dev->regs->ep_cmd);
272 /* wait for DFLUSH cleared */
273 readl_poll_timeout_atomic(&priv_dev->regs->ep_cmd, val,
274 !(val & EP_CMD_DFLUSH), 1, 1000);
275 priv_ep->flags |= EP_STALLED;
276 priv_ep->flags &= ~EP_STALL_PENDING;
280 * cdns3_hw_reset_eps_config - reset endpoints configuration kept by controller.
281 * @priv_dev: extended gadget object
283 void cdns3_hw_reset_eps_config(struct cdns3_device *priv_dev)
287 writel(USB_CONF_CFGRST, &priv_dev->regs->usb_conf);
289 cdns3_allow_enable_l1(priv_dev, 0);
290 priv_dev->hw_configured_flag = 0;
291 priv_dev->onchip_used_size = 0;
292 priv_dev->out_mem_is_allocated = 0;
293 priv_dev->wait_for_setup = 0;
294 priv_dev->using_streams = 0;
296 for (i = 0; i < CDNS3_ENDPOINTS_MAX_COUNT; i++)
297 if (priv_dev->eps[i])
298 priv_dev->eps[i]->flags &= ~EP_CONFIGURED;
302 * cdns3_ep_inc_trb - increment a trb index.
303 * @index: Pointer to the TRB index to increment.
305 * @trb_in_seg: number of TRBs in segment
307 * The index should never point to the link TRB. After incrementing,
308 * if it is point to the link TRB, wrap around to the beginning and revert
309 * cycle state bit The
310 * link TRB is always at the last TRB entry.
312 static void cdns3_ep_inc_trb(int *index, u8 *cs, int trb_in_seg)
315 if (*index == (trb_in_seg - 1)) {
322 * cdns3_ep_inc_enq - increment endpoint's enqueue pointer
323 * @priv_ep: The endpoint whose enqueue pointer we're incrementing
325 static void cdns3_ep_inc_enq(struct cdns3_endpoint *priv_ep)
327 priv_ep->free_trbs--;
328 cdns3_ep_inc_trb(&priv_ep->enqueue, &priv_ep->pcs, priv_ep->num_trbs);
332 * cdns3_ep_inc_deq - increment endpoint's dequeue pointer
333 * @priv_ep: The endpoint whose dequeue pointer we're incrementing
335 static void cdns3_ep_inc_deq(struct cdns3_endpoint *priv_ep)
337 priv_ep->free_trbs++;
338 cdns3_ep_inc_trb(&priv_ep->dequeue, &priv_ep->ccs, priv_ep->num_trbs);
342 * cdns3_allow_enable_l1 - enable/disable permits to transition to L1.
343 * @priv_dev: Extended gadget object
344 * @enable: Enable/disable permit to transition to L1.
346 * If bit USB_CONF_L1EN is set and device receive Extended Token packet,
347 * then controller answer with ACK handshake.
348 * If bit USB_CONF_L1DS is set and device receive Extended Token packet,
349 * then controller answer with NYET handshake.
351 void cdns3_allow_enable_l1(struct cdns3_device *priv_dev, int enable)
354 writel(USB_CONF_L1EN, &priv_dev->regs->usb_conf);
356 writel(USB_CONF_L1DS, &priv_dev->regs->usb_conf);
359 enum usb_device_speed cdns3_get_speed(struct cdns3_device *priv_dev)
363 reg = readl(&priv_dev->regs->usb_sts);
365 if (DEV_SUPERSPEED(reg))
366 return USB_SPEED_SUPER;
367 else if (DEV_HIGHSPEED(reg))
368 return USB_SPEED_HIGH;
369 else if (DEV_FULLSPEED(reg))
370 return USB_SPEED_FULL;
371 else if (DEV_LOWSPEED(reg))
372 return USB_SPEED_LOW;
373 return USB_SPEED_UNKNOWN;
377 * cdns3_start_all_request - add to ring all request not started
378 * @priv_dev: Extended gadget object
379 * @priv_ep: The endpoint for whom request will be started.
381 * Returns return ENOMEM if transfer ring i not enough TRBs to start
384 static int cdns3_start_all_request(struct cdns3_device *priv_dev,
385 struct cdns3_endpoint *priv_ep)
387 struct usb_request *request;
389 u8 pending_empty = list_empty(&priv_ep->pending_req_list);
392 * If the last pending transfer is INTERNAL
393 * OR streams are enabled for this endpoint
394 * do NOT start new transfer till the last one is pending
396 if (!pending_empty) {
397 struct cdns3_request *priv_req;
399 request = cdns3_next_request(&priv_ep->pending_req_list);
400 priv_req = to_cdns3_request(request);
401 if ((priv_req->flags & REQUEST_INTERNAL) ||
402 (priv_ep->flags & EP_TDLCHK_EN) ||
403 priv_ep->use_streams) {
404 dev_dbg(priv_dev->dev, "Blocking external request\n");
409 while (!list_empty(&priv_ep->deferred_req_list)) {
410 request = cdns3_next_request(&priv_ep->deferred_req_list);
412 if (!priv_ep->use_streams) {
413 ret = cdns3_ep_run_transfer(priv_ep, request);
415 priv_ep->stream_sg_idx = 0;
416 ret = cdns3_ep_run_stream_transfer(priv_ep, request);
421 list_move_tail(&request->list, &priv_ep->pending_req_list);
422 if (request->stream_id != 0 || (priv_ep->flags & EP_TDLCHK_EN))
426 priv_ep->flags &= ~EP_RING_FULL;
431 * WA2: Set flag for all not ISOC OUT endpoints. If this flag is set
432 * driver try to detect whether endpoint need additional internal
433 * buffer for unblocking on-chip FIFO buffer. This flag will be cleared
434 * if before first DESCMISS interrupt the DMA will be armed.
436 #define cdns3_wa2_enable_detection(priv_dev, priv_ep, reg) do { \
437 if (!priv_ep->dir && priv_ep->type != USB_ENDPOINT_XFER_ISOC) { \
438 priv_ep->flags |= EP_QUIRK_EXTRA_BUF_DET; \
439 (reg) |= EP_STS_EN_DESCMISEN; \
442 static void __cdns3_descmiss_copy_data(struct usb_request *request,
443 struct usb_request *descmiss_req)
445 int length = request->actual + descmiss_req->actual;
446 struct scatterlist *s = request->sg;
449 if (length <= request->length) {
450 memcpy(&((u8 *)request->buf)[request->actual],
452 descmiss_req->actual);
453 request->actual = length;
455 /* It should never occures */
456 request->status = -ENOMEM;
459 if (length <= sg_dma_len(s)) {
460 void *p = phys_to_virt(sg_dma_address(s));
462 memcpy(&((u8 *)p)[request->actual],
464 descmiss_req->actual);
465 request->actual = length;
467 request->status = -ENOMEM;
473 * cdns3_wa2_descmiss_copy_data - copy data from internal requests to
474 * request queued by class driver.
475 * @priv_ep: extended endpoint object
476 * @request: request object
478 static void cdns3_wa2_descmiss_copy_data(struct cdns3_endpoint *priv_ep,
479 struct usb_request *request)
481 struct usb_request *descmiss_req;
482 struct cdns3_request *descmiss_priv_req;
484 while (!list_empty(&priv_ep->wa2_descmiss_req_list)) {
488 cdns3_next_priv_request(&priv_ep->wa2_descmiss_req_list);
489 descmiss_req = &descmiss_priv_req->request;
491 /* driver can't touch pending request */
492 if (descmiss_priv_req->flags & REQUEST_PENDING)
495 chunk_end = descmiss_priv_req->flags & REQUEST_INTERNAL_CH;
496 request->status = descmiss_req->status;
497 __cdns3_descmiss_copy_data(request, descmiss_req);
498 list_del_init(&descmiss_priv_req->list);
499 kfree(descmiss_req->buf);
500 cdns3_gadget_ep_free_request(&priv_ep->endpoint, descmiss_req);
501 --priv_ep->wa2_counter;
508 static struct usb_request *cdns3_wa2_gadget_giveback(struct cdns3_device *priv_dev,
509 struct cdns3_endpoint *priv_ep,
510 struct cdns3_request *priv_req)
512 if (priv_ep->flags & EP_QUIRK_EXTRA_BUF_EN &&
513 priv_req->flags & REQUEST_INTERNAL) {
514 struct usb_request *req;
516 req = cdns3_next_request(&priv_ep->deferred_req_list);
518 priv_ep->descmis_req = NULL;
523 /* unmap the gadget request before copying data */
524 usb_gadget_unmap_request_by_dev(priv_dev->sysdev, req,
527 cdns3_wa2_descmiss_copy_data(priv_ep, req);
528 if (!(priv_ep->flags & EP_QUIRK_END_TRANSFER) &&
529 req->length != req->actual) {
530 /* wait for next part of transfer */
531 /* re-map the gadget request buffer*/
532 usb_gadget_map_request_by_dev(priv_dev->sysdev, req,
533 usb_endpoint_dir_in(priv_ep->endpoint.desc));
537 if (req->status == -EINPROGRESS)
540 list_del_init(&req->list);
541 cdns3_start_all_request(priv_dev, priv_ep);
545 return &priv_req->request;
548 static int cdns3_wa2_gadget_ep_queue(struct cdns3_device *priv_dev,
549 struct cdns3_endpoint *priv_ep,
550 struct cdns3_request *priv_req)
555 * If transfer was queued before DESCMISS appear than we
556 * can disable handling of DESCMISS interrupt. Driver assumes that it
557 * can disable special treatment for this endpoint.
559 if (priv_ep->flags & EP_QUIRK_EXTRA_BUF_DET) {
562 cdns3_select_ep(priv_dev, priv_ep->num | priv_ep->dir);
563 priv_ep->flags &= ~EP_QUIRK_EXTRA_BUF_DET;
564 reg = readl(&priv_dev->regs->ep_sts_en);
565 reg &= ~EP_STS_EN_DESCMISEN;
566 trace_cdns3_wa2(priv_ep, "workaround disabled\n");
567 writel(reg, &priv_dev->regs->ep_sts_en);
570 if (priv_ep->flags & EP_QUIRK_EXTRA_BUF_EN) {
571 u8 pending_empty = list_empty(&priv_ep->pending_req_list);
572 u8 descmiss_empty = list_empty(&priv_ep->wa2_descmiss_req_list);
575 * DESCMISS transfer has been finished, so data will be
576 * directly copied from internal allocated usb_request
579 if (pending_empty && !descmiss_empty &&
580 !(priv_req->flags & REQUEST_INTERNAL)) {
581 cdns3_wa2_descmiss_copy_data(priv_ep,
584 trace_cdns3_wa2(priv_ep, "get internal stored data");
586 list_add_tail(&priv_req->request.list,
587 &priv_ep->pending_req_list);
588 cdns3_gadget_giveback(priv_ep, priv_req,
589 priv_req->request.status);
592 * Intentionally driver returns positive value as
593 * correct value. It informs that transfer has
600 * Driver will wait for completion DESCMISS transfer,
601 * before starts new, not DESCMISS transfer.
603 if (!pending_empty && !descmiss_empty) {
604 trace_cdns3_wa2(priv_ep, "wait for pending transfer\n");
608 if (priv_req->flags & REQUEST_INTERNAL)
609 list_add_tail(&priv_req->list,
610 &priv_ep->wa2_descmiss_req_list);
616 static void cdns3_wa2_remove_old_request(struct cdns3_endpoint *priv_ep)
618 struct cdns3_request *priv_req;
620 while (!list_empty(&priv_ep->wa2_descmiss_req_list)) {
623 priv_req = cdns3_next_priv_request(&priv_ep->wa2_descmiss_req_list);
624 chain = !!(priv_req->flags & REQUEST_INTERNAL_CH);
626 trace_cdns3_wa2(priv_ep, "removes eldest request");
628 kfree(priv_req->request.buf);
629 list_del_init(&priv_req->list);
630 cdns3_gadget_ep_free_request(&priv_ep->endpoint,
632 --priv_ep->wa2_counter;
640 * cdns3_wa2_descmissing_packet - handles descriptor missing event.
641 * @priv_ep: extended gadget object
643 * This function is used only for WA2. For more information see Work around 2
646 static void cdns3_wa2_descmissing_packet(struct cdns3_endpoint *priv_ep)
648 struct cdns3_request *priv_req;
649 struct usb_request *request;
650 u8 pending_empty = list_empty(&priv_ep->pending_req_list);
652 /* check for pending transfer */
653 if (!pending_empty) {
654 trace_cdns3_wa2(priv_ep, "Ignoring Descriptor missing IRQ\n");
658 if (priv_ep->flags & EP_QUIRK_EXTRA_BUF_DET) {
659 priv_ep->flags &= ~EP_QUIRK_EXTRA_BUF_DET;
660 priv_ep->flags |= EP_QUIRK_EXTRA_BUF_EN;
663 trace_cdns3_wa2(priv_ep, "Description Missing detected\n");
665 if (priv_ep->wa2_counter >= CDNS3_WA2_NUM_BUFFERS) {
666 trace_cdns3_wa2(priv_ep, "WA2 overflow\n");
667 cdns3_wa2_remove_old_request(priv_ep);
670 request = cdns3_gadget_ep_alloc_request(&priv_ep->endpoint,
675 priv_req = to_cdns3_request(request);
676 priv_req->flags |= REQUEST_INTERNAL;
678 /* if this field is still assigned it indicate that transfer related
679 * with this request has not been finished yet. Driver in this
680 * case simply allocate next request and assign flag REQUEST_INTERNAL_CH
681 * flag to previous one. It will indicate that current request is
682 * part of the previous one.
684 if (priv_ep->descmis_req)
685 priv_ep->descmis_req->flags |= REQUEST_INTERNAL_CH;
687 priv_req->request.buf = kzalloc(CDNS3_DESCMIS_BUF_SIZE,
689 priv_ep->wa2_counter++;
691 if (!priv_req->request.buf) {
692 cdns3_gadget_ep_free_request(&priv_ep->endpoint, request);
696 priv_req->request.length = CDNS3_DESCMIS_BUF_SIZE;
697 priv_ep->descmis_req = priv_req;
699 __cdns3_gadget_ep_queue(&priv_ep->endpoint,
700 &priv_ep->descmis_req->request,
706 dev_err(priv_ep->cdns3_dev->dev,
707 "Failed: No sufficient memory for DESCMIS\n");
710 static void cdns3_wa2_reset_tdl(struct cdns3_device *priv_dev)
712 u16 tdl = EP_CMD_TDL_GET(readl(&priv_dev->regs->ep_cmd));
715 u16 reset_val = EP_CMD_TDL_MAX + 1 - tdl;
717 writel(EP_CMD_TDL_SET(reset_val) | EP_CMD_STDL,
718 &priv_dev->regs->ep_cmd);
722 static void cdns3_wa2_check_outq_status(struct cdns3_device *priv_dev)
727 cdns3_select_ep(priv_dev, 0);
729 ep_sts_reg = readl(&priv_dev->regs->ep_sts);
731 if (EP_STS_OUTQ_VAL(ep_sts_reg)) {
732 u32 outq_ep_num = EP_STS_OUTQ_NO(ep_sts_reg);
733 struct cdns3_endpoint *outq_ep = priv_dev->eps[outq_ep_num];
735 if ((outq_ep->flags & EP_ENABLED) && !(outq_ep->use_streams) &&
736 outq_ep->type != USB_ENDPOINT_XFER_ISOC && outq_ep_num) {
737 u8 pending_empty = list_empty(&outq_ep->pending_req_list);
739 if ((outq_ep->flags & EP_QUIRK_EXTRA_BUF_DET) ||
740 (outq_ep->flags & EP_QUIRK_EXTRA_BUF_EN) ||
746 cdns3_select_ep(priv_dev, outq_ep->num |
748 ep_sts_en_reg = readl(&priv_dev->regs->ep_sts_en);
749 ep_cmd_reg = readl(&priv_dev->regs->ep_cmd);
751 outq_ep->flags |= EP_TDLCHK_EN;
752 cdns3_set_register_bit(&priv_dev->regs->ep_cfg,
755 cdns3_wa2_enable_detection(priv_dev, outq_ep,
757 writel(ep_sts_en_reg,
758 &priv_dev->regs->ep_sts_en);
759 /* reset tdl value to zero */
760 cdns3_wa2_reset_tdl(priv_dev);
762 * Memory barrier - Reset tdl before ringing the
766 if (EP_CMD_DRDY & ep_cmd_reg) {
767 trace_cdns3_wa2(outq_ep, "Enabling WA2 skipping doorbell\n");
770 trace_cdns3_wa2(outq_ep, "Enabling WA2 ringing doorbell\n");
772 * ring doorbell to generate DESCMIS irq
775 &priv_dev->regs->ep_cmd);
783 * cdns3_gadget_giveback - call struct usb_request's ->complete callback
784 * @priv_ep: The endpoint to whom the request belongs to
785 * @priv_req: The request we're giving back
786 * @status: completion code for the request
788 * Must be called with controller's lock held and interrupts disabled. This
789 * function will unmap @req and call its ->complete() callback to notify upper
790 * layers that it has completed.
792 void cdns3_gadget_giveback(struct cdns3_endpoint *priv_ep,
793 struct cdns3_request *priv_req,
796 struct cdns3_device *priv_dev = priv_ep->cdns3_dev;
797 struct usb_request *request = &priv_req->request;
799 list_del_init(&request->list);
801 if (request->status == -EINPROGRESS)
802 request->status = status;
804 if (likely(!(priv_req->flags & REQUEST_UNALIGNED)))
805 usb_gadget_unmap_request_by_dev(priv_dev->sysdev, request,
808 if ((priv_req->flags & REQUEST_UNALIGNED) &&
809 priv_ep->dir == USB_DIR_OUT && !request->status) {
810 /* Make DMA buffer CPU accessible */
811 dma_sync_single_for_cpu(priv_dev->sysdev,
812 priv_req->aligned_buf->dma,
814 priv_req->aligned_buf->dir);
815 memcpy(request->buf, priv_req->aligned_buf->buf,
819 priv_req->flags &= ~(REQUEST_PENDING | REQUEST_UNALIGNED);
820 /* All TRBs have finished, clear the counter */
821 priv_req->finished_trb = 0;
822 trace_cdns3_gadget_giveback(priv_req);
824 if (priv_dev->dev_ver < DEV_VER_V2) {
825 request = cdns3_wa2_gadget_giveback(priv_dev, priv_ep,
831 if (request->complete) {
832 spin_unlock(&priv_dev->lock);
833 usb_gadget_giveback_request(&priv_ep->endpoint,
835 spin_lock(&priv_dev->lock);
838 if (request->buf == priv_dev->zlp_buf)
839 cdns3_gadget_ep_free_request(&priv_ep->endpoint, request);
842 static void cdns3_wa1_restore_cycle_bit(struct cdns3_endpoint *priv_ep)
844 /* Work around for stale data address in TRB*/
845 if (priv_ep->wa1_set) {
846 trace_cdns3_wa1(priv_ep, "restore cycle bit");
848 priv_ep->wa1_set = 0;
849 priv_ep->wa1_trb_index = 0xFFFF;
850 if (priv_ep->wa1_cycle_bit) {
851 priv_ep->wa1_trb->control =
852 priv_ep->wa1_trb->control | cpu_to_le32(0x1);
854 priv_ep->wa1_trb->control =
855 priv_ep->wa1_trb->control & cpu_to_le32(~0x1);
860 static void cdns3_free_aligned_request_buf(struct work_struct *work)
862 struct cdns3_device *priv_dev = container_of(work, struct cdns3_device,
864 struct cdns3_aligned_buf *buf, *tmp;
867 spin_lock_irqsave(&priv_dev->lock, flags);
869 list_for_each_entry_safe(buf, tmp, &priv_dev->aligned_buf_list, list) {
871 list_del(&buf->list);
874 * Re-enable interrupts to free DMA capable memory.
875 * Driver can't free this memory with disabled
878 spin_unlock_irqrestore(&priv_dev->lock, flags);
879 dma_free_noncoherent(priv_dev->sysdev, buf->size,
880 buf->buf, buf->dma, buf->dir);
882 spin_lock_irqsave(&priv_dev->lock, flags);
886 spin_unlock_irqrestore(&priv_dev->lock, flags);
889 static int cdns3_prepare_aligned_request_buf(struct cdns3_request *priv_req)
891 struct cdns3_endpoint *priv_ep = priv_req->priv_ep;
892 struct cdns3_device *priv_dev = priv_ep->cdns3_dev;
893 struct cdns3_aligned_buf *buf;
895 /* check if buffer is aligned to 8. */
896 if (!((uintptr_t)priv_req->request.buf & 0x7))
899 buf = priv_req->aligned_buf;
901 if (!buf || priv_req->request.length > buf->size) {
902 buf = kzalloc(sizeof(*buf), GFP_ATOMIC);
906 buf->size = priv_req->request.length;
907 buf->dir = usb_endpoint_dir_in(priv_ep->endpoint.desc) ?
908 DMA_TO_DEVICE : DMA_FROM_DEVICE;
910 buf->buf = dma_alloc_noncoherent(priv_dev->sysdev,
920 if (priv_req->aligned_buf) {
921 trace_cdns3_free_aligned_request(priv_req);
922 priv_req->aligned_buf->in_use = 0;
923 queue_work(system_freezable_wq,
924 &priv_dev->aligned_buf_wq);
928 priv_req->aligned_buf = buf;
930 list_add_tail(&buf->list,
931 &priv_dev->aligned_buf_list);
934 if (priv_ep->dir == USB_DIR_IN) {
935 /* Make DMA buffer CPU accessible */
936 dma_sync_single_for_cpu(priv_dev->sysdev,
937 buf->dma, buf->size, buf->dir);
938 memcpy(buf->buf, priv_req->request.buf,
939 priv_req->request.length);
942 /* Transfer DMA buffer ownership back to device */
943 dma_sync_single_for_device(priv_dev->sysdev,
944 buf->dma, buf->size, buf->dir);
946 priv_req->flags |= REQUEST_UNALIGNED;
947 trace_cdns3_prepare_aligned_request(priv_req);
952 static int cdns3_wa1_update_guard(struct cdns3_endpoint *priv_ep,
953 struct cdns3_trb *trb)
955 struct cdns3_device *priv_dev = priv_ep->cdns3_dev;
957 if (!priv_ep->wa1_set) {
960 doorbell = !!(readl(&priv_dev->regs->ep_cmd) & EP_CMD_DRDY);
963 priv_ep->wa1_cycle_bit = priv_ep->pcs ? TRB_CYCLE : 0;
964 priv_ep->wa1_set = 1;
965 priv_ep->wa1_trb = trb;
966 priv_ep->wa1_trb_index = priv_ep->enqueue;
967 trace_cdns3_wa1(priv_ep, "set guard");
974 static void cdns3_wa1_tray_restore_cycle_bit(struct cdns3_device *priv_dev,
975 struct cdns3_endpoint *priv_ep)
980 doorbell = !!(readl(&priv_dev->regs->ep_cmd) & EP_CMD_DRDY);
981 dma_index = cdns3_get_dma_pos(priv_dev, priv_ep);
983 if (!doorbell || dma_index != priv_ep->wa1_trb_index)
984 cdns3_wa1_restore_cycle_bit(priv_ep);
987 static int cdns3_ep_run_stream_transfer(struct cdns3_endpoint *priv_ep,
988 struct usb_request *request)
990 struct cdns3_device *priv_dev = priv_ep->cdns3_dev;
991 struct cdns3_request *priv_req;
992 struct cdns3_trb *trb;
998 unsigned int sg_idx = priv_ep->stream_sg_idx;
1000 priv_req = to_cdns3_request(request);
1001 address = priv_ep->endpoint.desc->bEndpointAddress;
1003 priv_ep->flags |= EP_PENDING_REQUEST;
1005 /* must allocate buffer aligned to 8 */
1006 if (priv_req->flags & REQUEST_UNALIGNED)
1007 trb_dma = priv_req->aligned_buf->dma;
1009 trb_dma = request->dma;
1011 /* For stream capable endpoints driver use only single TD. */
1012 trb = priv_ep->trb_pool + priv_ep->enqueue;
1013 priv_req->start_trb = priv_ep->enqueue;
1014 priv_req->end_trb = priv_req->start_trb;
1015 priv_req->trb = trb;
1017 cdns3_select_ep(priv_ep->cdns3_dev, address);
1019 control = TRB_TYPE(TRB_NORMAL) | TRB_CYCLE |
1020 TRB_STREAM_ID(priv_req->request.stream_id) | TRB_ISP;
1022 if (!request->num_sgs) {
1023 trb->buffer = cpu_to_le32(TRB_BUFFER(trb_dma));
1024 length = request->length;
1026 trb->buffer = cpu_to_le32(TRB_BUFFER(request->sg[sg_idx].dma_address));
1027 length = request->sg[sg_idx].length;
1030 tdl = DIV_ROUND_UP(length, priv_ep->endpoint.maxpacket);
1032 trb->length = cpu_to_le32(TRB_BURST_LEN(16) | TRB_LEN(length));
1035 * For DEV_VER_V2 controller version we have enabled
1036 * USB_CONF2_EN_TDL_TRB in DMULT configuration.
1037 * This enables TDL calculation based on TRB, hence setting TDL in TRB.
1039 if (priv_dev->dev_ver >= DEV_VER_V2) {
1040 if (priv_dev->gadget.speed == USB_SPEED_SUPER)
1041 trb->length |= cpu_to_le32(TRB_TDL_SS_SIZE(tdl));
1043 priv_req->flags |= REQUEST_PENDING;
1045 trb->control = cpu_to_le32(control);
1047 trace_cdns3_prepare_trb(priv_ep, priv_req->trb);
1050 * Memory barrier - Cycle Bit must be set before trb->length and
1051 * trb->buffer fields.
1055 /* always first element */
1056 writel(EP_TRADDR_TRADDR(priv_ep->trb_pool_dma),
1057 &priv_dev->regs->ep_traddr);
1059 if (!(priv_ep->flags & EP_STALLED)) {
1060 trace_cdns3_ring(priv_ep);
1061 /*clearing TRBERR and EP_STS_DESCMIS before seting DRDY*/
1062 writel(EP_STS_TRBERR | EP_STS_DESCMIS, &priv_dev->regs->ep_sts);
1064 priv_ep->prime_flag = false;
1067 * Controller version DEV_VER_V2 tdl calculation
1071 if (priv_dev->dev_ver < DEV_VER_V2)
1072 writel(EP_CMD_TDL_SET(tdl) | EP_CMD_STDL,
1073 &priv_dev->regs->ep_cmd);
1074 else if (priv_dev->dev_ver > DEV_VER_V2)
1075 writel(tdl, &priv_dev->regs->ep_tdl);
1077 priv_ep->last_stream_id = priv_req->request.stream_id;
1078 writel(EP_CMD_DRDY, &priv_dev->regs->ep_cmd);
1079 writel(EP_CMD_ERDY_SID(priv_req->request.stream_id) |
1080 EP_CMD_ERDY, &priv_dev->regs->ep_cmd);
1082 trace_cdns3_doorbell_epx(priv_ep->name,
1083 readl(&priv_dev->regs->ep_traddr));
1086 /* WORKAROUND for transition to L0 */
1087 __cdns3_gadget_wakeup(priv_dev);
1092 static void cdns3_rearm_drdy_if_needed(struct cdns3_endpoint *priv_ep)
1094 struct cdns3_device *priv_dev = priv_ep->cdns3_dev;
1096 if (priv_dev->dev_ver < DEV_VER_V3)
1099 if (readl(&priv_dev->regs->ep_sts) & EP_STS_TRBERR) {
1100 writel(EP_STS_TRBERR, &priv_dev->regs->ep_sts);
1101 writel(EP_CMD_DRDY, &priv_dev->regs->ep_cmd);
1106 * cdns3_ep_run_transfer - start transfer on no-default endpoint hardware
1107 * @priv_ep: endpoint object
1108 * @request: request object
1110 * Returns zero on success or negative value on failure
1112 static int cdns3_ep_run_transfer(struct cdns3_endpoint *priv_ep,
1113 struct usb_request *request)
1115 struct cdns3_device *priv_dev = priv_ep->cdns3_dev;
1116 struct cdns3_request *priv_req;
1117 struct cdns3_trb *trb;
1118 struct cdns3_trb *link_trb = NULL;
1127 struct scatterlist *s = NULL;
1128 bool sg_supported = !!(request->num_mapped_sgs);
1130 if (priv_ep->type == USB_ENDPOINT_XFER_ISOC)
1131 num_trb = priv_ep->interval;
1133 num_trb = sg_supported ? request->num_mapped_sgs : 1;
1135 if (num_trb > priv_ep->free_trbs) {
1136 priv_ep->flags |= EP_RING_FULL;
1140 priv_req = to_cdns3_request(request);
1141 address = priv_ep->endpoint.desc->bEndpointAddress;
1143 priv_ep->flags |= EP_PENDING_REQUEST;
1145 /* must allocate buffer aligned to 8 */
1146 if (priv_req->flags & REQUEST_UNALIGNED)
1147 trb_dma = priv_req->aligned_buf->dma;
1149 trb_dma = request->dma;
1151 trb = priv_ep->trb_pool + priv_ep->enqueue;
1152 priv_req->start_trb = priv_ep->enqueue;
1153 priv_req->trb = trb;
1155 cdns3_select_ep(priv_ep->cdns3_dev, address);
1158 if ((priv_ep->enqueue + num_trb) >= (priv_ep->num_trbs - 1)) {
1159 int doorbell, dma_index;
1162 doorbell = !!(readl(&priv_dev->regs->ep_cmd) & EP_CMD_DRDY);
1163 dma_index = cdns3_get_dma_pos(priv_dev, priv_ep);
1165 /* Driver can't update LINK TRB if it is current processed. */
1166 if (doorbell && dma_index == priv_ep->num_trbs - 1) {
1167 priv_ep->flags |= EP_DEFERRED_DRDY;
1171 /*updating C bt in Link TRB before starting DMA*/
1172 link_trb = priv_ep->trb_pool + (priv_ep->num_trbs - 1);
1174 * For TRs size equal 2 enabling TRB_CHAIN for epXin causes
1175 * that DMA stuck at the LINK TRB.
1176 * On the other hand, removing TRB_CHAIN for longer TRs for
1177 * epXout cause that DMA stuck after handling LINK TRB.
1178 * To eliminate this strange behavioral driver set TRB_CHAIN
1179 * bit only for TR size > 2.
1181 if (priv_ep->type == USB_ENDPOINT_XFER_ISOC ||
1182 TRBS_PER_SEGMENT > 2)
1185 link_trb->control = cpu_to_le32(((priv_ep->pcs) ? TRB_CYCLE : 0) |
1186 TRB_TYPE(TRB_LINK) | TRB_TOGGLE | ch_bit);
1189 if (priv_dev->dev_ver <= DEV_VER_V2)
1190 togle_pcs = cdns3_wa1_update_guard(priv_ep, trb);
1195 /* set incorrect Cycle Bit for first trb*/
1196 control = priv_ep->pcs ? 0 : TRB_CYCLE;
1198 if (priv_dev->dev_ver >= DEV_VER_V2) {
1201 td_size = DIV_ROUND_UP(request->length,
1202 priv_ep->endpoint.maxpacket);
1203 if (priv_dev->gadget.speed == USB_SPEED_SUPER)
1204 trb->length = cpu_to_le32(TRB_TDL_SS_SIZE(td_size));
1206 control |= TRB_TDL_HS_SIZE(td_size);
1213 control |= TRB_TYPE(TRB_NORMAL);
1215 trb->buffer = cpu_to_le32(TRB_BUFFER(sg_dma_address(s)));
1216 length = sg_dma_len(s);
1218 trb->buffer = cpu_to_le32(TRB_BUFFER(trb_dma));
1219 length = request->length;
1222 if (priv_ep->flags & EP_TDLCHK_EN)
1223 total_tdl += DIV_ROUND_UP(length,
1224 priv_ep->endpoint.maxpacket);
1226 trb->length |= cpu_to_le32(TRB_BURST_LEN(priv_ep->trb_burst_size) |
1228 pcs = priv_ep->pcs ? TRB_CYCLE : 0;
1231 * first trb should be prepared as last to avoid processing
1237 if (priv_ep->type == USB_ENDPOINT_XFER_ISOC && !priv_ep->dir) {
1238 control |= TRB_IOC | TRB_ISP;
1240 /* for last element in TD or in SG list */
1241 if (sg_iter == (num_trb - 1) && sg_iter != 0)
1242 control |= pcs | TRB_IOC | TRB_ISP;
1246 trb->control = cpu_to_le32(control);
1248 priv_req->trb->control = cpu_to_le32(control);
1251 trb->control |= cpu_to_le32(TRB_ISP);
1252 /* Don't set chain bit for last TRB */
1253 if (sg_iter < num_trb - 1)
1254 trb->control |= cpu_to_le32(TRB_CHAIN);
1261 priv_req->end_trb = priv_ep->enqueue;
1262 cdns3_ep_inc_enq(priv_ep);
1263 trb = priv_ep->trb_pool + priv_ep->enqueue;
1265 } while (sg_iter < num_trb);
1267 trb = priv_req->trb;
1269 priv_req->flags |= REQUEST_PENDING;
1270 priv_req->num_of_trb = num_trb;
1273 trb->control |= cpu_to_le32(TRB_IOC | TRB_ISP);
1275 if (priv_dev->dev_ver < DEV_VER_V2 &&
1276 (priv_ep->flags & EP_TDLCHK_EN)) {
1277 u16 tdl = total_tdl;
1278 u16 old_tdl = EP_CMD_TDL_GET(readl(&priv_dev->regs->ep_cmd));
1280 if (tdl > EP_CMD_TDL_MAX) {
1281 tdl = EP_CMD_TDL_MAX;
1282 priv_ep->pending_tdl = total_tdl - EP_CMD_TDL_MAX;
1285 if (old_tdl < tdl) {
1287 writel(EP_CMD_TDL_SET(tdl) | EP_CMD_STDL,
1288 &priv_dev->regs->ep_cmd);
1293 * Memory barrier - cycle bit must be set before other filds in trb.
1297 /* give the TD to the consumer*/
1299 trb->control = trb->control ^ cpu_to_le32(1);
1301 if (priv_dev->dev_ver <= DEV_VER_V2)
1302 cdns3_wa1_tray_restore_cycle_bit(priv_dev, priv_ep);
1307 while (i < num_trb) {
1308 trace_cdns3_prepare_trb(priv_ep, trb + i);
1309 if (trb + i == link_trb) {
1310 trb = priv_ep->trb_pool;
1311 num_trb = num_trb - i;
1318 trace_cdns3_prepare_trb(priv_ep, priv_req->trb);
1322 * Memory barrier - Cycle Bit must be set before trb->length and
1323 * trb->buffer fields.
1328 * For DMULT mode we can set address to transfer ring only once after
1329 * enabling endpoint.
1331 if (priv_ep->flags & EP_UPDATE_EP_TRBADDR) {
1333 * Until SW is not ready to handle the OUT transfer the ISO OUT
1334 * Endpoint should be disabled (EP_CFG.ENABLE = 0).
1335 * EP_CFG_ENABLE must be set before updating ep_traddr.
1337 if (priv_ep->type == USB_ENDPOINT_XFER_ISOC && !priv_ep->dir &&
1338 !(priv_ep->flags & EP_QUIRK_ISO_OUT_EN)) {
1339 priv_ep->flags |= EP_QUIRK_ISO_OUT_EN;
1340 cdns3_set_register_bit(&priv_dev->regs->ep_cfg,
1344 writel(EP_TRADDR_TRADDR(priv_ep->trb_pool_dma +
1345 priv_req->start_trb * TRB_SIZE),
1346 &priv_dev->regs->ep_traddr);
1348 priv_ep->flags &= ~EP_UPDATE_EP_TRBADDR;
1351 if (!priv_ep->wa1_set && !(priv_ep->flags & EP_STALLED)) {
1352 trace_cdns3_ring(priv_ep);
1353 /*clearing TRBERR and EP_STS_DESCMIS before seting DRDY*/
1354 writel(EP_STS_TRBERR | EP_STS_DESCMIS, &priv_dev->regs->ep_sts);
1355 writel(EP_CMD_DRDY, &priv_dev->regs->ep_cmd);
1356 cdns3_rearm_drdy_if_needed(priv_ep);
1357 trace_cdns3_doorbell_epx(priv_ep->name,
1358 readl(&priv_dev->regs->ep_traddr));
1361 /* WORKAROUND for transition to L0 */
1362 __cdns3_gadget_wakeup(priv_dev);
1367 void cdns3_set_hw_configuration(struct cdns3_device *priv_dev)
1369 struct cdns3_endpoint *priv_ep;
1372 if (priv_dev->hw_configured_flag)
1375 writel(USB_CONF_CFGSET, &priv_dev->regs->usb_conf);
1377 cdns3_set_register_bit(&priv_dev->regs->usb_conf,
1378 USB_CONF_U1EN | USB_CONF_U2EN);
1380 priv_dev->hw_configured_flag = 1;
1382 list_for_each_entry(ep, &priv_dev->gadget.ep_list, ep_list) {
1384 priv_ep = ep_to_cdns3_ep(ep);
1385 cdns3_start_all_request(priv_dev, priv_ep);
1389 cdns3_allow_enable_l1(priv_dev, 1);
1393 * cdns3_trb_handled - check whether trb has been handled by DMA
1395 * @priv_ep: extended endpoint object.
1396 * @priv_req: request object for checking
1398 * Endpoint must be selected before invoking this function.
1400 * Returns false if request has not been handled by DMA, else returns true.
1404 * DQ = priv_ep->dequeue - dequeue position
1405 * EQ = priv_ep->enqueue - enqueue position
1406 * ST = priv_req->start_trb - index of first TRB in transfer ring
1407 * ET = priv_req->end_trb - index of last TRB in transfer ring
1408 * CI = current_index - index of processed TRB by DMA.
1410 * As first step, we check if the TRB between the ST and ET.
1411 * Then, we check if cycle bit for index priv_ep->dequeue
1415 * 1. priv_ep->dequeue never equals to current_index.
1416 * 2 priv_ep->enqueue never exceed priv_ep->dequeue
1417 * 3. exception: priv_ep->enqueue == priv_ep->dequeue
1418 * and priv_ep->free_trbs is zero.
1419 * This case indicate that TR is full.
1421 * At below two cases, the request have been handled.
1422 * Case 1 - priv_ep->dequeue < current_index
1423 * SR ... EQ ... DQ ... CI ... ER
1424 * SR ... DQ ... CI ... EQ ... ER
1426 * Case 2 - priv_ep->dequeue > current_index
1427 * This situation takes place when CI go through the LINK TRB at the end of
1429 * SR ... CI ... EQ ... DQ ... ER
1431 static bool cdns3_trb_handled(struct cdns3_endpoint *priv_ep,
1432 struct cdns3_request *priv_req)
1434 struct cdns3_device *priv_dev = priv_ep->cdns3_dev;
1435 struct cdns3_trb *trb;
1436 int current_index = 0;
1440 current_index = cdns3_get_dma_pos(priv_dev, priv_ep);
1441 doorbell = !!(readl(&priv_dev->regs->ep_cmd) & EP_CMD_DRDY);
1443 /* current trb doesn't belong to this request */
1444 if (priv_req->start_trb < priv_req->end_trb) {
1445 if (priv_ep->dequeue > priv_req->end_trb)
1448 if (priv_ep->dequeue < priv_req->start_trb)
1452 if ((priv_req->start_trb > priv_req->end_trb) &&
1453 (priv_ep->dequeue > priv_req->end_trb) &&
1454 (priv_ep->dequeue < priv_req->start_trb))
1457 if ((priv_req->start_trb == priv_req->end_trb) &&
1458 (priv_ep->dequeue != priv_req->end_trb))
1461 trb = &priv_ep->trb_pool[priv_ep->dequeue];
1463 if ((le32_to_cpu(trb->control) & TRB_CYCLE) != priv_ep->ccs)
1466 if (doorbell == 1 && current_index == priv_ep->dequeue)
1469 /* The corner case for TRBS_PER_SEGMENT equal 2). */
1470 if (TRBS_PER_SEGMENT == 2 && priv_ep->type != USB_ENDPOINT_XFER_ISOC) {
1475 if (priv_ep->enqueue == priv_ep->dequeue &&
1476 priv_ep->free_trbs == 0) {
1478 } else if (priv_ep->dequeue < current_index) {
1479 if ((current_index == (priv_ep->num_trbs - 1)) &&
1484 } else if (priv_ep->dequeue > current_index) {
1489 trace_cdns3_request_handled(priv_req, current_index, handled);
1494 static void cdns3_transfer_completed(struct cdns3_device *priv_dev,
1495 struct cdns3_endpoint *priv_ep)
1497 struct cdns3_request *priv_req;
1498 struct usb_request *request;
1499 struct cdns3_trb *trb;
1500 bool request_handled = false;
1501 bool transfer_end = false;
1503 while (!list_empty(&priv_ep->pending_req_list)) {
1504 request = cdns3_next_request(&priv_ep->pending_req_list);
1505 priv_req = to_cdns3_request(request);
1507 trb = priv_ep->trb_pool + priv_ep->dequeue;
1509 /* The TRB was changed as link TRB, and the request was handled at ep_dequeue */
1510 while (TRB_FIELD_TO_TYPE(le32_to_cpu(trb->control)) == TRB_LINK) {
1511 trace_cdns3_complete_trb(priv_ep, trb);
1512 cdns3_ep_inc_deq(priv_ep);
1513 trb = priv_ep->trb_pool + priv_ep->dequeue;
1516 if (!request->stream_id) {
1517 /* Re-select endpoint. It could be changed by other CPU
1518 * during handling usb_gadget_giveback_request.
1520 cdns3_select_ep(priv_dev, priv_ep->endpoint.address);
1522 while (cdns3_trb_handled(priv_ep, priv_req)) {
1523 priv_req->finished_trb++;
1524 if (priv_req->finished_trb >= priv_req->num_of_trb)
1525 request_handled = true;
1527 trb = priv_ep->trb_pool + priv_ep->dequeue;
1528 trace_cdns3_complete_trb(priv_ep, trb);
1532 TRB_LEN(le32_to_cpu(trb->length));
1534 if (priv_req->num_of_trb > 1 &&
1535 le32_to_cpu(trb->control) & TRB_SMM &&
1536 le32_to_cpu(trb->control) & TRB_CHAIN)
1537 transfer_end = true;
1539 cdns3_ep_inc_deq(priv_ep);
1542 if (request_handled) {
1543 cdns3_gadget_giveback(priv_ep, priv_req, 0);
1544 request_handled = false;
1545 transfer_end = false;
1547 goto prepare_next_td;
1550 if (priv_ep->type != USB_ENDPOINT_XFER_ISOC &&
1551 TRBS_PER_SEGMENT == 2)
1554 /* Re-select endpoint. It could be changed by other CPU
1555 * during handling usb_gadget_giveback_request.
1557 cdns3_select_ep(priv_dev, priv_ep->endpoint.address);
1559 trb = priv_ep->trb_pool;
1560 trace_cdns3_complete_trb(priv_ep, trb);
1562 if (trb != priv_req->trb)
1563 dev_warn(priv_dev->dev,
1564 "request_trb=0x%p, queue_trb=0x%p\n",
1565 priv_req->trb, trb);
1567 request->actual += TRB_LEN(le32_to_cpu(trb->length));
1569 if (!request->num_sgs ||
1570 (request->num_sgs == (priv_ep->stream_sg_idx + 1))) {
1571 priv_ep->stream_sg_idx = 0;
1572 cdns3_gadget_giveback(priv_ep, priv_req, 0);
1574 priv_ep->stream_sg_idx++;
1575 cdns3_ep_run_stream_transfer(priv_ep, request);
1580 priv_ep->flags &= ~EP_PENDING_REQUEST;
1583 if (!(priv_ep->flags & EP_STALLED) &&
1584 !(priv_ep->flags & EP_STALL_PENDING))
1585 cdns3_start_all_request(priv_dev, priv_ep);
1588 void cdns3_rearm_transfer(struct cdns3_endpoint *priv_ep, u8 rearm)
1590 struct cdns3_device *priv_dev = priv_ep->cdns3_dev;
1592 cdns3_wa1_restore_cycle_bit(priv_ep);
1595 trace_cdns3_ring(priv_ep);
1597 /* Cycle Bit must be updated before arming DMA. */
1599 writel(EP_CMD_DRDY, &priv_dev->regs->ep_cmd);
1601 __cdns3_gadget_wakeup(priv_dev);
1603 trace_cdns3_doorbell_epx(priv_ep->name,
1604 readl(&priv_dev->regs->ep_traddr));
1608 static void cdns3_reprogram_tdl(struct cdns3_endpoint *priv_ep)
1610 u16 tdl = priv_ep->pending_tdl;
1611 struct cdns3_device *priv_dev = priv_ep->cdns3_dev;
1613 if (tdl > EP_CMD_TDL_MAX) {
1614 tdl = EP_CMD_TDL_MAX;
1615 priv_ep->pending_tdl -= EP_CMD_TDL_MAX;
1617 priv_ep->pending_tdl = 0;
1620 writel(EP_CMD_TDL_SET(tdl) | EP_CMD_STDL, &priv_dev->regs->ep_cmd);
1624 * cdns3_check_ep_interrupt_proceed - Processes interrupt related to endpoint
1625 * @priv_ep: endpoint object
1629 static int cdns3_check_ep_interrupt_proceed(struct cdns3_endpoint *priv_ep)
1631 struct cdns3_device *priv_dev = priv_ep->cdns3_dev;
1633 struct usb_request *deferred_request;
1634 struct usb_request *pending_request;
1637 cdns3_select_ep(priv_dev, priv_ep->endpoint.address);
1639 trace_cdns3_epx_irq(priv_dev, priv_ep);
1641 ep_sts_reg = readl(&priv_dev->regs->ep_sts);
1642 writel(ep_sts_reg, &priv_dev->regs->ep_sts);
1644 if ((ep_sts_reg & EP_STS_PRIME) && priv_ep->use_streams) {
1645 bool dbusy = !!(ep_sts_reg & EP_STS_DBUSY);
1647 tdl = cdns3_get_tdl(priv_dev);
1650 * Continue the previous transfer:
1651 * There is some racing between ERDY and PRIME. The device send
1652 * ERDY and almost in the same time Host send PRIME. It cause
1653 * that host ignore the ERDY packet and driver has to send it
1656 if (tdl && (dbusy || !EP_STS_BUFFEMPTY(ep_sts_reg) ||
1657 EP_STS_HOSTPP(ep_sts_reg))) {
1658 writel(EP_CMD_ERDY |
1659 EP_CMD_ERDY_SID(priv_ep->last_stream_id),
1660 &priv_dev->regs->ep_cmd);
1661 ep_sts_reg &= ~(EP_STS_MD_EXIT | EP_STS_IOC);
1663 priv_ep->prime_flag = true;
1665 pending_request = cdns3_next_request(&priv_ep->pending_req_list);
1666 deferred_request = cdns3_next_request(&priv_ep->deferred_req_list);
1668 if (deferred_request && !pending_request) {
1669 cdns3_start_all_request(priv_dev, priv_ep);
1674 if (ep_sts_reg & EP_STS_TRBERR) {
1675 if (priv_ep->flags & EP_STALL_PENDING &&
1676 !(ep_sts_reg & EP_STS_DESCMIS &&
1677 priv_dev->dev_ver < DEV_VER_V2)) {
1678 cdns3_ep_stall_flush(priv_ep);
1682 * For isochronous transfer driver completes request on
1683 * IOC or on TRBERR. IOC appears only when device receive
1684 * OUT data packet. If host disable stream or lost some packet
1685 * then the only way to finish all queued transfer is to do it
1688 if (priv_ep->type == USB_ENDPOINT_XFER_ISOC &&
1689 !priv_ep->wa1_set) {
1690 if (!priv_ep->dir) {
1691 u32 ep_cfg = readl(&priv_dev->regs->ep_cfg);
1693 ep_cfg &= ~EP_CFG_ENABLE;
1694 writel(ep_cfg, &priv_dev->regs->ep_cfg);
1695 priv_ep->flags &= ~EP_QUIRK_ISO_OUT_EN;
1696 priv_ep->flags |= EP_UPDATE_EP_TRBADDR;
1698 cdns3_transfer_completed(priv_dev, priv_ep);
1699 } else if (!(priv_ep->flags & EP_STALLED) &&
1700 !(priv_ep->flags & EP_STALL_PENDING)) {
1701 if (priv_ep->flags & EP_DEFERRED_DRDY) {
1702 priv_ep->flags &= ~EP_DEFERRED_DRDY;
1703 cdns3_start_all_request(priv_dev, priv_ep);
1705 cdns3_rearm_transfer(priv_ep,
1711 if ((ep_sts_reg & EP_STS_IOC) || (ep_sts_reg & EP_STS_ISP) ||
1712 (ep_sts_reg & EP_STS_IOT)) {
1713 if (priv_ep->flags & EP_QUIRK_EXTRA_BUF_EN) {
1714 if (ep_sts_reg & EP_STS_ISP)
1715 priv_ep->flags |= EP_QUIRK_END_TRANSFER;
1717 priv_ep->flags &= ~EP_QUIRK_END_TRANSFER;
1720 if (!priv_ep->use_streams) {
1721 if ((ep_sts_reg & EP_STS_IOC) ||
1722 (ep_sts_reg & EP_STS_ISP)) {
1723 cdns3_transfer_completed(priv_dev, priv_ep);
1724 } else if ((priv_ep->flags & EP_TDLCHK_EN) &
1725 priv_ep->pending_tdl) {
1726 /* handle IOT with pending tdl */
1727 cdns3_reprogram_tdl(priv_ep);
1729 } else if (priv_ep->dir == USB_DIR_OUT) {
1730 priv_ep->ep_sts_pending |= ep_sts_reg;
1731 } else if (ep_sts_reg & EP_STS_IOT) {
1732 cdns3_transfer_completed(priv_dev, priv_ep);
1737 * MD_EXIT interrupt sets when stream capable endpoint exits
1738 * from MOVE DATA state of Bulk IN/OUT stream protocol state machine
1740 if (priv_ep->dir == USB_DIR_OUT && (ep_sts_reg & EP_STS_MD_EXIT) &&
1741 (priv_ep->ep_sts_pending & EP_STS_IOT) && priv_ep->use_streams) {
1742 priv_ep->ep_sts_pending = 0;
1743 cdns3_transfer_completed(priv_dev, priv_ep);
1747 * WA2: this condition should only be meet when
1748 * priv_ep->flags & EP_QUIRK_EXTRA_BUF_DET or
1749 * priv_ep->flags & EP_QUIRK_EXTRA_BUF_EN.
1750 * In other cases this interrupt will be disabled.
1752 if (ep_sts_reg & EP_STS_DESCMIS && priv_dev->dev_ver < DEV_VER_V2 &&
1753 !(priv_ep->flags & EP_STALLED))
1754 cdns3_wa2_descmissing_packet(priv_ep);
1759 static void cdns3_disconnect_gadget(struct cdns3_device *priv_dev)
1761 if (priv_dev->gadget_driver && priv_dev->gadget_driver->disconnect)
1762 priv_dev->gadget_driver->disconnect(&priv_dev->gadget);
1766 * cdns3_check_usb_interrupt_proceed - Processes interrupt related to device
1767 * @priv_dev: extended gadget object
1768 * @usb_ists: bitmap representation of device's reported interrupts
1769 * (usb_ists register value)
1771 static void cdns3_check_usb_interrupt_proceed(struct cdns3_device *priv_dev,
1773 __must_hold(&priv_dev->lock)
1777 trace_cdns3_usb_irq(priv_dev, usb_ists);
1778 if (usb_ists & USB_ISTS_L1ENTI) {
1780 * WORKAROUND: CDNS3 controller has issue with hardware resuming
1781 * from L1. To fix it, if any DMA transfer is pending driver
1782 * must starts driving resume signal immediately.
1784 if (readl(&priv_dev->regs->drbl))
1785 __cdns3_gadget_wakeup(priv_dev);
1788 /* Connection detected */
1789 if (usb_ists & (USB_ISTS_CON2I | USB_ISTS_CONI)) {
1790 speed = cdns3_get_speed(priv_dev);
1791 priv_dev->gadget.speed = speed;
1792 usb_gadget_set_state(&priv_dev->gadget, USB_STATE_POWERED);
1793 cdns3_ep0_config(priv_dev);
1796 /* Disconnection detected */
1797 if (usb_ists & (USB_ISTS_DIS2I | USB_ISTS_DISI)) {
1798 spin_unlock(&priv_dev->lock);
1799 cdns3_disconnect_gadget(priv_dev);
1800 spin_lock(&priv_dev->lock);
1801 priv_dev->gadget.speed = USB_SPEED_UNKNOWN;
1802 usb_gadget_set_state(&priv_dev->gadget, USB_STATE_NOTATTACHED);
1803 cdns3_hw_reset_eps_config(priv_dev);
1806 if (usb_ists & (USB_ISTS_L2ENTI | USB_ISTS_U3ENTI)) {
1807 if (priv_dev->gadget_driver &&
1808 priv_dev->gadget_driver->suspend) {
1809 spin_unlock(&priv_dev->lock);
1810 priv_dev->gadget_driver->suspend(&priv_dev->gadget);
1811 spin_lock(&priv_dev->lock);
1815 if (usb_ists & (USB_ISTS_L2EXTI | USB_ISTS_U3EXTI)) {
1816 if (priv_dev->gadget_driver &&
1817 priv_dev->gadget_driver->resume) {
1818 spin_unlock(&priv_dev->lock);
1819 priv_dev->gadget_driver->resume(&priv_dev->gadget);
1820 spin_lock(&priv_dev->lock);
1825 if (usb_ists & (USB_ISTS_UWRESI | USB_ISTS_UHRESI | USB_ISTS_U2RESI)) {
1826 if (priv_dev->gadget_driver) {
1827 spin_unlock(&priv_dev->lock);
1828 usb_gadget_udc_reset(&priv_dev->gadget,
1829 priv_dev->gadget_driver);
1830 spin_lock(&priv_dev->lock);
1832 /*read again to check the actual speed*/
1833 speed = cdns3_get_speed(priv_dev);
1834 priv_dev->gadget.speed = speed;
1835 cdns3_hw_reset_eps_config(priv_dev);
1836 cdns3_ep0_config(priv_dev);
1842 * cdns3_device_irq_handler - interrupt handler for device part of controller
1844 * @irq: irq number for cdns3 core device
1845 * @data: structure of cdns3
1847 * Returns IRQ_HANDLED or IRQ_NONE
1849 static irqreturn_t cdns3_device_irq_handler(int irq, void *data)
1851 struct cdns3_device *priv_dev = data;
1852 struct cdns *cdns = dev_get_drvdata(priv_dev->dev);
1853 irqreturn_t ret = IRQ_NONE;
1859 /* check USB device interrupt */
1860 reg = readl(&priv_dev->regs->usb_ists);
1862 /* After masking interrupts the new interrupts won't be
1863 * reported in usb_ists/ep_ists. In order to not lose some
1864 * of them driver disables only detected interrupts.
1865 * They will be enabled ASAP after clearing source of
1866 * interrupt. This an unusual behavior only applies to
1867 * usb_ists register.
1869 reg = ~reg & readl(&priv_dev->regs->usb_ien);
1870 /* mask deferred interrupt. */
1871 writel(reg, &priv_dev->regs->usb_ien);
1872 ret = IRQ_WAKE_THREAD;
1875 /* check endpoint interrupt */
1876 reg = readl(&priv_dev->regs->ep_ists);
1878 writel(0, &priv_dev->regs->ep_ien);
1879 ret = IRQ_WAKE_THREAD;
1886 * cdns3_device_thread_irq_handler - interrupt handler for device part
1889 * @irq: irq number for cdns3 core device
1890 * @data: structure of cdns3
1892 * Returns IRQ_HANDLED or IRQ_NONE
1894 static irqreturn_t cdns3_device_thread_irq_handler(int irq, void *data)
1896 struct cdns3_device *priv_dev = data;
1897 irqreturn_t ret = IRQ_NONE;
1898 unsigned long flags;
1902 spin_lock_irqsave(&priv_dev->lock, flags);
1904 reg = readl(&priv_dev->regs->usb_ists);
1906 writel(reg, &priv_dev->regs->usb_ists);
1907 writel(USB_IEN_INIT, &priv_dev->regs->usb_ien);
1908 cdns3_check_usb_interrupt_proceed(priv_dev, reg);
1912 reg = readl(&priv_dev->regs->ep_ists);
1914 /* handle default endpoint OUT */
1915 if (reg & EP_ISTS_EP_OUT0) {
1916 cdns3_check_ep0_interrupt_proceed(priv_dev, USB_DIR_OUT);
1920 /* handle default endpoint IN */
1921 if (reg & EP_ISTS_EP_IN0) {
1922 cdns3_check_ep0_interrupt_proceed(priv_dev, USB_DIR_IN);
1926 /* check if interrupt from non default endpoint, if no exit */
1927 reg &= ~(EP_ISTS_EP_OUT0 | EP_ISTS_EP_IN0);
1931 for_each_set_bit(bit, ®,
1932 sizeof(u32) * BITS_PER_BYTE) {
1933 cdns3_check_ep_interrupt_proceed(priv_dev->eps[bit]);
1937 if (priv_dev->dev_ver < DEV_VER_V2 && priv_dev->using_streams)
1938 cdns3_wa2_check_outq_status(priv_dev);
1941 writel(~0, &priv_dev->regs->ep_ien);
1942 spin_unlock_irqrestore(&priv_dev->lock, flags);
1948 * cdns3_ep_onchip_buffer_reserve - Try to reserve onchip buf for EP
1950 * The real reservation will occur during write to EP_CFG register,
1951 * this function is used to check if the 'size' reservation is allowed.
1953 * @priv_dev: extended gadget object
1954 * @size: the size (KB) for EP would like to allocate
1955 * @is_in: endpoint direction
1957 * Return 0 if the required size can met or negative value on failure
1959 static int cdns3_ep_onchip_buffer_reserve(struct cdns3_device *priv_dev,
1960 int size, int is_in)
1964 /* 2KB are reserved for EP0*/
1965 remained = priv_dev->onchip_buffers - priv_dev->onchip_used_size - 2;
1968 if (remained < size)
1971 priv_dev->onchip_used_size += size;
1976 * ALL OUT EPs are shared the same chunk onchip memory, so
1977 * driver checks if it already has assigned enough buffers
1979 if (priv_dev->out_mem_is_allocated >= size)
1982 required = size - priv_dev->out_mem_is_allocated;
1984 if (required > remained)
1987 priv_dev->out_mem_is_allocated += required;
1988 priv_dev->onchip_used_size += required;
1994 static void cdns3_configure_dmult(struct cdns3_device *priv_dev,
1995 struct cdns3_endpoint *priv_ep)
1997 struct cdns3_usb_regs __iomem *regs = priv_dev->regs;
1999 /* For dev_ver > DEV_VER_V2 DMULT is configured per endpoint */
2000 if (priv_dev->dev_ver <= DEV_VER_V2)
2001 writel(USB_CONF_DMULT, ®s->usb_conf);
2003 if (priv_dev->dev_ver == DEV_VER_V2)
2004 writel(USB_CONF2_EN_TDL_TRB, ®s->usb_conf2);
2006 if (priv_dev->dev_ver >= DEV_VER_V3 && priv_ep) {
2010 mask = BIT(priv_ep->num + 16);
2012 mask = BIT(priv_ep->num);
2014 if (priv_ep->type != USB_ENDPOINT_XFER_ISOC && !priv_ep->dir) {
2015 cdns3_set_register_bit(®s->tdl_from_trb, mask);
2016 cdns3_set_register_bit(®s->tdl_beh, mask);
2017 cdns3_set_register_bit(®s->tdl_beh2, mask);
2018 cdns3_set_register_bit(®s->dma_adv_td, mask);
2021 if (priv_ep->type == USB_ENDPOINT_XFER_ISOC && !priv_ep->dir)
2022 cdns3_set_register_bit(®s->tdl_from_trb, mask);
2024 cdns3_set_register_bit(®s->dtrans, mask);
2029 * cdns3_ep_config - Configure hardware endpoint
2030 * @priv_ep: extended endpoint object
2031 * @enable: set EP_CFG_ENABLE bit in ep_cfg register.
2033 int cdns3_ep_config(struct cdns3_endpoint *priv_ep, bool enable)
2035 bool is_iso_ep = (priv_ep->type == USB_ENDPOINT_XFER_ISOC);
2036 struct cdns3_device *priv_dev = priv_ep->cdns3_dev;
2037 u32 bEndpointAddress = priv_ep->num | priv_ep->dir;
2038 u32 max_packet_size = 0;
2045 buffering = priv_dev->ep_buf_size - 1;
2047 cdns3_configure_dmult(priv_dev, priv_ep);
2049 switch (priv_ep->type) {
2050 case USB_ENDPOINT_XFER_INT:
2051 ep_cfg = EP_CFG_EPTYPE(USB_ENDPOINT_XFER_INT);
2053 if (priv_dev->dev_ver >= DEV_VER_V2 && !priv_ep->dir)
2054 ep_cfg |= EP_CFG_TDL_CHK;
2056 case USB_ENDPOINT_XFER_BULK:
2057 ep_cfg = EP_CFG_EPTYPE(USB_ENDPOINT_XFER_BULK);
2059 if (priv_dev->dev_ver >= DEV_VER_V2 && !priv_ep->dir)
2060 ep_cfg |= EP_CFG_TDL_CHK;
2063 ep_cfg = EP_CFG_EPTYPE(USB_ENDPOINT_XFER_ISOC);
2064 mult = priv_dev->ep_iso_burst - 1;
2065 buffering = mult + 1;
2068 switch (priv_dev->gadget.speed) {
2069 case USB_SPEED_FULL:
2070 max_packet_size = is_iso_ep ? 1023 : 64;
2072 case USB_SPEED_HIGH:
2073 max_packet_size = is_iso_ep ? 1024 : 512;
2075 case USB_SPEED_SUPER:
2076 /* It's limitation that driver assumes in driver. */
2078 max_packet_size = 1024;
2079 if (priv_ep->type == USB_ENDPOINT_XFER_ISOC) {
2080 maxburst = priv_dev->ep_iso_burst - 1;
2081 buffering = (mult + 1) *
2084 if (priv_ep->interval > 1)
2087 maxburst = priv_dev->ep_buf_size - 1;
2091 /* all other speed are not supported */
2095 if (max_packet_size == 1024)
2096 priv_ep->trb_burst_size = 128;
2097 else if (max_packet_size >= 512)
2098 priv_ep->trb_burst_size = 64;
2100 priv_ep->trb_burst_size = 16;
2103 * In versions preceding DEV_VER_V2, for example, iMX8QM, there exit the bugs
2104 * in the DMA. These bugs occur when the trb_burst_size exceeds 16 and the
2105 * address is not aligned to 128 Bytes (which is a product of the 64-bit AXI
2106 * and AXI maximum burst length of 16 or 0xF+1, dma_axi_ctrl0[3:0]). This
2107 * results in data corruption when it crosses the 4K border. The corruption
2108 * specifically occurs from the position (4K - (address & 0x7F)) to 4K.
2110 * So force trb_burst_size to 16 at such platform.
2112 if (priv_dev->dev_ver < DEV_VER_V2)
2113 priv_ep->trb_burst_size = 16;
2115 mult = min_t(u8, mult, EP_CFG_MULT_MAX);
2116 buffering = min_t(u8, buffering, EP_CFG_BUFFERING_MAX);
2117 maxburst = min_t(u8, maxburst, EP_CFG_MAXBURST_MAX);
2119 /* onchip buffer is only allocated before configuration */
2120 if (!priv_dev->hw_configured_flag) {
2121 ret = cdns3_ep_onchip_buffer_reserve(priv_dev, buffering + 1,
2124 dev_err(priv_dev->dev, "onchip mem is full, ep is invalid\n");
2130 ep_cfg |= EP_CFG_ENABLE;
2132 if (priv_ep->use_streams && priv_dev->gadget.speed >= USB_SPEED_SUPER) {
2133 if (priv_dev->dev_ver >= DEV_VER_V3) {
2134 u32 mask = BIT(priv_ep->num + (priv_ep->dir ? 16 : 0));
2137 * Stream capable endpoints are handled by using ep_tdl
2138 * register. Other endpoints use TDL from TRB feature.
2140 cdns3_clear_register_bit(&priv_dev->regs->tdl_from_trb,
2144 /* Enable Stream Bit TDL chk and SID chk */
2145 ep_cfg |= EP_CFG_STREAM_EN | EP_CFG_TDL_CHK | EP_CFG_SID_CHK;
2148 ep_cfg |= EP_CFG_MAXPKTSIZE(max_packet_size) |
2150 EP_CFG_BUFFERING(buffering) |
2151 EP_CFG_MAXBURST(maxburst);
2153 cdns3_select_ep(priv_dev, bEndpointAddress);
2154 writel(ep_cfg, &priv_dev->regs->ep_cfg);
2155 priv_ep->flags |= EP_CONFIGURED;
2157 dev_dbg(priv_dev->dev, "Configure %s: with val %08x\n",
2158 priv_ep->name, ep_cfg);
2163 /* Find correct direction for HW endpoint according to description */
2164 static int cdns3_ep_dir_is_correct(struct usb_endpoint_descriptor *desc,
2165 struct cdns3_endpoint *priv_ep)
2167 return (priv_ep->endpoint.caps.dir_in && usb_endpoint_dir_in(desc)) ||
2168 (priv_ep->endpoint.caps.dir_out && usb_endpoint_dir_out(desc));
2172 cdns3_endpoint *cdns3_find_available_ep(struct cdns3_device *priv_dev,
2173 struct usb_endpoint_descriptor *desc)
2176 struct cdns3_endpoint *priv_ep;
2178 list_for_each_entry(ep, &priv_dev->gadget.ep_list, ep_list) {
2181 /* ep name pattern likes epXin or epXout */
2182 char c[2] = {ep->name[2], '\0'};
2184 ret = kstrtoul(c, 10, &num);
2186 return ERR_PTR(ret);
2188 priv_ep = ep_to_cdns3_ep(ep);
2189 if (cdns3_ep_dir_is_correct(desc, priv_ep)) {
2190 if (!(priv_ep->flags & EP_CLAIMED)) {
2197 return ERR_PTR(-ENOENT);
2201 * Cadence IP has one limitation that all endpoints must be configured
2202 * (Type & MaxPacketSize) before setting configuration through hardware
2203 * register, it means we can't change endpoints configuration after
2204 * set_configuration.
2206 * This function set EP_CLAIMED flag which is added when the gadget driver
2207 * uses usb_ep_autoconfig to configure specific endpoint;
2208 * When the udc driver receives set_configurion request,
2209 * it goes through all claimed endpoints, and configure all endpoints
2212 * At usb_ep_ops.enable/disable, we only enable and disable endpoint through
2213 * ep_cfg register which can be changed after set_configuration, and do
2214 * some software operation accordingly.
2217 usb_ep *cdns3_gadget_match_ep(struct usb_gadget *gadget,
2218 struct usb_endpoint_descriptor *desc,
2219 struct usb_ss_ep_comp_descriptor *comp_desc)
2221 struct cdns3_device *priv_dev = gadget_to_cdns3_device(gadget);
2222 struct cdns3_endpoint *priv_ep;
2223 unsigned long flags;
2225 priv_ep = cdns3_find_available_ep(priv_dev, desc);
2226 if (IS_ERR(priv_ep)) {
2227 dev_err(priv_dev->dev, "no available ep\n");
2231 dev_dbg(priv_dev->dev, "match endpoint: %s\n", priv_ep->name);
2233 spin_lock_irqsave(&priv_dev->lock, flags);
2234 priv_ep->endpoint.desc = desc;
2235 priv_ep->dir = usb_endpoint_dir_in(desc) ? USB_DIR_IN : USB_DIR_OUT;
2236 priv_ep->type = usb_endpoint_type(desc);
2237 priv_ep->flags |= EP_CLAIMED;
2238 priv_ep->interval = desc->bInterval ? BIT(desc->bInterval - 1) : 0;
2240 spin_unlock_irqrestore(&priv_dev->lock, flags);
2241 return &priv_ep->endpoint;
2245 * cdns3_gadget_ep_alloc_request - Allocates request
2246 * @ep: endpoint object associated with request
2247 * @gfp_flags: gfp flags
2249 * Returns allocated request address, NULL on allocation error
2251 struct usb_request *cdns3_gadget_ep_alloc_request(struct usb_ep *ep,
2254 struct cdns3_endpoint *priv_ep = ep_to_cdns3_ep(ep);
2255 struct cdns3_request *priv_req;
2257 priv_req = kzalloc(sizeof(*priv_req), gfp_flags);
2261 priv_req->priv_ep = priv_ep;
2263 trace_cdns3_alloc_request(priv_req);
2264 return &priv_req->request;
2268 * cdns3_gadget_ep_free_request - Free memory occupied by request
2269 * @ep: endpoint object associated with request
2270 * @request: request to free memory
2272 void cdns3_gadget_ep_free_request(struct usb_ep *ep,
2273 struct usb_request *request)
2275 struct cdns3_request *priv_req = to_cdns3_request(request);
2277 if (priv_req->aligned_buf)
2278 priv_req->aligned_buf->in_use = 0;
2280 trace_cdns3_free_request(priv_req);
2285 * cdns3_gadget_ep_enable - Enable endpoint
2286 * @ep: endpoint object
2287 * @desc: endpoint descriptor
2289 * Returns 0 on success, error code elsewhere
2291 static int cdns3_gadget_ep_enable(struct usb_ep *ep,
2292 const struct usb_endpoint_descriptor *desc)
2294 struct cdns3_endpoint *priv_ep;
2295 struct cdns3_device *priv_dev;
2296 const struct usb_ss_ep_comp_descriptor *comp_desc;
2297 u32 reg = EP_STS_EN_TRBERREN;
2298 u32 bEndpointAddress;
2299 unsigned long flags;
2305 pr_debug("usbss: ep not configured?\n");
2309 priv_ep = ep_to_cdns3_ep(ep);
2310 priv_dev = priv_ep->cdns3_dev;
2311 comp_desc = priv_ep->endpoint.comp_desc;
2313 if (!desc || desc->bDescriptorType != USB_DT_ENDPOINT) {
2314 dev_dbg(priv_dev->dev, "usbss: invalid parameters\n");
2318 if (!desc->wMaxPacketSize) {
2319 dev_err(priv_dev->dev, "usbss: missing wMaxPacketSize\n");
2323 if (dev_WARN_ONCE(priv_dev->dev, priv_ep->flags & EP_ENABLED,
2324 "%s is already enabled\n", priv_ep->name))
2327 spin_lock_irqsave(&priv_dev->lock, flags);
2329 priv_ep->endpoint.desc = desc;
2330 priv_ep->type = usb_endpoint_type(desc);
2331 priv_ep->interval = desc->bInterval ? BIT(desc->bInterval - 1) : 0;
2333 if (priv_ep->interval > ISO_MAX_INTERVAL &&
2334 priv_ep->type == USB_ENDPOINT_XFER_ISOC) {
2335 dev_err(priv_dev->dev, "Driver is limited to %d period\n",
2342 bEndpointAddress = priv_ep->num | priv_ep->dir;
2343 cdns3_select_ep(priv_dev, bEndpointAddress);
2346 * For some versions of controller at some point during ISO OUT traffic
2347 * DMA reads Transfer Ring for the EP which has never got doorbell.
2348 * This issue was detected only on simulation, but to avoid this issue
2349 * driver add protection against it. To fix it driver enable ISO OUT
2350 * endpoint before setting DRBL. This special treatment of ISO OUT
2351 * endpoints are recommended by controller specification.
2353 if (priv_ep->type == USB_ENDPOINT_XFER_ISOC && !priv_ep->dir)
2356 if (usb_ss_max_streams(comp_desc) && usb_endpoint_xfer_bulk(desc)) {
2358 * Enable stream support (SS mode) related interrupts
2359 * in EP_STS_EN Register
2361 if (priv_dev->gadget.speed >= USB_SPEED_SUPER) {
2362 reg |= EP_STS_EN_IOTEN | EP_STS_EN_PRIMEEEN |
2363 EP_STS_EN_SIDERREN | EP_STS_EN_MD_EXITEN |
2364 EP_STS_EN_STREAMREN;
2365 priv_ep->use_streams = true;
2366 ret = cdns3_ep_config(priv_ep, enable);
2367 priv_dev->using_streams |= true;
2370 ret = cdns3_ep_config(priv_ep, enable);
2376 ret = cdns3_allocate_trb_pool(priv_ep);
2380 bEndpointAddress = priv_ep->num | priv_ep->dir;
2381 cdns3_select_ep(priv_dev, bEndpointAddress);
2383 trace_cdns3_gadget_ep_enable(priv_ep);
2385 writel(EP_CMD_EPRST, &priv_dev->regs->ep_cmd);
2387 ret = readl_poll_timeout_atomic(&priv_dev->regs->ep_cmd, val,
2388 !(val & (EP_CMD_CSTALL | EP_CMD_EPRST)),
2391 if (unlikely(ret)) {
2392 cdns3_free_trb_pool(priv_ep);
2397 /* enable interrupt for selected endpoint */
2398 cdns3_set_register_bit(&priv_dev->regs->ep_ien,
2399 BIT(cdns3_ep_addr_to_index(bEndpointAddress)));
2401 if (priv_dev->dev_ver < DEV_VER_V2)
2402 cdns3_wa2_enable_detection(priv_dev, priv_ep, reg);
2404 writel(reg, &priv_dev->regs->ep_sts_en);
2407 priv_ep->flags &= ~(EP_PENDING_REQUEST | EP_STALLED | EP_STALL_PENDING |
2408 EP_QUIRK_ISO_OUT_EN | EP_QUIRK_EXTRA_BUF_EN);
2409 priv_ep->flags |= EP_ENABLED | EP_UPDATE_EP_TRBADDR;
2410 priv_ep->wa1_set = 0;
2411 priv_ep->enqueue = 0;
2412 priv_ep->dequeue = 0;
2413 reg = readl(&priv_dev->regs->ep_sts);
2414 priv_ep->pcs = !!EP_STS_CCS(reg);
2415 priv_ep->ccs = !!EP_STS_CCS(reg);
2416 /* one TRB is reserved for link TRB used in DMULT mode*/
2417 priv_ep->free_trbs = priv_ep->num_trbs - 1;
2419 spin_unlock_irqrestore(&priv_dev->lock, flags);
2425 * cdns3_gadget_ep_disable - Disable endpoint
2426 * @ep: endpoint object
2428 * Returns 0 on success, error code elsewhere
2430 static int cdns3_gadget_ep_disable(struct usb_ep *ep)
2432 struct cdns3_endpoint *priv_ep;
2433 struct cdns3_request *priv_req;
2434 struct cdns3_device *priv_dev;
2435 struct usb_request *request;
2436 unsigned long flags;
2442 pr_err("usbss: invalid parameters\n");
2446 priv_ep = ep_to_cdns3_ep(ep);
2447 priv_dev = priv_ep->cdns3_dev;
2449 if (dev_WARN_ONCE(priv_dev->dev, !(priv_ep->flags & EP_ENABLED),
2450 "%s is already disabled\n", priv_ep->name))
2453 spin_lock_irqsave(&priv_dev->lock, flags);
2455 trace_cdns3_gadget_ep_disable(priv_ep);
2457 cdns3_select_ep(priv_dev, ep->desc->bEndpointAddress);
2459 ep_cfg = readl(&priv_dev->regs->ep_cfg);
2460 ep_cfg &= ~EP_CFG_ENABLE;
2461 writel(ep_cfg, &priv_dev->regs->ep_cfg);
2464 * Driver needs some time before resetting endpoint.
2465 * It need waits for clearing DBUSY bit or for timeout expired.
2466 * 10us is enough time for controller to stop transfer.
2468 readl_poll_timeout_atomic(&priv_dev->regs->ep_sts, val,
2469 !(val & EP_STS_DBUSY), 1, 10);
2470 writel(EP_CMD_EPRST, &priv_dev->regs->ep_cmd);
2472 readl_poll_timeout_atomic(&priv_dev->regs->ep_cmd, val,
2473 !(val & (EP_CMD_CSTALL | EP_CMD_EPRST)),
2476 dev_err(priv_dev->dev, "Timeout: %s resetting failed.\n",
2479 while (!list_empty(&priv_ep->pending_req_list)) {
2480 request = cdns3_next_request(&priv_ep->pending_req_list);
2482 cdns3_gadget_giveback(priv_ep, to_cdns3_request(request),
2486 while (!list_empty(&priv_ep->wa2_descmiss_req_list)) {
2487 priv_req = cdns3_next_priv_request(&priv_ep->wa2_descmiss_req_list);
2489 kfree(priv_req->request.buf);
2490 cdns3_gadget_ep_free_request(&priv_ep->endpoint,
2491 &priv_req->request);
2492 list_del_init(&priv_req->list);
2493 --priv_ep->wa2_counter;
2496 while (!list_empty(&priv_ep->deferred_req_list)) {
2497 request = cdns3_next_request(&priv_ep->deferred_req_list);
2499 cdns3_gadget_giveback(priv_ep, to_cdns3_request(request),
2503 priv_ep->descmis_req = NULL;
2506 priv_ep->flags &= ~EP_ENABLED;
2507 priv_ep->use_streams = false;
2509 spin_unlock_irqrestore(&priv_dev->lock, flags);
2515 * __cdns3_gadget_ep_queue - Transfer data on endpoint
2516 * @ep: endpoint object
2517 * @request: request object
2518 * @gfp_flags: gfp flags
2520 * Returns 0 on success, error code elsewhere
2522 static int __cdns3_gadget_ep_queue(struct usb_ep *ep,
2523 struct usb_request *request,
2526 struct cdns3_endpoint *priv_ep = ep_to_cdns3_ep(ep);
2527 struct cdns3_device *priv_dev = priv_ep->cdns3_dev;
2528 struct cdns3_request *priv_req;
2531 request->actual = 0;
2532 request->status = -EINPROGRESS;
2533 priv_req = to_cdns3_request(request);
2534 trace_cdns3_ep_queue(priv_req);
2536 if (priv_dev->dev_ver < DEV_VER_V2) {
2537 ret = cdns3_wa2_gadget_ep_queue(priv_dev, priv_ep,
2540 if (ret == EINPROGRESS)
2544 ret = cdns3_prepare_aligned_request_buf(priv_req);
2548 if (likely(!(priv_req->flags & REQUEST_UNALIGNED))) {
2549 ret = usb_gadget_map_request_by_dev(priv_dev->sysdev, request,
2550 usb_endpoint_dir_in(ep->desc));
2555 list_add_tail(&request->list, &priv_ep->deferred_req_list);
2558 * For stream capable endpoint if prime irq flag is set then only start
2560 * If hardware endpoint configuration has not been set yet then
2561 * just queue request in deferred list. Transfer will be started in
2562 * cdns3_set_hw_configuration.
2564 if (!request->stream_id) {
2565 if (priv_dev->hw_configured_flag &&
2566 !(priv_ep->flags & EP_STALLED) &&
2567 !(priv_ep->flags & EP_STALL_PENDING))
2568 cdns3_start_all_request(priv_dev, priv_ep);
2570 if (priv_dev->hw_configured_flag && priv_ep->prime_flag)
2571 cdns3_start_all_request(priv_dev, priv_ep);
2577 static int cdns3_gadget_ep_queue(struct usb_ep *ep, struct usb_request *request,
2580 struct usb_request *zlp_request;
2581 struct cdns3_endpoint *priv_ep;
2582 struct cdns3_device *priv_dev;
2583 unsigned long flags;
2586 if (!request || !ep)
2589 priv_ep = ep_to_cdns3_ep(ep);
2590 priv_dev = priv_ep->cdns3_dev;
2592 spin_lock_irqsave(&priv_dev->lock, flags);
2594 ret = __cdns3_gadget_ep_queue(ep, request, gfp_flags);
2596 if (ret == 0 && request->zero && request->length &&
2597 (request->length % ep->maxpacket == 0)) {
2598 struct cdns3_request *priv_req;
2600 zlp_request = cdns3_gadget_ep_alloc_request(ep, GFP_ATOMIC);
2601 zlp_request->buf = priv_dev->zlp_buf;
2602 zlp_request->length = 0;
2604 priv_req = to_cdns3_request(zlp_request);
2605 priv_req->flags |= REQUEST_ZLP;
2607 dev_dbg(priv_dev->dev, "Queuing ZLP for endpoint: %s\n",
2609 ret = __cdns3_gadget_ep_queue(ep, zlp_request, gfp_flags);
2612 spin_unlock_irqrestore(&priv_dev->lock, flags);
2617 * cdns3_gadget_ep_dequeue - Remove request from transfer queue
2618 * @ep: endpoint object associated with request
2619 * @request: request object
2621 * Returns 0 on success, error code elsewhere
2623 int cdns3_gadget_ep_dequeue(struct usb_ep *ep,
2624 struct usb_request *request)
2626 struct cdns3_endpoint *priv_ep = ep_to_cdns3_ep(ep);
2627 struct cdns3_device *priv_dev;
2628 struct usb_request *req, *req_temp;
2629 struct cdns3_request *priv_req;
2630 struct cdns3_trb *link_trb;
2631 u8 req_on_hw_ring = 0;
2632 unsigned long flags;
2636 if (!ep || !request || !ep->desc)
2639 priv_dev = priv_ep->cdns3_dev;
2641 spin_lock_irqsave(&priv_dev->lock, flags);
2643 priv_req = to_cdns3_request(request);
2645 trace_cdns3_ep_dequeue(priv_req);
2647 cdns3_select_ep(priv_dev, ep->desc->bEndpointAddress);
2649 list_for_each_entry_safe(req, req_temp, &priv_ep->pending_req_list,
2651 if (request == req) {
2657 list_for_each_entry_safe(req, req_temp, &priv_ep->deferred_req_list,
2666 link_trb = priv_req->trb;
2668 /* Update ring only if removed request is on pending_req_list list */
2669 if (req_on_hw_ring && link_trb) {
2671 writel(EP_CMD_DFLUSH, &priv_dev->regs->ep_cmd);
2673 /* wait for DFLUSH cleared */
2674 readl_poll_timeout_atomic(&priv_dev->regs->ep_cmd, val,
2675 !(val & EP_CMD_DFLUSH), 1, 1000);
2677 link_trb->buffer = cpu_to_le32(TRB_BUFFER(priv_ep->trb_pool_dma +
2678 ((priv_req->end_trb + 1) * TRB_SIZE)));
2679 link_trb->control = cpu_to_le32((le32_to_cpu(link_trb->control) & TRB_CYCLE) |
2680 TRB_TYPE(TRB_LINK) | TRB_CHAIN);
2682 if (priv_ep->wa1_trb == priv_req->trb)
2683 cdns3_wa1_restore_cycle_bit(priv_ep);
2686 cdns3_gadget_giveback(priv_ep, priv_req, -ECONNRESET);
2688 req = cdns3_next_request(&priv_ep->pending_req_list);
2690 cdns3_rearm_transfer(priv_ep, 1);
2693 spin_unlock_irqrestore(&priv_dev->lock, flags);
2698 * __cdns3_gadget_ep_set_halt - Sets stall on selected endpoint
2699 * Should be called after acquiring spin_lock and selecting ep
2700 * @priv_ep: endpoint object to set stall on.
2702 void __cdns3_gadget_ep_set_halt(struct cdns3_endpoint *priv_ep)
2704 struct cdns3_device *priv_dev = priv_ep->cdns3_dev;
2706 trace_cdns3_halt(priv_ep, 1, 0);
2708 if (!(priv_ep->flags & EP_STALLED)) {
2709 u32 ep_sts_reg = readl(&priv_dev->regs->ep_sts);
2711 if (!(ep_sts_reg & EP_STS_DBUSY))
2712 cdns3_ep_stall_flush(priv_ep);
2714 priv_ep->flags |= EP_STALL_PENDING;
2719 * __cdns3_gadget_ep_clear_halt - Clears stall on selected endpoint
2720 * Should be called after acquiring spin_lock and selecting ep
2721 * @priv_ep: endpoint object to clear stall on
2723 int __cdns3_gadget_ep_clear_halt(struct cdns3_endpoint *priv_ep)
2725 struct cdns3_device *priv_dev = priv_ep->cdns3_dev;
2726 struct usb_request *request;
2727 struct cdns3_request *priv_req;
2728 struct cdns3_trb *trb = NULL;
2729 struct cdns3_trb trb_tmp;
2733 trace_cdns3_halt(priv_ep, 0, 0);
2735 request = cdns3_next_request(&priv_ep->pending_req_list);
2737 priv_req = to_cdns3_request(request);
2738 trb = priv_req->trb;
2741 trb->control = trb->control ^ cpu_to_le32(TRB_CYCLE);
2745 writel(EP_CMD_CSTALL | EP_CMD_EPRST, &priv_dev->regs->ep_cmd);
2747 /* wait for EPRST cleared */
2748 ret = readl_poll_timeout_atomic(&priv_dev->regs->ep_cmd, val,
2749 !(val & EP_CMD_EPRST), 1, 100);
2753 priv_ep->flags &= ~(EP_STALLED | EP_STALL_PENDING);
2759 cdns3_rearm_transfer(priv_ep, 1);
2762 cdns3_start_all_request(priv_dev, priv_ep);
2767 * cdns3_gadget_ep_set_halt - Sets/clears stall on selected endpoint
2768 * @ep: endpoint object to set/clear stall on
2769 * @value: 1 for set stall, 0 for clear stall
2771 * Returns 0 on success, error code elsewhere
2773 int cdns3_gadget_ep_set_halt(struct usb_ep *ep, int value)
2775 struct cdns3_endpoint *priv_ep = ep_to_cdns3_ep(ep);
2776 struct cdns3_device *priv_dev = priv_ep->cdns3_dev;
2777 unsigned long flags;
2780 if (!(priv_ep->flags & EP_ENABLED))
2783 spin_lock_irqsave(&priv_dev->lock, flags);
2785 cdns3_select_ep(priv_dev, ep->desc->bEndpointAddress);
2788 priv_ep->flags &= ~EP_WEDGE;
2789 ret = __cdns3_gadget_ep_clear_halt(priv_ep);
2791 __cdns3_gadget_ep_set_halt(priv_ep);
2794 spin_unlock_irqrestore(&priv_dev->lock, flags);
2799 extern const struct usb_ep_ops cdns3_gadget_ep0_ops;
2801 static const struct usb_ep_ops cdns3_gadget_ep_ops = {
2802 .enable = cdns3_gadget_ep_enable,
2803 .disable = cdns3_gadget_ep_disable,
2804 .alloc_request = cdns3_gadget_ep_alloc_request,
2805 .free_request = cdns3_gadget_ep_free_request,
2806 .queue = cdns3_gadget_ep_queue,
2807 .dequeue = cdns3_gadget_ep_dequeue,
2808 .set_halt = cdns3_gadget_ep_set_halt,
2809 .set_wedge = cdns3_gadget_ep_set_wedge,
2813 * cdns3_gadget_get_frame - Returns number of actual ITP frame
2814 * @gadget: gadget object
2816 * Returns number of actual ITP frame
2818 static int cdns3_gadget_get_frame(struct usb_gadget *gadget)
2820 struct cdns3_device *priv_dev = gadget_to_cdns3_device(gadget);
2822 return readl(&priv_dev->regs->usb_itpn);
2825 int __cdns3_gadget_wakeup(struct cdns3_device *priv_dev)
2827 enum usb_device_speed speed;
2829 speed = cdns3_get_speed(priv_dev);
2831 if (speed >= USB_SPEED_SUPER)
2834 /* Start driving resume signaling to indicate remote wakeup. */
2835 writel(USB_CONF_LGO_L0, &priv_dev->regs->usb_conf);
2840 static int cdns3_gadget_wakeup(struct usb_gadget *gadget)
2842 struct cdns3_device *priv_dev = gadget_to_cdns3_device(gadget);
2843 unsigned long flags;
2846 spin_lock_irqsave(&priv_dev->lock, flags);
2847 ret = __cdns3_gadget_wakeup(priv_dev);
2848 spin_unlock_irqrestore(&priv_dev->lock, flags);
2852 static int cdns3_gadget_set_selfpowered(struct usb_gadget *gadget,
2855 struct cdns3_device *priv_dev = gadget_to_cdns3_device(gadget);
2856 unsigned long flags;
2858 spin_lock_irqsave(&priv_dev->lock, flags);
2859 priv_dev->is_selfpowered = !!is_selfpowered;
2860 spin_unlock_irqrestore(&priv_dev->lock, flags);
2864 static int cdns3_gadget_pullup(struct usb_gadget *gadget, int is_on)
2866 struct cdns3_device *priv_dev = gadget_to_cdns3_device(gadget);
2869 writel(USB_CONF_DEVEN, &priv_dev->regs->usb_conf);
2871 writel(~0, &priv_dev->regs->ep_ists);
2872 writel(~0, &priv_dev->regs->usb_ists);
2873 writel(USB_CONF_DEVDS, &priv_dev->regs->usb_conf);
2879 static void cdns3_gadget_config(struct cdns3_device *priv_dev)
2881 struct cdns3_usb_regs __iomem *regs = priv_dev->regs;
2884 cdns3_ep0_config(priv_dev);
2886 /* enable interrupts for endpoint 0 (in and out) */
2887 writel(EP_IEN_EP_OUT0 | EP_IEN_EP_IN0, ®s->ep_ien);
2890 * Driver needs to modify LFPS minimal U1 Exit time for DEV_VER_TI_V1
2891 * revision of controller.
2893 if (priv_dev->dev_ver == DEV_VER_TI_V1) {
2894 reg = readl(®s->dbg_link1);
2896 reg &= ~DBG_LINK1_LFPS_MIN_GEN_U1_EXIT_MASK;
2897 reg |= DBG_LINK1_LFPS_MIN_GEN_U1_EXIT(0x55) |
2898 DBG_LINK1_LFPS_MIN_GEN_U1_EXIT_SET;
2899 writel(reg, ®s->dbg_link1);
2903 * By default some platforms has set protected access to memory.
2904 * This cause problem with cache, so driver restore non-secure
2907 reg = readl(®s->dma_axi_ctrl);
2908 reg |= DMA_AXI_CTRL_MARPROT(DMA_AXI_CTRL_NON_SECURE) |
2909 DMA_AXI_CTRL_MAWPROT(DMA_AXI_CTRL_NON_SECURE);
2910 writel(reg, ®s->dma_axi_ctrl);
2912 /* enable generic interrupt*/
2913 writel(USB_IEN_INIT, ®s->usb_ien);
2914 writel(USB_CONF_CLK2OFFDS | USB_CONF_L1DS, ®s->usb_conf);
2915 /* keep Fast Access bit */
2916 writel(PUSB_PWR_FST_REG_ACCESS, &priv_dev->regs->usb_pwr);
2918 cdns3_configure_dmult(priv_dev, NULL);
2922 * cdns3_gadget_udc_start - Gadget start
2923 * @gadget: gadget object
2924 * @driver: driver which operates on this gadget
2926 * Returns 0 on success, error code elsewhere
2928 static int cdns3_gadget_udc_start(struct usb_gadget *gadget,
2929 struct usb_gadget_driver *driver)
2931 struct cdns3_device *priv_dev = gadget_to_cdns3_device(gadget);
2932 unsigned long flags;
2933 enum usb_device_speed max_speed = driver->max_speed;
2935 spin_lock_irqsave(&priv_dev->lock, flags);
2936 priv_dev->gadget_driver = driver;
2938 /* limit speed if necessary */
2939 max_speed = min(driver->max_speed, gadget->max_speed);
2941 switch (max_speed) {
2942 case USB_SPEED_FULL:
2943 writel(USB_CONF_SFORCE_FS, &priv_dev->regs->usb_conf);
2944 writel(USB_CONF_USB3DIS, &priv_dev->regs->usb_conf);
2946 case USB_SPEED_HIGH:
2947 writel(USB_CONF_USB3DIS, &priv_dev->regs->usb_conf);
2949 case USB_SPEED_SUPER:
2952 dev_err(priv_dev->dev,
2953 "invalid maximum_speed parameter %d\n",
2956 case USB_SPEED_UNKNOWN:
2957 /* default to superspeed */
2958 max_speed = USB_SPEED_SUPER;
2962 cdns3_gadget_config(priv_dev);
2963 spin_unlock_irqrestore(&priv_dev->lock, flags);
2968 * cdns3_gadget_udc_stop - Stops gadget
2969 * @gadget: gadget object
2973 static int cdns3_gadget_udc_stop(struct usb_gadget *gadget)
2975 struct cdns3_device *priv_dev = gadget_to_cdns3_device(gadget);
2976 struct cdns3_endpoint *priv_ep;
2977 u32 bEndpointAddress;
2981 priv_dev->gadget_driver = NULL;
2983 priv_dev->onchip_used_size = 0;
2984 priv_dev->out_mem_is_allocated = 0;
2985 priv_dev->gadget.speed = USB_SPEED_UNKNOWN;
2987 list_for_each_entry(ep, &priv_dev->gadget.ep_list, ep_list) {
2988 priv_ep = ep_to_cdns3_ep(ep);
2989 bEndpointAddress = priv_ep->num | priv_ep->dir;
2990 cdns3_select_ep(priv_dev, bEndpointAddress);
2991 writel(EP_CMD_EPRST, &priv_dev->regs->ep_cmd);
2992 readl_poll_timeout_atomic(&priv_dev->regs->ep_cmd, val,
2993 !(val & EP_CMD_EPRST), 1, 100);
2995 priv_ep->flags &= ~EP_CLAIMED;
2998 /* disable interrupt for device */
2999 writel(0, &priv_dev->regs->usb_ien);
3000 writel(0, &priv_dev->regs->usb_pwr);
3001 writel(USB_CONF_DEVDS, &priv_dev->regs->usb_conf);
3007 * cdns3_gadget_check_config - ensure cdns3 can support the USB configuration
3008 * @gadget: pointer to the USB gadget
3010 * Used to record the maximum number of endpoints being used in a USB composite
3011 * device. (across all configurations) This is to be used in the calculation
3012 * of the TXFIFO sizes when resizing internal memory for individual endpoints.
3013 * It will help ensured that the resizing logic reserves enough space for at
3014 * least one max packet.
3016 static int cdns3_gadget_check_config(struct usb_gadget *gadget)
3018 struct cdns3_device *priv_dev = gadget_to_cdns3_device(gadget);
3019 struct cdns3_endpoint *priv_ep;
3024 list_for_each_entry(ep, &gadget->ep_list, ep_list) {
3025 priv_ep = ep_to_cdns3_ep(ep);
3026 if ((priv_ep->flags & EP_CLAIMED) && (ep->address & USB_DIR_IN))
3030 /* 2KB are reserved for EP0, 1KB for out*/
3031 total = 2 + n_in + 1;
3033 if (total > priv_dev->onchip_buffers)
3036 priv_dev->ep_buf_size = priv_dev->ep_iso_burst =
3037 (priv_dev->onchip_buffers - 2) / (n_in + 1);
3042 static const struct usb_gadget_ops cdns3_gadget_ops = {
3043 .get_frame = cdns3_gadget_get_frame,
3044 .wakeup = cdns3_gadget_wakeup,
3045 .set_selfpowered = cdns3_gadget_set_selfpowered,
3046 .pullup = cdns3_gadget_pullup,
3047 .udc_start = cdns3_gadget_udc_start,
3048 .udc_stop = cdns3_gadget_udc_stop,
3049 .match_ep = cdns3_gadget_match_ep,
3050 .check_config = cdns3_gadget_check_config,
3053 static void cdns3_free_all_eps(struct cdns3_device *priv_dev)
3057 /* ep0 OUT point to ep0 IN. */
3058 priv_dev->eps[16] = NULL;
3060 for (i = 0; i < CDNS3_ENDPOINTS_MAX_COUNT; i++)
3061 if (priv_dev->eps[i]) {
3062 cdns3_free_trb_pool(priv_dev->eps[i]);
3063 devm_kfree(priv_dev->dev, priv_dev->eps[i]);
3068 * cdns3_init_eps - Initializes software endpoints of gadget
3069 * @priv_dev: extended gadget object
3071 * Returns 0 on success, error code elsewhere
3073 static int cdns3_init_eps(struct cdns3_device *priv_dev)
3075 u32 ep_enabled_reg, iso_ep_reg;
3076 struct cdns3_endpoint *priv_ep;
3077 int ep_dir, ep_number;
3082 /* Read it from USB_CAP3 to USB_CAP5 */
3083 ep_enabled_reg = readl(&priv_dev->regs->usb_cap3);
3084 iso_ep_reg = readl(&priv_dev->regs->usb_cap4);
3086 dev_dbg(priv_dev->dev, "Initializing non-zero endpoints\n");
3088 for (i = 0; i < CDNS3_ENDPOINTS_MAX_COUNT; i++) {
3089 ep_dir = i >> 4; /* i div 16 */
3090 ep_number = i & 0xF; /* i % 16 */
3093 if (!(ep_enabled_reg & ep_mask))
3096 if (ep_dir && !ep_number) {
3097 priv_dev->eps[i] = priv_dev->eps[0];
3101 priv_ep = devm_kzalloc(priv_dev->dev, sizeof(*priv_ep),
3106 /* set parent of endpoint object */
3107 priv_ep->cdns3_dev = priv_dev;
3108 priv_dev->eps[i] = priv_ep;
3109 priv_ep->num = ep_number;
3110 priv_ep->dir = ep_dir ? USB_DIR_IN : USB_DIR_OUT;
3113 ret = cdns3_init_ep0(priv_dev, priv_ep);
3115 dev_err(priv_dev->dev, "Failed to init ep0\n");
3119 snprintf(priv_ep->name, sizeof(priv_ep->name), "ep%d%s",
3120 ep_number, !!ep_dir ? "in" : "out");
3121 priv_ep->endpoint.name = priv_ep->name;
3123 usb_ep_set_maxpacket_limit(&priv_ep->endpoint,
3124 CDNS3_EP_MAX_PACKET_LIMIT);
3125 priv_ep->endpoint.max_streams = CDNS3_EP_MAX_STREAMS;
3126 priv_ep->endpoint.ops = &cdns3_gadget_ep_ops;
3128 priv_ep->endpoint.caps.dir_in = 1;
3130 priv_ep->endpoint.caps.dir_out = 1;
3132 if (iso_ep_reg & ep_mask)
3133 priv_ep->endpoint.caps.type_iso = 1;
3135 priv_ep->endpoint.caps.type_bulk = 1;
3136 priv_ep->endpoint.caps.type_int = 1;
3138 list_add_tail(&priv_ep->endpoint.ep_list,
3139 &priv_dev->gadget.ep_list);
3144 dev_dbg(priv_dev->dev, "Initialized %s support: %s %s\n",
3146 priv_ep->endpoint.caps.type_bulk ? "BULK, INT" : "",
3147 priv_ep->endpoint.caps.type_iso ? "ISO" : "");
3149 INIT_LIST_HEAD(&priv_ep->pending_req_list);
3150 INIT_LIST_HEAD(&priv_ep->deferred_req_list);
3151 INIT_LIST_HEAD(&priv_ep->wa2_descmiss_req_list);
3156 cdns3_free_all_eps(priv_dev);
3160 static void cdns3_gadget_release(struct device *dev)
3162 struct cdns3_device *priv_dev = container_of(dev,
3163 struct cdns3_device, gadget.dev);
3168 static void cdns3_gadget_exit(struct cdns *cdns)
3170 struct cdns3_device *priv_dev;
3172 priv_dev = cdns->gadget_dev;
3175 pm_runtime_mark_last_busy(cdns->dev);
3176 pm_runtime_put_autosuspend(cdns->dev);
3178 usb_del_gadget(&priv_dev->gadget);
3179 devm_free_irq(cdns->dev, cdns->dev_irq, priv_dev);
3181 cdns3_free_all_eps(priv_dev);
3183 while (!list_empty(&priv_dev->aligned_buf_list)) {
3184 struct cdns3_aligned_buf *buf;
3186 buf = cdns3_next_align_buf(&priv_dev->aligned_buf_list);
3187 dma_free_noncoherent(priv_dev->sysdev, buf->size,
3192 list_del(&buf->list);
3196 dma_free_coherent(priv_dev->sysdev, 8, priv_dev->setup_buf,
3197 priv_dev->setup_dma);
3198 dma_pool_destroy(priv_dev->eps_dma_pool);
3200 kfree(priv_dev->zlp_buf);
3201 usb_put_gadget(&priv_dev->gadget);
3202 cdns->gadget_dev = NULL;
3203 cdns_drd_gadget_off(cdns);
3206 static int cdns3_gadget_start(struct cdns *cdns)
3208 struct cdns3_device *priv_dev;
3212 priv_dev = kzalloc(sizeof(*priv_dev), GFP_KERNEL);
3216 usb_initialize_gadget(cdns->dev, &priv_dev->gadget,
3217 cdns3_gadget_release);
3218 cdns->gadget_dev = priv_dev;
3219 priv_dev->sysdev = cdns->dev;
3220 priv_dev->dev = cdns->dev;
3221 priv_dev->regs = cdns->dev_regs;
3223 device_property_read_u16(priv_dev->dev, "cdns,on-chip-buff-size",
3224 &priv_dev->onchip_buffers);
3226 if (priv_dev->onchip_buffers <= 0) {
3227 u32 reg = readl(&priv_dev->regs->usb_cap2);
3229 priv_dev->onchip_buffers = USB_CAP2_ACTUAL_MEM_SIZE(reg);
3232 if (!priv_dev->onchip_buffers)
3233 priv_dev->onchip_buffers = 256;
3235 max_speed = usb_get_maximum_speed(cdns->dev);
3237 /* Check the maximum_speed parameter */
3238 switch (max_speed) {
3239 case USB_SPEED_FULL:
3240 case USB_SPEED_HIGH:
3241 case USB_SPEED_SUPER:
3244 dev_err(cdns->dev, "invalid maximum_speed parameter %d\n",
3247 case USB_SPEED_UNKNOWN:
3248 /* default to superspeed */
3249 max_speed = USB_SPEED_SUPER;
3253 /* fill gadget fields */
3254 priv_dev->gadget.max_speed = max_speed;
3255 priv_dev->gadget.speed = USB_SPEED_UNKNOWN;
3256 priv_dev->gadget.ops = &cdns3_gadget_ops;
3257 priv_dev->gadget.name = "usb-ss-gadget";
3258 priv_dev->gadget.quirk_avoids_skb_reserve = 1;
3259 priv_dev->gadget.irq = cdns->dev_irq;
3261 spin_lock_init(&priv_dev->lock);
3262 INIT_WORK(&priv_dev->pending_status_wq,
3263 cdns3_pending_setup_status_handler);
3265 INIT_WORK(&priv_dev->aligned_buf_wq,
3266 cdns3_free_aligned_request_buf);
3268 /* initialize endpoint container */
3269 INIT_LIST_HEAD(&priv_dev->gadget.ep_list);
3270 INIT_LIST_HEAD(&priv_dev->aligned_buf_list);
3271 priv_dev->eps_dma_pool = dma_pool_create("cdns3_eps_dma_pool",
3273 TRB_RING_SIZE, 8, 0);
3274 if (!priv_dev->eps_dma_pool) {
3275 dev_err(priv_dev->dev, "Failed to create TRB dma pool\n");
3280 ret = cdns3_init_eps(priv_dev);
3282 dev_err(priv_dev->dev, "Failed to create endpoints\n");
3286 /* allocate memory for setup packet buffer */
3287 priv_dev->setup_buf = dma_alloc_coherent(priv_dev->sysdev, 8,
3288 &priv_dev->setup_dma, GFP_DMA);
3289 if (!priv_dev->setup_buf) {
3294 priv_dev->dev_ver = readl(&priv_dev->regs->usb_cap6);
3296 dev_dbg(priv_dev->dev, "Device Controller version: %08x\n",
3297 readl(&priv_dev->regs->usb_cap6));
3298 dev_dbg(priv_dev->dev, "USB Capabilities:: %08x\n",
3299 readl(&priv_dev->regs->usb_cap1));
3300 dev_dbg(priv_dev->dev, "On-Chip memory configuration: %08x\n",
3301 readl(&priv_dev->regs->usb_cap2));
3303 priv_dev->dev_ver = GET_DEV_BASE_VERSION(priv_dev->dev_ver);
3304 if (priv_dev->dev_ver >= DEV_VER_V2)
3305 priv_dev->gadget.sg_supported = 1;
3307 priv_dev->zlp_buf = kzalloc(CDNS3_EP_ZLP_BUF_SIZE, GFP_KERNEL);
3308 if (!priv_dev->zlp_buf) {
3313 /* add USB gadget device */
3314 ret = usb_add_gadget(&priv_dev->gadget);
3316 dev_err(priv_dev->dev, "Failed to add gadget\n");
3322 kfree(priv_dev->zlp_buf);
3324 dma_free_coherent(priv_dev->sysdev, 8, priv_dev->setup_buf,
3325 priv_dev->setup_dma);
3327 cdns3_free_all_eps(priv_dev);
3329 dma_pool_destroy(priv_dev->eps_dma_pool);
3331 usb_put_gadget(&priv_dev->gadget);
3332 cdns->gadget_dev = NULL;
3336 static int __cdns3_gadget_init(struct cdns *cdns)
3340 /* Ensure 32-bit DMA Mask in case we switched back from Host mode */
3341 ret = dma_set_mask_and_coherent(cdns->dev, DMA_BIT_MASK(32));
3343 dev_err(cdns->dev, "Failed to set dma mask: %d\n", ret);
3347 cdns_drd_gadget_on(cdns);
3348 pm_runtime_get_sync(cdns->dev);
3350 ret = cdns3_gadget_start(cdns);
3352 pm_runtime_put_sync(cdns->dev);
3357 * Because interrupt line can be shared with other components in
3358 * driver it can't use IRQF_ONESHOT flag here.
3360 ret = devm_request_threaded_irq(cdns->dev, cdns->dev_irq,
3361 cdns3_device_irq_handler,
3362 cdns3_device_thread_irq_handler,
3363 IRQF_SHARED, dev_name(cdns->dev),
3371 cdns3_gadget_exit(cdns);
3375 static int cdns3_gadget_suspend(struct cdns *cdns, bool do_wakeup)
3376 __must_hold(&cdns->lock)
3378 struct cdns3_device *priv_dev = cdns->gadget_dev;
3380 spin_unlock(&cdns->lock);
3381 cdns3_disconnect_gadget(priv_dev);
3382 spin_lock(&cdns->lock);
3384 priv_dev->gadget.speed = USB_SPEED_UNKNOWN;
3385 usb_gadget_set_state(&priv_dev->gadget, USB_STATE_NOTATTACHED);
3386 cdns3_hw_reset_eps_config(priv_dev);
3388 /* disable interrupt for device */
3389 writel(0, &priv_dev->regs->usb_ien);
3394 static int cdns3_gadget_resume(struct cdns *cdns, bool hibernated)
3396 struct cdns3_device *priv_dev = cdns->gadget_dev;
3398 if (!priv_dev->gadget_driver)
3401 cdns3_gadget_config(priv_dev);
3403 writel(USB_CONF_DEVEN, &priv_dev->regs->usb_conf);
3409 * cdns3_gadget_init - initialize device structure
3411 * @cdns: cdns instance
3413 * This function initializes the gadget.
3415 int cdns3_gadget_init(struct cdns *cdns)
3417 struct cdns_role_driver *rdrv;
3419 rdrv = devm_kzalloc(cdns->dev, sizeof(*rdrv), GFP_KERNEL);
3423 rdrv->start = __cdns3_gadget_init;
3424 rdrv->stop = cdns3_gadget_exit;
3425 rdrv->suspend = cdns3_gadget_suspend;
3426 rdrv->resume = cdns3_gadget_resume;
3427 rdrv->state = CDNS_ROLE_STATE_INACTIVE;
3428 rdrv->name = "gadget";
3429 cdns->roles[USB_ROLE_DEVICE] = rdrv;