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[linux.git] / drivers / pci / controller / vmd.c
1 // SPDX-License-Identifier: GPL-2.0
2 /*
3  * Volume Management Device driver
4  * Copyright (c) 2015, Intel Corporation.
5  */
6
7 #include <linux/device.h>
8 #include <linux/interrupt.h>
9 #include <linux/iommu.h>
10 #include <linux/irq.h>
11 #include <linux/kernel.h>
12 #include <linux/module.h>
13 #include <linux/msi.h>
14 #include <linux/pci.h>
15 #include <linux/pci-acpi.h>
16 #include <linux/pci-ecam.h>
17 #include <linux/srcu.h>
18 #include <linux/rculist.h>
19 #include <linux/rcupdate.h>
20
21 #include <asm/irqdomain.h>
22
23 #define VMD_CFGBAR      0
24 #define VMD_MEMBAR1     2
25 #define VMD_MEMBAR2     4
26
27 #define PCI_REG_VMCAP           0x40
28 #define BUS_RESTRICT_CAP(vmcap) (vmcap & 0x1)
29 #define PCI_REG_VMCONFIG        0x44
30 #define BUS_RESTRICT_CFG(vmcfg) ((vmcfg >> 8) & 0x3)
31 #define VMCONFIG_MSI_REMAP      0x2
32 #define PCI_REG_VMLOCK          0x70
33 #define MB2_SHADOW_EN(vmlock)   (vmlock & 0x2)
34
35 #define MB2_SHADOW_OFFSET       0x2000
36 #define MB2_SHADOW_SIZE         16
37
38 enum vmd_features {
39         /*
40          * Device may contain registers which hint the physical location of the
41          * membars, in order to allow proper address translation during
42          * resource assignment to enable guest virtualization
43          */
44         VMD_FEAT_HAS_MEMBAR_SHADOW              = (1 << 0),
45
46         /*
47          * Device may provide root port configuration information which limits
48          * bus numbering
49          */
50         VMD_FEAT_HAS_BUS_RESTRICTIONS           = (1 << 1),
51
52         /*
53          * Device contains physical location shadow registers in
54          * vendor-specific capability space
55          */
56         VMD_FEAT_HAS_MEMBAR_SHADOW_VSCAP        = (1 << 2),
57
58         /*
59          * Device may use MSI-X vector 0 for software triggering and will not
60          * be used for MSI remapping
61          */
62         VMD_FEAT_OFFSET_FIRST_VECTOR            = (1 << 3),
63
64         /*
65          * Device can bypass remapping MSI-X transactions into its MSI-X table,
66          * avoiding the requirement of a VMD MSI domain for child device
67          * interrupt handling.
68          */
69         VMD_FEAT_CAN_BYPASS_MSI_REMAP           = (1 << 4),
70 };
71
72 static DEFINE_IDA(vmd_instance_ida);
73
74 /*
75  * Lock for manipulating VMD IRQ lists.
76  */
77 static DEFINE_RAW_SPINLOCK(list_lock);
78
79 /**
80  * struct vmd_irq - private data to map driver IRQ to the VMD shared vector
81  * @node:       list item for parent traversal.
82  * @irq:        back pointer to parent.
83  * @enabled:    true if driver enabled IRQ
84  * @virq:       the virtual IRQ value provided to the requesting driver.
85  *
86  * Every MSI/MSI-X IRQ requested for a device in a VMD domain will be mapped to
87  * a VMD IRQ using this structure.
88  */
89 struct vmd_irq {
90         struct list_head        node;
91         struct vmd_irq_list     *irq;
92         bool                    enabled;
93         unsigned int            virq;
94 };
95
96 /**
97  * struct vmd_irq_list - list of driver requested IRQs mapping to a VMD vector
98  * @irq_list:   the list of irq's the VMD one demuxes to.
99  * @srcu:       SRCU struct for local synchronization.
100  * @count:      number of child IRQs assigned to this vector; used to track
101  *              sharing.
102  * @virq:       The underlying VMD Linux interrupt number
103  */
104 struct vmd_irq_list {
105         struct list_head        irq_list;
106         struct srcu_struct      srcu;
107         unsigned int            count;
108         unsigned int            virq;
109 };
110
111 struct vmd_dev {
112         struct pci_dev          *dev;
113
114         spinlock_t              cfg_lock;
115         void __iomem            *cfgbar;
116
117         int msix_count;
118         struct vmd_irq_list     *irqs;
119
120         struct pci_sysdata      sysdata;
121         struct resource         resources[3];
122         struct irq_domain       *irq_domain;
123         struct pci_bus          *bus;
124         u8                      busn_start;
125         u8                      first_vec;
126         char                    *name;
127         int                     instance;
128 };
129
130 static inline struct vmd_dev *vmd_from_bus(struct pci_bus *bus)
131 {
132         return container_of(bus->sysdata, struct vmd_dev, sysdata);
133 }
134
135 static inline unsigned int index_from_irqs(struct vmd_dev *vmd,
136                                            struct vmd_irq_list *irqs)
137 {
138         return irqs - vmd->irqs;
139 }
140
141 /*
142  * Drivers managing a device in a VMD domain allocate their own IRQs as before,
143  * but the MSI entry for the hardware it's driving will be programmed with a
144  * destination ID for the VMD MSI-X table.  The VMD muxes interrupts in its
145  * domain into one of its own, and the VMD driver de-muxes these for the
146  * handlers sharing that VMD IRQ.  The vmd irq_domain provides the operations
147  * and irq_chip to set this up.
148  */
149 static void vmd_compose_msi_msg(struct irq_data *data, struct msi_msg *msg)
150 {
151         struct vmd_irq *vmdirq = data->chip_data;
152         struct vmd_irq_list *irq = vmdirq->irq;
153         struct vmd_dev *vmd = irq_data_get_irq_handler_data(data);
154
155         memset(msg, 0, sizeof(*msg));
156         msg->address_hi = X86_MSI_BASE_ADDRESS_HIGH;
157         msg->arch_addr_lo.base_address = X86_MSI_BASE_ADDRESS_LOW;
158         msg->arch_addr_lo.destid_0_7 = index_from_irqs(vmd, irq);
159 }
160
161 /*
162  * We rely on MSI_FLAG_USE_DEF_CHIP_OPS to set the IRQ mask/unmask ops.
163  */
164 static void vmd_irq_enable(struct irq_data *data)
165 {
166         struct vmd_irq *vmdirq = data->chip_data;
167         unsigned long flags;
168
169         raw_spin_lock_irqsave(&list_lock, flags);
170         WARN_ON(vmdirq->enabled);
171         list_add_tail_rcu(&vmdirq->node, &vmdirq->irq->irq_list);
172         vmdirq->enabled = true;
173         raw_spin_unlock_irqrestore(&list_lock, flags);
174
175         data->chip->irq_unmask(data);
176 }
177
178 static void vmd_irq_disable(struct irq_data *data)
179 {
180         struct vmd_irq *vmdirq = data->chip_data;
181         unsigned long flags;
182
183         data->chip->irq_mask(data);
184
185         raw_spin_lock_irqsave(&list_lock, flags);
186         if (vmdirq->enabled) {
187                 list_del_rcu(&vmdirq->node);
188                 vmdirq->enabled = false;
189         }
190         raw_spin_unlock_irqrestore(&list_lock, flags);
191 }
192
193 /*
194  * XXX: Stubbed until we develop acceptable way to not create conflicts with
195  * other devices sharing the same vector.
196  */
197 static int vmd_irq_set_affinity(struct irq_data *data,
198                                 const struct cpumask *dest, bool force)
199 {
200         return -EINVAL;
201 }
202
203 static struct irq_chip vmd_msi_controller = {
204         .name                   = "VMD-MSI",
205         .irq_enable             = vmd_irq_enable,
206         .irq_disable            = vmd_irq_disable,
207         .irq_compose_msi_msg    = vmd_compose_msi_msg,
208         .irq_set_affinity       = vmd_irq_set_affinity,
209 };
210
211 static irq_hw_number_t vmd_get_hwirq(struct msi_domain_info *info,
212                                      msi_alloc_info_t *arg)
213 {
214         return 0;
215 }
216
217 /*
218  * XXX: We can be even smarter selecting the best IRQ once we solve the
219  * affinity problem.
220  */
221 static struct vmd_irq_list *vmd_next_irq(struct vmd_dev *vmd, struct msi_desc *desc)
222 {
223         unsigned long flags;
224         int i, best;
225
226         if (vmd->msix_count == 1 + vmd->first_vec)
227                 return &vmd->irqs[vmd->first_vec];
228
229         /*
230          * White list for fast-interrupt handlers. All others will share the
231          * "slow" interrupt vector.
232          */
233         switch (msi_desc_to_pci_dev(desc)->class) {
234         case PCI_CLASS_STORAGE_EXPRESS:
235                 break;
236         default:
237                 return &vmd->irqs[vmd->first_vec];
238         }
239
240         raw_spin_lock_irqsave(&list_lock, flags);
241         best = vmd->first_vec + 1;
242         for (i = best; i < vmd->msix_count; i++)
243                 if (vmd->irqs[i].count < vmd->irqs[best].count)
244                         best = i;
245         vmd->irqs[best].count++;
246         raw_spin_unlock_irqrestore(&list_lock, flags);
247
248         return &vmd->irqs[best];
249 }
250
251 static int vmd_msi_init(struct irq_domain *domain, struct msi_domain_info *info,
252                         unsigned int virq, irq_hw_number_t hwirq,
253                         msi_alloc_info_t *arg)
254 {
255         struct msi_desc *desc = arg->desc;
256         struct vmd_dev *vmd = vmd_from_bus(msi_desc_to_pci_dev(desc)->bus);
257         struct vmd_irq *vmdirq = kzalloc(sizeof(*vmdirq), GFP_KERNEL);
258
259         if (!vmdirq)
260                 return -ENOMEM;
261
262         INIT_LIST_HEAD(&vmdirq->node);
263         vmdirq->irq = vmd_next_irq(vmd, desc);
264         vmdirq->virq = virq;
265
266         irq_domain_set_info(domain, virq, vmdirq->irq->virq, info->chip, vmdirq,
267                             handle_untracked_irq, vmd, NULL);
268         return 0;
269 }
270
271 static void vmd_msi_free(struct irq_domain *domain,
272                         struct msi_domain_info *info, unsigned int virq)
273 {
274         struct vmd_irq *vmdirq = irq_get_chip_data(virq);
275         unsigned long flags;
276
277         synchronize_srcu(&vmdirq->irq->srcu);
278
279         /* XXX: Potential optimization to rebalance */
280         raw_spin_lock_irqsave(&list_lock, flags);
281         vmdirq->irq->count--;
282         raw_spin_unlock_irqrestore(&list_lock, flags);
283
284         kfree(vmdirq);
285 }
286
287 static int vmd_msi_prepare(struct irq_domain *domain, struct device *dev,
288                            int nvec, msi_alloc_info_t *arg)
289 {
290         struct pci_dev *pdev = to_pci_dev(dev);
291         struct vmd_dev *vmd = vmd_from_bus(pdev->bus);
292
293         if (nvec > vmd->msix_count)
294                 return vmd->msix_count;
295
296         memset(arg, 0, sizeof(*arg));
297         return 0;
298 }
299
300 static void vmd_set_desc(msi_alloc_info_t *arg, struct msi_desc *desc)
301 {
302         arg->desc = desc;
303 }
304
305 static struct msi_domain_ops vmd_msi_domain_ops = {
306         .get_hwirq      = vmd_get_hwirq,
307         .msi_init       = vmd_msi_init,
308         .msi_free       = vmd_msi_free,
309         .msi_prepare    = vmd_msi_prepare,
310         .set_desc       = vmd_set_desc,
311 };
312
313 static struct msi_domain_info vmd_msi_domain_info = {
314         .flags          = MSI_FLAG_USE_DEF_DOM_OPS | MSI_FLAG_USE_DEF_CHIP_OPS |
315                           MSI_FLAG_PCI_MSIX,
316         .ops            = &vmd_msi_domain_ops,
317         .chip           = &vmd_msi_controller,
318 };
319
320 static void vmd_set_msi_remapping(struct vmd_dev *vmd, bool enable)
321 {
322         u16 reg;
323
324         pci_read_config_word(vmd->dev, PCI_REG_VMCONFIG, &reg);
325         reg = enable ? (reg & ~VMCONFIG_MSI_REMAP) :
326                        (reg | VMCONFIG_MSI_REMAP);
327         pci_write_config_word(vmd->dev, PCI_REG_VMCONFIG, reg);
328 }
329
330 static int vmd_create_irq_domain(struct vmd_dev *vmd)
331 {
332         struct fwnode_handle *fn;
333
334         fn = irq_domain_alloc_named_id_fwnode("VMD-MSI", vmd->sysdata.domain);
335         if (!fn)
336                 return -ENODEV;
337
338         vmd->irq_domain = pci_msi_create_irq_domain(fn, &vmd_msi_domain_info, NULL);
339         if (!vmd->irq_domain) {
340                 irq_domain_free_fwnode(fn);
341                 return -ENODEV;
342         }
343
344         return 0;
345 }
346
347 static void vmd_remove_irq_domain(struct vmd_dev *vmd)
348 {
349         /*
350          * Some production BIOS won't enable remapping between soft reboots.
351          * Ensure remapping is restored before unloading the driver.
352          */
353         if (!vmd->msix_count)
354                 vmd_set_msi_remapping(vmd, true);
355
356         if (vmd->irq_domain) {
357                 struct fwnode_handle *fn = vmd->irq_domain->fwnode;
358
359                 irq_domain_remove(vmd->irq_domain);
360                 irq_domain_free_fwnode(fn);
361         }
362 }
363
364 static void __iomem *vmd_cfg_addr(struct vmd_dev *vmd, struct pci_bus *bus,
365                                   unsigned int devfn, int reg, int len)
366 {
367         unsigned int busnr_ecam = bus->number - vmd->busn_start;
368         u32 offset = PCIE_ECAM_OFFSET(busnr_ecam, devfn, reg);
369
370         if (offset + len >= resource_size(&vmd->dev->resource[VMD_CFGBAR]))
371                 return NULL;
372
373         return vmd->cfgbar + offset;
374 }
375
376 /*
377  * CPU may deadlock if config space is not serialized on some versions of this
378  * hardware, so all config space access is done under a spinlock.
379  */
380 static int vmd_pci_read(struct pci_bus *bus, unsigned int devfn, int reg,
381                         int len, u32 *value)
382 {
383         struct vmd_dev *vmd = vmd_from_bus(bus);
384         void __iomem *addr = vmd_cfg_addr(vmd, bus, devfn, reg, len);
385         unsigned long flags;
386         int ret = 0;
387
388         if (!addr)
389                 return -EFAULT;
390
391         spin_lock_irqsave(&vmd->cfg_lock, flags);
392         switch (len) {
393         case 1:
394                 *value = readb(addr);
395                 break;
396         case 2:
397                 *value = readw(addr);
398                 break;
399         case 4:
400                 *value = readl(addr);
401                 break;
402         default:
403                 ret = -EINVAL;
404                 break;
405         }
406         spin_unlock_irqrestore(&vmd->cfg_lock, flags);
407         return ret;
408 }
409
410 /*
411  * VMD h/w converts non-posted config writes to posted memory writes. The
412  * read-back in this function forces the completion so it returns only after
413  * the config space was written, as expected.
414  */
415 static int vmd_pci_write(struct pci_bus *bus, unsigned int devfn, int reg,
416                          int len, u32 value)
417 {
418         struct vmd_dev *vmd = vmd_from_bus(bus);
419         void __iomem *addr = vmd_cfg_addr(vmd, bus, devfn, reg, len);
420         unsigned long flags;
421         int ret = 0;
422
423         if (!addr)
424                 return -EFAULT;
425
426         spin_lock_irqsave(&vmd->cfg_lock, flags);
427         switch (len) {
428         case 1:
429                 writeb(value, addr);
430                 readb(addr);
431                 break;
432         case 2:
433                 writew(value, addr);
434                 readw(addr);
435                 break;
436         case 4:
437                 writel(value, addr);
438                 readl(addr);
439                 break;
440         default:
441                 ret = -EINVAL;
442                 break;
443         }
444         spin_unlock_irqrestore(&vmd->cfg_lock, flags);
445         return ret;
446 }
447
448 static struct pci_ops vmd_ops = {
449         .read           = vmd_pci_read,
450         .write          = vmd_pci_write,
451 };
452
453 #ifdef CONFIG_ACPI
454 static struct acpi_device *vmd_acpi_find_companion(struct pci_dev *pci_dev)
455 {
456         struct pci_host_bridge *bridge;
457         u32 busnr, addr;
458
459         if (pci_dev->bus->ops != &vmd_ops)
460                 return NULL;
461
462         bridge = pci_find_host_bridge(pci_dev->bus);
463         busnr = pci_dev->bus->number - bridge->bus->number;
464         /*
465          * The address computation below is only applicable to relative bus
466          * numbers below 32.
467          */
468         if (busnr > 31)
469                 return NULL;
470
471         addr = (busnr << 24) | ((u32)pci_dev->devfn << 16) | 0x8000FFFFU;
472
473         dev_dbg(&pci_dev->dev, "Looking for ACPI companion (address 0x%x)\n",
474                 addr);
475
476         return acpi_find_child_device(ACPI_COMPANION(bridge->dev.parent), addr,
477                                       false);
478 }
479
480 static bool hook_installed;
481
482 static void vmd_acpi_begin(void)
483 {
484         if (pci_acpi_set_companion_lookup_hook(vmd_acpi_find_companion))
485                 return;
486
487         hook_installed = true;
488 }
489
490 static void vmd_acpi_end(void)
491 {
492         if (!hook_installed)
493                 return;
494
495         pci_acpi_clear_companion_lookup_hook();
496         hook_installed = false;
497 }
498 #else
499 static inline void vmd_acpi_begin(void) { }
500 static inline void vmd_acpi_end(void) { }
501 #endif /* CONFIG_ACPI */
502
503 static void vmd_domain_reset(struct vmd_dev *vmd)
504 {
505         u16 bus, max_buses = resource_size(&vmd->resources[0]);
506         u8 dev, functions, fn, hdr_type;
507         char __iomem *base;
508
509         for (bus = 0; bus < max_buses; bus++) {
510                 for (dev = 0; dev < 32; dev++) {
511                         base = vmd->cfgbar + PCIE_ECAM_OFFSET(bus,
512                                                 PCI_DEVFN(dev, 0), 0);
513
514                         hdr_type = readb(base + PCI_HEADER_TYPE) &
515                                          PCI_HEADER_TYPE_MASK;
516
517                         functions = (hdr_type & 0x80) ? 8 : 1;
518                         for (fn = 0; fn < functions; fn++) {
519                                 base = vmd->cfgbar + PCIE_ECAM_OFFSET(bus,
520                                                 PCI_DEVFN(dev, fn), 0);
521
522                                 hdr_type = readb(base + PCI_HEADER_TYPE) &
523                                                 PCI_HEADER_TYPE_MASK;
524
525                                 if (hdr_type != PCI_HEADER_TYPE_BRIDGE ||
526                                     (readw(base + PCI_CLASS_DEVICE) !=
527                                      PCI_CLASS_BRIDGE_PCI))
528                                         continue;
529
530                                 memset_io(base + PCI_IO_BASE, 0,
531                                           PCI_ROM_ADDRESS1 - PCI_IO_BASE);
532                         }
533                 }
534         }
535 }
536
537 static void vmd_attach_resources(struct vmd_dev *vmd)
538 {
539         vmd->dev->resource[VMD_MEMBAR1].child = &vmd->resources[1];
540         vmd->dev->resource[VMD_MEMBAR2].child = &vmd->resources[2];
541 }
542
543 static void vmd_detach_resources(struct vmd_dev *vmd)
544 {
545         vmd->dev->resource[VMD_MEMBAR1].child = NULL;
546         vmd->dev->resource[VMD_MEMBAR2].child = NULL;
547 }
548
549 /*
550  * VMD domains start at 0x10000 to not clash with ACPI _SEG domains.
551  * Per ACPI r6.0, sec 6.5.6,  _SEG returns an integer, of which the lower
552  * 16 bits are the PCI Segment Group (domain) number.  Other bits are
553  * currently reserved.
554  */
555 static int vmd_find_free_domain(void)
556 {
557         int domain = 0xffff;
558         struct pci_bus *bus = NULL;
559
560         while ((bus = pci_find_next_bus(bus)) != NULL)
561                 domain = max_t(int, domain, pci_domain_nr(bus));
562         return domain + 1;
563 }
564
565 static int vmd_get_phys_offsets(struct vmd_dev *vmd, bool native_hint,
566                                 resource_size_t *offset1,
567                                 resource_size_t *offset2)
568 {
569         struct pci_dev *dev = vmd->dev;
570         u64 phys1, phys2;
571
572         if (native_hint) {
573                 u32 vmlock;
574                 int ret;
575
576                 ret = pci_read_config_dword(dev, PCI_REG_VMLOCK, &vmlock);
577                 if (ret || PCI_POSSIBLE_ERROR(vmlock))
578                         return -ENODEV;
579
580                 if (MB2_SHADOW_EN(vmlock)) {
581                         void __iomem *membar2;
582
583                         membar2 = pci_iomap(dev, VMD_MEMBAR2, 0);
584                         if (!membar2)
585                                 return -ENOMEM;
586                         phys1 = readq(membar2 + MB2_SHADOW_OFFSET);
587                         phys2 = readq(membar2 + MB2_SHADOW_OFFSET + 8);
588                         pci_iounmap(dev, membar2);
589                 } else
590                         return 0;
591         } else {
592                 /* Hypervisor-Emulated Vendor-Specific Capability */
593                 int pos = pci_find_capability(dev, PCI_CAP_ID_VNDR);
594                 u32 reg, regu;
595
596                 pci_read_config_dword(dev, pos + 4, &reg);
597
598                 /* "SHDW" */
599                 if (pos && reg == 0x53484457) {
600                         pci_read_config_dword(dev, pos + 8, &reg);
601                         pci_read_config_dword(dev, pos + 12, &regu);
602                         phys1 = (u64) regu << 32 | reg;
603
604                         pci_read_config_dword(dev, pos + 16, &reg);
605                         pci_read_config_dword(dev, pos + 20, &regu);
606                         phys2 = (u64) regu << 32 | reg;
607                 } else
608                         return 0;
609         }
610
611         *offset1 = dev->resource[VMD_MEMBAR1].start -
612                         (phys1 & PCI_BASE_ADDRESS_MEM_MASK);
613         *offset2 = dev->resource[VMD_MEMBAR2].start -
614                         (phys2 & PCI_BASE_ADDRESS_MEM_MASK);
615
616         return 0;
617 }
618
619 static int vmd_get_bus_number_start(struct vmd_dev *vmd)
620 {
621         struct pci_dev *dev = vmd->dev;
622         u16 reg;
623
624         pci_read_config_word(dev, PCI_REG_VMCAP, &reg);
625         if (BUS_RESTRICT_CAP(reg)) {
626                 pci_read_config_word(dev, PCI_REG_VMCONFIG, &reg);
627
628                 switch (BUS_RESTRICT_CFG(reg)) {
629                 case 0:
630                         vmd->busn_start = 0;
631                         break;
632                 case 1:
633                         vmd->busn_start = 128;
634                         break;
635                 case 2:
636                         vmd->busn_start = 224;
637                         break;
638                 default:
639                         pci_err(dev, "Unknown Bus Offset Setting (%d)\n",
640                                 BUS_RESTRICT_CFG(reg));
641                         return -ENODEV;
642                 }
643         }
644
645         return 0;
646 }
647
648 static irqreturn_t vmd_irq(int irq, void *data)
649 {
650         struct vmd_irq_list *irqs = data;
651         struct vmd_irq *vmdirq;
652         int idx;
653
654         idx = srcu_read_lock(&irqs->srcu);
655         list_for_each_entry_rcu(vmdirq, &irqs->irq_list, node)
656                 generic_handle_irq(vmdirq->virq);
657         srcu_read_unlock(&irqs->srcu, idx);
658
659         return IRQ_HANDLED;
660 }
661
662 static int vmd_alloc_irqs(struct vmd_dev *vmd)
663 {
664         struct pci_dev *dev = vmd->dev;
665         int i, err;
666
667         vmd->msix_count = pci_msix_vec_count(dev);
668         if (vmd->msix_count < 0)
669                 return -ENODEV;
670
671         vmd->msix_count = pci_alloc_irq_vectors(dev, vmd->first_vec + 1,
672                                                 vmd->msix_count, PCI_IRQ_MSIX);
673         if (vmd->msix_count < 0)
674                 return vmd->msix_count;
675
676         vmd->irqs = devm_kcalloc(&dev->dev, vmd->msix_count, sizeof(*vmd->irqs),
677                                  GFP_KERNEL);
678         if (!vmd->irqs)
679                 return -ENOMEM;
680
681         for (i = 0; i < vmd->msix_count; i++) {
682                 err = init_srcu_struct(&vmd->irqs[i].srcu);
683                 if (err)
684                         return err;
685
686                 INIT_LIST_HEAD(&vmd->irqs[i].irq_list);
687                 vmd->irqs[i].virq = pci_irq_vector(dev, i);
688                 err = devm_request_irq(&dev->dev, vmd->irqs[i].virq,
689                                        vmd_irq, IRQF_NO_THREAD,
690                                        vmd->name, &vmd->irqs[i]);
691                 if (err)
692                         return err;
693         }
694
695         return 0;
696 }
697
698 /*
699  * Since VMD is an aperture to regular PCIe root ports, only allow it to
700  * control features that the OS is allowed to control on the physical PCI bus.
701  */
702 static void vmd_copy_host_bridge_flags(struct pci_host_bridge *root_bridge,
703                                        struct pci_host_bridge *vmd_bridge)
704 {
705         vmd_bridge->native_pcie_hotplug = root_bridge->native_pcie_hotplug;
706         vmd_bridge->native_shpc_hotplug = root_bridge->native_shpc_hotplug;
707         vmd_bridge->native_aer = root_bridge->native_aer;
708         vmd_bridge->native_pme = root_bridge->native_pme;
709         vmd_bridge->native_ltr = root_bridge->native_ltr;
710         vmd_bridge->native_dpc = root_bridge->native_dpc;
711 }
712
713 static int vmd_enable_domain(struct vmd_dev *vmd, unsigned long features)
714 {
715         struct pci_sysdata *sd = &vmd->sysdata;
716         struct resource *res;
717         u32 upper_bits;
718         unsigned long flags;
719         LIST_HEAD(resources);
720         resource_size_t offset[2] = {0};
721         resource_size_t membar2_offset = 0x2000;
722         struct pci_bus *child;
723         int ret;
724
725         /*
726          * Shadow registers may exist in certain VMD device ids which allow
727          * guests to correctly assign host physical addresses to the root ports
728          * and child devices. These registers will either return the host value
729          * or 0, depending on an enable bit in the VMD device.
730          */
731         if (features & VMD_FEAT_HAS_MEMBAR_SHADOW) {
732                 membar2_offset = MB2_SHADOW_OFFSET + MB2_SHADOW_SIZE;
733                 ret = vmd_get_phys_offsets(vmd, true, &offset[0], &offset[1]);
734                 if (ret)
735                         return ret;
736         } else if (features & VMD_FEAT_HAS_MEMBAR_SHADOW_VSCAP) {
737                 ret = vmd_get_phys_offsets(vmd, false, &offset[0], &offset[1]);
738                 if (ret)
739                         return ret;
740         }
741
742         /*
743          * Certain VMD devices may have a root port configuration option which
744          * limits the bus range to between 0-127, 128-255, or 224-255
745          */
746         if (features & VMD_FEAT_HAS_BUS_RESTRICTIONS) {
747                 ret = vmd_get_bus_number_start(vmd);
748                 if (ret)
749                         return ret;
750         }
751
752         res = &vmd->dev->resource[VMD_CFGBAR];
753         vmd->resources[0] = (struct resource) {
754                 .name  = "VMD CFGBAR",
755                 .start = vmd->busn_start,
756                 .end   = vmd->busn_start + (resource_size(res) >> 20) - 1,
757                 .flags = IORESOURCE_BUS | IORESOURCE_PCI_FIXED,
758         };
759
760         /*
761          * If the window is below 4GB, clear IORESOURCE_MEM_64 so we can
762          * put 32-bit resources in the window.
763          *
764          * There's no hardware reason why a 64-bit window *couldn't*
765          * contain a 32-bit resource, but pbus_size_mem() computes the
766          * bridge window size assuming a 64-bit window will contain no
767          * 32-bit resources.  __pci_assign_resource() enforces that
768          * artificial restriction to make sure everything will fit.
769          *
770          * The only way we could use a 64-bit non-prefetchable MEMBAR is
771          * if its address is <4GB so that we can convert it to a 32-bit
772          * resource.  To be visible to the host OS, all VMD endpoints must
773          * be initially configured by platform BIOS, which includes setting
774          * up these resources.  We can assume the device is configured
775          * according to the platform needs.
776          */
777         res = &vmd->dev->resource[VMD_MEMBAR1];
778         upper_bits = upper_32_bits(res->end);
779         flags = res->flags & ~IORESOURCE_SIZEALIGN;
780         if (!upper_bits)
781                 flags &= ~IORESOURCE_MEM_64;
782         vmd->resources[1] = (struct resource) {
783                 .name  = "VMD MEMBAR1",
784                 .start = res->start,
785                 .end   = res->end,
786                 .flags = flags,
787                 .parent = res,
788         };
789
790         res = &vmd->dev->resource[VMD_MEMBAR2];
791         upper_bits = upper_32_bits(res->end);
792         flags = res->flags & ~IORESOURCE_SIZEALIGN;
793         if (!upper_bits)
794                 flags &= ~IORESOURCE_MEM_64;
795         vmd->resources[2] = (struct resource) {
796                 .name  = "VMD MEMBAR2",
797                 .start = res->start + membar2_offset,
798                 .end   = res->end,
799                 .flags = flags,
800                 .parent = res,
801         };
802
803         sd->vmd_dev = vmd->dev;
804         sd->domain = vmd_find_free_domain();
805         if (sd->domain < 0)
806                 return sd->domain;
807
808         sd->node = pcibus_to_node(vmd->dev->bus);
809
810         /*
811          * Currently MSI remapping must be enabled in guest passthrough mode
812          * due to some missing interrupt remapping plumbing. This is probably
813          * acceptable because the guest is usually CPU-limited and MSI
814          * remapping doesn't become a performance bottleneck.
815          */
816         if (iommu_capable(vmd->dev->dev.bus, IOMMU_CAP_INTR_REMAP) ||
817             !(features & VMD_FEAT_CAN_BYPASS_MSI_REMAP) ||
818             offset[0] || offset[1]) {
819                 ret = vmd_alloc_irqs(vmd);
820                 if (ret)
821                         return ret;
822
823                 vmd_set_msi_remapping(vmd, true);
824
825                 ret = vmd_create_irq_domain(vmd);
826                 if (ret)
827                         return ret;
828
829                 /*
830                  * Override the IRQ domain bus token so the domain can be
831                  * distinguished from a regular PCI/MSI domain.
832                  */
833                 irq_domain_update_bus_token(vmd->irq_domain, DOMAIN_BUS_VMD_MSI);
834         } else {
835                 vmd_set_msi_remapping(vmd, false);
836         }
837
838         pci_add_resource(&resources, &vmd->resources[0]);
839         pci_add_resource_offset(&resources, &vmd->resources[1], offset[0]);
840         pci_add_resource_offset(&resources, &vmd->resources[2], offset[1]);
841
842         vmd->bus = pci_create_root_bus(&vmd->dev->dev, vmd->busn_start,
843                                        &vmd_ops, sd, &resources);
844         if (!vmd->bus) {
845                 pci_free_resource_list(&resources);
846                 vmd_remove_irq_domain(vmd);
847                 return -ENODEV;
848         }
849
850         vmd_copy_host_bridge_flags(pci_find_host_bridge(vmd->dev->bus),
851                                    to_pci_host_bridge(vmd->bus->bridge));
852
853         vmd_attach_resources(vmd);
854         if (vmd->irq_domain)
855                 dev_set_msi_domain(&vmd->bus->dev, vmd->irq_domain);
856
857         vmd_acpi_begin();
858
859         pci_scan_child_bus(vmd->bus);
860         vmd_domain_reset(vmd);
861         list_for_each_entry(child, &vmd->bus->children, node)
862                 pci_reset_bus(child->self);
863         pci_assign_unassigned_bus_resources(vmd->bus);
864
865         /*
866          * VMD root buses are virtual and don't return true on pci_is_pcie()
867          * and will fail pcie_bus_configure_settings() early. It can instead be
868          * run on each of the real root ports.
869          */
870         list_for_each_entry(child, &vmd->bus->children, node)
871                 pcie_bus_configure_settings(child);
872
873         pci_bus_add_devices(vmd->bus);
874
875         vmd_acpi_end();
876
877         WARN(sysfs_create_link(&vmd->dev->dev.kobj, &vmd->bus->dev.kobj,
878                                "domain"), "Can't create symlink to domain\n");
879         return 0;
880 }
881
882 static int vmd_probe(struct pci_dev *dev, const struct pci_device_id *id)
883 {
884         unsigned long features = (unsigned long) id->driver_data;
885         struct vmd_dev *vmd;
886         int err;
887
888         if (resource_size(&dev->resource[VMD_CFGBAR]) < (1 << 20))
889                 return -ENOMEM;
890
891         vmd = devm_kzalloc(&dev->dev, sizeof(*vmd), GFP_KERNEL);
892         if (!vmd)
893                 return -ENOMEM;
894
895         vmd->dev = dev;
896         vmd->instance = ida_simple_get(&vmd_instance_ida, 0, 0, GFP_KERNEL);
897         if (vmd->instance < 0)
898                 return vmd->instance;
899
900         vmd->name = kasprintf(GFP_KERNEL, "vmd%d", vmd->instance);
901         if (!vmd->name) {
902                 err = -ENOMEM;
903                 goto out_release_instance;
904         }
905
906         err = pcim_enable_device(dev);
907         if (err < 0)
908                 goto out_release_instance;
909
910         vmd->cfgbar = pcim_iomap(dev, VMD_CFGBAR, 0);
911         if (!vmd->cfgbar) {
912                 err = -ENOMEM;
913                 goto out_release_instance;
914         }
915
916         pci_set_master(dev);
917         if (dma_set_mask_and_coherent(&dev->dev, DMA_BIT_MASK(64)) &&
918             dma_set_mask_and_coherent(&dev->dev, DMA_BIT_MASK(32))) {
919                 err = -ENODEV;
920                 goto out_release_instance;
921         }
922
923         if (features & VMD_FEAT_OFFSET_FIRST_VECTOR)
924                 vmd->first_vec = 1;
925
926         spin_lock_init(&vmd->cfg_lock);
927         pci_set_drvdata(dev, vmd);
928         err = vmd_enable_domain(vmd, features);
929         if (err)
930                 goto out_release_instance;
931
932         dev_info(&vmd->dev->dev, "Bound to PCI domain %04x\n",
933                  vmd->sysdata.domain);
934         return 0;
935
936  out_release_instance:
937         ida_simple_remove(&vmd_instance_ida, vmd->instance);
938         kfree(vmd->name);
939         return err;
940 }
941
942 static void vmd_cleanup_srcu(struct vmd_dev *vmd)
943 {
944         int i;
945
946         for (i = 0; i < vmd->msix_count; i++)
947                 cleanup_srcu_struct(&vmd->irqs[i].srcu);
948 }
949
950 static void vmd_remove(struct pci_dev *dev)
951 {
952         struct vmd_dev *vmd = pci_get_drvdata(dev);
953
954         sysfs_remove_link(&vmd->dev->dev.kobj, "domain");
955         pci_stop_root_bus(vmd->bus);
956         pci_remove_root_bus(vmd->bus);
957         vmd_cleanup_srcu(vmd);
958         vmd_detach_resources(vmd);
959         vmd_remove_irq_domain(vmd);
960         ida_simple_remove(&vmd_instance_ida, vmd->instance);
961         kfree(vmd->name);
962 }
963
964 #ifdef CONFIG_PM_SLEEP
965 static int vmd_suspend(struct device *dev)
966 {
967         struct pci_dev *pdev = to_pci_dev(dev);
968         struct vmd_dev *vmd = pci_get_drvdata(pdev);
969         int i;
970
971         for (i = 0; i < vmd->msix_count; i++)
972                 devm_free_irq(dev, vmd->irqs[i].virq, &vmd->irqs[i]);
973
974         return 0;
975 }
976
977 static int vmd_resume(struct device *dev)
978 {
979         struct pci_dev *pdev = to_pci_dev(dev);
980         struct vmd_dev *vmd = pci_get_drvdata(pdev);
981         int err, i;
982
983         for (i = 0; i < vmd->msix_count; i++) {
984                 err = devm_request_irq(dev, vmd->irqs[i].virq,
985                                        vmd_irq, IRQF_NO_THREAD,
986                                        vmd->name, &vmd->irqs[i]);
987                 if (err)
988                         return err;
989         }
990
991         return 0;
992 }
993 #endif
994 static SIMPLE_DEV_PM_OPS(vmd_dev_pm_ops, vmd_suspend, vmd_resume);
995
996 static const struct pci_device_id vmd_ids[] = {
997         {PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_VMD_201D),
998                 .driver_data = VMD_FEAT_HAS_MEMBAR_SHADOW_VSCAP,},
999         {PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_VMD_28C0),
1000                 .driver_data = VMD_FEAT_HAS_MEMBAR_SHADOW |
1001                                 VMD_FEAT_HAS_BUS_RESTRICTIONS |
1002                                 VMD_FEAT_CAN_BYPASS_MSI_REMAP,},
1003         {PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x467f),
1004                 .driver_data = VMD_FEAT_HAS_MEMBAR_SHADOW_VSCAP |
1005                                 VMD_FEAT_HAS_BUS_RESTRICTIONS |
1006                                 VMD_FEAT_OFFSET_FIRST_VECTOR,},
1007         {PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x4c3d),
1008                 .driver_data = VMD_FEAT_HAS_MEMBAR_SHADOW_VSCAP |
1009                                 VMD_FEAT_HAS_BUS_RESTRICTIONS |
1010                                 VMD_FEAT_OFFSET_FIRST_VECTOR,},
1011         {PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0xa77f),
1012                 .driver_data = VMD_FEAT_HAS_MEMBAR_SHADOW_VSCAP |
1013                                 VMD_FEAT_HAS_BUS_RESTRICTIONS |
1014                                 VMD_FEAT_OFFSET_FIRST_VECTOR,},
1015         {PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_VMD_9A0B),
1016                 .driver_data = VMD_FEAT_HAS_MEMBAR_SHADOW_VSCAP |
1017                                 VMD_FEAT_HAS_BUS_RESTRICTIONS |
1018                                 VMD_FEAT_OFFSET_FIRST_VECTOR,},
1019         {0,}
1020 };
1021 MODULE_DEVICE_TABLE(pci, vmd_ids);
1022
1023 static struct pci_driver vmd_drv = {
1024         .name           = "vmd",
1025         .id_table       = vmd_ids,
1026         .probe          = vmd_probe,
1027         .remove         = vmd_remove,
1028         .driver         = {
1029                 .pm     = &vmd_dev_pm_ops,
1030         },
1031 };
1032 module_pci_driver(vmd_drv);
1033
1034 MODULE_AUTHOR("Intel Corporation");
1035 MODULE_LICENSE("GPL v2");
1036 MODULE_VERSION("0.6");
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