drivers/hwmon/nct6775.c

   1 /*
   2  * nct6775 - Driver for the hardware monitoring functionality of
   3  *             Nuvoton NCT677x Super-I/O chips
   4  *
   5  * Copyright (C) 2012  Guenter Roeck <[email protected]>
   6  *
   7  * Derived from w83627ehf driver
   8  * Copyright (C) 2005-2012  Jean Delvare <[email protected]>
   9  * Copyright (C) 2006  Yuan Mu (Winbond),
  10  *                     Rudolf Marek <[email protected]>
  11  *                     David Hubbard <[email protected]>
  12  *                     Daniel J Blueman <[email protected]>
  13  * Copyright (C) 2010  Sheng-Yuan Huang (Nuvoton) (PS00)
  14  *
  15  * Shamelessly ripped from the w83627hf driver
  16  * Copyright (C) 2003  Mark Studebaker
  17  *
  18  * This program is free software; you can redistribute it and/or modify
  19  * it under the terms of the GNU General Public License as published by
  20  * the Free Software Foundation; either version 2 of the License, or
  21  * (at your option) any later version.
  22  *
  23  * This program is distributed in the hope that it will be useful,
  24  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  25  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  26  * GNU General Public License for more details.
  27  *
  28  * You should have received a copy of the GNU General Public License
  29  * along with this program; if not, write to the Free Software
  30  * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  31  *
  32  *
  33  * Supports the following chips:
  34  *
  35  * Chip        #vin    #fan    #pwm    #temp  chip IDs       man ID
  36  * nct6106d     9      3       3       6+3    0xc450 0xc1    0x5ca3
  37  * nct6775f     9      4       3       6+3    0xb470 0xc1    0x5ca3
  38  * nct6776f     9      5       3       6+3    0xc330 0xc1    0x5ca3
  39  * nct6779d    15      5       5       2+6    0xc560 0xc1    0x5ca3
  40  * nct6791d    15      6       6       2+6    0xc800 0xc1    0x5ca3
  41  * nct6792d    15      6       6       2+6    0xc910 0xc1    0x5ca3
  42  * nct6793d    15      6       6       2+6    0xd120 0xc1    0x5ca3
  43  *
  44  * #temp lists the number of monitored temperature sources (first value) plus
  45  * the number of directly connectable temperature sensors (second value).
  46  */
  47
  48 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  49
  50 #include <linux/module.h>
  51 #include <linux/init.h>
  52 #include <linux/slab.h>
  53 #include <linux/jiffies.h>
  54 #include <linux/platform_device.h>
  55 #include <linux/hwmon.h>
  56 #include <linux/hwmon-sysfs.h>
  57 #include <linux/hwmon-vid.h>
  58 #include <linux/err.h>
  59 #include <linux/mutex.h>
  60 #include <linux/acpi.h>
  61 #include <linux/dmi.h>
  62 #include <linux/io.h>
  63 #include "lm75.h"
  64
  65 #define USE_ALTERNATE
  66
  67 enum kinds { nct6106, nct6775, nct6776, nct6779, nct6791, nct6792, nct6793 };
  68
  69 /* used to set data->name = nct6775_device_names[data->sio_kind] */
  70 static const char * const nct6775_device_names[] = {
  71         "nct6106",
  72         "nct6775",
  73         "nct6776",
  74         "nct6779",
  75         "nct6791",
  76         "nct6792",
  77         "nct6793",
  78 };
  79
  80 static const char * const nct6775_sio_names[] __initconst = {
  81         "NCT6106D",
  82         "NCT6775F",
  83         "NCT6776D/F",
  84         "NCT6779D",
  85         "NCT6791D",
  86         "NCT6792D",
  87         "NCT6793D",
  88 };
  89
  90 static unsigned short force_id;
  91 module_param(force_id, ushort, 0);
  92 MODULE_PARM_DESC(force_id, "Override the detected device ID");
  93
  94 static unsigned short fan_debounce;
  95 module_param(fan_debounce, ushort, 0);
  96 MODULE_PARM_DESC(fan_debounce, "Enable debouncing for fan RPM signal");
  97
  98 #define DRVNAME "nct6775"
  99
 100 /*
 101  * Super-I/O constants and functions
 102  */
 103
 104 #define NCT6775_LD_ACPI         0x0a
 105 #define NCT6775_LD_HWM          0x0b
 106 #define NCT6775_LD_VID          0x0d
 107
 108 #define SIO_REG_LDSEL           0x07    /* Logical device select */
 109 #define SIO_REG_DEVID           0x20    /* Device ID (2 bytes) */
 110 #define SIO_REG_ENABLE          0x30    /* Logical device enable */
 111 #define SIO_REG_ADDR            0x60    /* Logical device address (2 bytes) */
 112
 113 #define SIO_NCT6106_ID          0xc450
 114 #define SIO_NCT6775_ID          0xb470
 115 #define SIO_NCT6776_ID          0xc330
 116 #define SIO_NCT6779_ID          0xc560
 117 #define SIO_NCT6791_ID          0xc800
 118 #define SIO_NCT6792_ID          0xc910
 119 #define SIO_NCT6793_ID          0xd120
 120 #define SIO_ID_MASK             0xFFF0
 121
 122 enum pwm_enable { off, manual, thermal_cruise, speed_cruise, sf3, sf4 };
 123
 124 static inline void
 125 superio_outb(int ioreg, int reg, int val)
 126 {
 127         outb(reg, ioreg);
 128         outb(val, ioreg + 1);
 129 }
 130
 131 static inline int
 132 superio_inb(int ioreg, int reg)
 133 {
 134         outb(reg, ioreg);
 135         return inb(ioreg + 1);
 136 }
 137
 138 static inline void
 139 superio_select(int ioreg, int ld)
 140 {
 141         outb(SIO_REG_LDSEL, ioreg);
 142         outb(ld, ioreg + 1);
 143 }
 144
 145 static inline int
 146 superio_enter(int ioreg)
 147 {
 148         /*
 149          * Try to reserve <ioreg> and <ioreg + 1> for exclusive access.
 150          */
 151         if (!request_muxed_region(ioreg, 2, DRVNAME))
 152                 return -EBUSY;
 153
 154         outb(0x87, ioreg);
 155         outb(0x87, ioreg);
 156
 157         return 0;
 158 }
 159
 160 static inline void
 161 superio_exit(int ioreg)
 162 {
 163         outb(0xaa, ioreg);
 164         outb(0x02, ioreg);
 165         outb(0x02, ioreg + 1);
 166         release_region(ioreg, 2);
 167 }
 168
 169 /*
 170  * ISA constants
 171  */
 172
 173 #define IOREGION_ALIGNMENT      (~7)
 174 #define IOREGION_OFFSET         5
 175 #define IOREGION_LENGTH         2
 176 #define ADDR_REG_OFFSET         0
 177 #define DATA_REG_OFFSET         1
 178
 179 #define NCT6775_REG_BANK        0x4E
 180 #define NCT6775_REG_CONFIG      0x40
 181
 182 /*
 183  * Not currently used:
 184  * REG_MAN_ID has the value 0x5ca3 for all supported chips.
 185  * REG_CHIP_ID == 0x88/0xa1/0xc1 depending on chip model.
 186  * REG_MAN_ID is at port 0x4f
 187  * REG_CHIP_ID is at port 0x58
 188  */
 189
 190 #define NUM_TEMP        10      /* Max number of temp attribute sets w/ limits*/
 191 #define NUM_TEMP_FIXED  6       /* Max number of fixed temp attribute sets */
 192
 193 #define NUM_REG_ALARM   7       /* Max number of alarm registers */
 194 #define NUM_REG_BEEP    5       /* Max number of beep registers */
 195
 196 #define NUM_FAN         6
 197
 198 /* Common and NCT6775 specific data */
 199
 200 /* Voltage min/max registers for nr=7..14 are in bank 5 */
 201
 202 static const u16 NCT6775_REG_IN_MAX[] = {
 203         0x2b, 0x2d, 0x2f, 0x31, 0x33, 0x35, 0x37, 0x554, 0x556, 0x558, 0x55a,
 204         0x55c, 0x55e, 0x560, 0x562 };
 205 static const u16 NCT6775_REG_IN_MIN[] = {
 206         0x2c, 0x2e, 0x30, 0x32, 0x34, 0x36, 0x38, 0x555, 0x557, 0x559, 0x55b,
 207         0x55d, 0x55f, 0x561, 0x563 };
 208 static const u16 NCT6775_REG_IN[] = {
 209         0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x550, 0x551, 0x552
 210 };
 211
 212 #define NCT6775_REG_VBAT                0x5D
 213 #define NCT6775_REG_DIODE               0x5E
 214 #define NCT6775_DIODE_MASK              0x02
 215
 216 #define NCT6775_REG_FANDIV1             0x506
 217 #define NCT6775_REG_FANDIV2             0x507
 218
 219 #define NCT6775_REG_CR_FAN_DEBOUNCE     0xf0
 220
 221 static const u16 NCT6775_REG_ALARM[NUM_REG_ALARM] = { 0x459, 0x45A, 0x45B };
 222
 223 /* 0..15 voltages, 16..23 fans, 24..29 temperatures, 30..31 intrusion */
 224
 225 static const s8 NCT6775_ALARM_BITS[] = {
 226         0, 1, 2, 3, 8, 21, 20, 16,      /* in0.. in7 */
 227         17, -1, -1, -1, -1, -1, -1,     /* in8..in14 */
 228         -1,                             /* unused */
 229         6, 7, 11, -1, -1,               /* fan1..fan5 */
 230         -1, -1, -1,                     /* unused */
 231         4, 5, 13, -1, -1, -1,           /* temp1..temp6 */
 232         12, -1 };                       /* intrusion0, intrusion1 */
 233
 234 #define FAN_ALARM_BASE          16
 235 #define TEMP_ALARM_BASE         24
 236 #define INTRUSION_ALARM_BASE    30
 237
 238 static const u16 NCT6775_REG_BEEP[NUM_REG_BEEP] = { 0x56, 0x57, 0x453, 0x4e };
 239
 240 /*
 241  * 0..14 voltages, 15 global beep enable, 16..23 fans, 24..29 temperatures,
 242  * 30..31 intrusion
 243  */
 244 static const s8 NCT6775_BEEP_BITS[] = {
 245         0, 1, 2, 3, 8, 9, 10, 16,       /* in0.. in7 */
 246         17, -1, -1, -1, -1, -1, -1,     /* in8..in14 */
 247         21,                             /* global beep enable */
 248         6, 7, 11, 28, -1,               /* fan1..fan5 */
 249         -1, -1, -1,                     /* unused */
 250         4, 5, 13, -1, -1, -1,           /* temp1..temp6 */
 251         12, -1 };                       /* intrusion0, intrusion1 */
 252
 253 #define BEEP_ENABLE_BASE                15
 254
 255 static const u8 NCT6775_REG_CR_CASEOPEN_CLR[] = { 0xe6, 0xee };
 256 static const u8 NCT6775_CR_CASEOPEN_CLR_MASK[] = { 0x20, 0x01 };
 257
 258 /* DC or PWM output fan configuration */
 259 static const u8 NCT6775_REG_PWM_MODE[] = { 0x04, 0x04, 0x12 };
 260 static const u8 NCT6775_PWM_MODE_MASK[] = { 0x01, 0x02, 0x01 };
 261
 262 /* Advanced Fan control, some values are common for all fans */
 263
 264 static const u16 NCT6775_REG_TARGET[] = {
 265         0x101, 0x201, 0x301, 0x801, 0x901, 0xa01 };
 266 static const u16 NCT6775_REG_FAN_MODE[] = {
 267         0x102, 0x202, 0x302, 0x802, 0x902, 0xa02 };
 268 static const u16 NCT6775_REG_FAN_STEP_DOWN_TIME[] = {
 269         0x103, 0x203, 0x303, 0x803, 0x903, 0xa03 };
 270 static const u16 NCT6775_REG_FAN_STEP_UP_TIME[] = {
 271         0x104, 0x204, 0x304, 0x804, 0x904, 0xa04 };
 272 static const u16 NCT6775_REG_FAN_STOP_OUTPUT[] = {
 273         0x105, 0x205, 0x305, 0x805, 0x905, 0xa05 };
 274 static const u16 NCT6775_REG_FAN_START_OUTPUT[] = {
 275         0x106, 0x206, 0x306, 0x806, 0x906, 0xa06 };
 276 static const u16 NCT6775_REG_FAN_MAX_OUTPUT[] = { 0x10a, 0x20a, 0x30a };
 277 static const u16 NCT6775_REG_FAN_STEP_OUTPUT[] = { 0x10b, 0x20b, 0x30b };
 278
 279 static const u16 NCT6775_REG_FAN_STOP_TIME[] = {
 280         0x107, 0x207, 0x307, 0x807, 0x907, 0xa07 };
 281 static const u16 NCT6775_REG_PWM[] = {
 282         0x109, 0x209, 0x309, 0x809, 0x909, 0xa09 };
 283 static const u16 NCT6775_REG_PWM_READ[] = {
 284         0x01, 0x03, 0x11, 0x13, 0x15, 0xa09 };
 285
 286 static const u16 NCT6775_REG_FAN[] = { 0x630, 0x632, 0x634, 0x636, 0x638 };
 287 static const u16 NCT6775_REG_FAN_MIN[] = { 0x3b, 0x3c, 0x3d };
 288 static const u16 NCT6775_REG_FAN_PULSES[] = { 0x641, 0x642, 0x643, 0x644, 0 };
 289 static const u16 NCT6775_FAN_PULSE_SHIFT[] = { 0, 0, 0, 0, 0, 0 };
 290
 291 static const u16 NCT6775_REG_TEMP[] = {
 292         0x27, 0x150, 0x250, 0x62b, 0x62c, 0x62d };
 293
 294 static const u16 NCT6775_REG_TEMP_MON[] = { 0x73, 0x75, 0x77 };
 295
 296 static const u16 NCT6775_REG_TEMP_CONFIG[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
 297         0, 0x152, 0x252, 0x628, 0x629, 0x62A };
 298 static const u16 NCT6775_REG_TEMP_HYST[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
 299         0x3a, 0x153, 0x253, 0x673, 0x678, 0x67D };
 300 static const u16 NCT6775_REG_TEMP_OVER[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
 301         0x39, 0x155, 0x255, 0x672, 0x677, 0x67C };
 302
 303 static const u16 NCT6775_REG_TEMP_SOURCE[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
 304         0x621, 0x622, 0x623, 0x624, 0x625, 0x626 };
 305
 306 static const u16 NCT6775_REG_TEMP_SEL[] = {
 307         0x100, 0x200, 0x300, 0x800, 0x900, 0xa00 };
 308
 309 static const u16 NCT6775_REG_WEIGHT_TEMP_SEL[] = {
 310         0x139, 0x239, 0x339, 0x839, 0x939, 0xa39 };
 311 static const u16 NCT6775_REG_WEIGHT_TEMP_STEP[] = {
 312         0x13a, 0x23a, 0x33a, 0x83a, 0x93a, 0xa3a };
 313 static const u16 NCT6775_REG_WEIGHT_TEMP_STEP_TOL[] = {
 314         0x13b, 0x23b, 0x33b, 0x83b, 0x93b, 0xa3b };
 315 static const u16 NCT6775_REG_WEIGHT_DUTY_STEP[] = {
 316         0x13c, 0x23c, 0x33c, 0x83c, 0x93c, 0xa3c };
 317 static const u16 NCT6775_REG_WEIGHT_TEMP_BASE[] = {
 318         0x13d, 0x23d, 0x33d, 0x83d, 0x93d, 0xa3d };
 319
 320 static const u16 NCT6775_REG_TEMP_OFFSET[] = { 0x454, 0x455, 0x456 };
 321
 322 static const u16 NCT6775_REG_AUTO_TEMP[] = {
 323         0x121, 0x221, 0x321, 0x821, 0x921, 0xa21 };
 324 static const u16 NCT6775_REG_AUTO_PWM[] = {
 325         0x127, 0x227, 0x327, 0x827, 0x927, 0xa27 };
 326
 327 #define NCT6775_AUTO_TEMP(data, nr, p)  ((data)->REG_AUTO_TEMP[nr] + (p))
 328 #define NCT6775_AUTO_PWM(data, nr, p)   ((data)->REG_AUTO_PWM[nr] + (p))
 329
 330 static const u16 NCT6775_REG_CRITICAL_ENAB[] = { 0x134, 0x234, 0x334 };
 331
 332 static const u16 NCT6775_REG_CRITICAL_TEMP[] = {
 333         0x135, 0x235, 0x335, 0x835, 0x935, 0xa35 };
 334 static const u16 NCT6775_REG_CRITICAL_TEMP_TOLERANCE[] = {
 335         0x138, 0x238, 0x338, 0x838, 0x938, 0xa38 };
 336
 337 static const char *const nct6775_temp_label[] = {
 338         "",
 339         "SYSTIN",
 340         "CPUTIN",
 341         "AUXTIN",
 342         "AMD SB-TSI",
 343         "PECI Agent 0",
 344         "PECI Agent 1",
 345         "PECI Agent 2",
 346         "PECI Agent 3",
 347         "PECI Agent 4",
 348         "PECI Agent 5",
 349         "PECI Agent 6",
 350         "PECI Agent 7",
 351         "PCH_CHIP_CPU_MAX_TEMP",
 352         "PCH_CHIP_TEMP",
 353         "PCH_CPU_TEMP",
 354         "PCH_MCH_TEMP",
 355         "PCH_DIM0_TEMP",
 356         "PCH_DIM1_TEMP",
 357         "PCH_DIM2_TEMP",
 358         "PCH_DIM3_TEMP"
 359 };
 360
 361 static const u16 NCT6775_REG_TEMP_ALTERNATE[ARRAY_SIZE(nct6775_temp_label) - 1]
 362         = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x661, 0x662, 0x664 };
 363
 364 static const u16 NCT6775_REG_TEMP_CRIT[ARRAY_SIZE(nct6775_temp_label) - 1]
 365         = { 0, 0, 0, 0, 0xa00, 0xa01, 0xa02, 0xa03, 0xa04, 0xa05, 0xa06,
 366             0xa07 };
 367
 368 /* NCT6776 specific data */
 369
 370 /* STEP_UP_TIME and STEP_DOWN_TIME regs are swapped for all chips but NCT6775 */
 371 #define NCT6776_REG_FAN_STEP_UP_TIME NCT6775_REG_FAN_STEP_DOWN_TIME
 372 #define NCT6776_REG_FAN_STEP_DOWN_TIME NCT6775_REG_FAN_STEP_UP_TIME
 373
 374 static const s8 NCT6776_ALARM_BITS[] = {
 375         0, 1, 2, 3, 8, 21, 20, 16,      /* in0.. in7 */
 376         17, -1, -1, -1, -1, -1, -1,     /* in8..in14 */
 377         -1,                             /* unused */
 378         6, 7, 11, 10, 23,               /* fan1..fan5 */
 379         -1, -1, -1,                     /* unused */
 380         4, 5, 13, -1, -1, -1,           /* temp1..temp6 */
 381         12, 9 };                        /* intrusion0, intrusion1 */
 382
 383 static const u16 NCT6776_REG_BEEP[NUM_REG_BEEP] = { 0xb2, 0xb3, 0xb4, 0xb5 };
 384
 385 static const s8 NCT6776_BEEP_BITS[] = {
 386         0, 1, 2, 3, 4, 5, 6, 7,         /* in0.. in7 */
 387         8, -1, -1, -1, -1, -1, -1,      /* in8..in14 */
 388         24,                             /* global beep enable */
 389         25, 26, 27, 28, 29,             /* fan1..fan5 */
 390         -1, -1, -1,                     /* unused */
 391         16, 17, 18, 19, 20, 21,         /* temp1..temp6 */
 392         30, 31 };                       /* intrusion0, intrusion1 */
 393
 394 static const u16 NCT6776_REG_TOLERANCE_H[] = {
 395         0x10c, 0x20c, 0x30c, 0x80c, 0x90c, 0xa0c };
 396
 397 static const u8 NCT6776_REG_PWM_MODE[] = { 0x04, 0, 0, 0, 0, 0 };
 398 static const u8 NCT6776_PWM_MODE_MASK[] = { 0x01, 0, 0, 0, 0, 0 };
 399
 400 static const u16 NCT6776_REG_FAN_MIN[] = { 0x63a, 0x63c, 0x63e, 0x640, 0x642 };
 401 static const u16 NCT6776_REG_FAN_PULSES[] = { 0x644, 0x645, 0x646, 0, 0 };
 402
 403 static const u16 NCT6776_REG_WEIGHT_DUTY_BASE[] = {
 404         0x13e, 0x23e, 0x33e, 0x83e, 0x93e, 0xa3e };
 405
 406 static const u16 NCT6776_REG_TEMP_CONFIG[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
 407         0x18, 0x152, 0x252, 0x628, 0x629, 0x62A };
 408
 409 static const char *const nct6776_temp_label[] = {
 410         "",
 411         "SYSTIN",
 412         "CPUTIN",
 413         "AUXTIN",
 414         "SMBUSMASTER 0",
 415         "SMBUSMASTER 1",
 416         "SMBUSMASTER 2",
 417         "SMBUSMASTER 3",
 418         "SMBUSMASTER 4",
 419         "SMBUSMASTER 5",
 420         "SMBUSMASTER 6",
 421         "SMBUSMASTER 7",
 422         "PECI Agent 0",
 423         "PECI Agent 1",
 424         "PCH_CHIP_CPU_MAX_TEMP",
 425         "PCH_CHIP_TEMP",
 426         "PCH_CPU_TEMP",
 427         "PCH_MCH_TEMP",
 428         "PCH_DIM0_TEMP",
 429         "PCH_DIM1_TEMP",
 430         "PCH_DIM2_TEMP",
 431         "PCH_DIM3_TEMP",
 432         "BYTE_TEMP"
 433 };
 434
 435 static const u16 NCT6776_REG_TEMP_ALTERNATE[ARRAY_SIZE(nct6776_temp_label) - 1]
 436         = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x401, 0x402, 0x404 };
 437
 438 static const u16 NCT6776_REG_TEMP_CRIT[ARRAY_SIZE(nct6776_temp_label) - 1]
 439         = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x709, 0x70a };
 440
 441 /* NCT6779 specific data */
 442
 443 static const u16 NCT6779_REG_IN[] = {
 444         0x480, 0x481, 0x482, 0x483, 0x484, 0x485, 0x486, 0x487,
 445         0x488, 0x489, 0x48a, 0x48b, 0x48c, 0x48d, 0x48e };
 446
 447 static const u16 NCT6779_REG_ALARM[NUM_REG_ALARM] = {
 448         0x459, 0x45A, 0x45B, 0x568 };
 449
 450 static const s8 NCT6779_ALARM_BITS[] = {
 451         0, 1, 2, 3, 8, 21, 20, 16,      /* in0.. in7 */
 452         17, 24, 25, 26, 27, 28, 29,     /* in8..in14 */
 453         -1,                             /* unused */
 454         6, 7, 11, 10, 23,               /* fan1..fan5 */
 455         -1, -1, -1,                     /* unused */
 456         4, 5, 13, -1, -1, -1,           /* temp1..temp6 */
 457         12, 9 };                        /* intrusion0, intrusion1 */
 458
 459 static const s8 NCT6779_BEEP_BITS[] = {
 460         0, 1, 2, 3, 4, 5, 6, 7,         /* in0.. in7 */
 461         8, 9, 10, 11, 12, 13, 14,       /* in8..in14 */
 462         24,                             /* global beep enable */
 463         25, 26, 27, 28, 29,             /* fan1..fan5 */
 464         -1, -1, -1,                     /* unused */
 465         16, 17, -1, -1, -1, -1,         /* temp1..temp6 */
 466         30, 31 };                       /* intrusion0, intrusion1 */
 467
 468 static const u16 NCT6779_REG_FAN[] = {
 469         0x4b0, 0x4b2, 0x4b4, 0x4b6, 0x4b8, 0x4ba };
 470 static const u16 NCT6779_REG_FAN_PULSES[] = {
 471         0x644, 0x645, 0x646, 0x647, 0x648, 0x649 };
 472
 473 static const u16 NCT6779_REG_CRITICAL_PWM_ENABLE[] = {
 474         0x136, 0x236, 0x336, 0x836, 0x936, 0xa36 };
 475 #define NCT6779_CRITICAL_PWM_ENABLE_MASK        0x01
 476 static const u16 NCT6779_REG_CRITICAL_PWM[] = {
 477         0x137, 0x237, 0x337, 0x837, 0x937, 0xa37 };
 478
 479 static const u16 NCT6779_REG_TEMP[] = { 0x27, 0x150 };
 480 static const u16 NCT6779_REG_TEMP_MON[] = { 0x73, 0x75, 0x77, 0x79, 0x7b };
 481 static const u16 NCT6779_REG_TEMP_CONFIG[ARRAY_SIZE(NCT6779_REG_TEMP)] = {
 482         0x18, 0x152 };
 483 static const u16 NCT6779_REG_TEMP_HYST[ARRAY_SIZE(NCT6779_REG_TEMP)] = {
 484         0x3a, 0x153 };
 485 static const u16 NCT6779_REG_TEMP_OVER[ARRAY_SIZE(NCT6779_REG_TEMP)] = {
 486         0x39, 0x155 };
 487
 488 static const u16 NCT6779_REG_TEMP_OFFSET[] = {
 489         0x454, 0x455, 0x456, 0x44a, 0x44b, 0x44c };
 490
 491 static const char *const nct6779_temp_label[] = {
 492         "",
 493         "SYSTIN",
 494         "CPUTIN",
 495         "AUXTIN0",
 496         "AUXTIN1",
 497         "AUXTIN2",
 498         "AUXTIN3",
 499         "",
 500         "SMBUSMASTER 0",
 501         "SMBUSMASTER 1",
 502         "SMBUSMASTER 2",
 503         "SMBUSMASTER 3",
 504         "SMBUSMASTER 4",
 505         "SMBUSMASTER 5",
 506         "SMBUSMASTER 6",
 507         "SMBUSMASTER 7",
 508         "PECI Agent 0",
 509         "PECI Agent 1",
 510         "PCH_CHIP_CPU_MAX_TEMP",
 511         "PCH_CHIP_TEMP",
 512         "PCH_CPU_TEMP",
 513         "PCH_MCH_TEMP",
 514         "PCH_DIM0_TEMP",
 515         "PCH_DIM1_TEMP",
 516         "PCH_DIM2_TEMP",
 517         "PCH_DIM3_TEMP",
 518         "BYTE_TEMP",
 519         "",
 520         "",
 521         "",
 522         "",
 523         "Virtual_TEMP"
 524 };
 525
 526 #define NCT6779_NUM_LABELS      (ARRAY_SIZE(nct6779_temp_label) - 5)
 527 #define NCT6791_NUM_LABELS      ARRAY_SIZE(nct6779_temp_label)
 528
 529 static const u16 NCT6779_REG_TEMP_ALTERNATE[NCT6791_NUM_LABELS - 1]
 530         = { 0x490, 0x491, 0x492, 0x493, 0x494, 0x495, 0, 0,
 531             0, 0, 0, 0, 0, 0, 0, 0,
 532             0, 0x400, 0x401, 0x402, 0x404, 0x405, 0x406, 0x407,
 533             0x408, 0 };
 534
 535 static const u16 NCT6779_REG_TEMP_CRIT[NCT6791_NUM_LABELS - 1]
 536         = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x709, 0x70a };
 537
 538 /* NCT6791 specific data */
 539
 540 #define NCT6791_REG_HM_IO_SPACE_LOCK_ENABLE     0x28
 541
 542 static const u16 NCT6791_REG_WEIGHT_TEMP_SEL[6] = { 0, 0x239 };
 543 static const u16 NCT6791_REG_WEIGHT_TEMP_STEP[6] = { 0, 0x23a };
 544 static const u16 NCT6791_REG_WEIGHT_TEMP_STEP_TOL[6] = { 0, 0x23b };
 545 static const u16 NCT6791_REG_WEIGHT_DUTY_STEP[6] = { 0, 0x23c };
 546 static const u16 NCT6791_REG_WEIGHT_TEMP_BASE[6] = { 0, 0x23d };
 547 static const u16 NCT6791_REG_WEIGHT_DUTY_BASE[6] = { 0, 0x23e };
 548
 549 static const u16 NCT6791_REG_ALARM[NUM_REG_ALARM] = {
 550         0x459, 0x45A, 0x45B, 0x568, 0x45D };
 551
 552 static const s8 NCT6791_ALARM_BITS[] = {
 553         0, 1, 2, 3, 8, 21, 20, 16,      /* in0.. in7 */
 554         17, 24, 25, 26, 27, 28, 29,     /* in8..in14 */
 555         -1,                             /* unused */
 556         6, 7, 11, 10, 23, 33,           /* fan1..fan6 */
 557         -1, -1,                         /* unused */
 558         4, 5, 13, -1, -1, -1,           /* temp1..temp6 */
 559         12, 9 };                        /* intrusion0, intrusion1 */
 560
 561 /* NCT6792/NCT6793 specific data */
 562
 563 static const u16 NCT6792_REG_TEMP_MON[] = {
 564         0x73, 0x75, 0x77, 0x79, 0x7b, 0x7d };
 565 static const u16 NCT6792_REG_BEEP[NUM_REG_BEEP] = {
 566         0xb2, 0xb3, 0xb4, 0xb5, 0xbf };
 567
 568 static const char *const nct6792_temp_label[] = {
 569         "",
 570         "SYSTIN",
 571         "CPUTIN",
 572         "AUXTIN0",
 573         "AUXTIN1",
 574         "AUXTIN2",
 575         "AUXTIN3",
 576         "",
 577         "SMBUSMASTER 0",
 578         "SMBUSMASTER 1",
 579         "SMBUSMASTER 2",
 580         "SMBUSMASTER 3",
 581         "SMBUSMASTER 4",
 582         "SMBUSMASTER 5",
 583         "SMBUSMASTER 6",
 584         "SMBUSMASTER 7",
 585         "PECI Agent 0",
 586         "PECI Agent 1",
 587         "PCH_CHIP_CPU_MAX_TEMP",
 588         "PCH_CHIP_TEMP",
 589         "PCH_CPU_TEMP",
 590         "PCH_MCH_TEMP",
 591         "PCH_DIM0_TEMP",
 592         "PCH_DIM1_TEMP",
 593         "PCH_DIM2_TEMP",
 594         "PCH_DIM3_TEMP",
 595         "BYTE_TEMP",
 596         "PECI Agent 0 Calibration",
 597         "PECI Agent 1 Calibration",
 598         "",
 599         "",
 600         "Virtual_TEMP"
 601 };
 602
 603 static const char *const nct6793_temp_label[] = {
 604         "",
 605         "SYSTIN",
 606         "CPUTIN",
 607         "AUXTIN0",
 608         "AUXTIN1",
 609         "AUXTIN2",
 610         "AUXTIN3",
 611         "",
 612         "SMBUSMASTER 0",
 613         "SMBUSMASTER 1",
 614         "",
 615         "",
 616         "",
 617         "",
 618         "",
 619         "",
 620         "PECI Agent 0",
 621         "PECI Agent 1",
 622         "PCH_CHIP_CPU_MAX_TEMP",
 623         "PCH_CHIP_TEMP",
 624         "PCH_CPU_TEMP",
 625         "PCH_MCH_TEMP",
 626         "Agent0 Dimm0 ",
 627         "Agent0 Dimm1",
 628         "Agent1 Dimm0",
 629         "Agent1 Dimm1",
 630         "BYTE_TEMP0",
 631         "BYTE_TEMP1",
 632         "PECI Agent 0 Calibration",
 633         "PECI Agent 1 Calibration",
 634         "",
 635         "Virtual_TEMP"
 636 };
 637
 638 /* NCT6102D/NCT6106D specific data */
 639
 640 #define NCT6106_REG_VBAT        0x318
 641 #define NCT6106_REG_DIODE       0x319
 642 #define NCT6106_DIODE_MASK      0x01
 643
 644 static const u16 NCT6106_REG_IN_MAX[] = {
 645         0x90, 0x92, 0x94, 0x96, 0x98, 0x9a, 0x9e, 0xa0, 0xa2 };
 646 static const u16 NCT6106_REG_IN_MIN[] = {
 647         0x91, 0x93, 0x95, 0x97, 0x99, 0x9b, 0x9f, 0xa1, 0xa3 };
 648 static const u16 NCT6106_REG_IN[] = {
 649         0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x07, 0x08, 0x09 };
 650
 651 static const u16 NCT6106_REG_TEMP[] = { 0x10, 0x11, 0x12, 0x13, 0x14, 0x15 };
 652 static const u16 NCT6106_REG_TEMP_MON[] = { 0x18, 0x19, 0x1a };
 653 static const u16 NCT6106_REG_TEMP_HYST[] = {
 654         0xc3, 0xc7, 0xcb, 0xcf, 0xd3, 0xd7 };
 655 static const u16 NCT6106_REG_TEMP_OVER[] = {
 656         0xc2, 0xc6, 0xca, 0xce, 0xd2, 0xd6 };
 657 static const u16 NCT6106_REG_TEMP_CRIT_L[] = {
 658         0xc0, 0xc4, 0xc8, 0xcc, 0xd0, 0xd4 };
 659 static const u16 NCT6106_REG_TEMP_CRIT_H[] = {
 660         0xc1, 0xc5, 0xc9, 0xcf, 0xd1, 0xd5 };
 661 static const u16 NCT6106_REG_TEMP_OFFSET[] = { 0x311, 0x312, 0x313 };
 662 static const u16 NCT6106_REG_TEMP_CONFIG[] = {
 663         0xb7, 0xb8, 0xb9, 0xba, 0xbb, 0xbc };
 664
 665 static const u16 NCT6106_REG_FAN[] = { 0x20, 0x22, 0x24 };
 666 static const u16 NCT6106_REG_FAN_MIN[] = { 0xe0, 0xe2, 0xe4 };
 667 static const u16 NCT6106_REG_FAN_PULSES[] = { 0xf6, 0xf6, 0xf6, 0, 0 };
 668 static const u16 NCT6106_FAN_PULSE_SHIFT[] = { 0, 2, 4, 0, 0 };
 669
 670 static const u8 NCT6106_REG_PWM_MODE[] = { 0xf3, 0xf3, 0xf3 };
 671 static const u8 NCT6106_PWM_MODE_MASK[] = { 0x01, 0x02, 0x04 };
 672 static const u16 NCT6106_REG_PWM[] = { 0x119, 0x129, 0x139 };
 673 static const u16 NCT6106_REG_PWM_READ[] = { 0x4a, 0x4b, 0x4c };
 674 static const u16 NCT6106_REG_FAN_MODE[] = { 0x113, 0x123, 0x133 };
 675 static const u16 NCT6106_REG_TEMP_SEL[] = { 0x110, 0x120, 0x130 };
 676 static const u16 NCT6106_REG_TEMP_SOURCE[] = {
 677         0xb0, 0xb1, 0xb2, 0xb3, 0xb4, 0xb5 };
 678
 679 static const u16 NCT6106_REG_CRITICAL_TEMP[] = { 0x11a, 0x12a, 0x13a };
 680 static const u16 NCT6106_REG_CRITICAL_TEMP_TOLERANCE[] = {
 681         0x11b, 0x12b, 0x13b };
 682
 683 static const u16 NCT6106_REG_CRITICAL_PWM_ENABLE[] = { 0x11c, 0x12c, 0x13c };
 684 #define NCT6106_CRITICAL_PWM_ENABLE_MASK        0x10
 685 static const u16 NCT6106_REG_CRITICAL_PWM[] = { 0x11d, 0x12d, 0x13d };
 686
 687 static const u16 NCT6106_REG_FAN_STEP_UP_TIME[] = { 0x114, 0x124, 0x134 };
 688 static const u16 NCT6106_REG_FAN_STEP_DOWN_TIME[] = { 0x115, 0x125, 0x135 };
 689 static const u16 NCT6106_REG_FAN_STOP_OUTPUT[] = { 0x116, 0x126, 0x136 };
 690 static const u16 NCT6106_REG_FAN_START_OUTPUT[] = { 0x117, 0x127, 0x137 };
 691 static const u16 NCT6106_REG_FAN_STOP_TIME[] = { 0x118, 0x128, 0x138 };
 692 static const u16 NCT6106_REG_TOLERANCE_H[] = { 0x112, 0x122, 0x132 };
 693
 694 static const u16 NCT6106_REG_TARGET[] = { 0x111, 0x121, 0x131 };
 695
 696 static const u16 NCT6106_REG_WEIGHT_TEMP_SEL[] = { 0x168, 0x178, 0x188 };
 697 static const u16 NCT6106_REG_WEIGHT_TEMP_STEP[] = { 0x169, 0x179, 0x189 };
 698 static const u16 NCT6106_REG_WEIGHT_TEMP_STEP_TOL[] = { 0x16a, 0x17a, 0x18a };
 699 static const u16 NCT6106_REG_WEIGHT_DUTY_STEP[] = { 0x16b, 0x17b, 0x17c };
 700 static const u16 NCT6106_REG_WEIGHT_TEMP_BASE[] = { 0x16c, 0x17c, 0x18c };
 701 static const u16 NCT6106_REG_WEIGHT_DUTY_BASE[] = { 0x16d, 0x17d, 0x18d };
 702
 703 static const u16 NCT6106_REG_AUTO_TEMP[] = { 0x160, 0x170, 0x180 };
 704 static const u16 NCT6106_REG_AUTO_PWM[] = { 0x164, 0x174, 0x184 };
 705
 706 static const u16 NCT6106_REG_ALARM[NUM_REG_ALARM] = {
 707         0x77, 0x78, 0x79, 0x7a, 0x7b, 0x7c, 0x7d };
 708
 709 static const s8 NCT6106_ALARM_BITS[] = {
 710         0, 1, 2, 3, 4, 5, 7, 8,         /* in0.. in7 */
 711         9, -1, -1, -1, -1, -1, -1,      /* in8..in14 */
 712         -1,                             /* unused */
 713         32, 33, 34, -1, -1,             /* fan1..fan5 */
 714         -1, -1, -1,                     /* unused */
 715         16, 17, 18, 19, 20, 21,         /* temp1..temp6 */
 716         48, -1                          /* intrusion0, intrusion1 */
 717 };
 718
 719 static const u16 NCT6106_REG_BEEP[NUM_REG_BEEP] = {
 720         0x3c0, 0x3c1, 0x3c2, 0x3c3, 0x3c4 };
 721
 722 static const s8 NCT6106_BEEP_BITS[] = {
 723         0, 1, 2, 3, 4, 5, 7, 8,         /* in0.. in7 */
 724         9, 10, 11, 12, -1, -1, -1,      /* in8..in14 */
 725         32,                             /* global beep enable */
 726         24, 25, 26, 27, 28,             /* fan1..fan5 */
 727         -1, -1, -1,                     /* unused */
 728         16, 17, 18, 19, 20, 21,         /* temp1..temp6 */
 729         34, -1                          /* intrusion0, intrusion1 */
 730 };
 731
 732 static const u16 NCT6106_REG_TEMP_ALTERNATE[ARRAY_SIZE(nct6776_temp_label) - 1]
 733         = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x51, 0x52, 0x54 };
 734
 735 static const u16 NCT6106_REG_TEMP_CRIT[ARRAY_SIZE(nct6776_temp_label) - 1]
 736         = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x204, 0x205 };
 737
 738 static enum pwm_enable reg_to_pwm_enable(int pwm, int mode)
 739 {
 740         if (mode == 0 && pwm == 255)
 741                 return off;
 742         return mode + 1;
 743 }
 744
 745 static int pwm_enable_to_reg(enum pwm_enable mode)
 746 {
 747         if (mode == off)
 748                 return 0;
 749         return mode - 1;
 750 }
 751
 752 /*
 753  * Conversions
 754  */
 755
 756 /* 1 is DC mode, output in ms */
 757 static unsigned int step_time_from_reg(u8 reg, u8 mode)
 758 {
 759         return mode ? 400 * reg : 100 * reg;
 760 }
 761
 762 static u8 step_time_to_reg(unsigned int msec, u8 mode)
 763 {
 764         return clamp_val((mode ? (msec + 200) / 400 :
 765                                         (msec + 50) / 100), 1, 255);
 766 }
 767
 768 static unsigned int fan_from_reg8(u16 reg, unsigned int divreg)
 769 {
 770         if (reg == 0 || reg == 255)
 771                 return 0;
 772         return 1350000U / (reg << divreg);
 773 }
 774
 775 static unsigned int fan_from_reg13(u16 reg, unsigned int divreg)
 776 {
 777         if ((reg & 0xff1f) == 0xff1f)
 778                 return 0;
 779
 780         reg = (reg & 0x1f) | ((reg & 0xff00) >> 3);
 781
 782         if (reg == 0)
 783                 return 0;
 784
 785         return 1350000U / reg;
 786 }
 787
 788 static unsigned int fan_from_reg16(u16 reg, unsigned int divreg)
 789 {
 790         if (reg == 0 || reg == 0xffff)
 791                 return 0;
 792
 793         /*
 794          * Even though the registers are 16 bit wide, the fan divisor
 795          * still applies.
 796          */
 797         return 1350000U / (reg << divreg);
 798 }
 799
 800 static u16 fan_to_reg(u32 fan, unsigned int divreg)
 801 {
 802         if (!fan)
 803                 return 0;
 804
 805         return (1350000U / fan) >> divreg;
 806 }
 807
 808 static inline unsigned int
 809 div_from_reg(u8 reg)
 810 {
 811         return 1 << reg;
 812 }
 813
 814 /*
 815  * Some of the voltage inputs have internal scaling, the tables below
 816  * contain 8 (the ADC LSB in mV) * scaling factor * 100
 817  */
 818 static const u16 scale_in[15] = {
 819         800, 800, 1600, 1600, 800, 800, 800, 1600, 1600, 800, 800, 800, 800,
 820         800, 800
 821 };
 822
 823 static inline long in_from_reg(u8 reg, u8 nr)
 824 {
 825         return DIV_ROUND_CLOSEST(reg * scale_in[nr], 100);
 826 }
 827
 828 static inline u8 in_to_reg(u32 val, u8 nr)
 829 {
 830         return clamp_val(DIV_ROUND_CLOSEST(val * 100, scale_in[nr]), 0, 255);
 831 }
 832
 833 /*
 834  * Data structures and manipulation thereof
 835  */
 836
 837 struct nct6775_data {
 838         int addr;       /* IO base of hw monitor block */
 839         int sioreg;     /* SIO register address */
 840         enum kinds kind;
 841         const char *name;
 842
 843         const struct attribute_group *groups[6];
 844
 845         u16 reg_temp[5][NUM_TEMP]; /* 0=temp, 1=temp_over, 2=temp_hyst,
 846                                     * 3=temp_crit, 4=temp_lcrit
 847                                     */
 848         u8 temp_src[NUM_TEMP];
 849         u16 reg_temp_config[NUM_TEMP];
 850         const char * const *temp_label;
 851         int temp_label_num;
 852
 853         u16 REG_CONFIG;
 854         u16 REG_VBAT;
 855         u16 REG_DIODE;
 856         u8 DIODE_MASK;
 857
 858         const s8 *ALARM_BITS;
 859         const s8 *BEEP_BITS;
 860
 861         const u16 *REG_VIN;
 862         const u16 *REG_IN_MINMAX[2];
 863
 864         const u16 *REG_TARGET;
 865         const u16 *REG_FAN;
 866         const u16 *REG_FAN_MODE;
 867         const u16 *REG_FAN_MIN;
 868         const u16 *REG_FAN_PULSES;
 869         const u16 *FAN_PULSE_SHIFT;
 870         const u16 *REG_FAN_TIME[3];
 871
 872         const u16 *REG_TOLERANCE_H;
 873
 874         const u8 *REG_PWM_MODE;
 875         const u8 *PWM_MODE_MASK;
 876
 877         const u16 *REG_PWM[7];  /* [0]=pwm, [1]=pwm_start, [2]=pwm_floor,
 878                                  * [3]=pwm_max, [4]=pwm_step,
 879                                  * [5]=weight_duty_step, [6]=weight_duty_base
 880                                  */
 881         const u16 *REG_PWM_READ;
 882
 883         const u16 *REG_CRITICAL_PWM_ENABLE;
 884         u8 CRITICAL_PWM_ENABLE_MASK;
 885         const u16 *REG_CRITICAL_PWM;
 886
 887         const u16 *REG_AUTO_TEMP;
 888         const u16 *REG_AUTO_PWM;
 889
 890         const u16 *REG_CRITICAL_TEMP;
 891         const u16 *REG_CRITICAL_TEMP_TOLERANCE;
 892
 893         const u16 *REG_TEMP_SOURCE;     /* temp register sources */
 894         const u16 *REG_TEMP_SEL;
 895         const u16 *REG_WEIGHT_TEMP_SEL;
 896         const u16 *REG_WEIGHT_TEMP[3];  /* 0=base, 1=tolerance, 2=step */
 897
 898         const u16 *REG_TEMP_OFFSET;
 899
 900         const u16 *REG_ALARM;
 901         const u16 *REG_BEEP;
 902
 903         unsigned int (*fan_from_reg)(u16 reg, unsigned int divreg);
 904         unsigned int (*fan_from_reg_min)(u16 reg, unsigned int divreg);
 905
 906         struct mutex update_lock;
 907         bool valid;             /* true if following fields are valid */
 908         unsigned long last_updated;     /* In jiffies */
 909
 910         /* Register values */
 911         u8 bank;                /* current register bank */
 912         u8 in_num;              /* number of in inputs we have */
 913         u8 in[15][3];           /* [0]=in, [1]=in_max, [2]=in_min */
 914         unsigned int rpm[NUM_FAN];
 915         u16 fan_min[NUM_FAN];
 916         u8 fan_pulses[NUM_FAN];
 917         u8 fan_div[NUM_FAN];
 918         u8 has_pwm;
 919         u8 has_fan;             /* some fan inputs can be disabled */
 920         u8 has_fan_min;         /* some fans don't have min register */
 921         bool has_fan_div;
 922
 923         u8 num_temp_alarms;     /* 2, 3, or 6 */
 924         u8 num_temp_beeps;      /* 2, 3, or 6 */
 925         u8 temp_fixed_num;      /* 3 or 6 */
 926         u8 temp_type[NUM_TEMP_FIXED];
 927         s8 temp_offset[NUM_TEMP_FIXED];
 928         s16 temp[5][NUM_TEMP]; /* 0=temp, 1=temp_over, 2=temp_hyst,
 929                                 * 3=temp_crit, 4=temp_lcrit */
 930         u64 alarms;
 931         u64 beeps;
 932
 933         u8 pwm_num;     /* number of pwm */
 934         u8 pwm_mode[NUM_FAN];   /* 1->DC variable voltage,
 935                                  * 0->PWM variable duty cycle
 936                                  */
 937         enum pwm_enable pwm_enable[NUM_FAN];
 938                         /* 0->off
 939                          * 1->manual
 940                          * 2->thermal cruise mode (also called SmartFan I)
 941                          * 3->fan speed cruise mode
 942                          * 4->SmartFan III
 943                          * 5->enhanced variable thermal cruise (SmartFan IV)
 944                          */
 945         u8 pwm[7][NUM_FAN];     /* [0]=pwm, [1]=pwm_start, [2]=pwm_floor,
 946                                  * [3]=pwm_max, [4]=pwm_step,
 947                                  * [5]=weight_duty_step, [6]=weight_duty_base
 948                                  */
 949
 950         u8 target_temp[NUM_FAN];
 951         u8 target_temp_mask;
 952         u32 target_speed[NUM_FAN];
 953         u32 target_speed_tolerance[NUM_FAN];
 954         u8 speed_tolerance_limit;
 955
 956         u8 temp_tolerance[2][NUM_FAN];
 957         u8 tolerance_mask;
 958
 959         u8 fan_time[3][NUM_FAN]; /* 0 = stop_time, 1 = step_up, 2 = step_down */
 960
 961         /* Automatic fan speed control registers */
 962         int auto_pwm_num;
 963         u8 auto_pwm[NUM_FAN][7];
 964         u8 auto_temp[NUM_FAN][7];
 965         u8 pwm_temp_sel[NUM_FAN];
 966         u8 pwm_weight_temp_sel[NUM_FAN];
 967         u8 weight_temp[3][NUM_FAN];     /* 0->temp_step, 1->temp_step_tol,
 968                                          * 2->temp_base
 969                                          */
 970
 971         u8 vid;
 972         u8 vrm;
 973
 974         bool have_vid;
 975
 976         u16 have_temp;
 977         u16 have_temp_fixed;
 978         u16 have_in;
 979
 980         /* Remember extra register values over suspend/resume */
 981         u8 vbat;
 982         u8 fandiv1;
 983         u8 fandiv2;
 984         u8 sio_reg_enable;
 985 };
 986
 987 struct nct6775_sio_data {
 988         int sioreg;
 989         enum kinds kind;
 990 };
 991
 992 struct sensor_device_template {
 993         struct device_attribute dev_attr;
 994         union {
 995                 struct {
 996                         u8 nr;
 997                         u8 index;
 998                 } s;
 999                 int index;
1000         } u;
1001         bool s2;        /* true if both index and nr are used */
1002 };
1003
1004 struct sensor_device_attr_u {
1005         union {
1006                 struct sensor_device_attribute a1;
1007                 struct sensor_device_attribute_2 a2;
1008         } u;
1009         char name[32];
1010 };
1011
1012 #define __TEMPLATE_ATTR(_template, _mode, _show, _store) {      \
1013         .attr = {.name = _template, .mode = _mode },            \
1014         .show   = _show,                                        \
1015         .store  = _store,                                       \
1016 }
1017
1018 #define SENSOR_DEVICE_TEMPLATE(_template, _mode, _show, _store, _index) \
1019         { .dev_attr = __TEMPLATE_ATTR(_template, _mode, _show, _store), \
1020           .u.index = _index,                                            \
1021           .s2 = false }
1022
1023 #define SENSOR_DEVICE_TEMPLATE_2(_template, _mode, _show, _store,       \
1024                                  _nr, _index)                           \
1025         { .dev_attr = __TEMPLATE_ATTR(_template, _mode, _show, _store), \
1026           .u.s.index = _index,                                          \
1027           .u.s.nr = _nr,                                                \
1028           .s2 = true }
1029
1030 #define SENSOR_TEMPLATE(_name, _template, _mode, _show, _store, _index) \
1031 static struct sensor_device_template sensor_dev_template_##_name        \
1032         = SENSOR_DEVICE_TEMPLATE(_template, _mode, _show, _store,       \
1033                                  _index)
1034
1035 #define SENSOR_TEMPLATE_2(_name, _template, _mode, _show, _store,       \
1036                           _nr, _index)                                  \
1037 static struct sensor_device_template sensor_dev_template_##_name        \
1038         = SENSOR_DEVICE_TEMPLATE_2(_template, _mode, _show, _store,     \
1039                                  _nr, _index)
1040
1041 struct sensor_template_group {
1042         struct sensor_device_template **templates;
1043         umode_t (*is_visible)(struct kobject *, struct attribute *, int);
1044         int base;
1045 };
1046
1047 static struct attribute_group *
1048 nct6775_create_attr_group(struct device *dev, struct sensor_template_group *tg,
1049                           int repeat)
1050 {
1051         struct attribute_group *group;
1052         struct sensor_device_attr_u *su;
1053         struct sensor_device_attribute *a;
1054         struct sensor_device_attribute_2 *a2;
1055         struct attribute **attrs;
1056         struct sensor_device_template **t;
1057         int i, count;
1058
1059         if (repeat <= 0)
1060                 return ERR_PTR(-EINVAL);
1061
1062         t = tg->templates;
1063         for (count = 0; *t; t++, count++)
1064                 ;
1065
1066         if (count == 0)
1067                 return ERR_PTR(-EINVAL);
1068
1069         group = devm_kzalloc(dev, sizeof(*group), GFP_KERNEL);
1070         if (group == NULL)
1071                 return ERR_PTR(-ENOMEM);
1072
1073         attrs = devm_kzalloc(dev, sizeof(*attrs) * (repeat * count + 1),
1074                              GFP_KERNEL);
1075         if (attrs == NULL)
1076                 return ERR_PTR(-ENOMEM);
1077
1078         su = devm_kzalloc(dev, sizeof(*su) * repeat * count,
1079                                GFP_KERNEL);
1080         if (su == NULL)
1081                 return ERR_PTR(-ENOMEM);
1082
1083         group->attrs = attrs;
1084         group->is_visible = tg->is_visible;
1085
1086         for (i = 0; i < repeat; i++) {
1087                 t = tg->templates;
1088                 while (*t != NULL) {
1089                         snprintf(su->name, sizeof(su->name),
1090                                  (*t)->dev_attr.attr.name, tg->base + i);
1091                         if ((*t)->s2) {
1092                                 a2 = &su->u.a2;
1093                                 sysfs_attr_init(&a2->dev_attr.attr);
1094                                 a2->dev_attr.attr.name = su->name;
1095                                 a2->nr = (*t)->u.s.nr + i;
1096                                 a2->index = (*t)->u.s.index;
1097                                 a2->dev_attr.attr.mode =
1098                                   (*t)->dev_attr.attr.mode;
1099                                 a2->dev_attr.show = (*t)->dev_attr.show;
1100                                 a2->dev_attr.store = (*t)->dev_attr.store;
1101                                 *attrs = &a2->dev_attr.attr;
1102                         } else {
1103                                 a = &su->u.a1;
1104                                 sysfs_attr_init(&a->dev_attr.attr);
1105                                 a->dev_attr.attr.name = su->name;
1106                                 a->index = (*t)->u.index + i;
1107                                 a->dev_attr.attr.mode =
1108                                   (*t)->dev_attr.attr.mode;
1109                                 a->dev_attr.show = (*t)->dev_attr.show;
1110                                 a->dev_attr.store = (*t)->dev_attr.store;
1111                                 *attrs = &a->dev_attr.attr;
1112                         }
1113                         attrs++;
1114                         su++;
1115                         t++;
1116                 }
1117         }
1118
1119         return group;
1120 }
1121
1122 static bool is_word_sized(struct nct6775_data *data, u16 reg)
1123 {
1124         switch (data->kind) {
1125         case nct6106:
1126                 return reg == 0x20 || reg == 0x22 || reg == 0x24 ||
1127                   reg == 0xe0 || reg == 0xe2 || reg == 0xe4 ||
1128                   reg == 0x111 || reg == 0x121 || reg == 0x131;
1129         case nct6775:
1130                 return (((reg & 0xff00) == 0x100 ||
1131                     (reg & 0xff00) == 0x200) &&
1132                    ((reg & 0x00ff) == 0x50 ||
1133                     (reg & 0x00ff) == 0x53 ||
1134                     (reg & 0x00ff) == 0x55)) ||
1135                   (reg & 0xfff0) == 0x630 ||
1136                   reg == 0x640 || reg == 0x642 ||
1137                   reg == 0x662 ||
1138                   ((reg & 0xfff0) == 0x650 && (reg & 0x000f) >= 0x06) ||
1139                   reg == 0x73 || reg == 0x75 || reg == 0x77;
1140         case nct6776:
1141                 return (((reg & 0xff00) == 0x100 ||
1142                     (reg & 0xff00) == 0x200) &&
1143                    ((reg & 0x00ff) == 0x50 ||
1144                     (reg & 0x00ff) == 0x53 ||
1145                     (reg & 0x00ff) == 0x55)) ||
1146                   (reg & 0xfff0) == 0x630 ||
1147                   reg == 0x402 ||
1148                   reg == 0x640 || reg == 0x642 ||
1149                   ((reg & 0xfff0) == 0x650 && (reg & 0x000f) >= 0x06) ||
1150                   reg == 0x73 || reg == 0x75 || reg == 0x77;
1151         case nct6779:
1152         case nct6791:
1153         case nct6792:
1154         case nct6793:
1155                 return reg == 0x150 || reg == 0x153 || reg == 0x155 ||
1156                   ((reg & 0xfff0) == 0x4b0 && (reg & 0x000f) < 0x0b) ||
1157                   reg == 0x402 ||
1158                   reg == 0x63a || reg == 0x63c || reg == 0x63e ||
1159                   reg == 0x640 || reg == 0x642 ||
1160                   reg == 0x73 || reg == 0x75 || reg == 0x77 || reg == 0x79 ||
1161                   reg == 0x7b || reg == 0x7d;
1162         }
1163         return false;
1164 }
1165
1166 /*
1167  * On older chips, only registers 0x50-0x5f are banked.
1168  * On more recent chips, all registers are banked.
1169  * Assume that is the case and set the bank number for each access.
1170  * Cache the bank number so it only needs to be set if it changes.
1171  */
1172 static inline void nct6775_set_bank(struct nct6775_data *data, u16 reg)
1173 {
1174         u8 bank = reg >> 8;
1175
1176         if (data->bank != bank) {
1177                 outb_p(NCT6775_REG_BANK, data->addr + ADDR_REG_OFFSET);
1178                 outb_p(bank, data->addr + DATA_REG_OFFSET);
1179                 data->bank = bank;
1180         }
1181 }
1182
1183 static u16 nct6775_read_value(struct nct6775_data *data, u16 reg)
1184 {
1185         int res, word_sized = is_word_sized(data, reg);
1186
1187         nct6775_set_bank(data, reg);
1188         outb_p(reg & 0xff, data->addr + ADDR_REG_OFFSET);
1189         res = inb_p(data->addr + DATA_REG_OFFSET);
1190         if (word_sized) {
1191                 outb_p((reg & 0xff) + 1,
1192                        data->addr + ADDR_REG_OFFSET);
1193                 res = (res << 8) + inb_p(data->addr + DATA_REG_OFFSET);
1194         }
1195         return res;
1196 }
1197
1198 static int nct6775_write_value(struct nct6775_data *data, u16 reg, u16 value)
1199 {
1200         int word_sized = is_word_sized(data, reg);
1201
1202         nct6775_set_bank(data, reg);
1203         outb_p(reg & 0xff, data->addr + ADDR_REG_OFFSET);
1204         if (word_sized) {
1205                 outb_p(value >> 8, data->addr + DATA_REG_OFFSET);
1206                 outb_p((reg & 0xff) + 1,
1207                        data->addr + ADDR_REG_OFFSET);
1208         }
1209         outb_p(value & 0xff, data->addr + DATA_REG_OFFSET);
1210         return 0;
1211 }
1212
1213 /* We left-align 8-bit temperature values to make the code simpler */
1214 static u16 nct6775_read_temp(struct nct6775_data *data, u16 reg)
1215 {
1216         u16 res;
1217
1218         res = nct6775_read_value(data, reg);
1219         if (!is_word_sized(data, reg))
1220                 res <<= 8;
1221
1222         return res;
1223 }
1224
1225 static int nct6775_write_temp(struct nct6775_data *data, u16 reg, u16 value)
1226 {
1227         if (!is_word_sized(data, reg))
1228                 value >>= 8;
1229         return nct6775_write_value(data, reg, value);
1230 }
1231
1232 /* This function assumes that the caller holds data->update_lock */
1233 static void nct6775_write_fan_div(struct nct6775_data *data, int nr)
1234 {
1235         u8 reg;
1236
1237         switch (nr) {
1238         case 0:
1239                 reg = (nct6775_read_value(data, NCT6775_REG_FANDIV1) & 0x70)
1240                     | (data->fan_div[0] & 0x7);
1241                 nct6775_write_value(data, NCT6775_REG_FANDIV1, reg);
1242                 break;
1243         case 1:
1244                 reg = (nct6775_read_value(data, NCT6775_REG_FANDIV1) & 0x7)
1245                     | ((data->fan_div[1] << 4) & 0x70);
1246                 nct6775_write_value(data, NCT6775_REG_FANDIV1, reg);
1247                 break;
1248         case 2:
1249                 reg = (nct6775_read_value(data, NCT6775_REG_FANDIV2) & 0x70)
1250                     | (data->fan_div[2] & 0x7);
1251                 nct6775_write_value(data, NCT6775_REG_FANDIV2, reg);
1252                 break;
1253         case 3:
1254                 reg = (nct6775_read_value(data, NCT6775_REG_FANDIV2) & 0x7)
1255                     | ((data->fan_div[3] << 4) & 0x70);
1256                 nct6775_write_value(data, NCT6775_REG_FANDIV2, reg);
1257                 break;
1258         }
1259 }
1260
1261 static void nct6775_write_fan_div_common(struct nct6775_data *data, int nr)
1262 {
1263         if (data->kind == nct6775)
1264                 nct6775_write_fan_div(data, nr);
1265 }
1266
1267 static void nct6775_update_fan_div(struct nct6775_data *data)
1268 {
1269         u8 i;
1270
1271         i = nct6775_read_value(data, NCT6775_REG_FANDIV1);
1272         data->fan_div[0] = i & 0x7;
1273         data->fan_div[1] = (i & 0x70) >> 4;
1274         i = nct6775_read_value(data, NCT6775_REG_FANDIV2);
1275         data->fan_div[2] = i & 0x7;
1276         if (data->has_fan & (1 << 3))
1277                 data->fan_div[3] = (i & 0x70) >> 4;
1278 }
1279
1280 static void nct6775_update_fan_div_common(struct nct6775_data *data)
1281 {
1282         if (data->kind == nct6775)
1283                 nct6775_update_fan_div(data);
1284 }
1285
1286 static void nct6775_init_fan_div(struct nct6775_data *data)
1287 {
1288         int i;
1289
1290         nct6775_update_fan_div_common(data);
1291         /*
1292          * For all fans, start with highest divider value if the divider
1293          * register is not initialized. This ensures that we get a
1294          * reading from the fan count register, even if it is not optimal.
1295          * We'll compute a better divider later on.
1296          */
1297         for (i = 0; i < ARRAY_SIZE(data->fan_div); i++) {
1298                 if (!(data->has_fan & (1 << i)))
1299                         continue;
1300                 if (data->fan_div[i] == 0) {
1301                         data->fan_div[i] = 7;
1302                         nct6775_write_fan_div_common(data, i);
1303                 }
1304         }
1305 }
1306
1307 static void nct6775_init_fan_common(struct device *dev,
1308                                     struct nct6775_data *data)
1309 {
1310         int i;
1311         u8 reg;
1312
1313         if (data->has_fan_div)
1314                 nct6775_init_fan_div(data);
1315
1316         /*
1317          * If fan_min is not set (0), set it to 0xff to disable it. This
1318          * prevents the unnecessary warning when fanX_min is reported as 0.
1319          */
1320         for (i = 0; i < ARRAY_SIZE(data->fan_min); i++) {
1321                 if (data->has_fan_min & (1 << i)) {
1322                         reg = nct6775_read_value(data, data->REG_FAN_MIN[i]);
1323                         if (!reg)
1324                                 nct6775_write_value(data, data->REG_FAN_MIN[i],
1325                                                     data->has_fan_div ? 0xff
1326                                                                       : 0xff1f);
1327                 }
1328         }
1329 }
1330
1331 static void nct6775_select_fan_div(struct device *dev,
1332                                    struct nct6775_data *data, int nr, u16 reg)
1333 {
1334         u8 fan_div = data->fan_div[nr];
1335         u16 fan_min;
1336
1337         if (!data->has_fan_div)
1338                 return;
1339
1340         /*
1341          * If we failed to measure the fan speed, or the reported value is not
1342          * in the optimal range, and the clock divider can be modified,
1343          * let's try that for next time.
1344          */
1345         if (reg == 0x00 && fan_div < 0x07)
1346                 fan_div++;
1347         else if (reg != 0x00 && reg < 0x30 && fan_div > 0)
1348                 fan_div--;
1349
1350         if (fan_div != data->fan_div[nr]) {
1351                 dev_dbg(dev, "Modifying fan%d clock divider from %u to %u\n",
1352                         nr + 1, div_from_reg(data->fan_div[nr]),
1353                         div_from_reg(fan_div));
1354
1355                 /* Preserve min limit if possible */
1356                 if (data->has_fan_min & (1 << nr)) {
1357                         fan_min = data->fan_min[nr];
1358                         if (fan_div > data->fan_div[nr]) {
1359                                 if (fan_min != 255 && fan_min > 1)
1360                                         fan_min >>= 1;
1361                         } else {
1362                                 if (fan_min != 255) {
1363                                         fan_min <<= 1;
1364                                         if (fan_min > 254)
1365                                                 fan_min = 254;
1366                                 }
1367                         }
1368                         if (fan_min != data->fan_min[nr]) {
1369                                 data->fan_min[nr] = fan_min;
1370                                 nct6775_write_value(data, data->REG_FAN_MIN[nr],
1371                                                     fan_min);
1372                         }
1373                 }
1374                 data->fan_div[nr] = fan_div;
1375                 nct6775_write_fan_div_common(data, nr);
1376         }
1377 }
1378
1379 static void nct6775_update_pwm(struct device *dev)
1380 {
1381         struct nct6775_data *data = dev_get_drvdata(dev);
1382         int i, j;
1383         int fanmodecfg, reg;
1384         bool duty_is_dc;
1385
1386         for (i = 0; i < data->pwm_num; i++) {
1387                 if (!(data->has_pwm & (1 << i)))
1388                         continue;
1389
1390                 duty_is_dc = data->REG_PWM_MODE[i] &&
1391                   (nct6775_read_value(data, data->REG_PWM_MODE[i])
1392                    & data->PWM_MODE_MASK[i]);
1393                 data->pwm_mode[i] = duty_is_dc;
1394
1395                 fanmodecfg = nct6775_read_value(data, data->REG_FAN_MODE[i]);
1396                 for (j = 0; j < ARRAY_SIZE(data->REG_PWM); j++) {
1397                         if (data->REG_PWM[j] && data->REG_PWM[j][i]) {
1398                                 data->pwm[j][i]
1399                                   = nct6775_read_value(data,
1400                                                        data->REG_PWM[j][i]);
1401                         }
1402                 }
1403
1404                 data->pwm_enable[i] = reg_to_pwm_enable(data->pwm[0][i],
1405                                                         (fanmodecfg >> 4) & 7);
1406
1407                 if (!data->temp_tolerance[0][i] ||
1408                     data->pwm_enable[i] != speed_cruise)
1409                         data->temp_tolerance[0][i] = fanmodecfg & 0x0f;
1410                 if (!data->target_speed_tolerance[i] ||
1411                     data->pwm_enable[i] == speed_cruise) {
1412                         u8 t = fanmodecfg & 0x0f;
1413
1414                         if (data->REG_TOLERANCE_H) {
1415                                 t |= (nct6775_read_value(data,
1416                                       data->REG_TOLERANCE_H[i]) & 0x70) >> 1;
1417                         }
1418                         data->target_speed_tolerance[i] = t;
1419                 }
1420
1421                 data->temp_tolerance[1][i] =
1422                         nct6775_read_value(data,
1423                                         data->REG_CRITICAL_TEMP_TOLERANCE[i]);
1424
1425                 reg = nct6775_read_value(data, data->REG_TEMP_SEL[i]);
1426                 data->pwm_temp_sel[i] = reg & 0x1f;
1427                 /* If fan can stop, report floor as 0 */
1428                 if (reg & 0x80)
1429                         data->pwm[2][i] = 0;
1430
1431                 if (!data->REG_WEIGHT_TEMP_SEL[i])
1432                         continue;
1433
1434                 reg = nct6775_read_value(data, data->REG_WEIGHT_TEMP_SEL[i]);
1435                 data->pwm_weight_temp_sel[i] = reg & 0x1f;
1436                 /* If weight is disabled, report weight source as 0 */
1437                 if (j == 1 && !(reg & 0x80))
1438                         data->pwm_weight_temp_sel[i] = 0;
1439
1440                 /* Weight temp data */
1441                 for (j = 0; j < ARRAY_SIZE(data->weight_temp); j++) {
1442                         data->weight_temp[j][i]
1443                           = nct6775_read_value(data,
1444                                                data->REG_WEIGHT_TEMP[j][i]);
1445                 }
1446         }
1447 }
1448
1449 static void nct6775_update_pwm_limits(struct device *dev)
1450 {
1451         struct nct6775_data *data = dev_get_drvdata(dev);
1452         int i, j;
1453         u8 reg;
1454         u16 reg_t;
1455
1456         for (i = 0; i < data->pwm_num; i++) {
1457                 if (!(data->has_pwm & (1 << i)))
1458                         continue;
1459
1460                 for (j = 0; j < ARRAY_SIZE(data->fan_time); j++) {
1461                         data->fan_time[j][i] =
1462                           nct6775_read_value(data, data->REG_FAN_TIME[j][i]);
1463                 }
1464
1465                 reg_t = nct6775_read_value(data, data->REG_TARGET[i]);
1466                 /* Update only in matching mode or if never updated */
1467                 if (!data->target_temp[i] ||
1468                     data->pwm_enable[i] == thermal_cruise)
1469                         data->target_temp[i] = reg_t & data->target_temp_mask;
1470                 if (!data->target_speed[i] ||
1471                     data->pwm_enable[i] == speed_cruise) {
1472                         if (data->REG_TOLERANCE_H) {
1473                                 reg_t |= (nct6775_read_value(data,
1474                                         data->REG_TOLERANCE_H[i]) & 0x0f) << 8;
1475                         }
1476                         data->target_speed[i] = reg_t;
1477                 }
1478
1479                 for (j = 0; j < data->auto_pwm_num; j++) {
1480                         data->auto_pwm[i][j] =
1481                           nct6775_read_value(data,
1482                                              NCT6775_AUTO_PWM(data, i, j));
1483                         data->auto_temp[i][j] =
1484                           nct6775_read_value(data,
1485                                              NCT6775_AUTO_TEMP(data, i, j));
1486                 }
1487
1488                 /* critical auto_pwm temperature data */
1489                 data->auto_temp[i][data->auto_pwm_num] =
1490                         nct6775_read_value(data, data->REG_CRITICAL_TEMP[i]);
1491
1492                 switch (data->kind) {
1493                 case nct6775:
1494                         reg = nct6775_read_value(data,
1495                                                  NCT6775_REG_CRITICAL_ENAB[i]);
1496                         data->auto_pwm[i][data->auto_pwm_num] =
1497                                                 (reg & 0x02) ? 0xff : 0x00;
1498                         break;
1499                 case nct6776:
1500                         data->auto_pwm[i][data->auto_pwm_num] = 0xff;
1501                         break;
1502                 case nct6106:
1503                 case nct6779:
1504                 case nct6791:
1505                 case nct6792:
1506                 case nct6793:
1507                         reg = nct6775_read_value(data,
1508                                         data->REG_CRITICAL_PWM_ENABLE[i]);
1509                         if (reg & data->CRITICAL_PWM_ENABLE_MASK)
1510                                 reg = nct6775_read_value(data,
1511                                         data->REG_CRITICAL_PWM[i]);
1512                         else
1513                                 reg = 0xff;
1514                         data->auto_pwm[i][data->auto_pwm_num] = reg;
1515                         break;
1516                 }
1517         }
1518 }
1519
1520 static struct nct6775_data *nct6775_update_device(struct device *dev)
1521 {
1522         struct nct6775_data *data = dev_get_drvdata(dev);
1523         int i, j;
1524
1525         mutex_lock(&data->update_lock);
1526
1527         if (time_after(jiffies, data->last_updated + HZ + HZ / 2)
1528             || !data->valid) {
1529                 /* Fan clock dividers */
1530                 nct6775_update_fan_div_common(data);
1531
1532                 /* Measured voltages and limits */
1533                 for (i = 0; i < data->in_num; i++) {
1534                         if (!(data->have_in & (1 << i)))
1535                                 continue;
1536
1537                         data->in[i][0] = nct6775_read_value(data,
1538                                                             data->REG_VIN[i]);
1539                         data->in[i][1] = nct6775_read_value(data,
1540                                           data->REG_IN_MINMAX[0][i]);
1541                         data->in[i][2] = nct6775_read_value(data,
1542                                           data->REG_IN_MINMAX[1][i]);
1543                 }
1544
1545                 /* Measured fan speeds and limits */
1546                 for (i = 0; i < ARRAY_SIZE(data->rpm); i++) {
1547                         u16 reg;
1548
1549                         if (!(data->has_fan & (1 << i)))
1550                                 continue;
1551
1552                         reg = nct6775_read_value(data, data->REG_FAN[i]);
1553                         data->rpm[i] = data->fan_from_reg(reg,
1554                                                           data->fan_div[i]);
1555
1556                         if (data->has_fan_min & (1 << i))
1557                                 data->fan_min[i] = nct6775_read_value(data,
1558                                            data->REG_FAN_MIN[i]);
1559                         data->fan_pulses[i] =
1560                           (nct6775_read_value(data, data->REG_FAN_PULSES[i])
1561                                 >> data->FAN_PULSE_SHIFT[i]) & 0x03;
1562
1563                         nct6775_select_fan_div(dev, data, i, reg);
1564                 }
1565
1566                 nct6775_update_pwm(dev);
1567                 nct6775_update_pwm_limits(dev);
1568
1569                 /* Measured temperatures and limits */
1570                 for (i = 0; i < NUM_TEMP; i++) {
1571                         if (!(data->have_temp & (1 << i)))
1572                                 continue;
1573                         for (j = 0; j < ARRAY_SIZE(data->reg_temp); j++) {
1574                                 if (data->reg_temp[j][i])
1575                                         data->temp[j][i]
1576                                           = nct6775_read_temp(data,
1577                                                 data->reg_temp[j][i]);
1578                         }
1579                         if (i >= NUM_TEMP_FIXED ||
1580                             !(data->have_temp_fixed & (1 << i)))
1581                                 continue;
1582                         data->temp_offset[i]
1583                           = nct6775_read_value(data, data->REG_TEMP_OFFSET[i]);
1584                 }
1585
1586                 data->alarms = 0;
1587                 for (i = 0; i < NUM_REG_ALARM; i++) {
1588                         u8 alarm;
1589
1590                         if (!data->REG_ALARM[i])
1591                                 continue;
1592                         alarm = nct6775_read_value(data, data->REG_ALARM[i]);
1593                         data->alarms |= ((u64)alarm) << (i << 3);
1594                 }
1595
1596                 data->beeps = 0;
1597                 for (i = 0; i < NUM_REG_BEEP; i++) {
1598                         u8 beep;
1599
1600                         if (!data->REG_BEEP[i])
1601                                 continue;
1602                         beep = nct6775_read_value(data, data->REG_BEEP[i]);
1603                         data->beeps |= ((u64)beep) << (i << 3);
1604                 }
1605
1606                 data->last_updated = jiffies;
1607                 data->valid = true;
1608         }
1609
1610         mutex_unlock(&data->update_lock);
1611         return data;
1612 }
1613
1614 /*
1615  * Sysfs callback functions
1616  */
1617 static ssize_t
1618 show_in_reg(struct device *dev, struct device_attribute *attr, char *buf)
1619 {
1620         struct nct6775_data *data = nct6775_update_device(dev);
1621         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1622         int index = sattr->index;
1623         int nr = sattr->nr;
1624
1625         return sprintf(buf, "%ld\n", in_from_reg(data->in[nr][index], nr));
1626 }
1627
1628 static ssize_t
1629 store_in_reg(struct device *dev, struct device_attribute *attr, const char *buf,
1630              size_t count)
1631 {
1632         struct nct6775_data *data = dev_get_drvdata(dev);
1633         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1634         int index = sattr->index;
1635         int nr = sattr->nr;
1636         unsigned long val;
1637         int err;
1638
1639         err = kstrtoul(buf, 10, &val);
1640         if (err < 0)
1641                 return err;
1642         mutex_lock(&data->update_lock);
1643         data->in[nr][index] = in_to_reg(val, nr);
1644         nct6775_write_value(data, data->REG_IN_MINMAX[index - 1][nr],
1645                             data->in[nr][index]);
1646         mutex_unlock(&data->update_lock);
1647         return count;
1648 }
1649
1650 static ssize_t
1651 show_alarm(struct device *dev, struct device_attribute *attr, char *buf)
1652 {
1653         struct nct6775_data *data = nct6775_update_device(dev);
1654         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1655         int nr = data->ALARM_BITS[sattr->index];
1656
1657         return sprintf(buf, "%u\n",
1658                        (unsigned int)((data->alarms >> nr) & 0x01));
1659 }
1660
1661 static int find_temp_source(struct nct6775_data *data, int index, int count)
1662 {
1663         int source = data->temp_src[index];
1664         int nr;
1665
1666         for (nr = 0; nr < count; nr++) {
1667                 int src;
1668
1669                 src = nct6775_read_value(data,
1670                                          data->REG_TEMP_SOURCE[nr]) & 0x1f;
1671                 if (src == source)
1672                         return nr;
1673         }
1674         return -ENODEV;
1675 }
1676
1677 static ssize_t
1678 show_temp_alarm(struct device *dev, struct device_attribute *attr, char *buf)
1679 {
1680         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1681         struct nct6775_data *data = nct6775_update_device(dev);
1682         unsigned int alarm = 0;
1683         int nr;
1684
1685         /*
1686          * For temperatures, there is no fixed mapping from registers to alarm
1687          * bits. Alarm bits are determined by the temperature source mapping.
1688          */
1689         nr = find_temp_source(data, sattr->index, data->num_temp_alarms);
1690         if (nr >= 0) {
1691                 int bit = data->ALARM_BITS[nr + TEMP_ALARM_BASE];
1692
1693                 alarm = (data->alarms >> bit) & 0x01;
1694         }
1695         return sprintf(buf, "%u\n", alarm);
1696 }
1697
1698 static ssize_t
1699 show_beep(struct device *dev, struct device_attribute *attr, char *buf)
1700 {
1701         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1702         struct nct6775_data *data = nct6775_update_device(dev);
1703         int nr = data->BEEP_BITS[sattr->index];
1704
1705         return sprintf(buf, "%u\n",
1706                        (unsigned int)((data->beeps >> nr) & 0x01));
1707 }
1708
1709 static ssize_t
1710 store_beep(struct device *dev, struct device_attribute *attr, const char *buf,
1711            size_t count)
1712 {
1713         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1714         struct nct6775_data *data = dev_get_drvdata(dev);
1715         int nr = data->BEEP_BITS[sattr->index];
1716         int regindex = nr >> 3;
1717         unsigned long val;
1718         int err;
1719
1720         err = kstrtoul(buf, 10, &val);
1721         if (err < 0)
1722                 return err;
1723         if (val > 1)
1724                 return -EINVAL;
1725
1726         mutex_lock(&data->update_lock);
1727         if (val)
1728                 data->beeps |= (1ULL << nr);
1729         else
1730                 data->beeps &= ~(1ULL << nr);
1731         nct6775_write_value(data, data->REG_BEEP[regindex],
1732                             (data->beeps >> (regindex << 3)) & 0xff);
1733         mutex_unlock(&data->update_lock);
1734         return count;
1735 }
1736
1737 static ssize_t
1738 show_temp_beep(struct device *dev, struct device_attribute *attr, char *buf)
1739 {
1740         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1741         struct nct6775_data *data = nct6775_update_device(dev);
1742         unsigned int beep = 0;
1743         int nr;
1744
1745         /*
1746          * For temperatures, there is no fixed mapping from registers to beep
1747          * enable bits. Beep enable bits are determined by the temperature
1748          * source mapping.
1749          */
1750         nr = find_temp_source(data, sattr->index, data->num_temp_beeps);
1751         if (nr >= 0) {
1752                 int bit = data->BEEP_BITS[nr + TEMP_ALARM_BASE];
1753
1754                 beep = (data->beeps >> bit) & 0x01;
1755         }
1756         return sprintf(buf, "%u\n", beep);
1757 }
1758
1759 static ssize_t
1760 store_temp_beep(struct device *dev, struct device_attribute *attr,
1761                 const char *buf, size_t count)
1762 {
1763         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1764         struct nct6775_data *data = dev_get_drvdata(dev);
1765         int nr, bit, regindex;
1766         unsigned long val;
1767         int err;
1768
1769         err = kstrtoul(buf, 10, &val);
1770         if (err < 0)
1771                 return err;
1772         if (val > 1)
1773                 return -EINVAL;
1774
1775         nr = find_temp_source(data, sattr->index, data->num_temp_beeps);
1776         if (nr < 0)
1777                 return nr;
1778
1779         bit = data->BEEP_BITS[nr + TEMP_ALARM_BASE];
1780         regindex = bit >> 3;
1781
1782         mutex_lock(&data->update_lock);
1783         if (val)
1784                 data->beeps |= (1ULL << bit);
1785         else
1786                 data->beeps &= ~(1ULL << bit);
1787         nct6775_write_value(data, data->REG_BEEP[regindex],
1788                             (data->beeps >> (regindex << 3)) & 0xff);
1789         mutex_unlock(&data->update_lock);
1790
1791         return count;
1792 }
1793
1794 static umode_t nct6775_in_is_visible(struct kobject *kobj,
1795                                      struct attribute *attr, int index)
1796 {
1797         struct device *dev = container_of(kobj, struct device, kobj);
1798         struct nct6775_data *data = dev_get_drvdata(dev);
1799         int in = index / 5;     /* voltage index */
1800
1801         if (!(data->have_in & (1 << in)))
1802                 return 0;
1803
1804         return attr->mode;
1805 }
1806
1807 SENSOR_TEMPLATE_2(in_input, "in%d_input", S_IRUGO, show_in_reg, NULL, 0, 0);
1808 SENSOR_TEMPLATE(in_alarm, "in%d_alarm", S_IRUGO, show_alarm, NULL, 0);
1809 SENSOR_TEMPLATE(in_beep, "in%d_beep", S_IWUSR | S_IRUGO, show_beep, store_beep,
1810                 0);
1811 SENSOR_TEMPLATE_2(in_min, "in%d_min", S_IWUSR | S_IRUGO, show_in_reg,
1812                   store_in_reg, 0, 1);
1813 SENSOR_TEMPLATE_2(in_max, "in%d_max", S_IWUSR | S_IRUGO, show_in_reg,
1814                   store_in_reg, 0, 2);
1815
1816 /*
1817  * nct6775_in_is_visible uses the index into the following array
1818  * to determine if attributes should be created or not.
1819  * Any change in order or content must be matched.
1820  */
1821 static struct sensor_device_template *nct6775_attributes_in_template[] = {
1822         &sensor_dev_template_in_input,
1823         &sensor_dev_template_in_alarm,
1824         &sensor_dev_template_in_beep,
1825         &sensor_dev_template_in_min,
1826         &sensor_dev_template_in_max,
1827         NULL
1828 };
1829
1830 static struct sensor_template_group nct6775_in_template_group = {
1831         .templates = nct6775_attributes_in_template,
1832         .is_visible = nct6775_in_is_visible,
1833 };
1834
1835 static ssize_t
1836 show_fan(struct device *dev, struct device_attribute *attr, char *buf)
1837 {
1838         struct nct6775_data *data = nct6775_update_device(dev);
1839         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1840         int nr = sattr->index;
1841
1842         return sprintf(buf, "%d\n", data->rpm[nr]);
1843 }
1844
1845 static ssize_t
1846 show_fan_min(struct device *dev, struct device_attribute *attr, char *buf)
1847 {
1848         struct nct6775_data *data = nct6775_update_device(dev);
1849         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1850         int nr = sattr->index;
1851
1852         return sprintf(buf, "%d\n",
1853                        data->fan_from_reg_min(data->fan_min[nr],
1854                                               data->fan_div[nr]));
1855 }
1856
1857 static ssize_t
1858 show_fan_div(struct device *dev, struct device_attribute *attr, char *buf)
1859 {
1860         struct nct6775_data *data = nct6775_update_device(dev);
1861         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1862         int nr = sattr->index;
1863
1864         return sprintf(buf, "%u\n", div_from_reg(data->fan_div[nr]));
1865 }
1866
1867 static ssize_t
1868 store_fan_min(struct device *dev, struct device_attribute *attr,
1869               const char *buf, size_t count)
1870 {
1871         struct nct6775_data *data = dev_get_drvdata(dev);
1872         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1873         int nr = sattr->index;
1874         unsigned long val;
1875         unsigned int reg;
1876         u8 new_div;
1877         int err;
1878
1879         err = kstrtoul(buf, 10, &val);
1880         if (err < 0)
1881                 return err;
1882
1883         mutex_lock(&data->update_lock);
1884         if (!data->has_fan_div) {
1885                 /* NCT6776F or NCT6779D; we know this is a 13 bit register */
1886                 if (!val) {
1887                         val = 0xff1f;
1888                 } else {
1889                         if (val > 1350000U)
1890                                 val = 135000U;
1891                         val = 1350000U / val;
1892                         val = (val & 0x1f) | ((val << 3) & 0xff00);
1893                 }
1894                 data->fan_min[nr] = val;
1895                 goto write_min; /* Leave fan divider alone */
1896         }
1897         if (!val) {
1898                 /* No min limit, alarm disabled */
1899                 data->fan_min[nr] = 255;
1900                 new_div = data->fan_div[nr]; /* No change */
1901                 dev_info(dev, "fan%u low limit and alarm disabled\n", nr + 1);
1902                 goto write_div;
1903         }
1904         reg = 1350000U / val;
1905         if (reg >= 128 * 255) {
1906                 /*
1907                  * Speed below this value cannot possibly be represented,
1908                  * even with the highest divider (128)
1909                  */
1910                 data->fan_min[nr] = 254;
1911                 new_div = 7; /* 128 == (1 << 7) */
1912                 dev_warn(dev,
1913                          "fan%u low limit %lu below minimum %u, set to minimum\n",
1914                          nr + 1, val, data->fan_from_reg_min(254, 7));
1915         } else if (!reg) {
1916                 /*
1917                  * Speed above this value cannot possibly be represented,
1918                  * even with the lowest divider (1)
1919                  */
1920                 data->fan_min[nr] = 1;
1921                 new_div = 0; /* 1 == (1 << 0) */
1922                 dev_warn(dev,
1923                          "fan%u low limit %lu above maximum %u, set to maximum\n",
1924                          nr + 1, val, data->fan_from_reg_min(1, 0));
1925         } else {
1926                 /*
1927                  * Automatically pick the best divider, i.e. the one such
1928                  * that the min limit will correspond to a register value
1929                  * in the 96..192 range
1930                  */
1931                 new_div = 0;
1932                 while (reg > 192 && new_div < 7) {
1933                         reg >>= 1;
1934                         new_div++;
1935                 }
1936                 data->fan_min[nr] = reg;
1937         }
1938
1939 write_div:
1940         /*
1941          * Write both the fan clock divider (if it changed) and the new
1942          * fan min (unconditionally)
1943          */
1944         if (new_div != data->fan_div[nr]) {
1945                 dev_dbg(dev, "fan%u clock divider changed from %u to %u\n",
1946                         nr + 1, div_from_reg(data->fan_div[nr]),
1947                         div_from_reg(new_div));
1948                 data->fan_div[nr] = new_div;
1949                 nct6775_write_fan_div_common(data, nr);
1950                 /* Give the chip time to sample a new speed value */
1951                 data->last_updated = jiffies;
1952         }
1953
1954 write_min:
1955         nct6775_write_value(data, data->REG_FAN_MIN[nr], data->fan_min[nr]);
1956         mutex_unlock(&data->update_lock);
1957
1958         return count;
1959 }
1960
1961 static ssize_t
1962 show_fan_pulses(struct device *dev, struct device_attribute *attr, char *buf)
1963 {
1964         struct nct6775_data *data = nct6775_update_device(dev);
1965         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1966         int p = data->fan_pulses[sattr->index];
1967
1968         return sprintf(buf, "%d\n", p ? : 4);
1969 }
1970
1971 static ssize_t
1972 store_fan_pulses(struct device *dev, struct device_attribute *attr,
1973                  const char *buf, size_t count)
1974 {
1975         struct nct6775_data *data = dev_get_drvdata(dev);
1976         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1977         int nr = sattr->index;
1978         unsigned long val;
1979         int err;
1980         u8 reg;
1981
1982         err = kstrtoul(buf, 10, &val);
1983         if (err < 0)
1984                 return err;
1985
1986         if (val > 4)
1987                 return -EINVAL;
1988
1989         mutex_lock(&data->update_lock);
1990         data->fan_pulses[nr] = val & 3;
1991         reg = nct6775_read_value(data, data->REG_FAN_PULSES[nr]);
1992         reg &= ~(0x03 << data->FAN_PULSE_SHIFT[nr]);
1993         reg |= (val & 3) << data->FAN_PULSE_SHIFT[nr];
1994         nct6775_write_value(data, data->REG_FAN_PULSES[nr], reg);
1995         mutex_unlock(&data->update_lock);
1996
1997         return count;
1998 }
1999
2000 static umode_t nct6775_fan_is_visible(struct kobject *kobj,
2001                                       struct attribute *attr, int index)
2002 {
2003         struct device *dev = container_of(kobj, struct device, kobj);
2004         struct nct6775_data *data = dev_get_drvdata(dev);
2005         int fan = index / 6;    /* fan index */
2006         int nr = index % 6;     /* attribute index */
2007
2008         if (!(data->has_fan & (1 << fan)))
2009                 return 0;
2010
2011         if (nr == 1 && data->ALARM_BITS[FAN_ALARM_BASE + fan] == -1)
2012                 return 0;
2013         if (nr == 2 && data->BEEP_BITS[FAN_ALARM_BASE + fan] == -1)
2014                 return 0;
2015         if (nr == 4 && !(data->has_fan_min & (1 << fan)))
2016                 return 0;
2017         if (nr == 5 && data->kind != nct6775)
2018                 return 0;
2019
2020         return attr->mode;
2021 }
2022
2023 SENSOR_TEMPLATE(fan_input, "fan%d_input", S_IRUGO, show_fan, NULL, 0);
2024 SENSOR_TEMPLATE(fan_alarm, "fan%d_alarm", S_IRUGO, show_alarm, NULL,
2025                 FAN_ALARM_BASE);
2026 SENSOR_TEMPLATE(fan_beep, "fan%d_beep", S_IWUSR | S_IRUGO, show_beep,
2027                 store_beep, FAN_ALARM_BASE);
2028 SENSOR_TEMPLATE(fan_pulses, "fan%d_pulses", S_IWUSR | S_IRUGO, show_fan_pulses,
2029                 store_fan_pulses, 0);
2030 SENSOR_TEMPLATE(fan_min, "fan%d_min", S_IWUSR | S_IRUGO, show_fan_min,
2031                 store_fan_min, 0);
2032 SENSOR_TEMPLATE(fan_div, "fan%d_div", S_IRUGO, show_fan_div, NULL, 0);
2033
2034 /*
2035  * nct6775_fan_is_visible uses the index into the following array
2036  * to determine if attributes should be created or not.
2037  * Any change in order or content must be matched.
2038  */
2039 static struct sensor_device_template *nct6775_attributes_fan_template[] = {
2040         &sensor_dev_template_fan_input,
2041         &sensor_dev_template_fan_alarm, /* 1 */
2042         &sensor_dev_template_fan_beep,  /* 2 */
2043         &sensor_dev_template_fan_pulses,
2044         &sensor_dev_template_fan_min,   /* 4 */
2045         &sensor_dev_template_fan_div,   /* 5 */
2046         NULL
2047 };
2048
2049 static struct sensor_template_group nct6775_fan_template_group = {
2050         .templates = nct6775_attributes_fan_template,
2051         .is_visible = nct6775_fan_is_visible,
2052         .base = 1,
2053 };
2054
2055 static ssize_t
2056 show_temp_label(struct device *dev, struct device_attribute *attr, char *buf)
2057 {
2058         struct nct6775_data *data = nct6775_update_device(dev);
2059         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2060         int nr = sattr->index;
2061
2062         return sprintf(buf, "%s\n", data->temp_label[data->temp_src[nr]]);
2063 }
2064
2065 static ssize_t
2066 show_temp(struct device *dev, struct device_attribute *attr, char *buf)
2067 {
2068         struct nct6775_data *data = nct6775_update_device(dev);
2069         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2070         int nr = sattr->nr;
2071         int index = sattr->index;
2072
2073         return sprintf(buf, "%d\n", LM75_TEMP_FROM_REG(data->temp[index][nr]));
2074 }
2075
2076 static ssize_t
2077 store_temp(struct device *dev, struct device_attribute *attr, const char *buf,
2078            size_t count)
2079 {
2080         struct nct6775_data *data = dev_get_drvdata(dev);
2081         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2082         int nr = sattr->nr;
2083         int index = sattr->index;
2084         int err;
2085         long val;
2086
2087         err = kstrtol(buf, 10, &val);
2088         if (err < 0)
2089                 return err;
2090
2091         mutex_lock(&data->update_lock);
2092         data->temp[index][nr] = LM75_TEMP_TO_REG(val);
2093         nct6775_write_temp(data, data->reg_temp[index][nr],
2094                            data->temp[index][nr]);
2095         mutex_unlock(&data->update_lock);
2096         return count;
2097 }
2098
2099 static ssize_t
2100 show_temp_offset(struct device *dev, struct device_attribute *attr, char *buf)
2101 {
2102         struct nct6775_data *data = nct6775_update_device(dev);
2103         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2104
2105         return sprintf(buf, "%d\n", data->temp_offset[sattr->index] * 1000);
2106 }
2107
2108 static ssize_t
2109 store_temp_offset(struct device *dev, struct device_attribute *attr,
2110                   const char *buf, size_t count)
2111 {
2112         struct nct6775_data *data = dev_get_drvdata(dev);
2113         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2114         int nr = sattr->index;
2115         long val;
2116         int err;
2117
2118         err = kstrtol(buf, 10, &val);
2119         if (err < 0)
2120                 return err;
2121
2122         val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), -128, 127);
2123
2124         mutex_lock(&data->update_lock);
2125         data->temp_offset[nr] = val;
2126         nct6775_write_value(data, data->REG_TEMP_OFFSET[nr], val);
2127         mutex_unlock(&data->update_lock);
2128
2129         return count;
2130 }
2131
2132 static ssize_t
2133 show_temp_type(struct device *dev, struct device_attribute *attr, char *buf)
2134 {
2135         struct nct6775_data *data = nct6775_update_device(dev);
2136         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2137         int nr = sattr->index;
2138
2139         return sprintf(buf, "%d\n", (int)data->temp_type[nr]);
2140 }
2141
2142 static ssize_t
2143 store_temp_type(struct device *dev, struct device_attribute *attr,
2144                 const char *buf, size_t count)
2145 {
2146         struct nct6775_data *data = nct6775_update_device(dev);
2147         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2148         int nr = sattr->index;
2149         unsigned long val;
2150         int err;
2151         u8 vbat, diode, vbit, dbit;
2152
2153         err = kstrtoul(buf, 10, &val);
2154         if (err < 0)
2155                 return err;
2156
2157         if (val != 1 && val != 3 && val != 4)
2158                 return -EINVAL;
2159
2160         mutex_lock(&data->update_lock);
2161
2162         data->temp_type[nr] = val;
2163         vbit = 0x02 << nr;
2164         dbit = data->DIODE_MASK << nr;
2165         vbat = nct6775_read_value(data, data->REG_VBAT) & ~vbit;
2166         diode = nct6775_read_value(data, data->REG_DIODE) & ~dbit;
2167         switch (val) {
2168         case 1: /* CPU diode (diode, current mode) */
2169                 vbat |= vbit;
2170                 diode |= dbit;
2171                 break;
2172         case 3: /* diode, voltage mode */
2173                 vbat |= dbit;
2174                 break;
2175         case 4: /* thermistor */
2176                 break;
2177         }
2178         nct6775_write_value(data, data->REG_VBAT, vbat);
2179         nct6775_write_value(data, data->REG_DIODE, diode);
2180
2181         mutex_unlock(&data->update_lock);
2182         return count;
2183 }
2184
2185 static umode_t nct6775_temp_is_visible(struct kobject *kobj,
2186                                        struct attribute *attr, int index)
2187 {
2188         struct device *dev = container_of(kobj, struct device, kobj);
2189         struct nct6775_data *data = dev_get_drvdata(dev);
2190         int temp = index / 10;  /* temp index */
2191         int nr = index % 10;    /* attribute index */
2192
2193         if (!(data->have_temp & (1 << temp)))
2194                 return 0;
2195
2196         if (nr == 2 && find_temp_source(data, temp, data->num_temp_alarms) < 0)
2197                 return 0;                               /* alarm */
2198
2199         if (nr == 3 && find_temp_source(data, temp, data->num_temp_beeps) < 0)
2200                 return 0;                               /* beep */
2201
2202         if (nr == 4 && !data->reg_temp[1][temp])        /* max */
2203                 return 0;
2204
2205         if (nr == 5 && !data->reg_temp[2][temp])        /* max_hyst */
2206                 return 0;
2207
2208         if (nr == 6 && !data->reg_temp[3][temp])        /* crit */
2209                 return 0;
2210
2211         if (nr == 7 && !data->reg_temp[4][temp])        /* lcrit */
2212                 return 0;
2213
2214         /* offset and type only apply to fixed sensors */
2215         if (nr > 7 && !(data->have_temp_fixed & (1 << temp)))
2216                 return 0;
2217
2218         return attr->mode;
2219 }
2220
2221 SENSOR_TEMPLATE_2(temp_input, "temp%d_input", S_IRUGO, show_temp, NULL, 0, 0);
2222 SENSOR_TEMPLATE(temp_label, "temp%d_label", S_IRUGO, show_temp_label, NULL, 0);
2223 SENSOR_TEMPLATE_2(temp_max, "temp%d_max", S_IRUGO | S_IWUSR, show_temp,
2224                   store_temp, 0, 1);
2225 SENSOR_TEMPLATE_2(temp_max_hyst, "temp%d_max_hyst", S_IRUGO | S_IWUSR,
2226                   show_temp, store_temp, 0, 2);
2227 SENSOR_TEMPLATE_2(temp_crit, "temp%d_crit", S_IRUGO | S_IWUSR, show_temp,
2228                   store_temp, 0, 3);
2229 SENSOR_TEMPLATE_2(temp_lcrit, "temp%d_lcrit", S_IRUGO | S_IWUSR, show_temp,
2230                   store_temp, 0, 4);
2231 SENSOR_TEMPLATE(temp_offset, "temp%d_offset", S_IRUGO | S_IWUSR,
2232                 show_temp_offset, store_temp_offset, 0);
2233 SENSOR_TEMPLATE(temp_type, "temp%d_type", S_IRUGO | S_IWUSR, show_temp_type,
2234                 store_temp_type, 0);
2235 SENSOR_TEMPLATE(temp_alarm, "temp%d_alarm", S_IRUGO, show_temp_alarm, NULL, 0);
2236 SENSOR_TEMPLATE(temp_beep, "temp%d_beep", S_IRUGO | S_IWUSR, show_temp_beep,
2237                 store_temp_beep, 0);
2238
2239 /*
2240  * nct6775_temp_is_visible uses the index into the following array
2241  * to determine if attributes should be created or not.
2242  * Any change in order or content must be matched.
2243  */
2244 static struct sensor_device_template *nct6775_attributes_temp_template[] = {
2245         &sensor_dev_template_temp_input,
2246         &sensor_dev_template_temp_label,
2247         &sensor_dev_template_temp_alarm,        /* 2 */
2248         &sensor_dev_template_temp_beep,         /* 3 */
2249         &sensor_dev_template_temp_max,          /* 4 */
2250         &sensor_dev_template_temp_max_hyst,     /* 5 */
2251         &sensor_dev_template_temp_crit,         /* 6 */
2252         &sensor_dev_template_temp_lcrit,        /* 7 */
2253         &sensor_dev_template_temp_offset,       /* 8 */
2254         &sensor_dev_template_temp_type,         /* 9 */
2255         NULL
2256 };
2257
2258 static struct sensor_template_group nct6775_temp_template_group = {
2259         .templates = nct6775_attributes_temp_template,
2260         .is_visible = nct6775_temp_is_visible,
2261         .base = 1,
2262 };
2263
2264 static ssize_t
2265 show_pwm_mode(struct device *dev, struct device_attribute *attr, char *buf)
2266 {
2267         struct nct6775_data *data = nct6775_update_device(dev);
2268         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2269
2270         return sprintf(buf, "%d\n", !data->pwm_mode[sattr->index]);
2271 }
2272
2273 static ssize_t
2274 store_pwm_mode(struct device *dev, struct device_attribute *attr,
2275                const char *buf, size_t count)
2276 {
2277         struct nct6775_data *data = dev_get_drvdata(dev);
2278         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2279         int nr = sattr->index;
2280         unsigned long val;
2281         int err;
2282         u8 reg;
2283
2284         err = kstrtoul(buf, 10, &val);
2285         if (err < 0)
2286                 return err;
2287
2288         if (val > 1)
2289                 return -EINVAL;
2290
2291         /* Setting DC mode is not supported for all chips/channels */
2292         if (data->REG_PWM_MODE[nr] == 0) {
2293                 if (val)
2294                         return -EINVAL;
2295                 return count;
2296         }
2297
2298         mutex_lock(&data->update_lock);
2299         data->pwm_mode[nr] = val;
2300         reg = nct6775_read_value(data, data->REG_PWM_MODE[nr]);
2301         reg &= ~data->PWM_MODE_MASK[nr];
2302         if (val)
2303                 reg |= data->PWM_MODE_MASK[nr];
2304         nct6775_write_value(data, data->REG_PWM_MODE[nr], reg);
2305         mutex_unlock(&data->update_lock);
2306         return count;
2307 }
2308
2309 static ssize_t
2310 show_pwm(struct device *dev, struct device_attribute *attr, char *buf)
2311 {
2312         struct nct6775_data *data = nct6775_update_device(dev);
2313         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2314         int nr = sattr->nr;
2315         int index = sattr->index;
2316         int pwm;
2317
2318         /*
2319          * For automatic fan control modes, show current pwm readings.
2320          * Otherwise, show the configured value.
2321          */
2322         if (index == 0 && data->pwm_enable[nr] > manual)
2323                 pwm = nct6775_read_value(data, data->REG_PWM_READ[nr]);
2324         else
2325                 pwm = data->pwm[index][nr];
2326
2327         return sprintf(buf, "%d\n", pwm);
2328 }
2329
2330 static ssize_t
2331 store_pwm(struct device *dev, struct device_attribute *attr, const char *buf,
2332           size_t count)
2333 {
2334         struct nct6775_data *data = dev_get_drvdata(dev);
2335         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2336         int nr = sattr->nr;
2337         int index = sattr->index;
2338         unsigned long val;
2339         int minval[7] = { 0, 1, 1, data->pwm[2][nr], 0, 0, 0 };
2340         int maxval[7]
2341           = { 255, 255, data->pwm[3][nr] ? : 255, 255, 255, 255, 255 };
2342         int err;
2343         u8 reg;
2344
2345         err = kstrtoul(buf, 10, &val);
2346         if (err < 0)
2347                 return err;
2348         val = clamp_val(val, minval[index], maxval[index]);
2349
2350         mutex_lock(&data->update_lock);
2351         data->pwm[index][nr] = val;
2352         nct6775_write_value(data, data->REG_PWM[index][nr], val);
2353         if (index == 2) { /* floor: disable if val == 0 */
2354                 reg = nct6775_read_value(data, data->REG_TEMP_SEL[nr]);
2355                 reg &= 0x7f;
2356                 if (val)
2357                         reg |= 0x80;
2358                 nct6775_write_value(data, data->REG_TEMP_SEL[nr], reg);
2359         }
2360         mutex_unlock(&data->update_lock);
2361         return count;
2362 }
2363
2364 /* Returns 0 if OK, -EINVAL otherwise */
2365 static int check_trip_points(struct nct6775_data *data, int nr)
2366 {
2367         int i;
2368
2369         for (i = 0; i < data->auto_pwm_num - 1; i++) {
2370                 if (data->auto_temp[nr][i] > data->auto_temp[nr][i + 1])
2371                         return -EINVAL;
2372         }
2373         for (i = 0; i < data->auto_pwm_num - 1; i++) {
2374                 if (data->auto_pwm[nr][i] > data->auto_pwm[nr][i + 1])
2375                         return -EINVAL;
2376         }
2377         /* validate critical temperature and pwm if enabled (pwm > 0) */
2378         if (data->auto_pwm[nr][data->auto_pwm_num]) {
2379                 if (data->auto_temp[nr][data->auto_pwm_num - 1] >
2380                                 data->auto_temp[nr][data->auto_pwm_num] ||
2381                     data->auto_pwm[nr][data->auto_pwm_num - 1] >
2382                                 data->auto_pwm[nr][data->auto_pwm_num])
2383                         return -EINVAL;
2384         }
2385         return 0;
2386 }
2387
2388 static void pwm_update_registers(struct nct6775_data *data, int nr)
2389 {
2390         u8 reg;
2391
2392         switch (data->pwm_enable[nr]) {
2393         case off:
2394         case manual:
2395                 break;
2396         case speed_cruise:
2397                 reg = nct6775_read_value(data, data->REG_FAN_MODE[nr]);
2398                 reg = (reg & ~data->tolerance_mask) |
2399                   (data->target_speed_tolerance[nr] & data->tolerance_mask);
2400                 nct6775_write_value(data, data->REG_FAN_MODE[nr], reg);
2401                 nct6775_write_value(data, data->REG_TARGET[nr],
2402                                     data->target_speed[nr] & 0xff);
2403                 if (data->REG_TOLERANCE_H) {
2404                         reg = (data->target_speed[nr] >> 8) & 0x0f;
2405                         reg |= (data->target_speed_tolerance[nr] & 0x38) << 1;
2406                         nct6775_write_value(data,
2407                                             data->REG_TOLERANCE_H[nr],
2408                                             reg);
2409                 }
2410                 break;
2411         case thermal_cruise:
2412                 nct6775_write_value(data, data->REG_TARGET[nr],
2413                                     data->target_temp[nr]);
2414                 /* intentional */
2415         default:
2416                 reg = nct6775_read_value(data, data->REG_FAN_MODE[nr]);
2417                 reg = (reg & ~data->tolerance_mask) |
2418                   data->temp_tolerance[0][nr];
2419                 nct6775_write_value(data, data->REG_FAN_MODE[nr], reg);
2420                 break;
2421         }
2422 }
2423
2424 static ssize_t
2425 show_pwm_enable(struct device *dev, struct device_attribute *attr, char *buf)
2426 {
2427         struct nct6775_data *data = nct6775_update_device(dev);
2428         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2429
2430         return sprintf(buf, "%d\n", data->pwm_enable[sattr->index]);
2431 }
2432
2433 static ssize_t
2434 store_pwm_enable(struct device *dev, struct device_attribute *attr,
2435                  const char *buf, size_t count)
2436 {
2437         struct nct6775_data *data = dev_get_drvdata(dev);
2438         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2439         int nr = sattr->index;
2440         unsigned long val;
2441         int err;
2442         u16 reg;
2443
2444         err = kstrtoul(buf, 10, &val);
2445         if (err < 0)
2446                 return err;
2447
2448         if (val > sf4)
2449                 return -EINVAL;
2450
2451         if (val == sf3 && data->kind != nct6775)
2452                 return -EINVAL;
2453
2454         if (val == sf4 && check_trip_points(data, nr)) {
2455                 dev_err(dev, "Inconsistent trip points, not switching to SmartFan IV mode\n");
2456                 dev_err(dev, "Adjust trip points and try again\n");
2457                 return -EINVAL;
2458         }
2459
2460         mutex_lock(&data->update_lock);
2461         data->pwm_enable[nr] = val;
2462         if (val == off) {
2463                 /*
2464                  * turn off pwm control: select manual mode, set pwm to maximum
2465                  */
2466                 data->pwm[0][nr] = 255;
2467                 nct6775_write_value(data, data->REG_PWM[0][nr], 255);
2468         }
2469         pwm_update_registers(data, nr);
2470         reg = nct6775_read_value(data, data->REG_FAN_MODE[nr]);
2471         reg &= 0x0f;
2472         reg |= pwm_enable_to_reg(val) << 4;
2473         nct6775_write_value(data, data->REG_FAN_MODE[nr], reg);
2474         mutex_unlock(&data->update_lock);
2475         return count;
2476 }
2477
2478 static ssize_t
2479 show_pwm_temp_sel_common(struct nct6775_data *data, char *buf, int src)
2480 {
2481         int i, sel = 0;
2482
2483         for (i = 0; i < NUM_TEMP; i++) {
2484                 if (!(data->have_temp & (1 << i)))
2485                         continue;
2486                 if (src == data->temp_src[i]) {
2487                         sel = i + 1;
2488                         break;
2489                 }
2490         }
2491
2492         return sprintf(buf, "%d\n", sel);
2493 }
2494
2495 static ssize_t
2496 show_pwm_temp_sel(struct device *dev, struct device_attribute *attr, char *buf)
2497 {
2498         struct nct6775_data *data = nct6775_update_device(dev);
2499         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2500         int index = sattr->index;
2501
2502         return show_pwm_temp_sel_common(data, buf, data->pwm_temp_sel[index]);
2503 }
2504
2505 static ssize_t
2506 store_pwm_temp_sel(struct device *dev, struct device_attribute *attr,
2507                    const char *buf, size_t count)
2508 {
2509         struct nct6775_data *data = nct6775_update_device(dev);
2510         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2511         int nr = sattr->index;
2512         unsigned long val;
2513         int err, reg, src;
2514
2515         err = kstrtoul(buf, 10, &val);
2516         if (err < 0)
2517                 return err;
2518         if (val == 0 || val > NUM_TEMP)
2519                 return -EINVAL;
2520         if (!(data->have_temp & (1 << (val - 1))) || !data->temp_src[val - 1])
2521                 return -EINVAL;
2522
2523         mutex_lock(&data->update_lock);
2524         src = data->temp_src[val - 1];
2525         data->pwm_temp_sel[nr] = src;
2526         reg = nct6775_read_value(data, data->REG_TEMP_SEL[nr]);
2527         reg &= 0xe0;
2528         reg |= src;
2529         nct6775_write_value(data, data->REG_TEMP_SEL[nr], reg);
2530         mutex_unlock(&data->update_lock);
2531
2532         return count;
2533 }
2534
2535 static ssize_t
2536 show_pwm_weight_temp_sel(struct device *dev, struct device_attribute *attr,
2537                          char *buf)
2538 {
2539         struct nct6775_data *data = nct6775_update_device(dev);
2540         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2541         int index = sattr->index;
2542
2543         return show_pwm_temp_sel_common(data, buf,
2544                                         data->pwm_weight_temp_sel[index]);
2545 }
2546
2547 static ssize_t
2548 store_pwm_weight_temp_sel(struct device *dev, struct device_attribute *attr,
2549                           const char *buf, size_t count)
2550 {
2551         struct nct6775_data *data = nct6775_update_device(dev);
2552         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2553         int nr = sattr->index;
2554         unsigned long val;
2555         int err, reg, src;
2556
2557         err = kstrtoul(buf, 10, &val);
2558         if (err < 0)
2559                 return err;
2560         if (val > NUM_TEMP)
2561                 return -EINVAL;
2562         if (val && (!(data->have_temp & (1 << (val - 1))) ||
2563                     !data->temp_src[val - 1]))
2564                 return -EINVAL;
2565
2566         mutex_lock(&data->update_lock);
2567         if (val) {
2568                 src = data->temp_src[val - 1];
2569                 data->pwm_weight_temp_sel[nr] = src;
2570                 reg = nct6775_read_value(data, data->REG_WEIGHT_TEMP_SEL[nr]);
2571                 reg &= 0xe0;
2572                 reg |= (src | 0x80);
2573                 nct6775_write_value(data, data->REG_WEIGHT_TEMP_SEL[nr], reg);
2574         } else {
2575                 data->pwm_weight_temp_sel[nr] = 0;
2576                 reg = nct6775_read_value(data, data->REG_WEIGHT_TEMP_SEL[nr]);
2577                 reg &= 0x7f;
2578                 nct6775_write_value(data, data->REG_WEIGHT_TEMP_SEL[nr], reg);
2579         }
2580         mutex_unlock(&data->update_lock);
2581
2582         return count;
2583 }
2584
2585 static ssize_t
2586 show_target_temp(struct device *dev, struct device_attribute *attr, char *buf)
2587 {
2588         struct nct6775_data *data = nct6775_update_device(dev);
2589         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2590
2591         return sprintf(buf, "%d\n", data->target_temp[sattr->index] * 1000);
2592 }
2593
2594 static ssize_t
2595 store_target_temp(struct device *dev, struct device_attribute *attr,
2596                   const char *buf, size_t count)
2597 {
2598         struct nct6775_data *data = dev_get_drvdata(dev);
2599         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2600         int nr = sattr->index;
2601         unsigned long val;
2602         int err;
2603
2604         err = kstrtoul(buf, 10, &val);
2605         if (err < 0)
2606                 return err;
2607
2608         val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), 0,
2609                         data->target_temp_mask);
2610
2611         mutex_lock(&data->update_lock);
2612         data->target_temp[nr] = val;
2613         pwm_update_registers(data, nr);
2614         mutex_unlock(&data->update_lock);
2615         return count;
2616 }
2617
2618 static ssize_t
2619 show_target_speed(struct device *dev, struct device_attribute *attr, char *buf)
2620 {
2621         struct nct6775_data *data = nct6775_update_device(dev);
2622         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2623         int nr = sattr->index;
2624
2625         return sprintf(buf, "%d\n",
2626                        fan_from_reg16(data->target_speed[nr],
2627                                       data->fan_div[nr]));
2628 }
2629
2630 static ssize_t
2631 store_target_speed(struct device *dev, struct device_attribute *attr,
2632                    const char *buf, size_t count)
2633 {
2634         struct nct6775_data *data = dev_get_drvdata(dev);
2635         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2636         int nr = sattr->index;
2637         unsigned long val;
2638         int err;
2639         u16 speed;
2640
2641         err = kstrtoul(buf, 10, &val);
2642         if (err < 0)
2643                 return err;
2644
2645         val = clamp_val(val, 0, 1350000U);
2646         speed = fan_to_reg(val, data->fan_div[nr]);
2647
2648         mutex_lock(&data->update_lock);
2649         data->target_speed[nr] = speed;
2650         pwm_update_registers(data, nr);
2651         mutex_unlock(&data->update_lock);
2652         return count;
2653 }
2654
2655 static ssize_t
2656 show_temp_tolerance(struct device *dev, struct device_attribute *attr,
2657                     char *buf)
2658 {
2659         struct nct6775_data *data = nct6775_update_device(dev);
2660         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2661         int nr = sattr->nr;
2662         int index = sattr->index;
2663
2664         return sprintf(buf, "%d\n", data->temp_tolerance[index][nr] * 1000);
2665 }
2666
2667 static ssize_t
2668 store_temp_tolerance(struct device *dev, struct device_attribute *attr,
2669                      const char *buf, size_t count)
2670 {
2671         struct nct6775_data *data = dev_get_drvdata(dev);
2672         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2673         int nr = sattr->nr;
2674         int index = sattr->index;
2675         unsigned long val;
2676         int err;
2677
2678         err = kstrtoul(buf, 10, &val);
2679         if (err < 0)
2680                 return err;
2681
2682         /* Limit tolerance as needed */
2683         val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), 0, data->tolerance_mask);
2684
2685         mutex_lock(&data->update_lock);
2686         data->temp_tolerance[index][nr] = val;
2687         if (index)
2688                 pwm_update_registers(data, nr);
2689         else
2690                 nct6775_write_value(data,
2691                                     data->REG_CRITICAL_TEMP_TOLERANCE[nr],
2692                                     val);
2693         mutex_unlock(&data->update_lock);
2694         return count;
2695 }
2696
2697 /*
2698  * Fan speed tolerance is a tricky beast, since the associated register is
2699  * a tick counter, but the value is reported and configured as rpm.
2700  * Compute resulting low and high rpm values and report the difference.
2701  */
2702 static ssize_t
2703 show_speed_tolerance(struct device *dev, struct device_attribute *attr,
2704                      char *buf)
2705 {
2706         struct nct6775_data *data = nct6775_update_device(dev);
2707         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2708         int nr = sattr->index;
2709         int low = data->target_speed[nr] - data->target_speed_tolerance[nr];
2710         int high = data->target_speed[nr] + data->target_speed_tolerance[nr];
2711         int tolerance;
2712
2713         if (low <= 0)
2714                 low = 1;
2715         if (high > 0xffff)
2716                 high = 0xffff;
2717         if (high < low)
2718                 high = low;
2719
2720         tolerance = (fan_from_reg16(low, data->fan_div[nr])
2721                      - fan_from_reg16(high, data->fan_div[nr])) / 2;
2722
2723         return sprintf(buf, "%d\n", tolerance);
2724 }
2725
2726 static ssize_t
2727 store_speed_tolerance(struct device *dev, struct device_attribute *attr,
2728                       const char *buf, size_t count)
2729 {
2730         struct nct6775_data *data = dev_get_drvdata(dev);
2731         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2732         int nr = sattr->index;
2733         unsigned long val;
2734         int err;
2735         int low, high;
2736
2737         err = kstrtoul(buf, 10, &val);
2738         if (err < 0)
2739                 return err;
2740
2741         high = fan_from_reg16(data->target_speed[nr],
2742                               data->fan_div[nr]) + val;
2743         low = fan_from_reg16(data->target_speed[nr],
2744                              data->fan_div[nr]) - val;
2745         if (low <= 0)
2746                 low = 1;
2747         if (high < low)
2748                 high = low;
2749
2750         val = (fan_to_reg(low, data->fan_div[nr]) -
2751                fan_to_reg(high, data->fan_div[nr])) / 2;
2752
2753         /* Limit tolerance as needed */
2754         val = clamp_val(val, 0, data->speed_tolerance_limit);
2755
2756         mutex_lock(&data->update_lock);
2757         data->target_speed_tolerance[nr] = val;
2758         pwm_update_registers(data, nr);
2759         mutex_unlock(&data->update_lock);
2760         return count;
2761 }
2762
2763 SENSOR_TEMPLATE_2(pwm, "pwm%d", S_IWUSR | S_IRUGO, show_pwm, store_pwm, 0, 0);
2764 SENSOR_TEMPLATE(pwm_mode, "pwm%d_mode", S_IWUSR | S_IRUGO, show_pwm_mode,
2765                 store_pwm_mode, 0);
2766 SENSOR_TEMPLATE(pwm_enable, "pwm%d_enable", S_IWUSR | S_IRUGO, show_pwm_enable,
2767                 store_pwm_enable, 0);
2768 SENSOR_TEMPLATE(pwm_temp_sel, "pwm%d_temp_sel", S_IWUSR | S_IRUGO,
2769                 show_pwm_temp_sel, store_pwm_temp_sel, 0);
2770 SENSOR_TEMPLATE(pwm_target_temp, "pwm%d_target_temp", S_IWUSR | S_IRUGO,
2771                 show_target_temp, store_target_temp, 0);
2772 SENSOR_TEMPLATE(fan_target, "fan%d_target", S_IWUSR | S_IRUGO,
2773                 show_target_speed, store_target_speed, 0);
2774 SENSOR_TEMPLATE(fan_tolerance, "fan%d_tolerance", S_IWUSR | S_IRUGO,
2775                 show_speed_tolerance, store_speed_tolerance, 0);
2776
2777 /* Smart Fan registers */
2778
2779 static ssize_t
2780 show_weight_temp(struct device *dev, struct device_attribute *attr, char *buf)
2781 {
2782         struct nct6775_data *data = nct6775_update_device(dev);
2783         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2784         int nr = sattr->nr;
2785         int index = sattr->index;
2786
2787         return sprintf(buf, "%d\n", data->weight_temp[index][nr] * 1000);
2788 }
2789
2790 static ssize_t
2791 store_weight_temp(struct device *dev, struct device_attribute *attr,
2792                   const char *buf, size_t count)
2793 {
2794         struct nct6775_data *data = dev_get_drvdata(dev);
2795         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2796         int nr = sattr->nr;
2797         int index = sattr->index;
2798         unsigned long val;
2799         int err;
2800
2801         err = kstrtoul(buf, 10, &val);
2802         if (err < 0)
2803                 return err;
2804
2805         val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), 0, 255);
2806
2807         mutex_lock(&data->update_lock);
2808         data->weight_temp[index][nr] = val;
2809         nct6775_write_value(data, data->REG_WEIGHT_TEMP[index][nr], val);
2810         mutex_unlock(&data->update_lock);
2811         return count;
2812 }
2813
2814 SENSOR_TEMPLATE(pwm_weight_temp_sel, "pwm%d_weight_temp_sel", S_IWUSR | S_IRUGO,
2815                   show_pwm_weight_temp_sel, store_pwm_weight_temp_sel, 0);
2816 SENSOR_TEMPLATE_2(pwm_weight_temp_step, "pwm%d_weight_temp_step",
2817                   S_IWUSR | S_IRUGO, show_weight_temp, store_weight_temp, 0, 0);
2818 SENSOR_TEMPLATE_2(pwm_weight_temp_step_tol, "pwm%d_weight_temp_step_tol",
2819                   S_IWUSR | S_IRUGO, show_weight_temp, store_weight_temp, 0, 1);
2820 SENSOR_TEMPLATE_2(pwm_weight_temp_step_base, "pwm%d_weight_temp_step_base",
2821                   S_IWUSR | S_IRUGO, show_weight_temp, store_weight_temp, 0, 2);
2822 SENSOR_TEMPLATE_2(pwm_weight_duty_step, "pwm%d_weight_duty_step",
2823                   S_IWUSR | S_IRUGO, show_pwm, store_pwm, 0, 5);
2824 SENSOR_TEMPLATE_2(pwm_weight_duty_base, "pwm%d_weight_duty_base",
2825                   S_IWUSR | S_IRUGO, show_pwm, store_pwm, 0, 6);
2826
2827 static ssize_t
2828 show_fan_time(struct device *dev, struct device_attribute *attr, char *buf)
2829 {
2830         struct nct6775_data *data = nct6775_update_device(dev);
2831         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2832         int nr = sattr->nr;
2833         int index = sattr->index;
2834
2835         return sprintf(buf, "%d\n",
2836                        step_time_from_reg(data->fan_time[index][nr],
2837                                           data->pwm_mode[nr]));
2838 }
2839
2840 static ssize_t
2841 store_fan_time(struct device *dev, struct device_attribute *attr,
2842                const char *buf, size_t count)
2843 {
2844         struct nct6775_data *data = dev_get_drvdata(dev);
2845         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2846         int nr = sattr->nr;
2847         int index = sattr->index;
2848         unsigned long val;
2849         int err;
2850
2851         err = kstrtoul(buf, 10, &val);
2852         if (err < 0)
2853                 return err;
2854
2855         val = step_time_to_reg(val, data->pwm_mode[nr]);
2856         mutex_lock(&data->update_lock);
2857         data->fan_time[index][nr] = val;
2858         nct6775_write_value(data, data->REG_FAN_TIME[index][nr], val);
2859         mutex_unlock(&data->update_lock);
2860         return count;
2861 }
2862
2863 static ssize_t
2864 show_auto_pwm(struct device *dev, struct device_attribute *attr, char *buf)
2865 {
2866         struct nct6775_data *data = nct6775_update_device(dev);
2867         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2868
2869         return sprintf(buf, "%d\n", data->auto_pwm[sattr->nr][sattr->index]);
2870 }
2871
2872 static ssize_t
2873 store_auto_pwm(struct device *dev, struct device_attribute *attr,
2874                const char *buf, size_t count)
2875 {
2876         struct nct6775_data *data = dev_get_drvdata(dev);
2877         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2878         int nr = sattr->nr;
2879         int point = sattr->index;
2880         unsigned long val;
2881         int err;
2882         u8 reg;
2883
2884         err = kstrtoul(buf, 10, &val);
2885         if (err < 0)
2886                 return err;
2887         if (val > 255)
2888                 return -EINVAL;
2889
2890         if (point == data->auto_pwm_num) {
2891                 if (data->kind != nct6775 && !val)
2892                         return -EINVAL;
2893                 if (data->kind != nct6779 && val)
2894                         val = 0xff;
2895         }
2896
2897         mutex_lock(&data->update_lock);
2898         data->auto_pwm[nr][point] = val;
2899         if (point < data->auto_pwm_num) {
2900                 nct6775_write_value(data,
2901                                     NCT6775_AUTO_PWM(data, nr, point),
2902                                     data->auto_pwm[nr][point]);
2903         } else {
2904                 switch (data->kind) {
2905                 case nct6775:
2906                         /* disable if needed (pwm == 0) */
2907                         reg = nct6775_read_value(data,
2908                                                  NCT6775_REG_CRITICAL_ENAB[nr]);
2909                         if (val)
2910                                 reg |= 0x02;
2911                         else
2912                                 reg &= ~0x02;
2913                         nct6775_write_value(data, NCT6775_REG_CRITICAL_ENAB[nr],
2914                                             reg);
2915                         break;
2916                 case nct6776:
2917                         break; /* always enabled, nothing to do */
2918                 case nct6106:
2919                 case nct6779:
2920                 case nct6791:
2921                 case nct6792:
2922                 case nct6793:
2923                         nct6775_write_value(data, data->REG_CRITICAL_PWM[nr],
2924                                             val);
2925                         reg = nct6775_read_value(data,
2926                                         data->REG_CRITICAL_PWM_ENABLE[nr]);
2927                         if (val == 255)
2928                                 reg &= ~data->CRITICAL_PWM_ENABLE_MASK;
2929                         else
2930                                 reg |= data->CRITICAL_PWM_ENABLE_MASK;
2931                         nct6775_write_value(data,
2932                                             data->REG_CRITICAL_PWM_ENABLE[nr],
2933                                             reg);
2934                         break;
2935                 }
2936         }
2937         mutex_unlock(&data->update_lock);
2938         return count;
2939 }
2940
2941 static ssize_t
2942 show_auto_temp(struct device *dev, struct device_attribute *attr, char *buf)
2943 {
2944         struct nct6775_data *data = nct6775_update_device(dev);
2945         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2946         int nr = sattr->nr;
2947         int point = sattr->index;
2948
2949         /*
2950          * We don't know for sure if the temperature is signed or unsigned.
2951          * Assume it is unsigned.
2952          */
2953         return sprintf(buf, "%d\n", data->auto_temp[nr][point] * 1000);
2954 }
2955
2956 static ssize_t
2957 store_auto_temp(struct device *dev, struct device_attribute *attr,
2958                 const char *buf, size_t count)
2959 {
2960         struct nct6775_data *data = dev_get_drvdata(dev);
2961         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2962         int nr = sattr->nr;
2963         int point = sattr->index;
2964         unsigned long val;
2965         int err;
2966
2967         err = kstrtoul(buf, 10, &val);
2968         if (err)
2969                 return err;
2970         if (val > 255000)
2971                 return -EINVAL;
2972
2973         mutex_lock(&data->update_lock);
2974         data->auto_temp[nr][point] = DIV_ROUND_CLOSEST(val, 1000);
2975         if (point < data->auto_pwm_num) {
2976                 nct6775_write_value(data,
2977                                     NCT6775_AUTO_TEMP(data, nr, point),
2978                                     data->auto_temp[nr][point]);
2979         } else {
2980                 nct6775_write_value(data, data->REG_CRITICAL_TEMP[nr],
2981                                     data->auto_temp[nr][point]);
2982         }
2983         mutex_unlock(&data->update_lock);
2984         return count;
2985 }
2986
2987 static umode_t nct6775_pwm_is_visible(struct kobject *kobj,
2988                                       struct attribute *attr, int index)
2989 {
2990         struct device *dev = container_of(kobj, struct device, kobj);
2991         struct nct6775_data *data = dev_get_drvdata(dev);
2992         int pwm = index / 36;   /* pwm index */
2993         int nr = index % 36;    /* attribute index */
2994
2995         if (!(data->has_pwm & (1 << pwm)))
2996                 return 0;
2997
2998         if ((nr >= 14 && nr <= 18) || nr == 21)   /* weight */
2999                 if (!data->REG_WEIGHT_TEMP_SEL[pwm])
3000                         return 0;
3001         if (nr == 19 && data->REG_PWM[3] == NULL) /* pwm_max */
3002                 return 0;
3003         if (nr == 20 && data->REG_PWM[4] == NULL) /* pwm_step */
3004                 return 0;
3005         if (nr == 21 && data->REG_PWM[6] == NULL) /* weight_duty_base */
3006                 return 0;
3007
3008         if (nr >= 22 && nr <= 35) {             /* auto point */
3009                 int api = (nr - 22) / 2;        /* auto point index */
3010
3011                 if (api > data->auto_pwm_num)
3012                         return 0;
3013         }
3014         return attr->mode;
3015 }
3016
3017 SENSOR_TEMPLATE_2(pwm_stop_time, "pwm%d_stop_time", S_IWUSR | S_IRUGO,
3018                   show_fan_time, store_fan_time, 0, 0);
3019 SENSOR_TEMPLATE_2(pwm_step_up_time, "pwm%d_step_up_time", S_IWUSR | S_IRUGO,
3020                   show_fan_time, store_fan_time, 0, 1);
3021 SENSOR_TEMPLATE_2(pwm_step_down_time, "pwm%d_step_down_time", S_IWUSR | S_IRUGO,
3022                   show_fan_time, store_fan_time, 0, 2);
3023 SENSOR_TEMPLATE_2(pwm_start, "pwm%d_start", S_IWUSR | S_IRUGO, show_pwm,
3024                   store_pwm, 0, 1);
3025 SENSOR_TEMPLATE_2(pwm_floor, "pwm%d_floor", S_IWUSR | S_IRUGO, show_pwm,
3026                   store_pwm, 0, 2);
3027 SENSOR_TEMPLATE_2(pwm_temp_tolerance, "pwm%d_temp_tolerance", S_IWUSR | S_IRUGO,
3028                   show_temp_tolerance, store_temp_tolerance, 0, 0);
3029 SENSOR_TEMPLATE_2(pwm_crit_temp_tolerance, "pwm%d_crit_temp_tolerance",
3030                   S_IWUSR | S_IRUGO, show_temp_tolerance, store_temp_tolerance,
3031                   0, 1);
3032
3033 SENSOR_TEMPLATE_2(pwm_max, "pwm%d_max", S_IWUSR | S_IRUGO, show_pwm, store_pwm,
3034                   0, 3);
3035
3036 SENSOR_TEMPLATE_2(pwm_step, "pwm%d_step", S_IWUSR | S_IRUGO, show_pwm,
3037                   store_pwm, 0, 4);
3038
3039 SENSOR_TEMPLATE_2(pwm_auto_point1_pwm, "pwm%d_auto_point1_pwm",
3040                   S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 0);
3041 SENSOR_TEMPLATE_2(pwm_auto_point1_temp, "pwm%d_auto_point1_temp",
3042                   S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 0);
3043
3044 SENSOR_TEMPLATE_2(pwm_auto_point2_pwm, "pwm%d_auto_point2_pwm",
3045                   S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 1);
3046 SENSOR_TEMPLATE_2(pwm_auto_point2_temp, "pwm%d_auto_point2_temp",
3047                   S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 1);
3048
3049 SENSOR_TEMPLATE_2(pwm_auto_point3_pwm, "pwm%d_auto_point3_pwm",
3050                   S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 2);
3051 SENSOR_TEMPLATE_2(pwm_auto_point3_temp, "pwm%d_auto_point3_temp",
3052                   S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 2);
3053
3054 SENSOR_TEMPLATE_2(pwm_auto_point4_pwm, "pwm%d_auto_point4_pwm",
3055                   S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 3);
3056 SENSOR_TEMPLATE_2(pwm_auto_point4_temp, "pwm%d_auto_point4_temp",
3057                   S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 3);
3058
3059 SENSOR_TEMPLATE_2(pwm_auto_point5_pwm, "pwm%d_auto_point5_pwm",
3060                   S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 4);
3061 SENSOR_TEMPLATE_2(pwm_auto_point5_temp, "pwm%d_auto_point5_temp",
3062                   S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 4);
3063
3064 SENSOR_TEMPLATE_2(pwm_auto_point6_pwm, "pwm%d_auto_point6_pwm",
3065                   S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 5);
3066 SENSOR_TEMPLATE_2(pwm_auto_point6_temp, "pwm%d_auto_point6_temp",
3067                   S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 5);
3068
3069 SENSOR_TEMPLATE_2(pwm_auto_point7_pwm, "pwm%d_auto_point7_pwm",
3070                   S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 6);
3071 SENSOR_TEMPLATE_2(pwm_auto_point7_temp, "pwm%d_auto_point7_temp",
3072                   S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 6);
3073
3074 /*
3075  * nct6775_pwm_is_visible uses the index into the following array
3076  * to determine if attributes should be created or not.
3077  * Any change in order or content must be matched.
3078  */
3079 static struct sensor_device_template *nct6775_attributes_pwm_template[] = {
3080         &sensor_dev_template_pwm,
3081         &sensor_dev_template_pwm_mode,
3082         &sensor_dev_template_pwm_enable,
3083         &sensor_dev_template_pwm_temp_sel,
3084         &sensor_dev_template_pwm_temp_tolerance,
3085         &sensor_dev_template_pwm_crit_temp_tolerance,
3086         &sensor_dev_template_pwm_target_temp,
3087         &sensor_dev_template_fan_target,
3088         &sensor_dev_template_fan_tolerance,
3089         &sensor_dev_template_pwm_stop_time,
3090         &sensor_dev_template_pwm_step_up_time,
3091         &sensor_dev_template_pwm_step_down_time,
3092         &sensor_dev_template_pwm_start,
3093         &sensor_dev_template_pwm_floor,
3094         &sensor_dev_template_pwm_weight_temp_sel,       /* 14 */
3095         &sensor_dev_template_pwm_weight_temp_step,
3096         &sensor_dev_template_pwm_weight_temp_step_tol,
3097         &sensor_dev_template_pwm_weight_temp_step_base,
3098         &sensor_dev_template_pwm_weight_duty_step,      /* 18 */
3099         &sensor_dev_template_pwm_max,                   /* 19 */
3100         &sensor_dev_template_pwm_step,                  /* 20 */
3101         &sensor_dev_template_pwm_weight_duty_base,      /* 21 */
3102         &sensor_dev_template_pwm_auto_point1_pwm,       /* 22 */
3103         &sensor_dev_template_pwm_auto_point1_temp,
3104         &sensor_dev_template_pwm_auto_point2_pwm,
3105         &sensor_dev_template_pwm_auto_point2_temp,
3106         &sensor_dev_template_pwm_auto_point3_pwm,
3107         &sensor_dev_template_pwm_auto_point3_temp,
3108         &sensor_dev_template_pwm_auto_point4_pwm,
3109         &sensor_dev_template_pwm_auto_point4_temp,
3110         &sensor_dev_template_pwm_auto_point5_pwm,
3111         &sensor_dev_template_pwm_auto_point5_temp,
3112         &sensor_dev_template_pwm_auto_point6_pwm,
3113         &sensor_dev_template_pwm_auto_point6_temp,
3114         &sensor_dev_template_pwm_auto_point7_pwm,
3115         &sensor_dev_template_pwm_auto_point7_temp,      /* 35 */
3116
3117         NULL
3118 };
3119
3120 static struct sensor_template_group nct6775_pwm_template_group = {
3121         .templates = nct6775_attributes_pwm_template,
3122         .is_visible = nct6775_pwm_is_visible,
3123         .base = 1,
3124 };
3125
3126 static ssize_t
3127 show_vid(struct device *dev, struct device_attribute *attr, char *buf)
3128 {
3129         struct nct6775_data *data = dev_get_drvdata(dev);
3130
3131         return sprintf(buf, "%d\n", vid_from_reg(data->vid, data->vrm));
3132 }
3133
3134 static DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid, NULL);
3135
3136 /* Case open detection */
3137
3138 static ssize_t
3139 clear_caseopen(struct device *dev, struct device_attribute *attr,
3140                const char *buf, size_t count)
3141 {
3142         struct nct6775_data *data = dev_get_drvdata(dev);
3143         int nr = to_sensor_dev_attr(attr)->index - INTRUSION_ALARM_BASE;
3144         unsigned long val;
3145         u8 reg;
3146         int ret;
3147
3148         if (kstrtoul(buf, 10, &val) || val != 0)
3149                 return -EINVAL;
3150
3151         mutex_lock(&data->update_lock);
3152
3153         /*
3154          * Use CR registers to clear caseopen status.
3155          * The CR registers are the same for all chips, and not all chips
3156          * support clearing the caseopen status through "regular" registers.
3157          */
3158         ret = superio_enter(data->sioreg);
3159         if (ret) {
3160                 count = ret;
3161                 goto error;
3162         }
3163
3164         superio_select(data->sioreg, NCT6775_LD_ACPI);
3165         reg = superio_inb(data->sioreg, NCT6775_REG_CR_CASEOPEN_CLR[nr]);
3166         reg |= NCT6775_CR_CASEOPEN_CLR_MASK[nr];
3167         superio_outb(data->sioreg, NCT6775_REG_CR_CASEOPEN_CLR[nr], reg);
3168         reg &= ~NCT6775_CR_CASEOPEN_CLR_MASK[nr];
3169         superio_outb(data->sioreg, NCT6775_REG_CR_CASEOPEN_CLR[nr], reg);
3170         superio_exit(data->sioreg);
3171
3172         data->valid = false;    /* Force cache refresh */
3173 error:
3174         mutex_unlock(&data->update_lock);
3175         return count;
3176 }
3177
3178 static SENSOR_DEVICE_ATTR(intrusion0_alarm, S_IWUSR | S_IRUGO, show_alarm,
3179                           clear_caseopen, INTRUSION_ALARM_BASE);
3180 static SENSOR_DEVICE_ATTR(intrusion1_alarm, S_IWUSR | S_IRUGO, show_alarm,
3181                           clear_caseopen, INTRUSION_ALARM_BASE + 1);
3182 static SENSOR_DEVICE_ATTR(intrusion0_beep, S_IWUSR | S_IRUGO, show_beep,
3183                           store_beep, INTRUSION_ALARM_BASE);
3184 static SENSOR_DEVICE_ATTR(intrusion1_beep, S_IWUSR | S_IRUGO, show_beep,
3185                           store_beep, INTRUSION_ALARM_BASE + 1);
3186 static SENSOR_DEVICE_ATTR(beep_enable, S_IWUSR | S_IRUGO, show_beep,
3187                           store_beep, BEEP_ENABLE_BASE);
3188
3189 static umode_t nct6775_other_is_visible(struct kobject *kobj,
3190                                         struct attribute *attr, int index)
3191 {
3192         struct device *dev = container_of(kobj, struct device, kobj);
3193         struct nct6775_data *data = dev_get_drvdata(dev);
3194
3195         if (index == 0 && !data->have_vid)
3196                 return 0;
3197
3198         if (index == 1 || index == 2) {
3199                 if (data->ALARM_BITS[INTRUSION_ALARM_BASE + index - 1] < 0)
3200                         return 0;
3201         }
3202
3203         if (index == 3 || index == 4) {
3204                 if (data->BEEP_BITS[INTRUSION_ALARM_BASE + index - 3] < 0)
3205                         return 0;
3206         }
3207
3208         return attr->mode;
3209 }
3210
3211 /*
3212  * nct6775_other_is_visible uses the index into the following array
3213  * to determine if attributes should be created or not.
3214  * Any change in order or content must be matched.
3215  */
3216 static struct attribute *nct6775_attributes_other[] = {
3217         &dev_attr_cpu0_vid.attr,                                /* 0 */
3218         &sensor_dev_attr_intrusion0_alarm.dev_attr.attr,        /* 1 */
3219         &sensor_dev_attr_intrusion1_alarm.dev_attr.attr,        /* 2 */
3220         &sensor_dev_attr_intrusion0_beep.dev_attr.attr,         /* 3 */
3221         &sensor_dev_attr_intrusion1_beep.dev_attr.attr,         /* 4 */
3222         &sensor_dev_attr_beep_enable.dev_attr.attr,             /* 5 */
3223
3224         NULL
3225 };
3226
3227 static const struct attribute_group nct6775_group_other = {
3228         .attrs = nct6775_attributes_other,
3229         .is_visible = nct6775_other_is_visible,
3230 };
3231
3232 static inline void nct6775_init_device(struct nct6775_data *data)
3233 {
3234         int i;
3235         u8 tmp, diode;
3236
3237         /* Start monitoring if needed */
3238         if (data->REG_CONFIG) {
3239                 tmp = nct6775_read_value(data, data->REG_CONFIG);
3240                 if (!(tmp & 0x01))
3241                         nct6775_write_value(data, data->REG_CONFIG, tmp | 0x01);
3242         }
3243
3244         /* Enable temperature sensors if needed */
3245         for (i = 0; i < NUM_TEMP; i++) {
3246                 if (!(data->have_temp & (1 << i)))
3247                         continue;
3248                 if (!data->reg_temp_config[i])
3249                         continue;
3250                 tmp = nct6775_read_value(data, data->reg_temp_config[i]);
3251                 if (tmp & 0x01)
3252                         nct6775_write_value(data, data->reg_temp_config[i],
3253                                             tmp & 0xfe);
3254         }
3255
3256         /* Enable VBAT monitoring if needed */
3257         tmp = nct6775_read_value(data, data->REG_VBAT);
3258         if (!(tmp & 0x01))
3259                 nct6775_write_value(data, data->REG_VBAT, tmp | 0x01);
3260
3261         diode = nct6775_read_value(data, data->REG_DIODE);
3262
3263         for (i = 0; i < data->temp_fixed_num; i++) {
3264                 if (!(data->have_temp_fixed & (1 << i)))
3265                         continue;
3266                 if ((tmp & (data->DIODE_MASK << i)))    /* diode */
3267                         data->temp_type[i]
3268                           = 3 - ((diode >> i) & data->DIODE_MASK);
3269                 else                            /* thermistor */
3270                         data->temp_type[i] = 4;
3271         }
3272 }
3273
3274 static void
3275 nct6775_check_fan_inputs(struct nct6775_data *data)
3276 {
3277         bool fan3pin, fan4pin, fan4min, fan5pin, fan6pin;
3278         bool pwm3pin, pwm4pin, pwm5pin, pwm6pin;
3279         int sioreg = data->sioreg;
3280         int regval;
3281
3282         /* Store SIO_REG_ENABLE for use during resume */
3283         superio_select(sioreg, NCT6775_LD_HWM);
3284         data->sio_reg_enable = superio_inb(sioreg, SIO_REG_ENABLE);
3285
3286         /* fan4 and fan5 share some pins with the GPIO and serial flash */
3287         if (data->kind == nct6775) {
3288                 regval = superio_inb(sioreg, 0x2c);
3289
3290                 fan3pin = regval & (1 << 6);
3291                 pwm3pin = regval & (1 << 7);
3292
3293                 /* On NCT6775, fan4 shares pins with the fdc interface */
3294                 fan4pin = !(superio_inb(sioreg, 0x2A) & 0x80);
3295                 fan4min = false;
3296                 fan5pin = false;
3297                 fan6pin = false;
3298                 pwm4pin = false;
3299                 pwm5pin = false;
3300                 pwm6pin = false;
3301         } else if (data->kind == nct6776) {
3302                 bool gpok = superio_inb(sioreg, 0x27) & 0x80;
3303                 const char *board_vendor, *board_name;
3304
3305                 board_vendor = dmi_get_system_info(DMI_BOARD_VENDOR);
3306                 board_name = dmi_get_system_info(DMI_BOARD_NAME);
3307
3308                 if (board_name && board_vendor &&
3309                     !strcmp(board_vendor, "ASRock")) {
3310                         /*
3311                          * Auxiliary fan monitoring is not enabled on ASRock
3312                          * Z77 Pro4-M if booted in UEFI Ultra-FastBoot mode.
3313                          * Observed with BIOS version 2.00.
3314                          */
3315                         if (!strcmp(board_name, "Z77 Pro4-M")) {
3316                                 if ((data->sio_reg_enable & 0xe0) != 0xe0) {
3317                                         data->sio_reg_enable |= 0xe0;
3318                                         superio_outb(sioreg, SIO_REG_ENABLE,
3319                                                      data->sio_reg_enable);
3320                                 }
3321                         }
3322                 }
3323
3324                 if (data->sio_reg_enable & 0x80)
3325                         fan3pin = gpok;
3326                 else
3327                         fan3pin = !(superio_inb(sioreg, 0x24) & 0x40);
3328
3329                 if (data->sio_reg_enable & 0x40)
3330                         fan4pin = gpok;
3331                 else
3332                         fan4pin = superio_inb(sioreg, 0x1C) & 0x01;
3333
3334                 if (data->sio_reg_enable & 0x20)
3335                         fan5pin = gpok;
3336                 else
3337                         fan5pin = superio_inb(sioreg, 0x1C) & 0x02;
3338
3339                 fan4min = fan4pin;
3340                 fan6pin = false;
3341                 pwm3pin = fan3pin;
3342                 pwm4pin = false;
3343                 pwm5pin = false;
3344                 pwm6pin = false;
3345         } else if (data->kind == nct6106) {
3346                 regval = superio_inb(sioreg, 0x24);
3347                 fan3pin = !(regval & 0x80);
3348                 pwm3pin = regval & 0x08;
3349
3350                 fan4pin = false;
3351                 fan4min = false;
3352                 fan5pin = false;
3353                 fan6pin = false;
3354                 pwm4pin = false;
3355                 pwm5pin = false;
3356                 pwm6pin = false;
3357         } else {        /* NCT6779D, NCT6791D, NCT6792D, or NCT6793D */
3358                 regval = superio_inb(sioreg, 0x1c);
3359
3360                 fan3pin = !(regval & (1 << 5));
3361                 fan4pin = !(regval & (1 << 6));
3362                 fan5pin = !(regval & (1 << 7));
3363
3364                 pwm3pin = !(regval & (1 << 0));
3365                 pwm4pin = !(regval & (1 << 1));
3366                 pwm5pin = !(regval & (1 << 2));
3367
3368                 fan4min = fan4pin;
3369
3370                 if (data->kind == nct6791 || data->kind == nct6792 ||
3371                     data->kind == nct6793) {
3372                         regval = superio_inb(sioreg, 0x2d);
3373                         fan6pin = (regval & (1 << 1));
3374                         pwm6pin = (regval & (1 << 0));
3375                 } else {        /* NCT6779D */
3376                         fan6pin = false;
3377                         pwm6pin = false;
3378                 }
3379         }
3380
3381         /* fan 1 and 2 (0x03) are always present */
3382         data->has_fan = 0x03 | (fan3pin << 2) | (fan4pin << 3) |
3383                 (fan5pin << 4) | (fan6pin << 5);
3384         data->has_fan_min = 0x03 | (fan3pin << 2) | (fan4min << 3) |
3385                 (fan5pin << 4);
3386         data->has_pwm = 0x03 | (pwm3pin << 2) | (pwm4pin << 3) |
3387                 (pwm5pin << 4) | (pwm6pin << 5);
3388 }
3389
3390 static void add_temp_sensors(struct nct6775_data *data, const u16 *regp,
3391                              int *available, int *mask)
3392 {
3393         int i;
3394         u8 src;
3395
3396         for (i = 0; i < data->pwm_num && *available; i++) {
3397                 int index;
3398
3399                 if (!regp[i])
3400                         continue;
3401                 src = nct6775_read_value(data, regp[i]);
3402                 src &= 0x1f;
3403                 if (!src || (*mask & (1 << src)))
3404                         continue;
3405                 if (src >= data->temp_label_num ||
3406                     !strlen(data->temp_label[src]))
3407                         continue;
3408
3409                 index = __ffs(*available);
3410                 nct6775_write_value(data, data->REG_TEMP_SOURCE[index], src);
3411                 *available &= ~(1 << index);
3412                 *mask |= 1 << src;
3413         }
3414 }
3415
3416 static int nct6775_probe(struct platform_device *pdev)
3417 {
3418         struct device *dev = &pdev->dev;
3419         struct nct6775_sio_data *sio_data = dev_get_platdata(dev);
3420         struct nct6775_data *data;
3421         struct resource *res;
3422         int i, s, err = 0;
3423         int src, mask, available;
3424         const u16 *reg_temp, *reg_temp_over, *reg_temp_hyst, *reg_temp_config;
3425         const u16 *reg_temp_mon, *reg_temp_alternate, *reg_temp_crit;
3426         const u16 *reg_temp_crit_l = NULL, *reg_temp_crit_h = NULL;
3427         int num_reg_temp, num_reg_temp_mon;
3428         u8 cr2a;
3429         struct attribute_group *group;
3430         struct device *hwmon_dev;
3431         int num_attr_groups = 0;
3432
3433         res = platform_get_resource(pdev, IORESOURCE_IO, 0);
3434         if (!devm_request_region(&pdev->dev, res->start, IOREGION_LENGTH,
3435                                  DRVNAME))
3436                 return -EBUSY;
3437
3438         data = devm_kzalloc(&pdev->dev, sizeof(struct nct6775_data),
3439                             GFP_KERNEL);
3440         if (!data)
3441                 return -ENOMEM;
3442
3443         data->kind = sio_data->kind;
3444         data->sioreg = sio_data->sioreg;
3445         data->addr = res->start;
3446         mutex_init(&data->update_lock);
3447         data->name = nct6775_device_names[data->kind];
3448         data->bank = 0xff;              /* Force initial bank selection */
3449         platform_set_drvdata(pdev, data);
3450
3451         switch (data->kind) {
3452         case nct6106:
3453                 data->in_num = 9;
3454                 data->pwm_num = 3;
3455                 data->auto_pwm_num = 4;
3456                 data->temp_fixed_num = 3;
3457                 data->num_temp_alarms = 6;
3458                 data->num_temp_beeps = 6;
3459
3460                 data->fan_from_reg = fan_from_reg13;
3461                 data->fan_from_reg_min = fan_from_reg13;
3462
3463                 data->temp_label = nct6776_temp_label;
3464                 data->temp_label_num = ARRAY_SIZE(nct6776_temp_label);
3465
3466                 data->REG_VBAT = NCT6106_REG_VBAT;
3467                 data->REG_DIODE = NCT6106_REG_DIODE;
3468                 data->DIODE_MASK = NCT6106_DIODE_MASK;
3469                 data->REG_VIN = NCT6106_REG_IN;
3470                 data->REG_IN_MINMAX[0] = NCT6106_REG_IN_MIN;
3471                 data->REG_IN_MINMAX[1] = NCT6106_REG_IN_MAX;
3472                 data->REG_TARGET = NCT6106_REG_TARGET;
3473                 data->REG_FAN = NCT6106_REG_FAN;
3474                 data->REG_FAN_MODE = NCT6106_REG_FAN_MODE;
3475                 data->REG_FAN_MIN = NCT6106_REG_FAN_MIN;
3476                 data->REG_FAN_PULSES = NCT6106_REG_FAN_PULSES;
3477                 data->FAN_PULSE_SHIFT = NCT6106_FAN_PULSE_SHIFT;
3478                 data->REG_FAN_TIME[0] = NCT6106_REG_FAN_STOP_TIME;
3479                 data->REG_FAN_TIME[1] = NCT6106_REG_FAN_STEP_UP_TIME;
3480                 data->REG_FAN_TIME[2] = NCT6106_REG_FAN_STEP_DOWN_TIME;
3481                 data->REG_PWM[0] = NCT6106_REG_PWM;
3482                 data->REG_PWM[1] = NCT6106_REG_FAN_START_OUTPUT;
3483                 data->REG_PWM[2] = NCT6106_REG_FAN_STOP_OUTPUT;
3484                 data->REG_PWM[5] = NCT6106_REG_WEIGHT_DUTY_STEP;
3485                 data->REG_PWM[6] = NCT6106_REG_WEIGHT_DUTY_BASE;
3486                 data->REG_PWM_READ = NCT6106_REG_PWM_READ;
3487                 data->REG_PWM_MODE = NCT6106_REG_PWM_MODE;
3488                 data->PWM_MODE_MASK = NCT6106_PWM_MODE_MASK;
3489                 data->REG_AUTO_TEMP = NCT6106_REG_AUTO_TEMP;
3490                 data->REG_AUTO_PWM = NCT6106_REG_AUTO_PWM;
3491                 data->REG_CRITICAL_TEMP = NCT6106_REG_CRITICAL_TEMP;
3492                 data->REG_CRITICAL_TEMP_TOLERANCE
3493                   = NCT6106_REG_CRITICAL_TEMP_TOLERANCE;
3494                 data->REG_CRITICAL_PWM_ENABLE = NCT6106_REG_CRITICAL_PWM_ENABLE;
3495                 data->CRITICAL_PWM_ENABLE_MASK
3496                   = NCT6106_CRITICAL_PWM_ENABLE_MASK;
3497                 data->REG_CRITICAL_PWM = NCT6106_REG_CRITICAL_PWM;
3498                 data->REG_TEMP_OFFSET = NCT6106_REG_TEMP_OFFSET;
3499                 data->REG_TEMP_SOURCE = NCT6106_REG_TEMP_SOURCE;
3500                 data->REG_TEMP_SEL = NCT6106_REG_TEMP_SEL;
3501                 data->REG_WEIGHT_TEMP_SEL = NCT6106_REG_WEIGHT_TEMP_SEL;
3502                 data->REG_WEIGHT_TEMP[0] = NCT6106_REG_WEIGHT_TEMP_STEP;
3503                 data->REG_WEIGHT_TEMP[1] = NCT6106_REG_WEIGHT_TEMP_STEP_TOL;
3504                 data->REG_WEIGHT_TEMP[2] = NCT6106_REG_WEIGHT_TEMP_BASE;
3505                 data->REG_ALARM = NCT6106_REG_ALARM;
3506                 data->ALARM_BITS = NCT6106_ALARM_BITS;
3507                 data->REG_BEEP = NCT6106_REG_BEEP;
3508                 data->BEEP_BITS = NCT6106_BEEP_BITS;
3509
3510                 reg_temp = NCT6106_REG_TEMP;
3511                 reg_temp_mon = NCT6106_REG_TEMP_MON;
3512                 num_reg_temp = ARRAY_SIZE(NCT6106_REG_TEMP);
3513                 num_reg_temp_mon = ARRAY_SIZE(NCT6106_REG_TEMP_MON);
3514                 reg_temp_over = NCT6106_REG_TEMP_OVER;
3515                 reg_temp_hyst = NCT6106_REG_TEMP_HYST;
3516                 reg_temp_config = NCT6106_REG_TEMP_CONFIG;
3517                 reg_temp_alternate = NCT6106_REG_TEMP_ALTERNATE;
3518                 reg_temp_crit = NCT6106_REG_TEMP_CRIT;
3519                 reg_temp_crit_l = NCT6106_REG_TEMP_CRIT_L;
3520                 reg_temp_crit_h = NCT6106_REG_TEMP_CRIT_H;
3521
3522                 break;
3523         case nct6775:
3524                 data->in_num = 9;
3525                 data->pwm_num = 3;
3526                 data->auto_pwm_num = 6;
3527                 data->has_fan_div = true;
3528                 data->temp_fixed_num = 3;
3529                 data->num_temp_alarms = 3;
3530                 data->num_temp_beeps = 3;
3531
3532                 data->ALARM_BITS = NCT6775_ALARM_BITS;
3533                 data->BEEP_BITS = NCT6775_BEEP_BITS;
3534
3535                 data->fan_from_reg = fan_from_reg16;
3536                 data->fan_from_reg_min = fan_from_reg8;
3537                 data->target_temp_mask = 0x7f;
3538                 data->tolerance_mask = 0x0f;
3539                 data->speed_tolerance_limit = 15;
3540
3541                 data->temp_label = nct6775_temp_label;
3542                 data->temp_label_num = ARRAY_SIZE(nct6775_temp_label);
3543
3544                 data->REG_CONFIG = NCT6775_REG_CONFIG;
3545                 data->REG_VBAT = NCT6775_REG_VBAT;
3546                 data->REG_DIODE = NCT6775_REG_DIODE;
3547                 data->DIODE_MASK = NCT6775_DIODE_MASK;
3548                 data->REG_VIN = NCT6775_REG_IN;
3549                 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
3550                 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
3551                 data->REG_TARGET = NCT6775_REG_TARGET;
3552                 data->REG_FAN = NCT6775_REG_FAN;
3553                 data->REG_FAN_MODE = NCT6775_REG_FAN_MODE;
3554                 data->REG_FAN_MIN = NCT6775_REG_FAN_MIN;
3555                 data->REG_FAN_PULSES = NCT6775_REG_FAN_PULSES;
3556                 data->FAN_PULSE_SHIFT = NCT6775_FAN_PULSE_SHIFT;
3557                 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME;
3558                 data->REG_FAN_TIME[1] = NCT6775_REG_FAN_STEP_UP_TIME;
3559                 data->REG_FAN_TIME[2] = NCT6775_REG_FAN_STEP_DOWN_TIME;
3560                 data->REG_PWM[0] = NCT6775_REG_PWM;
3561                 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT;
3562                 data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT;
3563                 data->REG_PWM[3] = NCT6775_REG_FAN_MAX_OUTPUT;
3564                 data->REG_PWM[4] = NCT6775_REG_FAN_STEP_OUTPUT;
3565                 data->REG_PWM[5] = NCT6775_REG_WEIGHT_DUTY_STEP;
3566                 data->REG_PWM_READ = NCT6775_REG_PWM_READ;
3567                 data->REG_PWM_MODE = NCT6775_REG_PWM_MODE;
3568                 data->PWM_MODE_MASK = NCT6775_PWM_MODE_MASK;
3569                 data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP;
3570                 data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM;
3571                 data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP;
3572                 data->REG_CRITICAL_TEMP_TOLERANCE
3573                   = NCT6775_REG_CRITICAL_TEMP_TOLERANCE;
3574                 data->REG_TEMP_OFFSET = NCT6775_REG_TEMP_OFFSET;
3575                 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
3576                 data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL;
3577                 data->REG_WEIGHT_TEMP_SEL = NCT6775_REG_WEIGHT_TEMP_SEL;
3578                 data->REG_WEIGHT_TEMP[0] = NCT6775_REG_WEIGHT_TEMP_STEP;
3579                 data->REG_WEIGHT_TEMP[1] = NCT6775_REG_WEIGHT_TEMP_STEP_TOL;
3580                 data->REG_WEIGHT_TEMP[2] = NCT6775_REG_WEIGHT_TEMP_BASE;
3581                 data->REG_ALARM = NCT6775_REG_ALARM;
3582                 data->REG_BEEP = NCT6775_REG_BEEP;
3583
3584                 reg_temp = NCT6775_REG_TEMP;
3585                 reg_temp_mon = NCT6775_REG_TEMP_MON;
3586                 num_reg_temp = ARRAY_SIZE(NCT6775_REG_TEMP);
3587                 num_reg_temp_mon = ARRAY_SIZE(NCT6775_REG_TEMP_MON);
3588                 reg_temp_over = NCT6775_REG_TEMP_OVER;
3589                 reg_temp_hyst = NCT6775_REG_TEMP_HYST;
3590                 reg_temp_config = NCT6775_REG_TEMP_CONFIG;
3591                 reg_temp_alternate = NCT6775_REG_TEMP_ALTERNATE;
3592                 reg_temp_crit = NCT6775_REG_TEMP_CRIT;
3593
3594                 break;
3595         case nct6776:
3596                 data->in_num = 9;
3597                 data->pwm_num = 3;
3598                 data->auto_pwm_num = 4;
3599                 data->has_fan_div = false;
3600                 data->temp_fixed_num = 3;
3601                 data->num_temp_alarms = 3;
3602                 data->num_temp_beeps = 6;
3603
3604                 data->ALARM_BITS = NCT6776_ALARM_BITS;
3605                 data->BEEP_BITS = NCT6776_BEEP_BITS;
3606
3607                 data->fan_from_reg = fan_from_reg13;
3608                 data->fan_from_reg_min = fan_from_reg13;
3609                 data->target_temp_mask = 0xff;
3610                 data->tolerance_mask = 0x07;
3611                 data->speed_tolerance_limit = 63;
3612
3613                 data->temp_label = nct6776_temp_label;
3614                 data->temp_label_num = ARRAY_SIZE(nct6776_temp_label);
3615
3616                 data->REG_CONFIG = NCT6775_REG_CONFIG;
3617                 data->REG_VBAT = NCT6775_REG_VBAT;
3618                 data->REG_DIODE = NCT6775_REG_DIODE;
3619                 data->DIODE_MASK = NCT6775_DIODE_MASK;
3620                 data->REG_VIN = NCT6775_REG_IN;
3621                 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
3622                 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
3623                 data->REG_TARGET = NCT6775_REG_TARGET;
3624                 data->REG_FAN = NCT6775_REG_FAN;
3625                 data->REG_FAN_MODE = NCT6775_REG_FAN_MODE;
3626                 data->REG_FAN_MIN = NCT6776_REG_FAN_MIN;
3627                 data->REG_FAN_PULSES = NCT6776_REG_FAN_PULSES;
3628                 data->FAN_PULSE_SHIFT = NCT6775_FAN_PULSE_SHIFT;
3629                 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME;
3630                 data->REG_FAN_TIME[1] = NCT6776_REG_FAN_STEP_UP_TIME;
3631                 data->REG_FAN_TIME[2] = NCT6776_REG_FAN_STEP_DOWN_TIME;
3632                 data->REG_TOLERANCE_H = NCT6776_REG_TOLERANCE_H;
3633                 data->REG_PWM[0] = NCT6775_REG_PWM;
3634                 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT;
3635                 data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT;
3636                 data->REG_PWM[5] = NCT6775_REG_WEIGHT_DUTY_STEP;
3637                 data->REG_PWM[6] = NCT6776_REG_WEIGHT_DUTY_BASE;
3638                 data->REG_PWM_READ = NCT6775_REG_PWM_READ;
3639                 data->REG_PWM_MODE = NCT6776_REG_PWM_MODE;
3640                 data->PWM_MODE_MASK = NCT6776_PWM_MODE_MASK;
3641                 data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP;
3642                 data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM;
3643                 data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP;
3644                 data->REG_CRITICAL_TEMP_TOLERANCE
3645                   = NCT6775_REG_CRITICAL_TEMP_TOLERANCE;
3646                 data->REG_TEMP_OFFSET = NCT6775_REG_TEMP_OFFSET;
3647                 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
3648                 data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL;
3649                 data->REG_WEIGHT_TEMP_SEL = NCT6775_REG_WEIGHT_TEMP_SEL;
3650                 data->REG_WEIGHT_TEMP[0] = NCT6775_REG_WEIGHT_TEMP_STEP;
3651                 data->REG_WEIGHT_TEMP[1] = NCT6775_REG_WEIGHT_TEMP_STEP_TOL;
3652                 data->REG_WEIGHT_TEMP[2] = NCT6775_REG_WEIGHT_TEMP_BASE;
3653                 data->REG_ALARM = NCT6775_REG_ALARM;
3654                 data->REG_BEEP = NCT6776_REG_BEEP;
3655
3656                 reg_temp = NCT6775_REG_TEMP;
3657                 reg_temp_mon = NCT6775_REG_TEMP_MON;
3658                 num_reg_temp = ARRAY_SIZE(NCT6775_REG_TEMP);
3659                 num_reg_temp_mon = ARRAY_SIZE(NCT6775_REG_TEMP_MON);
3660                 reg_temp_over = NCT6775_REG_TEMP_OVER;
3661                 reg_temp_hyst = NCT6775_REG_TEMP_HYST;
3662                 reg_temp_config = NCT6776_REG_TEMP_CONFIG;
3663                 reg_temp_alternate = NCT6776_REG_TEMP_ALTERNATE;
3664                 reg_temp_crit = NCT6776_REG_TEMP_CRIT;
3665
3666                 break;
3667         case nct6779:
3668                 data->in_num = 15;
3669                 data->pwm_num = 5;
3670                 data->auto_pwm_num = 4;
3671                 data->has_fan_div = false;
3672                 data->temp_fixed_num = 6;
3673                 data->num_temp_alarms = 2;
3674                 data->num_temp_beeps = 2;
3675
3676                 data->ALARM_BITS = NCT6779_ALARM_BITS;
3677                 data->BEEP_BITS = NCT6779_BEEP_BITS;
3678
3679                 data->fan_from_reg = fan_from_reg13;
3680                 data->fan_from_reg_min = fan_from_reg13;
3681                 data->target_temp_mask = 0xff;
3682                 data->tolerance_mask = 0x07;
3683                 data->speed_tolerance_limit = 63;
3684
3685                 data->temp_label = nct6779_temp_label;
3686                 data->temp_label_num = NCT6779_NUM_LABELS;
3687
3688                 data->REG_CONFIG = NCT6775_REG_CONFIG;
3689                 data->REG_VBAT = NCT6775_REG_VBAT;
3690                 data->REG_DIODE = NCT6775_REG_DIODE;
3691                 data->DIODE_MASK = NCT6775_DIODE_MASK;
3692                 data->REG_VIN = NCT6779_REG_IN;
3693                 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
3694                 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
3695                 data->REG_TARGET = NCT6775_REG_TARGET;
3696                 data->REG_FAN = NCT6779_REG_FAN;
3697                 data->REG_FAN_MODE = NCT6775_REG_FAN_MODE;
3698                 data->REG_FAN_MIN = NCT6776_REG_FAN_MIN;
3699                 data->REG_FAN_PULSES = NCT6779_REG_FAN_PULSES;
3700                 data->FAN_PULSE_SHIFT = NCT6775_FAN_PULSE_SHIFT;
3701                 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME;
3702                 data->REG_FAN_TIME[1] = NCT6776_REG_FAN_STEP_UP_TIME;
3703                 data->REG_FAN_TIME[2] = NCT6776_REG_FAN_STEP_DOWN_TIME;
3704                 data->REG_TOLERANCE_H = NCT6776_REG_TOLERANCE_H;
3705                 data->REG_PWM[0] = NCT6775_REG_PWM;
3706                 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT;
3707                 data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT;
3708                 data->REG_PWM[5] = NCT6775_REG_WEIGHT_DUTY_STEP;
3709                 data->REG_PWM[6] = NCT6776_REG_WEIGHT_DUTY_BASE;
3710                 data->REG_PWM_READ = NCT6775_REG_PWM_READ;
3711                 data->REG_PWM_MODE = NCT6776_REG_PWM_MODE;
3712                 data->PWM_MODE_MASK = NCT6776_PWM_MODE_MASK;
3713                 data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP;
3714                 data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM;
3715                 data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP;
3716                 data->REG_CRITICAL_TEMP_TOLERANCE
3717                   = NCT6775_REG_CRITICAL_TEMP_TOLERANCE;
3718                 data->REG_CRITICAL_PWM_ENABLE = NCT6779_REG_CRITICAL_PWM_ENABLE;
3719                 data->CRITICAL_PWM_ENABLE_MASK
3720                   = NCT6779_CRITICAL_PWM_ENABLE_MASK;
3721                 data->REG_CRITICAL_PWM = NCT6779_REG_CRITICAL_PWM;
3722                 data->REG_TEMP_OFFSET = NCT6779_REG_TEMP_OFFSET;
3723                 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
3724                 data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL;
3725                 data->REG_WEIGHT_TEMP_SEL = NCT6775_REG_WEIGHT_TEMP_SEL;
3726                 data->REG_WEIGHT_TEMP[0] = NCT6775_REG_WEIGHT_TEMP_STEP;
3727                 data->REG_WEIGHT_TEMP[1] = NCT6775_REG_WEIGHT_TEMP_STEP_TOL;
3728                 data->REG_WEIGHT_TEMP[2] = NCT6775_REG_WEIGHT_TEMP_BASE;
3729                 data->REG_ALARM = NCT6779_REG_ALARM;
3730                 data->REG_BEEP = NCT6776_REG_BEEP;
3731
3732                 reg_temp = NCT6779_REG_TEMP;
3733                 reg_temp_mon = NCT6779_REG_TEMP_MON;
3734                 num_reg_temp = ARRAY_SIZE(NCT6779_REG_TEMP);
3735                 num_reg_temp_mon = ARRAY_SIZE(NCT6779_REG_TEMP_MON);
3736                 reg_temp_over = NCT6779_REG_TEMP_OVER;
3737                 reg_temp_hyst = NCT6779_REG_TEMP_HYST;
3738                 reg_temp_config = NCT6779_REG_TEMP_CONFIG;
3739                 reg_temp_alternate = NCT6779_REG_TEMP_ALTERNATE;
3740                 reg_temp_crit = NCT6779_REG_TEMP_CRIT;
3741
3742                 break;
3743         case nct6791:
3744         case nct6792:
3745         case nct6793:
3746                 data->in_num = 15;
3747                 data->pwm_num = 6;
3748                 data->auto_pwm_num = 4;
3749                 data->has_fan_div = false;
3750                 data->temp_fixed_num = 6;
3751                 data->num_temp_alarms = 2;
3752                 data->num_temp_beeps = 2;
3753
3754                 data->ALARM_BITS = NCT6791_ALARM_BITS;
3755                 data->BEEP_BITS = NCT6779_BEEP_BITS;
3756
3757                 data->fan_from_reg = fan_from_reg13;
3758                 data->fan_from_reg_min = fan_from_reg13;
3759                 data->target_temp_mask = 0xff;
3760                 data->tolerance_mask = 0x07;
3761                 data->speed_tolerance_limit = 63;
3762
3763                 switch (data->kind) {
3764                 default:
3765                 case nct6791:
3766                         data->temp_label = nct6779_temp_label;
3767                         break;
3768                 case nct6792:
3769                         data->temp_label = nct6792_temp_label;
3770                         break;
3771                 case nct6793:
3772                         data->temp_label = nct6793_temp_label;
3773                         break;
3774                 }
3775                 data->temp_label_num = NCT6791_NUM_LABELS;
3776
3777                 data->REG_CONFIG = NCT6775_REG_CONFIG;
3778                 data->REG_VBAT = NCT6775_REG_VBAT;
3779                 data->REG_DIODE = NCT6775_REG_DIODE;
3780                 data->DIODE_MASK = NCT6775_DIODE_MASK;
3781                 data->REG_VIN = NCT6779_REG_IN;
3782                 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
3783                 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
3784                 data->REG_TARGET = NCT6775_REG_TARGET;
3785                 data->REG_FAN = NCT6779_REG_FAN;
3786                 data->REG_FAN_MODE = NCT6775_REG_FAN_MODE;
3787                 data->REG_FAN_MIN = NCT6776_REG_FAN_MIN;
3788                 data->REG_FAN_PULSES = NCT6779_REG_FAN_PULSES;
3789                 data->FAN_PULSE_SHIFT = NCT6775_FAN_PULSE_SHIFT;
3790                 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME;
3791                 data->REG_FAN_TIME[1] = NCT6776_REG_FAN_STEP_UP_TIME;
3792                 data->REG_FAN_TIME[2] = NCT6776_REG_FAN_STEP_DOWN_TIME;
3793                 data->REG_TOLERANCE_H = NCT6776_REG_TOLERANCE_H;
3794                 data->REG_PWM[0] = NCT6775_REG_PWM;
3795                 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT;
3796                 data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT;
3797                 data->REG_PWM[5] = NCT6791_REG_WEIGHT_DUTY_STEP;
3798                 data->REG_PWM[6] = NCT6791_REG_WEIGHT_DUTY_BASE;
3799                 data->REG_PWM_READ = NCT6775_REG_PWM_READ;
3800                 data->REG_PWM_MODE = NCT6776_REG_PWM_MODE;
3801                 data->PWM_MODE_MASK = NCT6776_PWM_MODE_MASK;
3802                 data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP;
3803                 data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM;
3804                 data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP;
3805                 data->REG_CRITICAL_TEMP_TOLERANCE
3806                   = NCT6775_REG_CRITICAL_TEMP_TOLERANCE;
3807                 data->REG_CRITICAL_PWM_ENABLE = NCT6779_REG_CRITICAL_PWM_ENABLE;
3808                 data->CRITICAL_PWM_ENABLE_MASK
3809                   = NCT6779_CRITICAL_PWM_ENABLE_MASK;
3810                 data->REG_CRITICAL_PWM = NCT6779_REG_CRITICAL_PWM;
3811                 data->REG_TEMP_OFFSET = NCT6779_REG_TEMP_OFFSET;
3812                 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
3813                 data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL;
3814                 data->REG_WEIGHT_TEMP_SEL = NCT6791_REG_WEIGHT_TEMP_SEL;
3815                 data->REG_WEIGHT_TEMP[0] = NCT6791_REG_WEIGHT_TEMP_STEP;
3816                 data->REG_WEIGHT_TEMP[1] = NCT6791_REG_WEIGHT_TEMP_STEP_TOL;
3817                 data->REG_WEIGHT_TEMP[2] = NCT6791_REG_WEIGHT_TEMP_BASE;
3818                 data->REG_ALARM = NCT6791_REG_ALARM;
3819                 if (data->kind == nct6791)
3820                         data->REG_BEEP = NCT6776_REG_BEEP;
3821                 else
3822                         data->REG_BEEP = NCT6792_REG_BEEP;
3823
3824                 reg_temp = NCT6779_REG_TEMP;
3825                 num_reg_temp = ARRAY_SIZE(NCT6779_REG_TEMP);
3826                 if (data->kind == nct6791) {
3827                         reg_temp_mon = NCT6779_REG_TEMP_MON;
3828                         num_reg_temp_mon = ARRAY_SIZE(NCT6779_REG_TEMP_MON);
3829                 } else {
3830                         reg_temp_mon = NCT6792_REG_TEMP_MON;
3831                         num_reg_temp_mon = ARRAY_SIZE(NCT6792_REG_TEMP_MON);
3832                 }
3833                 reg_temp_over = NCT6779_REG_TEMP_OVER;
3834                 reg_temp_hyst = NCT6779_REG_TEMP_HYST;
3835                 reg_temp_config = NCT6779_REG_TEMP_CONFIG;
3836                 reg_temp_alternate = NCT6779_REG_TEMP_ALTERNATE;
3837                 reg_temp_crit = NCT6779_REG_TEMP_CRIT;
3838
3839                 break;
3840         default:
3841                 return -ENODEV;
3842         }
3843         data->have_in = (1 << data->in_num) - 1;
3844         data->have_temp = 0;
3845
3846         /*
3847          * On some boards, not all available temperature sources are monitored,
3848          * even though some of the monitoring registers are unused.
3849          * Get list of unused monitoring registers, then detect if any fan
3850          * controls are configured to use unmonitored temperature sources.
3851          * If so, assign the unmonitored temperature sources to available
3852          * monitoring registers.
3853          */
3854         mask = 0;
3855         available = 0;
3856         for (i = 0; i < num_reg_temp; i++) {
3857                 if (reg_temp[i] == 0)
3858                         continue;
3859
3860                 src = nct6775_read_value(data, data->REG_TEMP_SOURCE[i]) & 0x1f;
3861                 if (!src || (mask & (1 << src)))
3862                         available |= 1 << i;
3863
3864                 mask |= 1 << src;
3865         }
3866
3867         /*
3868          * Now find unmonitored temperature registers and enable monitoring
3869          * if additional monitoring registers are available.
3870          */
3871         add_temp_sensors(data, data->REG_TEMP_SEL, &available, &mask);
3872         add_temp_sensors(data, data->REG_WEIGHT_TEMP_SEL, &available, &mask);
3873
3874         mask = 0;
3875         s = NUM_TEMP_FIXED;     /* First dynamic temperature attribute */
3876         for (i = 0; i < num_reg_temp; i++) {
3877                 if (reg_temp[i] == 0)
3878                         continue;
3879
3880                 src = nct6775_read_value(data, data->REG_TEMP_SOURCE[i]) & 0x1f;
3881                 if (!src || (mask & (1 << src)))
3882                         continue;
3883
3884                 if (src >= data->temp_label_num ||
3885                     !strlen(data->temp_label[src])) {
3886                         dev_info(dev,
3887                                  "Invalid temperature source %d at index %d, source register 0x%x, temp register 0x%x\n",
3888                                  src, i, data->REG_TEMP_SOURCE[i], reg_temp[i]);
3889                         continue;
3890                 }
3891
3892                 mask |= 1 << src;
3893
3894                 /* Use fixed index for SYSTIN(1), CPUTIN(2), AUXTIN(3) */
3895                 if (src <= data->temp_fixed_num) {
3896                         data->have_temp |= 1 << (src - 1);
3897                         data->have_temp_fixed |= 1 << (src - 1);
3898                         data->reg_temp[0][src - 1] = reg_temp[i];
3899                         data->reg_temp[1][src - 1] = reg_temp_over[i];
3900                         data->reg_temp[2][src - 1] = reg_temp_hyst[i];
3901                         if (reg_temp_crit_h && reg_temp_crit_h[i])
3902                                 data->reg_temp[3][src - 1] = reg_temp_crit_h[i];
3903                         else if (reg_temp_crit[src - 1])
3904                                 data->reg_temp[3][src - 1]
3905                                   = reg_temp_crit[src - 1];
3906                         if (reg_temp_crit_l && reg_temp_crit_l[i])
3907                                 data->reg_temp[4][src - 1] = reg_temp_crit_l[i];
3908                         data->reg_temp_config[src - 1] = reg_temp_config[i];
3909                         data->temp_src[src - 1] = src;
3910                         continue;
3911                 }
3912
3913                 if (s >= NUM_TEMP)
3914                         continue;
3915
3916                 /* Use dynamic index for other sources */
3917                 data->have_temp |= 1 << s;
3918                 data->reg_temp[0][s] = reg_temp[i];
3919                 data->reg_temp[1][s] = reg_temp_over[i];
3920                 data->reg_temp[2][s] = reg_temp_hyst[i];
3921                 data->reg_temp_config[s] = reg_temp_config[i];
3922                 if (reg_temp_crit_h && reg_temp_crit_h[i])
3923                         data->reg_temp[3][s] = reg_temp_crit_h[i];
3924                 else if (reg_temp_crit[src - 1])
3925                         data->reg_temp[3][s] = reg_temp_crit[src - 1];
3926                 if (reg_temp_crit_l && reg_temp_crit_l[i])
3927                         data->reg_temp[4][s] = reg_temp_crit_l[i];
3928
3929                 data->temp_src[s] = src;
3930                 s++;
3931         }
3932
3933         /*
3934          * Repeat with temperatures used for fan control.
3935          * This set of registers does not support limits.
3936          */
3937         for (i = 0; i < num_reg_temp_mon; i++) {
3938                 if (reg_temp_mon[i] == 0)
3939                         continue;
3940
3941                 src = nct6775_read_value(data, data->REG_TEMP_SEL[i]) & 0x1f;
3942                 if (!src || (mask & (1 << src)))
3943                         continue;
3944
3945                 if (src >= data->temp_label_num ||
3946                     !strlen(data->temp_label[src])) {
3947                         dev_info(dev,
3948                                  "Invalid temperature source %d at index %d, source register 0x%x, temp register 0x%x\n",
3949                                  src, i, data->REG_TEMP_SEL[i],
3950                                  reg_temp_mon[i]);
3951                         continue;
3952                 }
3953
3954                 mask |= 1 << src;
3955
3956                 /* Use fixed index for SYSTIN(1), CPUTIN(2), AUXTIN(3) */
3957                 if (src <= data->temp_fixed_num) {
3958                         if (data->have_temp & (1 << (src - 1)))
3959                                 continue;
3960                         data->have_temp |= 1 << (src - 1);
3961                         data->have_temp_fixed |= 1 << (src - 1);
3962                         data->reg_temp[0][src - 1] = reg_temp_mon[i];
3963                         data->temp_src[src - 1] = src;
3964                         continue;
3965                 }
3966
3967                 if (s >= NUM_TEMP)
3968                         continue;
3969
3970                 /* Use dynamic index for other sources */
3971                 data->have_temp |= 1 << s;
3972                 data->reg_temp[0][s] = reg_temp_mon[i];
3973                 data->temp_src[s] = src;
3974                 s++;
3975         }
3976
3977 #ifdef USE_ALTERNATE
3978         /*
3979          * Go through the list of alternate temp registers and enable
3980          * if possible.
3981          * The temperature is already monitored if the respective bit in <mask>
3982          * is set.
3983          */
3984         for (i = 0; i < data->temp_label_num - 1; i++) {
3985                 if (!reg_temp_alternate[i])
3986                         continue;
3987                 if (mask & (1 << (i + 1)))
3988                         continue;
3989                 if (i < data->temp_fixed_num) {
3990                         if (data->have_temp & (1 << i))
3991                                 continue;
3992                         data->have_temp |= 1 << i;
3993                         data->have_temp_fixed |= 1 << i;
3994                         data->reg_temp[0][i] = reg_temp_alternate[i];
3995                         if (i < num_reg_temp) {
3996                                 data->reg_temp[1][i] = reg_temp_over[i];
3997                                 data->reg_temp[2][i] = reg_temp_hyst[i];
3998                         }
3999                         data->temp_src[i] = i + 1;
4000                         continue;
4001                 }
4002
4003                 if (s >= NUM_TEMP)      /* Abort if no more space */
4004                         break;
4005
4006                 data->have_temp |= 1 << s;
4007                 data->reg_temp[0][s] = reg_temp_alternate[i];
4008                 data->temp_src[s] = i + 1;
4009                 s++;
4010         }
4011 #endif /* USE_ALTERNATE */
4012
4013         /* Initialize the chip */
4014         nct6775_init_device(data);
4015
4016         err = superio_enter(sio_data->sioreg);
4017         if (err)
4018                 return err;
4019
4020         cr2a = superio_inb(sio_data->sioreg, 0x2a);
4021         switch (data->kind) {
4022         case nct6775:
4023                 data->have_vid = (cr2a & 0x40);
4024                 break;
4025         case nct6776:
4026                 data->have_vid = (cr2a & 0x60) == 0x40;
4027                 break;
4028         case nct6106:
4029         case nct6779:
4030         case nct6791:
4031         case nct6792:
4032         case nct6793:
4033                 break;
4034         }
4035
4036         /*
4037          * Read VID value
4038          * We can get the VID input values directly at logical device D 0xe3.
4039          */
4040         if (data->have_vid) {
4041                 superio_select(sio_data->sioreg, NCT6775_LD_VID);
4042                 data->vid = superio_inb(sio_data->sioreg, 0xe3);
4043                 data->vrm = vid_which_vrm();
4044         }
4045
4046         if (fan_debounce) {
4047                 u8 tmp;
4048
4049                 superio_select(sio_data->sioreg, NCT6775_LD_HWM);
4050                 tmp = superio_inb(sio_data->sioreg,
4051                                   NCT6775_REG_CR_FAN_DEBOUNCE);
4052                 switch (data->kind) {
4053                 case nct6106:
4054                         tmp |= 0xe0;
4055                         break;
4056                 case nct6775:
4057                         tmp |= 0x1e;
4058                         break;
4059                 case nct6776:
4060                 case nct6779:
4061                         tmp |= 0x3e;
4062                         break;
4063                 case nct6791:
4064                 case nct6792:
4065                 case nct6793:
4066                         tmp |= 0x7e;
4067                         break;
4068                 }
4069                 superio_outb(sio_data->sioreg, NCT6775_REG_CR_FAN_DEBOUNCE,
4070                              tmp);
4071                 dev_info(&pdev->dev, "Enabled fan debounce for chip %s\n",
4072                          data->name);
4073         }
4074
4075         nct6775_check_fan_inputs(data);
4076
4077         superio_exit(sio_data->sioreg);
4078
4079         /* Read fan clock dividers immediately */
4080         nct6775_init_fan_common(dev, data);
4081
4082         /* Register sysfs hooks */
4083         group = nct6775_create_attr_group(dev, &nct6775_pwm_template_group,
4084                                           data->pwm_num);
4085         if (IS_ERR(group))
4086                 return PTR_ERR(group);
4087
4088         data->groups[num_attr_groups++] = group;
4089
4090         group = nct6775_create_attr_group(dev, &nct6775_in_template_group,
4091                                           fls(data->have_in));
4092         if (IS_ERR(group))
4093                 return PTR_ERR(group);
4094
4095         data->groups[num_attr_groups++] = group;
4096
4097         group = nct6775_create_attr_group(dev, &nct6775_fan_template_group,
4098                                           fls(data->has_fan));
4099         if (IS_ERR(group))
4100                 return PTR_ERR(group);
4101
4102         data->groups[num_attr_groups++] = group;
4103
4104         group = nct6775_create_attr_group(dev, &nct6775_temp_template_group,
4105                                           fls(data->have_temp));
4106         if (IS_ERR(group))
4107                 return PTR_ERR(group);
4108
4109         data->groups[num_attr_groups++] = group;
4110         data->groups[num_attr_groups++] = &nct6775_group_other;
4111
4112         hwmon_dev = devm_hwmon_device_register_with_groups(dev, data->name,
4113                                                            data, data->groups);
4114         return PTR_ERR_OR_ZERO(hwmon_dev);
4115 }
4116
4117 static void nct6791_enable_io_mapping(int sioaddr)
4118 {
4119         int val;
4120
4121         val = superio_inb(sioaddr, NCT6791_REG_HM_IO_SPACE_LOCK_ENABLE);
4122         if (val & 0x10) {
4123                 pr_info("Enabling hardware monitor logical device mappings.\n");
4124                 superio_outb(sioaddr, NCT6791_REG_HM_IO_SPACE_LOCK_ENABLE,
4125                              val & ~0x10);
4126         }
4127 }
4128
4129 static int __maybe_unused nct6775_suspend(struct device *dev)
4130 {
4131         struct nct6775_data *data = nct6775_update_device(dev);
4132
4133         mutex_lock(&data->update_lock);
4134         data->vbat = nct6775_read_value(data, data->REG_VBAT);
4135         if (data->kind == nct6775) {
4136                 data->fandiv1 = nct6775_read_value(data, NCT6775_REG_FANDIV1);
4137                 data->fandiv2 = nct6775_read_value(data, NCT6775_REG_FANDIV2);
4138         }
4139         mutex_unlock(&data->update_lock);
4140
4141         return 0;
4142 }
4143
4144 static int __maybe_unused nct6775_resume(struct device *dev)
4145 {
4146         struct nct6775_data *data = dev_get_drvdata(dev);
4147         int sioreg = data->sioreg;
4148         int i, j, err = 0;
4149         u8 reg;
4150
4151         mutex_lock(&data->update_lock);
4152         data->bank = 0xff;              /* Force initial bank selection */
4153
4154         err = superio_enter(sioreg);
4155         if (err)
4156                 goto abort;
4157
4158         superio_select(sioreg, NCT6775_LD_HWM);
4159         reg = superio_inb(sioreg, SIO_REG_ENABLE);
4160         if (reg != data->sio_reg_enable)
4161                 superio_outb(sioreg, SIO_REG_ENABLE, data->sio_reg_enable);
4162
4163         if (data->kind == nct6791 || data->kind == nct6792 ||
4164             data->kind == nct6793)
4165                 nct6791_enable_io_mapping(sioreg);
4166
4167         superio_exit(sioreg);
4168
4169         /* Restore limits */
4170         for (i = 0; i < data->in_num; i++) {
4171                 if (!(data->have_in & (1 << i)))
4172                         continue;
4173
4174                 nct6775_write_value(data, data->REG_IN_MINMAX[0][i],
4175                                     data->in[i][1]);
4176                 nct6775_write_value(data, data->REG_IN_MINMAX[1][i],
4177                                     data->in[i][2]);
4178         }
4179
4180         for (i = 0; i < ARRAY_SIZE(data->fan_min); i++) {
4181                 if (!(data->has_fan_min & (1 << i)))
4182                         continue;
4183
4184                 nct6775_write_value(data, data->REG_FAN_MIN[i],
4185                                     data->fan_min[i]);
4186         }
4187
4188         for (i = 0; i < NUM_TEMP; i++) {
4189                 if (!(data->have_temp & (1 << i)))
4190                         continue;
4191
4192                 for (j = 1; j < ARRAY_SIZE(data->reg_temp); j++)
4193                         if (data->reg_temp[j][i])
4194                                 nct6775_write_temp(data, data->reg_temp[j][i],
4195                                                    data->temp[j][i]);
4196         }
4197
4198         /* Restore other settings */
4199         nct6775_write_value(data, data->REG_VBAT, data->vbat);
4200         if (data->kind == nct6775) {
4201                 nct6775_write_value(data, NCT6775_REG_FANDIV1, data->fandiv1);
4202                 nct6775_write_value(data, NCT6775_REG_FANDIV2, data->fandiv2);
4203         }
4204
4205 abort:
4206         /* Force re-reading all values */
4207         data->valid = false;
4208         mutex_unlock(&data->update_lock);
4209
4210         return err;
4211 }
4212
4213 static SIMPLE_DEV_PM_OPS(nct6775_dev_pm_ops, nct6775_suspend, nct6775_resume);
4214
4215 static struct platform_driver nct6775_driver = {
4216         .driver = {
4217                 .name   = DRVNAME,
4218                 .pm     = &nct6775_dev_pm_ops,
4219         },
4220         .probe          = nct6775_probe,
4221 };
4222
4223 /* nct6775_find() looks for a '627 in the Super-I/O config space */
4224 static int __init nct6775_find(int sioaddr, struct nct6775_sio_data *sio_data)
4225 {
4226         u16 val;
4227         int err;
4228         int addr;
4229
4230         err = superio_enter(sioaddr);
4231         if (err)
4232                 return err;
4233
4234         if (force_id)
4235                 val = force_id;
4236         else
4237                 val = (superio_inb(sioaddr, SIO_REG_DEVID) << 8)
4238                     | superio_inb(sioaddr, SIO_REG_DEVID + 1);
4239         switch (val & SIO_ID_MASK) {
4240         case SIO_NCT6106_ID:
4241                 sio_data->kind = nct6106;
4242                 break;
4243         case SIO_NCT6775_ID:
4244                 sio_data->kind = nct6775;
4245                 break;
4246         case SIO_NCT6776_ID:
4247                 sio_data->kind = nct6776;
4248                 break;
4249         case SIO_NCT6779_ID:
4250                 sio_data->kind = nct6779;
4251                 break;
4252         case SIO_NCT6791_ID:
4253                 sio_data->kind = nct6791;
4254                 break;
4255         case SIO_NCT6792_ID:
4256                 sio_data->kind = nct6792;
4257                 break;
4258         case SIO_NCT6793_ID:
4259                 sio_data->kind = nct6793;
4260                 break;
4261         default:
4262                 if (val != 0xffff)
4263                         pr_debug("unsupported chip ID: 0x%04x\n", val);
4264                 superio_exit(sioaddr);
4265                 return -ENODEV;
4266         }
4267
4268         /* We have a known chip, find the HWM I/O address */
4269         superio_select(sioaddr, NCT6775_LD_HWM);
4270         val = (superio_inb(sioaddr, SIO_REG_ADDR) << 8)
4271             | superio_inb(sioaddr, SIO_REG_ADDR + 1);
4272         addr = val & IOREGION_ALIGNMENT;
4273         if (addr == 0) {
4274                 pr_err("Refusing to enable a Super-I/O device with a base I/O port 0\n");
4275                 superio_exit(sioaddr);
4276                 return -ENODEV;
4277         }
4278
4279         /* Activate logical device if needed */
4280         val = superio_inb(sioaddr, SIO_REG_ENABLE);
4281         if (!(val & 0x01)) {
4282                 pr_warn("Forcibly enabling Super-I/O. Sensor is probably unusable.\n");
4283                 superio_outb(sioaddr, SIO_REG_ENABLE, val | 0x01);
4284         }
4285
4286         if (sio_data->kind == nct6791 || sio_data->kind == nct6792 ||
4287             sio_data->kind == nct6793)
4288                 nct6791_enable_io_mapping(sioaddr);
4289
4290         superio_exit(sioaddr);
4291         pr_info("Found %s or compatible chip at %#x:%#x\n",
4292                 nct6775_sio_names[sio_data->kind], sioaddr, addr);
4293         sio_data->sioreg = sioaddr;
4294
4295         return addr;
4296 }
4297
4298 /*
4299  * when Super-I/O functions move to a separate file, the Super-I/O
4300  * bus will manage the lifetime of the device and this module will only keep
4301  * track of the nct6775 driver. But since we use platform_device_alloc(), we
4302  * must keep track of the device
4303  */
4304 static struct platform_device *pdev[2];
4305
4306 static int __init sensors_nct6775_init(void)
4307 {
4308         int i, err;
4309         bool found = false;
4310         int address;
4311         struct resource res;
4312         struct nct6775_sio_data sio_data;
4313         int sioaddr[2] = { 0x2e, 0x4e };
4314
4315         err = platform_driver_register(&nct6775_driver);
4316         if (err)
4317                 return err;
4318
4319         /*
4320          * initialize sio_data->kind and sio_data->sioreg.
4321          *
4322          * when Super-I/O functions move to a separate file, the Super-I/O
4323          * driver will probe 0x2e and 0x4e and auto-detect the presence of a
4324          * nct6775 hardware monitor, and call probe()
4325          */
4326         for (i = 0; i < ARRAY_SIZE(pdev); i++) {
4327                 address = nct6775_find(sioaddr[i], &sio_data);
4328                 if (address <= 0)
4329                         continue;
4330
4331                 found = true;
4332
4333                 pdev[i] = platform_device_alloc(DRVNAME, address);
4334                 if (!pdev[i]) {
4335                         err = -ENOMEM;
4336                         goto exit_device_unregister;
4337                 }
4338
4339                 err = platform_device_add_data(pdev[i], &sio_data,
4340                                                sizeof(struct nct6775_sio_data));
4341                 if (err)
4342                         goto exit_device_put;
4343
4344                 memset(&res, 0, sizeof(res));
4345                 res.name = DRVNAME;
4346                 res.start = address + IOREGION_OFFSET;
4347                 res.end = address + IOREGION_OFFSET + IOREGION_LENGTH - 1;
4348                 res.flags = IORESOURCE_IO;
4349
4350                 err = acpi_check_resource_conflict(&res);
4351                 if (err) {
4352                         platform_device_put(pdev[i]);
4353                         pdev[i] = NULL;
4354                         continue;
4355                 }
4356
4357                 err = platform_device_add_resources(pdev[i], &res, 1);
4358                 if (err)
4359                         goto exit_device_put;
4360
4361                 /* platform_device_add calls probe() */
4362                 err = platform_device_add(pdev[i]);
4363                 if (err)
4364                         goto exit_device_put;
4365         }
4366         if (!found) {
4367                 err = -ENODEV;
4368                 goto exit_unregister;
4369         }
4370
4371         return 0;
4372
4373 exit_device_put:
4374         platform_device_put(pdev[i]);
4375 exit_device_unregister:
4376         while (--i >= 0) {
4377                 if (pdev[i])
4378                         platform_device_unregister(pdev[i]);
4379         }
4380 exit_unregister:
4381         platform_driver_unregister(&nct6775_driver);
4382         return err;
4383 }
4384
4385 static void __exit sensors_nct6775_exit(void)
4386 {
4387         int i;
4388
4389         for (i = 0; i < ARRAY_SIZE(pdev); i++) {
4390                 if (pdev[i])
4391                         platform_device_unregister(pdev[i]);
4392         }
4393         platform_driver_unregister(&nct6775_driver);
4394 }
4395
4396 MODULE_AUTHOR("Guenter Roeck <[email protected]>");
4397 MODULE_DESCRIPTION("Driver for NCT6775F and compatible chips");
4398 MODULE_LICENSE("GPL");
4399
4400 module_init(sensors_nct6775_init);
4401 module_exit(sensors_nct6775_exit);