1 // SPDX-License-Identifier: GPL-2.0-or-later
4 * Bluetooth support for Intel devices
6 * Copyright (C) 2015 Intel Corporation
9 #include <linux/module.h>
10 #include <linux/firmware.h>
11 #include <linux/regmap.h>
12 #include <asm/unaligned.h>
14 #include <net/bluetooth/bluetooth.h>
15 #include <net/bluetooth/hci_core.h>
21 #define BDADDR_INTEL (&(bdaddr_t) {{0x00, 0x8b, 0x9e, 0x19, 0x03, 0x00}})
23 int btintel_check_bdaddr(struct hci_dev *hdev)
25 struct hci_rp_read_bd_addr *bda;
28 skb = __hci_cmd_sync(hdev, HCI_OP_READ_BD_ADDR, 0, NULL,
31 int err = PTR_ERR(skb);
32 bt_dev_err(hdev, "Reading Intel device address failed (%d)",
37 if (skb->len != sizeof(*bda)) {
38 bt_dev_err(hdev, "Intel device address length mismatch");
43 bda = (struct hci_rp_read_bd_addr *)skb->data;
45 /* For some Intel based controllers, the default Bluetooth device
46 * address 00:03:19:9E:8B:00 can be found. These controllers are
47 * fully operational, but have the danger of duplicate addresses
48 * and that in turn can cause problems with Bluetooth operation.
50 if (!bacmp(&bda->bdaddr, BDADDR_INTEL)) {
51 bt_dev_err(hdev, "Found Intel default device address (%pMR)",
53 set_bit(HCI_QUIRK_INVALID_BDADDR, &hdev->quirks);
60 EXPORT_SYMBOL_GPL(btintel_check_bdaddr);
62 int btintel_enter_mfg(struct hci_dev *hdev)
64 static const u8 param[] = { 0x01, 0x00 };
67 skb = __hci_cmd_sync(hdev, 0xfc11, 2, param, HCI_CMD_TIMEOUT);
69 bt_dev_err(hdev, "Entering manufacturer mode failed (%ld)",
77 EXPORT_SYMBOL_GPL(btintel_enter_mfg);
79 int btintel_exit_mfg(struct hci_dev *hdev, bool reset, bool patched)
81 u8 param[] = { 0x00, 0x00 };
84 /* The 2nd command parameter specifies the manufacturing exit method:
85 * 0x00: Just disable the manufacturing mode (0x00).
86 * 0x01: Disable manufacturing mode and reset with patches deactivated.
87 * 0x02: Disable manufacturing mode and reset with patches activated.
90 param[1] |= patched ? 0x02 : 0x01;
92 skb = __hci_cmd_sync(hdev, 0xfc11, 2, param, HCI_CMD_TIMEOUT);
94 bt_dev_err(hdev, "Exiting manufacturer mode failed (%ld)",
102 EXPORT_SYMBOL_GPL(btintel_exit_mfg);
104 int btintel_set_bdaddr(struct hci_dev *hdev, const bdaddr_t *bdaddr)
109 skb = __hci_cmd_sync(hdev, 0xfc31, 6, bdaddr, HCI_INIT_TIMEOUT);
112 bt_dev_err(hdev, "Changing Intel device address failed (%d)",
120 EXPORT_SYMBOL_GPL(btintel_set_bdaddr);
122 int btintel_set_diag(struct hci_dev *hdev, bool enable)
138 skb = __hci_cmd_sync(hdev, 0xfc43, 3, param, HCI_INIT_TIMEOUT);
143 bt_dev_err(hdev, "Changing Intel diagnostic mode failed (%d)",
150 btintel_set_event_mask(hdev, enable);
153 EXPORT_SYMBOL_GPL(btintel_set_diag);
155 int btintel_set_diag_mfg(struct hci_dev *hdev, bool enable)
159 err = btintel_enter_mfg(hdev);
163 ret = btintel_set_diag(hdev, enable);
165 err = btintel_exit_mfg(hdev, false, false);
171 EXPORT_SYMBOL_GPL(btintel_set_diag_mfg);
173 void btintel_hw_error(struct hci_dev *hdev, u8 code)
178 bt_dev_err(hdev, "Hardware error 0x%2.2x", code);
180 skb = __hci_cmd_sync(hdev, HCI_OP_RESET, 0, NULL, HCI_INIT_TIMEOUT);
182 bt_dev_err(hdev, "Reset after hardware error failed (%ld)",
188 skb = __hci_cmd_sync(hdev, 0xfc22, 1, &type, HCI_INIT_TIMEOUT);
190 bt_dev_err(hdev, "Retrieving Intel exception info failed (%ld)",
195 if (skb->len != 13) {
196 bt_dev_err(hdev, "Exception info size mismatch");
201 bt_dev_err(hdev, "Exception info %s", (char *)(skb->data + 1));
205 EXPORT_SYMBOL_GPL(btintel_hw_error);
207 void btintel_version_info(struct hci_dev *hdev, struct intel_version *ver)
211 switch (ver->fw_variant) {
213 variant = "Bootloader";
216 variant = "Firmware";
222 bt_dev_info(hdev, "%s revision %u.%u build %u week %u %u",
223 variant, ver->fw_revision >> 4, ver->fw_revision & 0x0f,
224 ver->fw_build_num, ver->fw_build_ww,
225 2000 + ver->fw_build_yy);
227 EXPORT_SYMBOL_GPL(btintel_version_info);
229 int btintel_secure_send(struct hci_dev *hdev, u8 fragment_type, u32 plen,
234 u8 cmd_param[253], fragment_len = (plen > 252) ? 252 : plen;
236 cmd_param[0] = fragment_type;
237 memcpy(cmd_param + 1, param, fragment_len);
239 skb = __hci_cmd_sync(hdev, 0xfc09, fragment_len + 1,
240 cmd_param, HCI_INIT_TIMEOUT);
246 plen -= fragment_len;
247 param += fragment_len;
252 EXPORT_SYMBOL_GPL(btintel_secure_send);
254 int btintel_load_ddc_config(struct hci_dev *hdev, const char *ddc_name)
256 const struct firmware *fw;
261 err = request_firmware_direct(&fw, ddc_name, &hdev->dev);
263 bt_dev_err(hdev, "Failed to load Intel DDC file %s (%d)",
268 bt_dev_info(hdev, "Found Intel DDC parameters: %s", ddc_name);
272 /* DDC file contains one or more DDC structure which has
273 * Length (1 byte), DDC ID (2 bytes), and DDC value (Length - 2).
275 while (fw->size > fw_ptr - fw->data) {
276 u8 cmd_plen = fw_ptr[0] + sizeof(u8);
278 skb = __hci_cmd_sync(hdev, 0xfc8b, cmd_plen, fw_ptr,
281 bt_dev_err(hdev, "Failed to send Intel_Write_DDC (%ld)",
283 release_firmware(fw);
291 release_firmware(fw);
293 bt_dev_info(hdev, "Applying Intel DDC parameters completed");
297 EXPORT_SYMBOL_GPL(btintel_load_ddc_config);
299 int btintel_set_event_mask(struct hci_dev *hdev, bool debug)
301 u8 mask[8] = { 0x87, 0x0c, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 };
308 skb = __hci_cmd_sync(hdev, 0xfc52, 8, mask, HCI_INIT_TIMEOUT);
311 bt_dev_err(hdev, "Setting Intel event mask failed (%d)", err);
318 EXPORT_SYMBOL_GPL(btintel_set_event_mask);
320 int btintel_set_event_mask_mfg(struct hci_dev *hdev, bool debug)
324 err = btintel_enter_mfg(hdev);
328 ret = btintel_set_event_mask(hdev, debug);
330 err = btintel_exit_mfg(hdev, false, false);
336 EXPORT_SYMBOL_GPL(btintel_set_event_mask_mfg);
338 int btintel_read_version(struct hci_dev *hdev, struct intel_version *ver)
342 skb = __hci_cmd_sync(hdev, 0xfc05, 0, NULL, HCI_CMD_TIMEOUT);
344 bt_dev_err(hdev, "Reading Intel version information failed (%ld)",
349 if (skb->len != sizeof(*ver)) {
350 bt_dev_err(hdev, "Intel version event size mismatch");
355 memcpy(ver, skb->data, sizeof(*ver));
361 EXPORT_SYMBOL_GPL(btintel_read_version);
363 /* ------- REGMAP IBT SUPPORT ------- */
365 #define IBT_REG_MODE_8BIT 0x00
366 #define IBT_REG_MODE_16BIT 0x01
367 #define IBT_REG_MODE_32BIT 0x02
369 struct regmap_ibt_context {
370 struct hci_dev *hdev;
375 struct ibt_cp_reg_access {
382 struct ibt_rp_reg_access {
388 static int regmap_ibt_read(void *context, const void *addr, size_t reg_size,
389 void *val, size_t val_size)
391 struct regmap_ibt_context *ctx = context;
392 struct ibt_cp_reg_access cp;
393 struct ibt_rp_reg_access *rp;
397 if (reg_size != sizeof(__le32))
402 cp.mode = IBT_REG_MODE_8BIT;
405 cp.mode = IBT_REG_MODE_16BIT;
408 cp.mode = IBT_REG_MODE_32BIT;
414 /* regmap provides a little-endian formatted addr */
415 cp.addr = *(__le32 *)addr;
418 bt_dev_dbg(ctx->hdev, "Register (0x%x) read", le32_to_cpu(cp.addr));
420 skb = hci_cmd_sync(ctx->hdev, ctx->op_read, sizeof(cp), &cp,
424 bt_dev_err(ctx->hdev, "regmap: Register (0x%x) read error (%d)",
425 le32_to_cpu(cp.addr), err);
429 if (skb->len != sizeof(*rp) + val_size) {
430 bt_dev_err(ctx->hdev, "regmap: Register (0x%x) read error, bad len",
431 le32_to_cpu(cp.addr));
436 rp = (struct ibt_rp_reg_access *)skb->data;
438 if (rp->addr != cp.addr) {
439 bt_dev_err(ctx->hdev, "regmap: Register (0x%x) read error, bad addr",
440 le32_to_cpu(rp->addr));
445 memcpy(val, rp->data, val_size);
452 static int regmap_ibt_gather_write(void *context,
453 const void *addr, size_t reg_size,
454 const void *val, size_t val_size)
456 struct regmap_ibt_context *ctx = context;
457 struct ibt_cp_reg_access *cp;
459 int plen = sizeof(*cp) + val_size;
463 if (reg_size != sizeof(__le32))
468 mode = IBT_REG_MODE_8BIT;
471 mode = IBT_REG_MODE_16BIT;
474 mode = IBT_REG_MODE_32BIT;
480 cp = kmalloc(plen, GFP_KERNEL);
484 /* regmap provides a little-endian formatted addr/value */
485 cp->addr = *(__le32 *)addr;
488 memcpy(&cp->data, val, val_size);
490 bt_dev_dbg(ctx->hdev, "Register (0x%x) write", le32_to_cpu(cp->addr));
492 skb = hci_cmd_sync(ctx->hdev, ctx->op_write, plen, cp, HCI_CMD_TIMEOUT);
495 bt_dev_err(ctx->hdev, "regmap: Register (0x%x) write error (%d)",
496 le32_to_cpu(cp->addr), err);
506 static int regmap_ibt_write(void *context, const void *data, size_t count)
508 /* data contains register+value, since we only support 32bit addr,
509 * minimum data size is 4 bytes.
511 if (WARN_ONCE(count < 4, "Invalid register access"))
514 return regmap_ibt_gather_write(context, data, 4, data + 4, count - 4);
517 static void regmap_ibt_free_context(void *context)
522 static struct regmap_bus regmap_ibt = {
523 .read = regmap_ibt_read,
524 .write = regmap_ibt_write,
525 .gather_write = regmap_ibt_gather_write,
526 .free_context = regmap_ibt_free_context,
527 .reg_format_endian_default = REGMAP_ENDIAN_LITTLE,
528 .val_format_endian_default = REGMAP_ENDIAN_LITTLE,
531 /* Config is the same for all register regions */
532 static const struct regmap_config regmap_ibt_cfg = {
533 .name = "btintel_regmap",
538 struct regmap *btintel_regmap_init(struct hci_dev *hdev, u16 opcode_read,
541 struct regmap_ibt_context *ctx;
543 bt_dev_info(hdev, "regmap: Init R%x-W%x region", opcode_read,
546 ctx = kzalloc(sizeof(*ctx), GFP_KERNEL);
548 return ERR_PTR(-ENOMEM);
550 ctx->op_read = opcode_read;
551 ctx->op_write = opcode_write;
554 return regmap_init(&hdev->dev, ®map_ibt, ctx, ®map_ibt_cfg);
556 EXPORT_SYMBOL_GPL(btintel_regmap_init);
558 int btintel_send_intel_reset(struct hci_dev *hdev, u32 boot_param)
560 struct intel_reset params = { 0x00, 0x01, 0x00, 0x01, 0x00000000 };
563 params.boot_param = cpu_to_le32(boot_param);
565 skb = __hci_cmd_sync(hdev, 0xfc01, sizeof(params), ¶ms,
568 bt_dev_err(hdev, "Failed to send Intel Reset command");
576 EXPORT_SYMBOL_GPL(btintel_send_intel_reset);
578 int btintel_read_boot_params(struct hci_dev *hdev,
579 struct intel_boot_params *params)
583 skb = __hci_cmd_sync(hdev, 0xfc0d, 0, NULL, HCI_INIT_TIMEOUT);
585 bt_dev_err(hdev, "Reading Intel boot parameters failed (%ld)",
590 if (skb->len != sizeof(*params)) {
591 bt_dev_err(hdev, "Intel boot parameters size mismatch");
596 memcpy(params, skb->data, sizeof(*params));
600 if (params->status) {
601 bt_dev_err(hdev, "Intel boot parameters command failed (%02x)",
603 return -bt_to_errno(params->status);
606 bt_dev_info(hdev, "Device revision is %u",
607 le16_to_cpu(params->dev_revid));
609 bt_dev_info(hdev, "Secure boot is %s",
610 params->secure_boot ? "enabled" : "disabled");
612 bt_dev_info(hdev, "OTP lock is %s",
613 params->otp_lock ? "enabled" : "disabled");
615 bt_dev_info(hdev, "API lock is %s",
616 params->api_lock ? "enabled" : "disabled");
618 bt_dev_info(hdev, "Debug lock is %s",
619 params->debug_lock ? "enabled" : "disabled");
621 bt_dev_info(hdev, "Minimum firmware build %u week %u %u",
622 params->min_fw_build_nn, params->min_fw_build_cw,
623 2000 + params->min_fw_build_yy);
627 EXPORT_SYMBOL_GPL(btintel_read_boot_params);
629 int btintel_download_firmware(struct hci_dev *hdev, const struct firmware *fw,
636 /* Start the firmware download transaction with the Init fragment
637 * represented by the 128 bytes of CSS header.
639 err = btintel_secure_send(hdev, 0x00, 128, fw->data);
641 bt_dev_err(hdev, "Failed to send firmware header (%d)", err);
645 /* Send the 256 bytes of public key information from the firmware
646 * as the PKey fragment.
648 err = btintel_secure_send(hdev, 0x03, 256, fw->data + 128);
650 bt_dev_err(hdev, "Failed to send firmware pkey (%d)", err);
654 /* Send the 256 bytes of signature information from the firmware
655 * as the Sign fragment.
657 err = btintel_secure_send(hdev, 0x02, 256, fw->data + 388);
659 bt_dev_err(hdev, "Failed to send firmware signature (%d)", err);
663 fw_ptr = fw->data + 644;
666 while (fw_ptr - fw->data < fw->size) {
667 struct hci_command_hdr *cmd = (void *)(fw_ptr + frag_len);
669 /* Each SKU has a different reset parameter to use in the
670 * HCI_Intel_Reset command and it is embedded in the firmware
671 * data. So, instead of using static value per SKU, check
672 * the firmware data and save it for later use.
674 if (le16_to_cpu(cmd->opcode) == 0xfc0e) {
675 /* The boot parameter is the first 32-bit value
676 * and rest of 3 octets are reserved.
678 *boot_param = get_unaligned_le32(fw_ptr + sizeof(*cmd));
680 bt_dev_dbg(hdev, "boot_param=0x%x", *boot_param);
683 frag_len += sizeof(*cmd) + cmd->plen;
685 /* The parameter length of the secure send command requires
686 * a 4 byte alignment. It happens so that the firmware file
687 * contains proper Intel_NOP commands to align the fragments
690 * Send set of commands with 4 byte alignment from the
691 * firmware data buffer as a single Data fragement.
693 if (!(frag_len % 4)) {
694 err = btintel_secure_send(hdev, 0x01, frag_len, fw_ptr);
697 "Failed to send firmware data (%d)",
710 EXPORT_SYMBOL_GPL(btintel_download_firmware);
712 void btintel_reset_to_bootloader(struct hci_dev *hdev)
714 struct intel_reset params;
717 /* Send Intel Reset command. This will result in
718 * re-enumeration of BT controller.
720 * Intel Reset parameter description:
721 * reset_type : 0x00 (Soft reset),
723 * patch_enable : 0x00 (Do not enable),
725 * ddc_reload : 0x00 (Do not reload),
727 * boot_option: 0x00 (Current image),
728 * 0x01 (Specified boot address)
729 * boot_param: Boot address
732 params.reset_type = 0x01;
733 params.patch_enable = 0x01;
734 params.ddc_reload = 0x01;
735 params.boot_option = 0x00;
736 params.boot_param = cpu_to_le32(0x00000000);
738 skb = __hci_cmd_sync(hdev, 0xfc01, sizeof(params),
739 ¶ms, HCI_INIT_TIMEOUT);
741 bt_dev_err(hdev, "FW download error recovery failed (%ld)",
745 bt_dev_info(hdev, "Intel reset sent to retry FW download");
748 /* Current Intel BT controllers(ThP/JfP) hold the USB reset
749 * lines for 2ms when it receives Intel Reset in bootloader mode.
750 * Whereas, the upcoming Intel BT controllers will hold USB reset
751 * for 150ms. To keep the delay generic, 150ms is chosen here.
755 EXPORT_SYMBOL_GPL(btintel_reset_to_bootloader);
758 MODULE_DESCRIPTION("Bluetooth support for Intel devices ver " VERSION);
759 MODULE_VERSION(VERSION);
760 MODULE_LICENSE("GPL");
761 MODULE_FIRMWARE("intel/ibt-11-5.sfi");
762 MODULE_FIRMWARE("intel/ibt-11-5.ddc");
763 MODULE_FIRMWARE("intel/ibt-12-16.sfi");
764 MODULE_FIRMWARE("intel/ibt-12-16.ddc");