1 // SPDX-License-Identifier: GPL-2.0
3 * Shared Memory Communications over RDMA (SMC-R) and RoCE
5 * Work Requests exploiting Infiniband API
7 * Work requests (WR) of type ib_post_send or ib_post_recv respectively
8 * are submitted to either RC SQ or RC RQ respectively
9 * (reliably connected send/receive queue)
10 * and become work queue entries (WQEs).
11 * While an SQ WR/WQE is pending, we track it until transmission completion.
12 * Through a send or receive completion queue (CQ) respectively,
13 * we get completion queue entries (CQEs) [aka work completions (WCs)].
14 * Since the CQ callback is called from IRQ context, we split work by using
15 * bottom halves implemented by tasklets.
17 * SMC uses this to exchange LLC (link layer control)
18 * and CDC (connection data control) messages.
20 * Copyright IBM Corp. 2016
25 #include <linux/atomic.h>
26 #include <linux/hashtable.h>
27 #include <linux/wait.h>
28 #include <rdma/ib_verbs.h>
29 #include <asm/div64.h>
34 #define SMC_WR_MAX_POLL_CQE 10 /* max. # of compl. queue elements in 1 poll */
36 #define SMC_WR_RX_HASH_BITS 4
37 static DEFINE_HASHTABLE(smc_wr_rx_hash, SMC_WR_RX_HASH_BITS);
38 static DEFINE_SPINLOCK(smc_wr_rx_hash_lock);
40 struct smc_wr_tx_pend { /* control data for a pending send request */
41 u64 wr_id; /* work request id sent */
42 smc_wr_tx_handler handler;
43 enum ib_wc_status wc_status; /* CQE status */
44 struct smc_link *link;
46 struct smc_wr_tx_pend_priv priv;
50 /******************************** send queue *********************************/
52 /*------------------------------- completion --------------------------------*/
54 /* returns true if at least one tx work request is pending on the given link */
55 static inline bool smc_wr_is_tx_pend(struct smc_link *link)
57 if (find_first_bit(link->wr_tx_mask, link->wr_tx_cnt) !=
64 /* wait till all pending tx work requests on the given link are completed */
65 int smc_wr_tx_wait_no_pending_sends(struct smc_link *link)
67 if (wait_event_timeout(link->wr_tx_wait, !smc_wr_is_tx_pend(link),
68 SMC_WR_TX_WAIT_PENDING_TIME))
74 static inline int smc_wr_tx_find_pending_index(struct smc_link *link, u64 wr_id)
78 for (i = 0; i < link->wr_tx_cnt; i++) {
79 if (link->wr_tx_pends[i].wr_id == wr_id)
82 return link->wr_tx_cnt;
85 static inline void smc_wr_tx_process_cqe(struct ib_wc *wc)
87 struct smc_wr_tx_pend pnd_snd;
88 struct smc_link *link;
92 link = wc->qp->qp_context;
94 if (wc->opcode == IB_WC_REG_MR) {
96 link->wr_reg_state = FAILED;
98 link->wr_reg_state = CONFIRMED;
99 smc_wr_wakeup_reg_wait(link);
103 pnd_snd_idx = smc_wr_tx_find_pending_index(link, wc->wr_id);
104 if (pnd_snd_idx == link->wr_tx_cnt)
106 link->wr_tx_pends[pnd_snd_idx].wc_status = wc->status;
107 if (link->wr_tx_pends[pnd_snd_idx].compl_requested)
108 complete(&link->wr_tx_compl[pnd_snd_idx]);
109 memcpy(&pnd_snd, &link->wr_tx_pends[pnd_snd_idx], sizeof(pnd_snd));
110 /* clear the full struct smc_wr_tx_pend including .priv */
111 memset(&link->wr_tx_pends[pnd_snd_idx], 0,
112 sizeof(link->wr_tx_pends[pnd_snd_idx]));
113 memset(&link->wr_tx_bufs[pnd_snd_idx], 0,
114 sizeof(link->wr_tx_bufs[pnd_snd_idx]));
115 if (!test_and_clear_bit(pnd_snd_idx, link->wr_tx_mask))
118 for_each_set_bit(i, link->wr_tx_mask, link->wr_tx_cnt) {
119 /* clear full struct smc_wr_tx_pend including .priv */
120 memset(&link->wr_tx_pends[i], 0,
121 sizeof(link->wr_tx_pends[i]));
122 memset(&link->wr_tx_bufs[i], 0,
123 sizeof(link->wr_tx_bufs[i]));
124 clear_bit(i, link->wr_tx_mask);
127 smcr_link_down_cond_sched(link);
130 pnd_snd.handler(&pnd_snd.priv, link, wc->status);
131 wake_up(&link->wr_tx_wait);
134 static void smc_wr_tx_tasklet_fn(unsigned long data)
136 struct smc_ib_device *dev = (struct smc_ib_device *)data;
137 struct ib_wc wc[SMC_WR_MAX_POLL_CQE];
144 memset(&wc, 0, sizeof(wc));
145 rc = ib_poll_cq(dev->roce_cq_send, SMC_WR_MAX_POLL_CQE, wc);
147 ib_req_notify_cq(dev->roce_cq_send,
149 IB_CQ_REPORT_MISSED_EVENTS);
153 for (i = 0; i < rc; i++)
154 smc_wr_tx_process_cqe(&wc[i]);
160 void smc_wr_tx_cq_handler(struct ib_cq *ib_cq, void *cq_context)
162 struct smc_ib_device *dev = (struct smc_ib_device *)cq_context;
164 tasklet_schedule(&dev->send_tasklet);
167 /*---------------------------- request submission ---------------------------*/
169 static inline int smc_wr_tx_get_free_slot_index(struct smc_link *link, u32 *idx)
171 *idx = link->wr_tx_cnt;
172 for_each_clear_bit(*idx, link->wr_tx_mask, link->wr_tx_cnt) {
173 if (!test_and_set_bit(*idx, link->wr_tx_mask))
176 *idx = link->wr_tx_cnt;
181 * smc_wr_tx_get_free_slot() - returns buffer for message assembly,
182 * and sets info for pending transmit tracking
183 * @link: Pointer to smc_link used to later send the message.
184 * @handler: Send completion handler function pointer.
185 * @wr_buf: Out value returns pointer to message buffer.
186 * @wr_rdma_buf: Out value returns pointer to rdma work request.
187 * @wr_pend_priv: Out value returns pointer serving as handler context.
189 * Return: 0 on success, or -errno on error.
191 int smc_wr_tx_get_free_slot(struct smc_link *link,
192 smc_wr_tx_handler handler,
193 struct smc_wr_buf **wr_buf,
194 struct smc_rdma_wr **wr_rdma_buf,
195 struct smc_wr_tx_pend_priv **wr_pend_priv)
197 struct smc_link_group *lgr = smc_get_lgr(link);
198 struct smc_wr_tx_pend *wr_pend;
199 u32 idx = link->wr_tx_cnt;
200 struct ib_send_wr *wr_ib;
205 *wr_pend_priv = NULL;
206 if (in_softirq() || lgr->terminating) {
207 rc = smc_wr_tx_get_free_slot_index(link, &idx);
211 rc = wait_event_interruptible_timeout(
213 !smc_link_usable(link) ||
215 (smc_wr_tx_get_free_slot_index(link, &idx) != -EBUSY),
216 SMC_WR_TX_WAIT_FREE_SLOT_TIME);
218 /* timeout - terminate link */
219 smcr_link_down_cond_sched(link);
222 if (idx == link->wr_tx_cnt)
225 wr_id = smc_wr_tx_get_next_wr_id(link);
226 wr_pend = &link->wr_tx_pends[idx];
227 wr_pend->wr_id = wr_id;
228 wr_pend->handler = handler;
229 wr_pend->link = link;
231 wr_ib = &link->wr_tx_ibs[idx];
232 wr_ib->wr_id = wr_id;
233 *wr_buf = &link->wr_tx_bufs[idx];
235 *wr_rdma_buf = &link->wr_tx_rdmas[idx];
236 *wr_pend_priv = &wr_pend->priv;
240 int smc_wr_tx_put_slot(struct smc_link *link,
241 struct smc_wr_tx_pend_priv *wr_pend_priv)
243 struct smc_wr_tx_pend *pend;
245 pend = container_of(wr_pend_priv, struct smc_wr_tx_pend, priv);
246 if (pend->idx < link->wr_tx_cnt) {
249 /* clear the full struct smc_wr_tx_pend including .priv */
250 memset(&link->wr_tx_pends[idx], 0,
251 sizeof(link->wr_tx_pends[idx]));
252 memset(&link->wr_tx_bufs[idx], 0,
253 sizeof(link->wr_tx_bufs[idx]));
254 test_and_clear_bit(idx, link->wr_tx_mask);
255 wake_up(&link->wr_tx_wait);
262 /* Send prepared WR slot via ib_post_send.
263 * @priv: pointer to smc_wr_tx_pend_priv identifying prepared message buffer
265 int smc_wr_tx_send(struct smc_link *link, struct smc_wr_tx_pend_priv *priv)
267 struct smc_wr_tx_pend *pend;
270 ib_req_notify_cq(link->smcibdev->roce_cq_send,
271 IB_CQ_NEXT_COMP | IB_CQ_REPORT_MISSED_EVENTS);
272 pend = container_of(priv, struct smc_wr_tx_pend, priv);
273 rc = ib_post_send(link->roce_qp, &link->wr_tx_ibs[pend->idx], NULL);
275 smc_wr_tx_put_slot(link, priv);
276 smcr_link_down_cond_sched(link);
281 /* Send prepared WR slot via ib_post_send and wait for send completion
283 * @priv: pointer to smc_wr_tx_pend_priv identifying prepared message buffer
285 int smc_wr_tx_send_wait(struct smc_link *link, struct smc_wr_tx_pend_priv *priv,
286 unsigned long timeout)
288 struct smc_wr_tx_pend *pend;
291 pend = container_of(priv, struct smc_wr_tx_pend, priv);
292 pend->compl_requested = 1;
293 init_completion(&link->wr_tx_compl[pend->idx]);
295 rc = smc_wr_tx_send(link, priv);
298 /* wait for completion by smc_wr_tx_process_cqe() */
299 rc = wait_for_completion_interruptible_timeout(
300 &link->wr_tx_compl[pend->idx], timeout);
308 /* Register a memory region and wait for result. */
309 int smc_wr_reg_send(struct smc_link *link, struct ib_mr *mr)
313 ib_req_notify_cq(link->smcibdev->roce_cq_send,
314 IB_CQ_NEXT_COMP | IB_CQ_REPORT_MISSED_EVENTS);
315 link->wr_reg_state = POSTED;
316 link->wr_reg.wr.wr_id = (u64)(uintptr_t)mr;
317 link->wr_reg.mr = mr;
318 link->wr_reg.key = mr->rkey;
319 rc = ib_post_send(link->roce_qp, &link->wr_reg.wr, NULL);
323 rc = wait_event_interruptible_timeout(link->wr_reg_wait,
324 (link->wr_reg_state != POSTED),
325 SMC_WR_REG_MR_WAIT_TIME);
327 /* timeout - terminate link */
328 smcr_link_down_cond_sched(link);
331 if (rc == -ERESTARTSYS)
333 switch (link->wr_reg_state) {
347 void smc_wr_tx_dismiss_slots(struct smc_link *link, u8 wr_tx_hdr_type,
348 smc_wr_tx_filter filter,
349 smc_wr_tx_dismisser dismisser,
352 struct smc_wr_tx_pend_priv *tx_pend;
353 struct smc_wr_rx_hdr *wr_tx;
356 for_each_set_bit(i, link->wr_tx_mask, link->wr_tx_cnt) {
357 wr_tx = (struct smc_wr_rx_hdr *)&link->wr_tx_bufs[i];
358 if (wr_tx->type != wr_tx_hdr_type)
360 tx_pend = &link->wr_tx_pends[i].priv;
361 if (filter(tx_pend, data))
366 /****************************** receive queue ********************************/
368 int smc_wr_rx_register_handler(struct smc_wr_rx_handler *handler)
370 struct smc_wr_rx_handler *h_iter;
373 spin_lock(&smc_wr_rx_hash_lock);
374 hash_for_each_possible(smc_wr_rx_hash, h_iter, list, handler->type) {
375 if (h_iter->type == handler->type) {
380 hash_add(smc_wr_rx_hash, &handler->list, handler->type);
382 spin_unlock(&smc_wr_rx_hash_lock);
386 /* Demultiplex a received work request based on the message type to its handler.
387 * Relies on smc_wr_rx_hash having been completely filled before any IB WRs,
388 * and not being modified any more afterwards so we don't need to lock it.
390 static inline void smc_wr_rx_demultiplex(struct ib_wc *wc)
392 struct smc_link *link = (struct smc_link *)wc->qp->qp_context;
393 struct smc_wr_rx_handler *handler;
394 struct smc_wr_rx_hdr *wr_rx;
398 if (wc->byte_len < sizeof(*wr_rx))
399 return; /* short message */
400 temp_wr_id = wc->wr_id;
401 index = do_div(temp_wr_id, link->wr_rx_cnt);
402 wr_rx = (struct smc_wr_rx_hdr *)&link->wr_rx_bufs[index];
403 hash_for_each_possible(smc_wr_rx_hash, handler, list, wr_rx->type) {
404 if (handler->type == wr_rx->type)
405 handler->handler(wc, wr_rx);
409 static inline void smc_wr_rx_process_cqes(struct ib_wc wc[], int num)
411 struct smc_link *link;
414 for (i = 0; i < num; i++) {
415 link = wc[i].qp->qp_context;
416 if (wc[i].status == IB_WC_SUCCESS) {
417 link->wr_rx_tstamp = jiffies;
418 smc_wr_rx_demultiplex(&wc[i]);
419 smc_wr_rx_post(link); /* refill WR RX */
421 /* handle status errors */
422 switch (wc[i].status) {
423 case IB_WC_RETRY_EXC_ERR:
424 case IB_WC_RNR_RETRY_EXC_ERR:
425 case IB_WC_WR_FLUSH_ERR:
426 smcr_link_down_cond_sched(link);
429 smc_wr_rx_post(link); /* refill WR RX */
436 static void smc_wr_rx_tasklet_fn(unsigned long data)
438 struct smc_ib_device *dev = (struct smc_ib_device *)data;
439 struct ib_wc wc[SMC_WR_MAX_POLL_CQE];
446 memset(&wc, 0, sizeof(wc));
447 rc = ib_poll_cq(dev->roce_cq_recv, SMC_WR_MAX_POLL_CQE, wc);
449 ib_req_notify_cq(dev->roce_cq_recv,
451 | IB_CQ_REPORT_MISSED_EVENTS);
455 smc_wr_rx_process_cqes(&wc[0], rc);
461 void smc_wr_rx_cq_handler(struct ib_cq *ib_cq, void *cq_context)
463 struct smc_ib_device *dev = (struct smc_ib_device *)cq_context;
465 tasklet_schedule(&dev->recv_tasklet);
468 int smc_wr_rx_post_init(struct smc_link *link)
473 for (i = 0; i < link->wr_rx_cnt; i++)
474 rc = smc_wr_rx_post(link);
478 /***************************** init, exit, misc ******************************/
480 void smc_wr_remember_qp_attr(struct smc_link *lnk)
482 struct ib_qp_attr *attr = &lnk->qp_attr;
483 struct ib_qp_init_attr init_attr;
485 memset(attr, 0, sizeof(*attr));
486 memset(&init_attr, 0, sizeof(init_attr));
487 ib_query_qp(lnk->roce_qp, attr,
500 IB_QP_MIN_RNR_TIMER |
502 IB_QP_PATH_MIG_STATE |
507 lnk->wr_tx_cnt = min_t(size_t, SMC_WR_BUF_CNT,
508 lnk->qp_attr.cap.max_send_wr);
509 lnk->wr_rx_cnt = min_t(size_t, SMC_WR_BUF_CNT * 3,
510 lnk->qp_attr.cap.max_recv_wr);
513 static void smc_wr_init_sge(struct smc_link *lnk)
517 for (i = 0; i < lnk->wr_tx_cnt; i++) {
518 lnk->wr_tx_sges[i].addr =
519 lnk->wr_tx_dma_addr + i * SMC_WR_BUF_SIZE;
520 lnk->wr_tx_sges[i].length = SMC_WR_TX_SIZE;
521 lnk->wr_tx_sges[i].lkey = lnk->roce_pd->local_dma_lkey;
522 lnk->wr_tx_rdma_sges[i].tx_rdma_sge[0].wr_tx_rdma_sge[0].lkey =
523 lnk->roce_pd->local_dma_lkey;
524 lnk->wr_tx_rdma_sges[i].tx_rdma_sge[0].wr_tx_rdma_sge[1].lkey =
525 lnk->roce_pd->local_dma_lkey;
526 lnk->wr_tx_rdma_sges[i].tx_rdma_sge[1].wr_tx_rdma_sge[0].lkey =
527 lnk->roce_pd->local_dma_lkey;
528 lnk->wr_tx_rdma_sges[i].tx_rdma_sge[1].wr_tx_rdma_sge[1].lkey =
529 lnk->roce_pd->local_dma_lkey;
530 lnk->wr_tx_ibs[i].next = NULL;
531 lnk->wr_tx_ibs[i].sg_list = &lnk->wr_tx_sges[i];
532 lnk->wr_tx_ibs[i].num_sge = 1;
533 lnk->wr_tx_ibs[i].opcode = IB_WR_SEND;
534 lnk->wr_tx_ibs[i].send_flags =
535 IB_SEND_SIGNALED | IB_SEND_SOLICITED;
536 lnk->wr_tx_rdmas[i].wr_tx_rdma[0].wr.opcode = IB_WR_RDMA_WRITE;
537 lnk->wr_tx_rdmas[i].wr_tx_rdma[1].wr.opcode = IB_WR_RDMA_WRITE;
538 lnk->wr_tx_rdmas[i].wr_tx_rdma[0].wr.sg_list =
539 lnk->wr_tx_rdma_sges[i].tx_rdma_sge[0].wr_tx_rdma_sge;
540 lnk->wr_tx_rdmas[i].wr_tx_rdma[1].wr.sg_list =
541 lnk->wr_tx_rdma_sges[i].tx_rdma_sge[1].wr_tx_rdma_sge;
543 for (i = 0; i < lnk->wr_rx_cnt; i++) {
544 lnk->wr_rx_sges[i].addr =
545 lnk->wr_rx_dma_addr + i * SMC_WR_BUF_SIZE;
546 lnk->wr_rx_sges[i].length = SMC_WR_BUF_SIZE;
547 lnk->wr_rx_sges[i].lkey = lnk->roce_pd->local_dma_lkey;
548 lnk->wr_rx_ibs[i].next = NULL;
549 lnk->wr_rx_ibs[i].sg_list = &lnk->wr_rx_sges[i];
550 lnk->wr_rx_ibs[i].num_sge = 1;
552 lnk->wr_reg.wr.next = NULL;
553 lnk->wr_reg.wr.num_sge = 0;
554 lnk->wr_reg.wr.send_flags = IB_SEND_SIGNALED;
555 lnk->wr_reg.wr.opcode = IB_WR_REG_MR;
556 lnk->wr_reg.access = IB_ACCESS_LOCAL_WRITE | IB_ACCESS_REMOTE_WRITE;
559 void smc_wr_free_link(struct smc_link *lnk)
561 struct ib_device *ibdev;
563 if (smc_wr_tx_wait_no_pending_sends(lnk))
564 memset(lnk->wr_tx_mask, 0,
565 BITS_TO_LONGS(SMC_WR_BUF_CNT) *
566 sizeof(*lnk->wr_tx_mask));
570 ibdev = lnk->smcibdev->ibdev;
572 if (lnk->wr_rx_dma_addr) {
573 ib_dma_unmap_single(ibdev, lnk->wr_rx_dma_addr,
574 SMC_WR_BUF_SIZE * lnk->wr_rx_cnt,
576 lnk->wr_rx_dma_addr = 0;
578 if (lnk->wr_tx_dma_addr) {
579 ib_dma_unmap_single(ibdev, lnk->wr_tx_dma_addr,
580 SMC_WR_BUF_SIZE * lnk->wr_tx_cnt,
582 lnk->wr_tx_dma_addr = 0;
586 void smc_wr_free_link_mem(struct smc_link *lnk)
588 kfree(lnk->wr_tx_compl);
589 lnk->wr_tx_compl = NULL;
590 kfree(lnk->wr_tx_pends);
591 lnk->wr_tx_pends = NULL;
592 kfree(lnk->wr_tx_mask);
593 lnk->wr_tx_mask = NULL;
594 kfree(lnk->wr_tx_sges);
595 lnk->wr_tx_sges = NULL;
596 kfree(lnk->wr_tx_rdma_sges);
597 lnk->wr_tx_rdma_sges = NULL;
598 kfree(lnk->wr_rx_sges);
599 lnk->wr_rx_sges = NULL;
600 kfree(lnk->wr_tx_rdmas);
601 lnk->wr_tx_rdmas = NULL;
602 kfree(lnk->wr_rx_ibs);
603 lnk->wr_rx_ibs = NULL;
604 kfree(lnk->wr_tx_ibs);
605 lnk->wr_tx_ibs = NULL;
606 kfree(lnk->wr_tx_bufs);
607 lnk->wr_tx_bufs = NULL;
608 kfree(lnk->wr_rx_bufs);
609 lnk->wr_rx_bufs = NULL;
612 int smc_wr_alloc_link_mem(struct smc_link *link)
614 /* allocate link related memory */
615 link->wr_tx_bufs = kcalloc(SMC_WR_BUF_CNT, SMC_WR_BUF_SIZE, GFP_KERNEL);
616 if (!link->wr_tx_bufs)
618 link->wr_rx_bufs = kcalloc(SMC_WR_BUF_CNT * 3, SMC_WR_BUF_SIZE,
620 if (!link->wr_rx_bufs)
621 goto no_mem_wr_tx_bufs;
622 link->wr_tx_ibs = kcalloc(SMC_WR_BUF_CNT, sizeof(link->wr_tx_ibs[0]),
624 if (!link->wr_tx_ibs)
625 goto no_mem_wr_rx_bufs;
626 link->wr_rx_ibs = kcalloc(SMC_WR_BUF_CNT * 3,
627 sizeof(link->wr_rx_ibs[0]),
629 if (!link->wr_rx_ibs)
630 goto no_mem_wr_tx_ibs;
631 link->wr_tx_rdmas = kcalloc(SMC_WR_BUF_CNT,
632 sizeof(link->wr_tx_rdmas[0]),
634 if (!link->wr_tx_rdmas)
635 goto no_mem_wr_rx_ibs;
636 link->wr_tx_rdma_sges = kcalloc(SMC_WR_BUF_CNT,
637 sizeof(link->wr_tx_rdma_sges[0]),
639 if (!link->wr_tx_rdma_sges)
640 goto no_mem_wr_tx_rdmas;
641 link->wr_tx_sges = kcalloc(SMC_WR_BUF_CNT, sizeof(link->wr_tx_sges[0]),
643 if (!link->wr_tx_sges)
644 goto no_mem_wr_tx_rdma_sges;
645 link->wr_rx_sges = kcalloc(SMC_WR_BUF_CNT * 3,
646 sizeof(link->wr_rx_sges[0]),
648 if (!link->wr_rx_sges)
649 goto no_mem_wr_tx_sges;
650 link->wr_tx_mask = kcalloc(BITS_TO_LONGS(SMC_WR_BUF_CNT),
651 sizeof(*link->wr_tx_mask),
653 if (!link->wr_tx_mask)
654 goto no_mem_wr_rx_sges;
655 link->wr_tx_pends = kcalloc(SMC_WR_BUF_CNT,
656 sizeof(link->wr_tx_pends[0]),
658 if (!link->wr_tx_pends)
659 goto no_mem_wr_tx_mask;
660 link->wr_tx_compl = kcalloc(SMC_WR_BUF_CNT,
661 sizeof(link->wr_tx_compl[0]),
663 if (!link->wr_tx_compl)
664 goto no_mem_wr_tx_pends;
668 kfree(link->wr_tx_pends);
670 kfree(link->wr_tx_mask);
672 kfree(link->wr_rx_sges);
674 kfree(link->wr_tx_sges);
675 no_mem_wr_tx_rdma_sges:
676 kfree(link->wr_tx_rdma_sges);
678 kfree(link->wr_tx_rdmas);
680 kfree(link->wr_rx_ibs);
682 kfree(link->wr_tx_ibs);
684 kfree(link->wr_rx_bufs);
686 kfree(link->wr_tx_bufs);
691 void smc_wr_remove_dev(struct smc_ib_device *smcibdev)
693 tasklet_kill(&smcibdev->recv_tasklet);
694 tasklet_kill(&smcibdev->send_tasklet);
697 void smc_wr_add_dev(struct smc_ib_device *smcibdev)
699 tasklet_init(&smcibdev->recv_tasklet, smc_wr_rx_tasklet_fn,
700 (unsigned long)smcibdev);
701 tasklet_init(&smcibdev->send_tasklet, smc_wr_tx_tasklet_fn,
702 (unsigned long)smcibdev);
705 int smc_wr_create_link(struct smc_link *lnk)
707 struct ib_device *ibdev = lnk->smcibdev->ibdev;
710 smc_wr_tx_set_wr_id(&lnk->wr_tx_id, 0);
712 lnk->wr_rx_dma_addr = ib_dma_map_single(
713 ibdev, lnk->wr_rx_bufs, SMC_WR_BUF_SIZE * lnk->wr_rx_cnt,
715 if (ib_dma_mapping_error(ibdev, lnk->wr_rx_dma_addr)) {
716 lnk->wr_rx_dma_addr = 0;
720 lnk->wr_tx_dma_addr = ib_dma_map_single(
721 ibdev, lnk->wr_tx_bufs, SMC_WR_BUF_SIZE * lnk->wr_tx_cnt,
723 if (ib_dma_mapping_error(ibdev, lnk->wr_tx_dma_addr)) {
727 smc_wr_init_sge(lnk);
728 memset(lnk->wr_tx_mask, 0,
729 BITS_TO_LONGS(SMC_WR_BUF_CNT) * sizeof(*lnk->wr_tx_mask));
730 init_waitqueue_head(&lnk->wr_tx_wait);
731 init_waitqueue_head(&lnk->wr_reg_wait);
735 ib_dma_unmap_single(ibdev, lnk->wr_rx_dma_addr,
736 SMC_WR_BUF_SIZE * lnk->wr_rx_cnt,
738 lnk->wr_rx_dma_addr = 0;