drivers/media/dvb-frontends/af9033.c

   1 /*
   2  * Afatech AF9033 demodulator driver
   3  *
   4  * Copyright (C) 2009 Antti Palosaari <[email protected]>
   5  * Copyright (C) 2012 Antti Palosaari <[email protected]>
   6  *
   7  *    This program is free software; you can redistribute it and/or modify
   8  *    it under the terms of the GNU General Public License as published by
   9  *    the Free Software Foundation; either version 2 of the License, or
  10  *    (at your option) any later version.
  11  *
  12  *    This program is distributed in the hope that it will be useful,
  13  *    but WITHOUT ANY WARRANTY; without even the implied warranty of
  14  *    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15  *    GNU General Public License for more details.
  16  *
  17  *    You should have received a copy of the GNU General Public License along
  18  *    with this program; if not, write to the Free Software Foundation, Inc.,
  19  *    51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
  20  */
  21
  22 #include "af9033_priv.h"
  23
  24 /* Max transfer size done by I2C transfer functions */
  25 #define MAX_XFER_SIZE  64
  26
  27 struct af9033_dev {
  28         struct i2c_client *client;
  29         struct dvb_frontend fe;
  30         struct af9033_config cfg;
  31         bool is_af9035;
  32         bool is_it9135;
  33
  34         u32 bandwidth_hz;
  35         bool ts_mode_parallel;
  36         bool ts_mode_serial;
  37
  38         enum fe_status fe_status;
  39         u64 post_bit_error_prev; /* for old read_ber we return (curr - prev) */
  40         u64 post_bit_error;
  41         u64 post_bit_count;
  42         u64 error_block_count;
  43         u64 total_block_count;
  44         struct delayed_work stat_work;
  45 };
  46
  47 /* write multiple registers */
  48 static int af9033_wr_regs(struct af9033_dev *dev, u32 reg, const u8 *val,
  49                 int len)
  50 {
  51         int ret;
  52         u8 buf[MAX_XFER_SIZE];
  53         struct i2c_msg msg[1] = {
  54                 {
  55                         .addr = dev->client->addr,
  56                         .flags = 0,
  57                         .len = 3 + len,
  58                         .buf = buf,
  59                 }
  60         };
  61
  62         if (3 + len > sizeof(buf)) {
  63                 dev_warn(&dev->client->dev,
  64                                 "i2c wr reg=%04x: len=%d is too big!\n",
  65                                 reg, len);
  66                 return -EINVAL;
  67         }
  68
  69         buf[0] = (reg >> 16) & 0xff;
  70         buf[1] = (reg >>  8) & 0xff;
  71         buf[2] = (reg >>  0) & 0xff;
  72         memcpy(&buf[3], val, len);
  73
  74         ret = i2c_transfer(dev->client->adapter, msg, 1);
  75         if (ret == 1) {
  76                 ret = 0;
  77         } else {
  78                 dev_warn(&dev->client->dev, "i2c wr failed=%d reg=%06x len=%d\n",
  79                                 ret, reg, len);
  80                 ret = -EREMOTEIO;
  81         }
  82
  83         return ret;
  84 }
  85
  86 /* read multiple registers */
  87 static int af9033_rd_regs(struct af9033_dev *dev, u32 reg, u8 *val, int len)
  88 {
  89         int ret;
  90         u8 buf[3] = { (reg >> 16) & 0xff, (reg >> 8) & 0xff,
  91                         (reg >> 0) & 0xff };
  92         struct i2c_msg msg[2] = {
  93                 {
  94                         .addr = dev->client->addr,
  95                         .flags = 0,
  96                         .len = sizeof(buf),
  97                         .buf = buf
  98                 }, {
  99                         .addr = dev->client->addr,
 100                         .flags = I2C_M_RD,
 101                         .len = len,
 102                         .buf = val
 103                 }
 104         };
 105
 106         ret = i2c_transfer(dev->client->adapter, msg, 2);
 107         if (ret == 2) {
 108                 ret = 0;
 109         } else {
 110                 dev_warn(&dev->client->dev, "i2c rd failed=%d reg=%06x len=%d\n",
 111                                 ret, reg, len);
 112                 ret = -EREMOTEIO;
 113         }
 114
 115         return ret;
 116 }
 117
 118
 119 /* write single register */
 120 static int af9033_wr_reg(struct af9033_dev *dev, u32 reg, u8 val)
 121 {
 122         return af9033_wr_regs(dev, reg, &val, 1);
 123 }
 124
 125 /* read single register */
 126 static int af9033_rd_reg(struct af9033_dev *dev, u32 reg, u8 *val)
 127 {
 128         return af9033_rd_regs(dev, reg, val, 1);
 129 }
 130
 131 /* write single register with mask */
 132 static int af9033_wr_reg_mask(struct af9033_dev *dev, u32 reg, u8 val,
 133                 u8 mask)
 134 {
 135         int ret;
 136         u8 tmp;
 137
 138         /* no need for read if whole reg is written */
 139         if (mask != 0xff) {
 140                 ret = af9033_rd_regs(dev, reg, &tmp, 1);
 141                 if (ret)
 142                         return ret;
 143
 144                 val &= mask;
 145                 tmp &= ~mask;
 146                 val |= tmp;
 147         }
 148
 149         return af9033_wr_regs(dev, reg, &val, 1);
 150 }
 151
 152 /* read single register with mask */
 153 static int af9033_rd_reg_mask(struct af9033_dev *dev, u32 reg, u8 *val,
 154                 u8 mask)
 155 {
 156         int ret, i;
 157         u8 tmp;
 158
 159         ret = af9033_rd_regs(dev, reg, &tmp, 1);
 160         if (ret)
 161                 return ret;
 162
 163         tmp &= mask;
 164
 165         /* find position of the first bit */
 166         for (i = 0; i < 8; i++) {
 167                 if ((mask >> i) & 0x01)
 168                         break;
 169         }
 170         *val = tmp >> i;
 171
 172         return 0;
 173 }
 174
 175 /* write reg val table using reg addr auto increment */
 176 static int af9033_wr_reg_val_tab(struct af9033_dev *dev,
 177                 const struct reg_val *tab, int tab_len)
 178 {
 179 #define MAX_TAB_LEN 212
 180         int ret, i, j;
 181         u8 buf[1 + MAX_TAB_LEN];
 182
 183         dev_dbg(&dev->client->dev, "tab_len=%d\n", tab_len);
 184
 185         if (tab_len > sizeof(buf)) {
 186                 dev_warn(&dev->client->dev, "tab len %d is too big\n", tab_len);
 187                 return -EINVAL;
 188         }
 189
 190         for (i = 0, j = 0; i < tab_len; i++) {
 191                 buf[j] = tab[i].val;
 192
 193                 if (i == tab_len - 1 || tab[i].reg != tab[i + 1].reg - 1) {
 194                         ret = af9033_wr_regs(dev, tab[i].reg - j, buf, j + 1);
 195                         if (ret < 0)
 196                                 goto err;
 197
 198                         j = 0;
 199                 } else {
 200                         j++;
 201                 }
 202         }
 203
 204         return 0;
 205
 206 err:
 207         dev_dbg(&dev->client->dev, "failed=%d\n", ret);
 208
 209         return ret;
 210 }
 211
 212 static u32 af9033_div(struct af9033_dev *dev, u32 a, u32 b, u32 x)
 213 {
 214         u32 r = 0, c = 0, i;
 215
 216         dev_dbg(&dev->client->dev, "a=%d b=%d x=%d\n", a, b, x);
 217
 218         if (a > b) {
 219                 c = a / b;
 220                 a = a - c * b;
 221         }
 222
 223         for (i = 0; i < x; i++) {
 224                 if (a >= b) {
 225                         r += 1;
 226                         a -= b;
 227                 }
 228                 a <<= 1;
 229                 r <<= 1;
 230         }
 231         r = (c << (u32)x) + r;
 232
 233         dev_dbg(&dev->client->dev, "a=%d b=%d x=%d r=%d r=%x\n", a, b, x, r, r);
 234
 235         return r;
 236 }
 237
 238 static int af9033_init(struct dvb_frontend *fe)
 239 {
 240         struct af9033_dev *dev = fe->demodulator_priv;
 241         struct dtv_frontend_properties *c = &fe->dtv_property_cache;
 242         int ret, i, len;
 243         const struct reg_val *init;
 244         u8 buf[4];
 245         u32 adc_cw, clock_cw;
 246         struct reg_val_mask tab[] = {
 247                 { 0x80fb24, 0x00, 0x08 },
 248                 { 0x80004c, 0x00, 0xff },
 249                 { 0x00f641, dev->cfg.tuner, 0xff },
 250                 { 0x80f5ca, 0x01, 0x01 },
 251                 { 0x80f715, 0x01, 0x01 },
 252                 { 0x00f41f, 0x04, 0x04 },
 253                 { 0x00f41a, 0x01, 0x01 },
 254                 { 0x80f731, 0x00, 0x01 },
 255                 { 0x00d91e, 0x00, 0x01 },
 256                 { 0x00d919, 0x00, 0x01 },
 257                 { 0x80f732, 0x00, 0x01 },
 258                 { 0x00d91f, 0x00, 0x01 },
 259                 { 0x00d91a, 0x00, 0x01 },
 260                 { 0x80f730, 0x00, 0x01 },
 261                 { 0x80f778, 0x00, 0xff },
 262                 { 0x80f73c, 0x01, 0x01 },
 263                 { 0x80f776, 0x00, 0x01 },
 264                 { 0x00d8fd, 0x01, 0xff },
 265                 { 0x00d830, 0x01, 0xff },
 266                 { 0x00d831, 0x00, 0xff },
 267                 { 0x00d832, 0x00, 0xff },
 268                 { 0x80f985, dev->ts_mode_serial, 0x01 },
 269                 { 0x80f986, dev->ts_mode_parallel, 0x01 },
 270                 { 0x00d827, 0x00, 0xff },
 271                 { 0x00d829, 0x00, 0xff },
 272                 { 0x800045, dev->cfg.adc_multiplier, 0xff },
 273         };
 274
 275         /* program clock control */
 276         clock_cw = af9033_div(dev, dev->cfg.clock, 1000000ul, 19ul);
 277         buf[0] = (clock_cw >>  0) & 0xff;
 278         buf[1] = (clock_cw >>  8) & 0xff;
 279         buf[2] = (clock_cw >> 16) & 0xff;
 280         buf[3] = (clock_cw >> 24) & 0xff;
 281
 282         dev_dbg(&dev->client->dev, "clock=%d clock_cw=%08x\n",
 283                         dev->cfg.clock, clock_cw);
 284
 285         ret = af9033_wr_regs(dev, 0x800025, buf, 4);
 286         if (ret < 0)
 287                 goto err;
 288
 289         /* program ADC control */
 290         for (i = 0; i < ARRAY_SIZE(clock_adc_lut); i++) {
 291                 if (clock_adc_lut[i].clock == dev->cfg.clock)
 292                         break;
 293         }
 294         if (i == ARRAY_SIZE(clock_adc_lut)) {
 295                 dev_err(&dev->client->dev,
 296                         "Couldn't find ADC config for clock=%d\n",
 297                         dev->cfg.clock);
 298                 goto err;
 299         }
 300
 301         adc_cw = af9033_div(dev, clock_adc_lut[i].adc, 1000000ul, 19ul);
 302         buf[0] = (adc_cw >>  0) & 0xff;
 303         buf[1] = (adc_cw >>  8) & 0xff;
 304         buf[2] = (adc_cw >> 16) & 0xff;
 305
 306         dev_dbg(&dev->client->dev, "adc=%d adc_cw=%06x\n",
 307                         clock_adc_lut[i].adc, adc_cw);
 308
 309         ret = af9033_wr_regs(dev, 0x80f1cd, buf, 3);
 310         if (ret < 0)
 311                 goto err;
 312
 313         /* program register table */
 314         for (i = 0; i < ARRAY_SIZE(tab); i++) {
 315                 ret = af9033_wr_reg_mask(dev, tab[i].reg, tab[i].val,
 316                                 tab[i].mask);
 317                 if (ret < 0)
 318                         goto err;
 319         }
 320
 321         /* clock output */
 322         if (dev->cfg.dyn0_clk) {
 323                 ret = af9033_wr_reg(dev, 0x80fba8, 0x00);
 324                 if (ret < 0)
 325                         goto err;
 326         }
 327
 328         /* settings for TS interface */
 329         if (dev->cfg.ts_mode == AF9033_TS_MODE_USB) {
 330                 ret = af9033_wr_reg_mask(dev, 0x80f9a5, 0x00, 0x01);
 331                 if (ret < 0)
 332                         goto err;
 333
 334                 ret = af9033_wr_reg_mask(dev, 0x80f9b5, 0x01, 0x01);
 335                 if (ret < 0)
 336                         goto err;
 337         } else {
 338                 ret = af9033_wr_reg_mask(dev, 0x80f990, 0x00, 0x01);
 339                 if (ret < 0)
 340                         goto err;
 341
 342                 ret = af9033_wr_reg_mask(dev, 0x80f9b5, 0x00, 0x01);
 343                 if (ret < 0)
 344                         goto err;
 345         }
 346
 347         /* load OFSM settings */
 348         dev_dbg(&dev->client->dev, "load ofsm settings\n");
 349         switch (dev->cfg.tuner) {
 350         case AF9033_TUNER_IT9135_38:
 351         case AF9033_TUNER_IT9135_51:
 352         case AF9033_TUNER_IT9135_52:
 353                 len = ARRAY_SIZE(ofsm_init_it9135_v1);
 354                 init = ofsm_init_it9135_v1;
 355                 break;
 356         case AF9033_TUNER_IT9135_60:
 357         case AF9033_TUNER_IT9135_61:
 358         case AF9033_TUNER_IT9135_62:
 359                 len = ARRAY_SIZE(ofsm_init_it9135_v2);
 360                 init = ofsm_init_it9135_v2;
 361                 break;
 362         default:
 363                 len = ARRAY_SIZE(ofsm_init);
 364                 init = ofsm_init;
 365                 break;
 366         }
 367
 368         ret = af9033_wr_reg_val_tab(dev, init, len);
 369         if (ret < 0)
 370                 goto err;
 371
 372         /* load tuner specific settings */
 373         dev_dbg(&dev->client->dev, "load tuner specific settings\n");
 374         switch (dev->cfg.tuner) {
 375         case AF9033_TUNER_TUA9001:
 376                 len = ARRAY_SIZE(tuner_init_tua9001);
 377                 init = tuner_init_tua9001;
 378                 break;
 379         case AF9033_TUNER_FC0011:
 380                 len = ARRAY_SIZE(tuner_init_fc0011);
 381                 init = tuner_init_fc0011;
 382                 break;
 383         case AF9033_TUNER_MXL5007T:
 384                 len = ARRAY_SIZE(tuner_init_mxl5007t);
 385                 init = tuner_init_mxl5007t;
 386                 break;
 387         case AF9033_TUNER_TDA18218:
 388                 len = ARRAY_SIZE(tuner_init_tda18218);
 389                 init = tuner_init_tda18218;
 390                 break;
 391         case AF9033_TUNER_FC2580:
 392                 len = ARRAY_SIZE(tuner_init_fc2580);
 393                 init = tuner_init_fc2580;
 394                 break;
 395         case AF9033_TUNER_FC0012:
 396                 len = ARRAY_SIZE(tuner_init_fc0012);
 397                 init = tuner_init_fc0012;
 398                 break;
 399         case AF9033_TUNER_IT9135_38:
 400                 len = ARRAY_SIZE(tuner_init_it9135_38);
 401                 init = tuner_init_it9135_38;
 402                 break;
 403         case AF9033_TUNER_IT9135_51:
 404                 len = ARRAY_SIZE(tuner_init_it9135_51);
 405                 init = tuner_init_it9135_51;
 406                 break;
 407         case AF9033_TUNER_IT9135_52:
 408                 len = ARRAY_SIZE(tuner_init_it9135_52);
 409                 init = tuner_init_it9135_52;
 410                 break;
 411         case AF9033_TUNER_IT9135_60:
 412                 len = ARRAY_SIZE(tuner_init_it9135_60);
 413                 init = tuner_init_it9135_60;
 414                 break;
 415         case AF9033_TUNER_IT9135_61:
 416                 len = ARRAY_SIZE(tuner_init_it9135_61);
 417                 init = tuner_init_it9135_61;
 418                 break;
 419         case AF9033_TUNER_IT9135_62:
 420                 len = ARRAY_SIZE(tuner_init_it9135_62);
 421                 init = tuner_init_it9135_62;
 422                 break;
 423         default:
 424                 dev_dbg(&dev->client->dev, "unsupported tuner ID=%d\n",
 425                                 dev->cfg.tuner);
 426                 ret = -ENODEV;
 427                 goto err;
 428         }
 429
 430         ret = af9033_wr_reg_val_tab(dev, init, len);
 431         if (ret < 0)
 432                 goto err;
 433
 434         if (dev->cfg.ts_mode == AF9033_TS_MODE_SERIAL) {
 435                 ret = af9033_wr_reg_mask(dev, 0x00d91c, 0x01, 0x01);
 436                 if (ret < 0)
 437                         goto err;
 438
 439                 ret = af9033_wr_reg_mask(dev, 0x00d917, 0x00, 0x01);
 440                 if (ret < 0)
 441                         goto err;
 442
 443                 ret = af9033_wr_reg_mask(dev, 0x00d916, 0x00, 0x01);
 444                 if (ret < 0)
 445                         goto err;
 446         }
 447
 448         switch (dev->cfg.tuner) {
 449         case AF9033_TUNER_IT9135_60:
 450         case AF9033_TUNER_IT9135_61:
 451         case AF9033_TUNER_IT9135_62:
 452                 ret = af9033_wr_reg(dev, 0x800000, 0x01);
 453                 if (ret < 0)
 454                         goto err;
 455         }
 456
 457         dev->bandwidth_hz = 0; /* force to program all parameters */
 458         /* init stats here in order signal app which stats are supported */
 459         c->strength.len = 1;
 460         c->strength.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
 461         c->cnr.len = 1;
 462         c->cnr.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
 463         c->block_count.len = 1;
 464         c->block_count.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
 465         c->block_error.len = 1;
 466         c->block_error.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
 467         c->post_bit_count.len = 1;
 468         c->post_bit_count.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
 469         c->post_bit_error.len = 1;
 470         c->post_bit_error.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
 471         /* start statistics polling */
 472         schedule_delayed_work(&dev->stat_work, msecs_to_jiffies(2000));
 473
 474         return 0;
 475
 476 err:
 477         dev_dbg(&dev->client->dev, "failed=%d\n", ret);
 478
 479         return ret;
 480 }
 481
 482 static int af9033_sleep(struct dvb_frontend *fe)
 483 {
 484         struct af9033_dev *dev = fe->demodulator_priv;
 485         int ret, i;
 486         u8 tmp;
 487
 488         /* stop statistics polling */
 489         cancel_delayed_work_sync(&dev->stat_work);
 490
 491         ret = af9033_wr_reg(dev, 0x80004c, 1);
 492         if (ret < 0)
 493                 goto err;
 494
 495         ret = af9033_wr_reg(dev, 0x800000, 0);
 496         if (ret < 0)
 497                 goto err;
 498
 499         for (i = 100, tmp = 1; i && tmp; i--) {
 500                 ret = af9033_rd_reg(dev, 0x80004c, &tmp);
 501                 if (ret < 0)
 502                         goto err;
 503
 504                 usleep_range(200, 10000);
 505         }
 506
 507         dev_dbg(&dev->client->dev, "loop=%d\n", i);
 508
 509         if (i == 0) {
 510                 ret = -ETIMEDOUT;
 511                 goto err;
 512         }
 513
 514         ret = af9033_wr_reg_mask(dev, 0x80fb24, 0x08, 0x08);
 515         if (ret < 0)
 516                 goto err;
 517
 518         /* prevent current leak (?) */
 519         if (dev->cfg.ts_mode == AF9033_TS_MODE_SERIAL) {
 520                 /* enable parallel TS */
 521                 ret = af9033_wr_reg_mask(dev, 0x00d917, 0x00, 0x01);
 522                 if (ret < 0)
 523                         goto err;
 524
 525                 ret = af9033_wr_reg_mask(dev, 0x00d916, 0x01, 0x01);
 526                 if (ret < 0)
 527                         goto err;
 528         }
 529
 530         return 0;
 531
 532 err:
 533         dev_dbg(&dev->client->dev, "failed=%d\n", ret);
 534
 535         return ret;
 536 }
 537
 538 static int af9033_get_tune_settings(struct dvb_frontend *fe,
 539                 struct dvb_frontend_tune_settings *fesettings)
 540 {
 541         /* 800 => 2000 because IT9135 v2 is slow to gain lock */
 542         fesettings->min_delay_ms = 2000;
 543         fesettings->step_size = 0;
 544         fesettings->max_drift = 0;
 545
 546         return 0;
 547 }
 548
 549 static int af9033_set_frontend(struct dvb_frontend *fe)
 550 {
 551         struct af9033_dev *dev = fe->demodulator_priv;
 552         struct dtv_frontend_properties *c = &fe->dtv_property_cache;
 553         int ret, i, spec_inv, sampling_freq;
 554         u8 tmp, buf[3], bandwidth_reg_val;
 555         u32 if_frequency, freq_cw, adc_freq;
 556
 557         dev_dbg(&dev->client->dev, "frequency=%d bandwidth_hz=%d\n",
 558                         c->frequency, c->bandwidth_hz);
 559
 560         /* check bandwidth */
 561         switch (c->bandwidth_hz) {
 562         case 6000000:
 563                 bandwidth_reg_val = 0x00;
 564                 break;
 565         case 7000000:
 566                 bandwidth_reg_val = 0x01;
 567                 break;
 568         case 8000000:
 569                 bandwidth_reg_val = 0x02;
 570                 break;
 571         default:
 572                 dev_dbg(&dev->client->dev, "invalid bandwidth_hz\n");
 573                 ret = -EINVAL;
 574                 goto err;
 575         }
 576
 577         /* program tuner */
 578         if (fe->ops.tuner_ops.set_params)
 579                 fe->ops.tuner_ops.set_params(fe);
 580
 581         /* program CFOE coefficients */
 582         if (c->bandwidth_hz != dev->bandwidth_hz) {
 583                 for (i = 0; i < ARRAY_SIZE(coeff_lut); i++) {
 584                         if (coeff_lut[i].clock == dev->cfg.clock &&
 585                                 coeff_lut[i].bandwidth_hz == c->bandwidth_hz) {
 586                                 break;
 587                         }
 588                 }
 589                 if (i == ARRAY_SIZE(coeff_lut)) {
 590                         dev_err(&dev->client->dev,
 591                                 "Couldn't find LUT config for clock=%d\n",
 592                                 dev->cfg.clock);
 593                         ret = -EINVAL;
 594                         goto err;
 595                 }
 596
 597                 ret = af9033_wr_regs(dev, 0x800001,
 598                                 coeff_lut[i].val, sizeof(coeff_lut[i].val));
 599         }
 600
 601         /* program frequency control */
 602         if (c->bandwidth_hz != dev->bandwidth_hz) {
 603                 spec_inv = dev->cfg.spec_inv ? -1 : 1;
 604
 605                 for (i = 0; i < ARRAY_SIZE(clock_adc_lut); i++) {
 606                         if (clock_adc_lut[i].clock == dev->cfg.clock)
 607                                 break;
 608                 }
 609                 if (i == ARRAY_SIZE(clock_adc_lut)) {
 610                         dev_err(&dev->client->dev,
 611                                 "Couldn't find ADC clock for clock=%d\n",
 612                                 dev->cfg.clock);
 613                         ret = -EINVAL;
 614                         goto err;
 615                 }
 616                 adc_freq = clock_adc_lut[i].adc;
 617
 618                 /* get used IF frequency */
 619                 if (fe->ops.tuner_ops.get_if_frequency)
 620                         fe->ops.tuner_ops.get_if_frequency(fe, &if_frequency);
 621                 else
 622                         if_frequency = 0;
 623
 624                 sampling_freq = if_frequency;
 625
 626                 while (sampling_freq > (adc_freq / 2))
 627                         sampling_freq -= adc_freq;
 628
 629                 if (sampling_freq >= 0)
 630                         spec_inv *= -1;
 631                 else
 632                         sampling_freq *= -1;
 633
 634                 freq_cw = af9033_div(dev, sampling_freq, adc_freq, 23ul);
 635
 636                 if (spec_inv == -1)
 637                         freq_cw = 0x800000 - freq_cw;
 638
 639                 if (dev->cfg.adc_multiplier == AF9033_ADC_MULTIPLIER_2X)
 640                         freq_cw /= 2;
 641
 642                 buf[0] = (freq_cw >>  0) & 0xff;
 643                 buf[1] = (freq_cw >>  8) & 0xff;
 644                 buf[2] = (freq_cw >> 16) & 0x7f;
 645
 646                 /* FIXME: there seems to be calculation error here... */
 647                 if (if_frequency == 0)
 648                         buf[2] = 0;
 649
 650                 ret = af9033_wr_regs(dev, 0x800029, buf, 3);
 651                 if (ret < 0)
 652                         goto err;
 653
 654                 dev->bandwidth_hz = c->bandwidth_hz;
 655         }
 656
 657         ret = af9033_wr_reg_mask(dev, 0x80f904, bandwidth_reg_val, 0x03);
 658         if (ret < 0)
 659                 goto err;
 660
 661         ret = af9033_wr_reg(dev, 0x800040, 0x00);
 662         if (ret < 0)
 663                 goto err;
 664
 665         ret = af9033_wr_reg(dev, 0x800047, 0x00);
 666         if (ret < 0)
 667                 goto err;
 668
 669         ret = af9033_wr_reg_mask(dev, 0x80f999, 0x00, 0x01);
 670         if (ret < 0)
 671                 goto err;
 672
 673         if (c->frequency <= 230000000)
 674                 tmp = 0x00; /* VHF */
 675         else
 676                 tmp = 0x01; /* UHF */
 677
 678         ret = af9033_wr_reg(dev, 0x80004b, tmp);
 679         if (ret < 0)
 680                 goto err;
 681
 682         ret = af9033_wr_reg(dev, 0x800000, 0x00);
 683         if (ret < 0)
 684                 goto err;
 685
 686         return 0;
 687
 688 err:
 689         dev_dbg(&dev->client->dev, "failed=%d\n", ret);
 690
 691         return ret;
 692 }
 693
 694 static int af9033_get_frontend(struct dvb_frontend *fe,
 695                                struct dtv_frontend_properties *c)
 696 {
 697         struct af9033_dev *dev = fe->demodulator_priv;
 698         int ret;
 699         u8 buf[8];
 700
 701         dev_dbg(&dev->client->dev, "\n");
 702
 703         /* read all needed registers */
 704         ret = af9033_rd_regs(dev, 0x80f900, buf, sizeof(buf));
 705         if (ret < 0)
 706                 goto err;
 707
 708         switch ((buf[0] >> 0) & 3) {
 709         case 0:
 710                 c->transmission_mode = TRANSMISSION_MODE_2K;
 711                 break;
 712         case 1:
 713                 c->transmission_mode = TRANSMISSION_MODE_8K;
 714                 break;
 715         }
 716
 717         switch ((buf[1] >> 0) & 3) {
 718         case 0:
 719                 c->guard_interval = GUARD_INTERVAL_1_32;
 720                 break;
 721         case 1:
 722                 c->guard_interval = GUARD_INTERVAL_1_16;
 723                 break;
 724         case 2:
 725                 c->guard_interval = GUARD_INTERVAL_1_8;
 726                 break;
 727         case 3:
 728                 c->guard_interval = GUARD_INTERVAL_1_4;
 729                 break;
 730         }
 731
 732         switch ((buf[2] >> 0) & 7) {
 733         case 0:
 734                 c->hierarchy = HIERARCHY_NONE;
 735                 break;
 736         case 1:
 737                 c->hierarchy = HIERARCHY_1;
 738                 break;
 739         case 2:
 740                 c->hierarchy = HIERARCHY_2;
 741                 break;
 742         case 3:
 743                 c->hierarchy = HIERARCHY_4;
 744                 break;
 745         }
 746
 747         switch ((buf[3] >> 0) & 3) {
 748         case 0:
 749                 c->modulation = QPSK;
 750                 break;
 751         case 1:
 752                 c->modulation = QAM_16;
 753                 break;
 754         case 2:
 755                 c->modulation = QAM_64;
 756                 break;
 757         }
 758
 759         switch ((buf[4] >> 0) & 3) {
 760         case 0:
 761                 c->bandwidth_hz = 6000000;
 762                 break;
 763         case 1:
 764                 c->bandwidth_hz = 7000000;
 765                 break;
 766         case 2:
 767                 c->bandwidth_hz = 8000000;
 768                 break;
 769         }
 770
 771         switch ((buf[6] >> 0) & 7) {
 772         case 0:
 773                 c->code_rate_HP = FEC_1_2;
 774                 break;
 775         case 1:
 776                 c->code_rate_HP = FEC_2_3;
 777                 break;
 778         case 2:
 779                 c->code_rate_HP = FEC_3_4;
 780                 break;
 781         case 3:
 782                 c->code_rate_HP = FEC_5_6;
 783                 break;
 784         case 4:
 785                 c->code_rate_HP = FEC_7_8;
 786                 break;
 787         case 5:
 788                 c->code_rate_HP = FEC_NONE;
 789                 break;
 790         }
 791
 792         switch ((buf[7] >> 0) & 7) {
 793         case 0:
 794                 c->code_rate_LP = FEC_1_2;
 795                 break;
 796         case 1:
 797                 c->code_rate_LP = FEC_2_3;
 798                 break;
 799         case 2:
 800                 c->code_rate_LP = FEC_3_4;
 801                 break;
 802         case 3:
 803                 c->code_rate_LP = FEC_5_6;
 804                 break;
 805         case 4:
 806                 c->code_rate_LP = FEC_7_8;
 807                 break;
 808         case 5:
 809                 c->code_rate_LP = FEC_NONE;
 810                 break;
 811         }
 812
 813         return 0;
 814
 815 err:
 816         dev_dbg(&dev->client->dev, "failed=%d\n", ret);
 817
 818         return ret;
 819 }
 820
 821 static int af9033_read_status(struct dvb_frontend *fe, enum fe_status *status)
 822 {
 823         struct af9033_dev *dev = fe->demodulator_priv;
 824         int ret;
 825         u8 tmp;
 826
 827         *status = 0;
 828
 829         /* radio channel status, 0=no result, 1=has signal, 2=no signal */
 830         ret = af9033_rd_reg(dev, 0x800047, &tmp);
 831         if (ret < 0)
 832                 goto err;
 833
 834         /* has signal */
 835         if (tmp == 0x01)
 836                 *status |= FE_HAS_SIGNAL;
 837
 838         if (tmp != 0x02) {
 839                 /* TPS lock */
 840                 ret = af9033_rd_reg_mask(dev, 0x80f5a9, &tmp, 0x01);
 841                 if (ret < 0)
 842                         goto err;
 843
 844                 if (tmp)
 845                         *status |= FE_HAS_SIGNAL | FE_HAS_CARRIER |
 846                                         FE_HAS_VITERBI;
 847
 848                 /* full lock */
 849                 ret = af9033_rd_reg_mask(dev, 0x80f999, &tmp, 0x01);
 850                 if (ret < 0)
 851                         goto err;
 852
 853                 if (tmp)
 854                         *status |= FE_HAS_SIGNAL | FE_HAS_CARRIER |
 855                                         FE_HAS_VITERBI | FE_HAS_SYNC |
 856                                         FE_HAS_LOCK;
 857         }
 858
 859         dev->fe_status = *status;
 860
 861         return 0;
 862
 863 err:
 864         dev_dbg(&dev->client->dev, "failed=%d\n", ret);
 865
 866         return ret;
 867 }
 868
 869 static int af9033_read_snr(struct dvb_frontend *fe, u16 *snr)
 870 {
 871         struct af9033_dev *dev = fe->demodulator_priv;
 872         struct dtv_frontend_properties *c = &dev->fe.dtv_property_cache;
 873         int ret;
 874         u8 u8tmp;
 875
 876         /* use DVBv5 CNR */
 877         if (c->cnr.stat[0].scale == FE_SCALE_DECIBEL) {
 878                 /* Return 0.1 dB for AF9030 and 0-0xffff for IT9130. */
 879                 if (dev->is_af9035) {
 880                         /* 1000x => 10x (0.1 dB) */
 881                         *snr = div_s64(c->cnr.stat[0].svalue, 100);
 882                 } else {
 883                         /* 1000x => 1x (1 dB) */
 884                         *snr = div_s64(c->cnr.stat[0].svalue, 1000);
 885
 886                         /* read current modulation */
 887                         ret = af9033_rd_reg(dev, 0x80f903, &u8tmp);
 888                         if (ret)
 889                                 goto err;
 890
 891                         /* scale value to 0x0000-0xffff */
 892                         switch ((u8tmp >> 0) & 3) {
 893                         case 0:
 894                                 *snr = *snr * 0xffff / 23;
 895                                 break;
 896                         case 1:
 897                                 *snr = *snr * 0xffff / 26;
 898                                 break;
 899                         case 2:
 900                                 *snr = *snr * 0xffff / 32;
 901                                 break;
 902                         default:
 903                                 goto err;
 904                         }
 905                 }
 906         } else {
 907                 *snr = 0;
 908         }
 909
 910         return 0;
 911
 912 err:
 913         dev_dbg(&dev->client->dev, "failed=%d\n", ret);
 914
 915         return ret;
 916 }
 917
 918 static int af9033_read_signal_strength(struct dvb_frontend *fe, u16 *strength)
 919 {
 920         struct af9033_dev *dev = fe->demodulator_priv;
 921         struct dtv_frontend_properties *c = &dev->fe.dtv_property_cache;
 922         int ret, tmp, power_real;
 923         u8 u8tmp, gain_offset, buf[7];
 924
 925         if (dev->is_af9035) {
 926                 /* read signal strength of 0-100 scale */
 927                 ret = af9033_rd_reg(dev, 0x800048, &u8tmp);
 928                 if (ret < 0)
 929                         goto err;
 930
 931                 /* scale value to 0x0000-0xffff */
 932                 *strength = u8tmp * 0xffff / 100;
 933         } else {
 934                 ret = af9033_rd_reg(dev, 0x8000f7, &u8tmp);
 935                 if (ret < 0)
 936                         goto err;
 937
 938                 ret = af9033_rd_regs(dev, 0x80f900, buf, 7);
 939                 if (ret < 0)
 940                         goto err;
 941
 942                 if (c->frequency <= 300000000)
 943                         gain_offset = 7; /* VHF */
 944                 else
 945                         gain_offset = 4; /* UHF */
 946
 947                 power_real = (u8tmp - 100 - gain_offset) -
 948                         power_reference[((buf[3] >> 0) & 3)][((buf[6] >> 0) & 7)];
 949
 950                 if (power_real < -15)
 951                         tmp = 0;
 952                 else if ((power_real >= -15) && (power_real < 0))
 953                         tmp = (2 * (power_real + 15)) / 3;
 954                 else if ((power_real >= 0) && (power_real < 20))
 955                         tmp = 4 * power_real + 10;
 956                 else if ((power_real >= 20) && (power_real < 35))
 957                         tmp = (2 * (power_real - 20)) / 3 + 90;
 958                 else
 959                         tmp = 100;
 960
 961                 /* scale value to 0x0000-0xffff */
 962                 *strength = tmp * 0xffff / 100;
 963         }
 964
 965         return 0;
 966
 967 err:
 968         dev_dbg(&dev->client->dev, "failed=%d\n", ret);
 969
 970         return ret;
 971 }
 972
 973 static int af9033_read_ber(struct dvb_frontend *fe, u32 *ber)
 974 {
 975         struct af9033_dev *dev = fe->demodulator_priv;
 976
 977         *ber = (dev->post_bit_error - dev->post_bit_error_prev);
 978         dev->post_bit_error_prev = dev->post_bit_error;
 979
 980         return 0;
 981 }
 982
 983 static int af9033_read_ucblocks(struct dvb_frontend *fe, u32 *ucblocks)
 984 {
 985         struct af9033_dev *dev = fe->demodulator_priv;
 986
 987         *ucblocks = dev->error_block_count;
 988         return 0;
 989 }
 990
 991 static int af9033_i2c_gate_ctrl(struct dvb_frontend *fe, int enable)
 992 {
 993         struct af9033_dev *dev = fe->demodulator_priv;
 994         int ret;
 995
 996         dev_dbg(&dev->client->dev, "enable=%d\n", enable);
 997
 998         ret = af9033_wr_reg_mask(dev, 0x00fa04, enable, 0x01);
 999         if (ret < 0)
1000                 goto err;
1001
1002         return 0;
1003
1004 err:
1005         dev_dbg(&dev->client->dev, "failed=%d\n", ret);
1006
1007         return ret;
1008 }
1009
1010 static int af9033_pid_filter_ctrl(struct dvb_frontend *fe, int onoff)
1011 {
1012         struct af9033_dev *dev = fe->demodulator_priv;
1013         int ret;
1014
1015         dev_dbg(&dev->client->dev, "onoff=%d\n", onoff);
1016
1017         ret = af9033_wr_reg_mask(dev, 0x80f993, onoff, 0x01);
1018         if (ret < 0)
1019                 goto err;
1020
1021         return 0;
1022
1023 err:
1024         dev_dbg(&dev->client->dev, "failed=%d\n", ret);
1025
1026         return ret;
1027 }
1028
1029 static int af9033_pid_filter(struct dvb_frontend *fe, int index, u16 pid,
1030                 int onoff)
1031 {
1032         struct af9033_dev *dev = fe->demodulator_priv;
1033         int ret;
1034         u8 wbuf[2] = {(pid >> 0) & 0xff, (pid >> 8) & 0xff};
1035
1036         dev_dbg(&dev->client->dev, "index=%d pid=%04x onoff=%d\n",
1037                         index, pid, onoff);
1038
1039         if (pid > 0x1fff)
1040                 return 0;
1041
1042         ret = af9033_wr_regs(dev, 0x80f996, wbuf, 2);
1043         if (ret < 0)
1044                 goto err;
1045
1046         ret = af9033_wr_reg(dev, 0x80f994, onoff);
1047         if (ret < 0)
1048                 goto err;
1049
1050         ret = af9033_wr_reg(dev, 0x80f995, index);
1051         if (ret < 0)
1052                 goto err;
1053
1054         return 0;
1055
1056 err:
1057         dev_dbg(&dev->client->dev, "failed=%d\n", ret);
1058
1059         return ret;
1060 }
1061
1062 static void af9033_stat_work(struct work_struct *work)
1063 {
1064         struct af9033_dev *dev = container_of(work, struct af9033_dev, stat_work.work);
1065         struct dtv_frontend_properties *c = &dev->fe.dtv_property_cache;
1066         int ret, tmp, i, len;
1067         u8 u8tmp, buf[7];
1068
1069         dev_dbg(&dev->client->dev, "\n");
1070
1071         /* signal strength */
1072         if (dev->fe_status & FE_HAS_SIGNAL) {
1073                 if (dev->is_af9035) {
1074                         ret = af9033_rd_reg(dev, 0x80004a, &u8tmp);
1075                         tmp = -u8tmp * 1000;
1076                 } else {
1077                         ret = af9033_rd_reg(dev, 0x8000f7, &u8tmp);
1078                         tmp = (u8tmp - 100) * 1000;
1079                 }
1080                 if (ret)
1081                         goto err;
1082
1083                 c->strength.len = 1;
1084                 c->strength.stat[0].scale = FE_SCALE_DECIBEL;
1085                 c->strength.stat[0].svalue = tmp;
1086         } else {
1087                 c->strength.len = 1;
1088                 c->strength.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
1089         }
1090
1091         /* CNR */
1092         if (dev->fe_status & FE_HAS_VITERBI) {
1093                 u32 snr_val;
1094                 const struct val_snr *snr_lut;
1095
1096                 /* read value */
1097                 ret = af9033_rd_regs(dev, 0x80002c, buf, 3);
1098                 if (ret)
1099                         goto err;
1100
1101                 snr_val = (buf[2] << 16) | (buf[1] << 8) | (buf[0] << 0);
1102
1103                 /* read superframe number */
1104                 ret = af9033_rd_reg(dev, 0x80f78b, &u8tmp);
1105                 if (ret)
1106                         goto err;
1107
1108                 if (u8tmp)
1109                         snr_val /= u8tmp;
1110
1111                 /* read current transmission mode */
1112                 ret = af9033_rd_reg(dev, 0x80f900, &u8tmp);
1113                 if (ret)
1114                         goto err;
1115
1116                 switch ((u8tmp >> 0) & 3) {
1117                 case 0:
1118                         snr_val *= 4;
1119                         break;
1120                 case 1:
1121                         snr_val *= 1;
1122                         break;
1123                 case 2:
1124                         snr_val *= 2;
1125                         break;
1126                 default:
1127                         goto err_schedule_delayed_work;
1128                 }
1129
1130                 /* read current modulation */
1131                 ret = af9033_rd_reg(dev, 0x80f903, &u8tmp);
1132                 if (ret)
1133                         goto err;
1134
1135                 switch ((u8tmp >> 0) & 3) {
1136                 case 0:
1137                         len = ARRAY_SIZE(qpsk_snr_lut);
1138                         snr_lut = qpsk_snr_lut;
1139                         break;
1140                 case 1:
1141                         len = ARRAY_SIZE(qam16_snr_lut);
1142                         snr_lut = qam16_snr_lut;
1143                         break;
1144                 case 2:
1145                         len = ARRAY_SIZE(qam64_snr_lut);
1146                         snr_lut = qam64_snr_lut;
1147                         break;
1148                 default:
1149                         goto err_schedule_delayed_work;
1150                 }
1151
1152                 for (i = 0; i < len; i++) {
1153                         tmp = snr_lut[i].snr * 1000;
1154                         if (snr_val < snr_lut[i].val)
1155                                 break;
1156                 }
1157
1158                 c->cnr.len = 1;
1159                 c->cnr.stat[0].scale = FE_SCALE_DECIBEL;
1160                 c->cnr.stat[0].svalue = tmp;
1161         } else {
1162                 c->cnr.len = 1;
1163                 c->cnr.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
1164         }
1165
1166         /* UCB/PER/BER */
1167         if (dev->fe_status & FE_HAS_LOCK) {
1168                 /* outer FEC, 204 byte packets */
1169                 u16 abort_packet_count, rsd_packet_count;
1170                 /* inner FEC, bits */
1171                 u32 rsd_bit_err_count;
1172
1173                 /*
1174                  * Packet count used for measurement is 10000
1175                  * (rsd_packet_count). Maybe it should be increased?
1176                  */
1177
1178                 ret = af9033_rd_regs(dev, 0x800032, buf, 7);
1179                 if (ret)
1180                         goto err;
1181
1182                 abort_packet_count = (buf[1] << 8) | (buf[0] << 0);
1183                 rsd_bit_err_count = (buf[4] << 16) | (buf[3] << 8) | buf[2];
1184                 rsd_packet_count = (buf[6] << 8) | (buf[5] << 0);
1185
1186                 dev->error_block_count += abort_packet_count;
1187                 dev->total_block_count += rsd_packet_count;
1188                 dev->post_bit_error += rsd_bit_err_count;
1189                 dev->post_bit_count += rsd_packet_count * 204 * 8;
1190
1191                 c->block_count.len = 1;
1192                 c->block_count.stat[0].scale = FE_SCALE_COUNTER;
1193                 c->block_count.stat[0].uvalue = dev->total_block_count;
1194
1195                 c->block_error.len = 1;
1196                 c->block_error.stat[0].scale = FE_SCALE_COUNTER;
1197                 c->block_error.stat[0].uvalue = dev->error_block_count;
1198
1199                 c->post_bit_count.len = 1;
1200                 c->post_bit_count.stat[0].scale = FE_SCALE_COUNTER;
1201                 c->post_bit_count.stat[0].uvalue = dev->post_bit_count;
1202
1203                 c->post_bit_error.len = 1;
1204                 c->post_bit_error.stat[0].scale = FE_SCALE_COUNTER;
1205                 c->post_bit_error.stat[0].uvalue = dev->post_bit_error;
1206         }
1207
1208 err_schedule_delayed_work:
1209         schedule_delayed_work(&dev->stat_work, msecs_to_jiffies(2000));
1210         return;
1211 err:
1212         dev_dbg(&dev->client->dev, "failed=%d\n", ret);
1213 }
1214
1215 static struct dvb_frontend_ops af9033_ops = {
1216         .delsys = { SYS_DVBT },
1217         .info = {
1218                 .name = "Afatech AF9033 (DVB-T)",
1219                 .frequency_min = 174000000,
1220                 .frequency_max = 862000000,
1221                 .frequency_stepsize = 250000,
1222                 .frequency_tolerance = 0,
1223                 .caps = FE_CAN_FEC_1_2 |
1224                         FE_CAN_FEC_2_3 |
1225                         FE_CAN_FEC_3_4 |
1226                         FE_CAN_FEC_5_6 |
1227                         FE_CAN_FEC_7_8 |
1228                         FE_CAN_FEC_AUTO |
1229                         FE_CAN_QPSK |
1230                         FE_CAN_QAM_16 |
1231                         FE_CAN_QAM_64 |
1232                         FE_CAN_QAM_AUTO |
1233                         FE_CAN_TRANSMISSION_MODE_AUTO |
1234                         FE_CAN_GUARD_INTERVAL_AUTO |
1235                         FE_CAN_HIERARCHY_AUTO |
1236                         FE_CAN_RECOVER |
1237                         FE_CAN_MUTE_TS
1238         },
1239
1240         .init = af9033_init,
1241         .sleep = af9033_sleep,
1242
1243         .get_tune_settings = af9033_get_tune_settings,
1244         .set_frontend = af9033_set_frontend,
1245         .get_frontend = af9033_get_frontend,
1246
1247         .read_status = af9033_read_status,
1248         .read_snr = af9033_read_snr,
1249         .read_signal_strength = af9033_read_signal_strength,
1250         .read_ber = af9033_read_ber,
1251         .read_ucblocks = af9033_read_ucblocks,
1252
1253         .i2c_gate_ctrl = af9033_i2c_gate_ctrl,
1254 };
1255
1256 static int af9033_probe(struct i2c_client *client,
1257                 const struct i2c_device_id *id)
1258 {
1259         struct af9033_config *cfg = client->dev.platform_data;
1260         struct af9033_dev *dev;
1261         int ret;
1262         u8 buf[8];
1263         u32 reg;
1264
1265         /* allocate memory for the internal state */
1266         dev = kzalloc(sizeof(struct af9033_dev), GFP_KERNEL);
1267         if (dev == NULL) {
1268                 ret = -ENOMEM;
1269                 dev_err(&client->dev, "Could not allocate memory for state\n");
1270                 goto err;
1271         }
1272
1273         /* setup the state */
1274         dev->client = client;
1275         INIT_DELAYED_WORK(&dev->stat_work, af9033_stat_work);
1276         memcpy(&dev->cfg, cfg, sizeof(struct af9033_config));
1277
1278         if (dev->cfg.clock != 12000000) {
1279                 ret = -ENODEV;
1280                 dev_err(&dev->client->dev,
1281                                 "unsupported clock %d Hz, only 12000000 Hz is supported currently\n",
1282                                 dev->cfg.clock);
1283                 goto err_kfree;
1284         }
1285
1286         /* firmware version */
1287         switch (dev->cfg.tuner) {
1288         case AF9033_TUNER_IT9135_38:
1289         case AF9033_TUNER_IT9135_51:
1290         case AF9033_TUNER_IT9135_52:
1291         case AF9033_TUNER_IT9135_60:
1292         case AF9033_TUNER_IT9135_61:
1293         case AF9033_TUNER_IT9135_62:
1294                 dev->is_it9135 = true;
1295                 reg = 0x004bfc;
1296                 break;
1297         default:
1298                 dev->is_af9035 = true;
1299                 reg = 0x0083e9;
1300                 break;
1301         }
1302
1303         ret = af9033_rd_regs(dev, reg, &buf[0], 4);
1304         if (ret < 0)
1305                 goto err_kfree;
1306
1307         ret = af9033_rd_regs(dev, 0x804191, &buf[4], 4);
1308         if (ret < 0)
1309                 goto err_kfree;
1310
1311         dev_info(&dev->client->dev,
1312                         "firmware version: LINK %d.%d.%d.%d - OFDM %d.%d.%d.%d\n",
1313                         buf[0], buf[1], buf[2], buf[3], buf[4], buf[5], buf[6],
1314                         buf[7]);
1315
1316         /* sleep */
1317         switch (dev->cfg.tuner) {
1318         case AF9033_TUNER_IT9135_38:
1319         case AF9033_TUNER_IT9135_51:
1320         case AF9033_TUNER_IT9135_52:
1321         case AF9033_TUNER_IT9135_60:
1322         case AF9033_TUNER_IT9135_61:
1323         case AF9033_TUNER_IT9135_62:
1324                 /* IT9135 did not like to sleep at that early */
1325                 break;
1326         default:
1327                 ret = af9033_wr_reg(dev, 0x80004c, 1);
1328                 if (ret < 0)
1329                         goto err_kfree;
1330
1331                 ret = af9033_wr_reg(dev, 0x800000, 0);
1332                 if (ret < 0)
1333                         goto err_kfree;
1334         }
1335
1336         /* configure internal TS mode */
1337         switch (dev->cfg.ts_mode) {
1338         case AF9033_TS_MODE_PARALLEL:
1339                 dev->ts_mode_parallel = true;
1340                 break;
1341         case AF9033_TS_MODE_SERIAL:
1342                 dev->ts_mode_serial = true;
1343                 break;
1344         case AF9033_TS_MODE_USB:
1345                 /* usb mode for AF9035 */
1346         default:
1347                 break;
1348         }
1349
1350         /* create dvb_frontend */
1351         memcpy(&dev->fe.ops, &af9033_ops, sizeof(struct dvb_frontend_ops));
1352         dev->fe.demodulator_priv = dev;
1353         *cfg->fe = &dev->fe;
1354         if (cfg->ops) {
1355                 cfg->ops->pid_filter = af9033_pid_filter;
1356                 cfg->ops->pid_filter_ctrl = af9033_pid_filter_ctrl;
1357         }
1358         i2c_set_clientdata(client, dev);
1359
1360         dev_info(&dev->client->dev, "Afatech AF9033 successfully attached\n");
1361         return 0;
1362 err_kfree:
1363         kfree(dev);
1364 err:
1365         dev_dbg(&client->dev, "failed=%d\n", ret);
1366         return ret;
1367 }
1368
1369 static int af9033_remove(struct i2c_client *client)
1370 {
1371         struct af9033_dev *dev = i2c_get_clientdata(client);
1372
1373         dev_dbg(&dev->client->dev, "\n");
1374
1375         /* stop statistics polling */
1376         cancel_delayed_work_sync(&dev->stat_work);
1377
1378         dev->fe.ops.release = NULL;
1379         dev->fe.demodulator_priv = NULL;
1380         kfree(dev);
1381
1382         return 0;
1383 }
1384
1385 static const struct i2c_device_id af9033_id_table[] = {
1386         {"af9033", 0},
1387         {}
1388 };
1389 MODULE_DEVICE_TABLE(i2c, af9033_id_table);
1390
1391 static struct i2c_driver af9033_driver = {
1392         .driver = {
1393                 .name   = "af9033",
1394         },
1395         .probe          = af9033_probe,
1396         .remove         = af9033_remove,
1397         .id_table       = af9033_id_table,
1398 };
1399
1400 module_i2c_driver(af9033_driver);
1401
1402 MODULE_AUTHOR("Antti Palosaari <[email protected]>");
1403 MODULE_DESCRIPTION("Afatech AF9033 DVB-T demodulator driver");
1404 MODULE_LICENSE("GPL");