2 * platform_device probing code for ARM performance counters.
4 * Copyright (C) 2009 picoChip Designs, Ltd., Jamie Iles
7 #define pr_fmt(fmt) "hw perfevents: " fmt
10 #include <linux/cpumask.h>
11 #include <linux/device.h>
12 #include <linux/errno.h>
13 #include <linux/irq.h>
14 #include <linux/irqdesc.h>
15 #include <linux/kconfig.h>
17 #include <linux/of_device.h>
18 #include <linux/percpu.h>
19 #include <linux/perf/arm_pmu.h>
20 #include <linux/platform_device.h>
21 #include <linux/printk.h>
22 #include <linux/smp.h>
24 static int probe_current_pmu(struct arm_pmu *pmu,
25 const struct pmu_probe_info *info)
28 unsigned int cpuid = read_cpuid_id();
31 pr_info("probing PMU on CPU %d\n", cpu);
33 for (; info->init != NULL; info++) {
34 if ((cpuid & info->mask) != info->cpuid)
36 ret = info->init(pmu);
44 static int pmu_parse_percpu_irq(struct arm_pmu *pmu, int irq)
47 struct pmu_hw_events __percpu *hw_events = pmu->hw_events;
49 ret = irq_get_percpu_devid_partition(irq, &pmu->supported_cpus);
53 for_each_cpu(cpu, &pmu->supported_cpus)
54 per_cpu(hw_events->irq, cpu) = irq;
59 static bool pmu_has_irq_affinity(struct device_node *node)
61 return !!of_find_property(node, "interrupt-affinity", NULL);
64 static int pmu_parse_irq_affinity(struct device_node *node, int i)
66 struct device_node *dn;
70 * If we don't have an interrupt-affinity property, we guess irq
71 * affinity matches our logical CPU order, as we used to assume.
72 * This is fragile, so we'll warn in pmu_parse_irqs().
74 if (!pmu_has_irq_affinity(node))
77 dn = of_parse_phandle(node, "interrupt-affinity", i);
79 pr_warn("failed to parse interrupt-affinity[%d] for %s\n",
84 /* Now look up the logical CPU number */
85 for_each_possible_cpu(cpu) {
86 struct device_node *cpu_dn;
88 cpu_dn = of_cpu_device_node_get(cpu);
95 if (cpu >= nr_cpu_ids) {
96 pr_warn("failed to find logical CPU for %s\n", dn->name);
104 static int pmu_parse_irqs(struct arm_pmu *pmu)
107 struct platform_device *pdev = pmu->plat_device;
108 struct pmu_hw_events __percpu *hw_events = pmu->hw_events;
110 num_irqs = platform_irq_count(pdev);
112 pr_err("unable to count PMU IRQs\n");
117 * In this case we have no idea which CPUs are covered by the PMU.
118 * To match our prior behaviour, we assume all CPUs in this case.
121 pr_warn("no irqs for PMU, sampling events not supported\n");
122 pmu->pmu.capabilities |= PERF_PMU_CAP_NO_INTERRUPT;
123 cpumask_setall(&pmu->supported_cpus);
128 int irq = platform_get_irq(pdev, 0);
129 if (irq && irq_is_percpu(irq))
130 return pmu_parse_percpu_irq(pmu, irq);
133 if (!pmu_has_irq_affinity(pdev->dev.of_node)) {
134 pr_warn("no interrupt-affinity property for %s, guessing.\n",
135 of_node_full_name(pdev->dev.of_node));
139 * Some platforms have all PMU IRQs OR'd into a single IRQ, with a
140 * special platdata function that attempts to demux them.
142 if (dev_get_platdata(&pdev->dev))
143 cpumask_setall(&pmu->supported_cpus);
145 for (i = 0; i < num_irqs; i++) {
148 irq = platform_get_irq(pdev, i);
149 if (WARN_ON(irq <= 0))
152 if (irq_is_percpu(irq)) {
153 pr_warn("multiple PPIs or mismatched SPI/PPI detected\n");
157 cpu = pmu_parse_irq_affinity(pdev->dev.of_node, i);
160 if (cpu >= nr_cpu_ids)
163 if (per_cpu(hw_events->irq, cpu)) {
164 pr_warn("multiple PMU IRQs for the same CPU detected\n");
168 per_cpu(hw_events->irq, cpu) = irq;
169 cpumask_set_cpu(cpu, &pmu->supported_cpus);
175 int arm_pmu_device_probe(struct platform_device *pdev,
176 const struct of_device_id *of_table,
177 const struct pmu_probe_info *probe_table)
179 const struct of_device_id *of_id;
180 armpmu_init_fn init_fn;
181 struct device_node *node = pdev->dev.of_node;
185 pmu = armpmu_alloc();
189 pmu->plat_device = pdev;
191 ret = pmu_parse_irqs(pmu);
195 if (node && (of_id = of_match_node(of_table, pdev->dev.of_node))) {
196 init_fn = of_id->data;
198 pmu->secure_access = of_property_read_bool(pdev->dev.of_node,
199 "secure-reg-access");
201 /* arm64 systems boot only as non-secure */
202 if (IS_ENABLED(CONFIG_ARM64) && pmu->secure_access) {
203 pr_warn("ignoring \"secure-reg-access\" property for arm64\n");
204 pmu->secure_access = false;
208 } else if (probe_table) {
209 cpumask_setall(&pmu->supported_cpus);
210 ret = probe_current_pmu(pmu, probe_table);
214 pr_info("%s: failed to probe PMU!\n", of_node_full_name(node));
218 ret = armpmu_request_irqs(pmu);
222 ret = armpmu_register(pmu);
229 armpmu_free_irqs(pmu);
231 pr_info("%s: failed to register PMU devices!\n",
232 of_node_full_name(node));