drivers/gpu/drm/i915/i915_gem.c

   1 /*
   2  * Copyright © 2008-2015 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  *
  23  * Authors:
  24  *    Eric Anholt <[email protected]>
  25  *
  26  */
  27
  28 #include <linux/dma-fence-array.h>
  29 #include <linux/kthread.h>
  30 #include <linux/dma-resv.h>
  31 #include <linux/shmem_fs.h>
  32 #include <linux/slab.h>
  33 #include <linux/stop_machine.h>
  34 #include <linux/swap.h>
  35 #include <linux/pci.h>
  36 #include <linux/dma-buf.h>
  37 #include <linux/mman.h>
  38
  39 #include <drm/drm_cache.h>
  40 #include <drm/drm_vma_manager.h>
  41
  42 #include "display/intel_display.h"
  43 #include "display/intel_frontbuffer.h"
  44
  45 #include "gem/i915_gem_clflush.h"
  46 #include "gem/i915_gem_context.h"
  47 #include "gem/i915_gem_ioctls.h"
  48 #include "gem/i915_gem_mman.h"
  49 #include "gem/i915_gem_pm.h"
  50 #include "gem/i915_gem_region.h"
  51 #include "gem/i915_gem_userptr.h"
  52 #include "gt/intel_engine_user.h"
  53 #include "gt/intel_gt.h"
  54 #include "gt/intel_gt_pm.h"
  55 #include "gt/intel_workarounds.h"
  56
  57 #include "i915_drv.h"
  58 #include "i915_file_private.h"
  59 #include "i915_trace.h"
  60 #include "i915_vgpu.h"
  61 #include "intel_clock_gating.h"
  62
  63 static int
  64 insert_mappable_node(struct i915_ggtt *ggtt, struct drm_mm_node *node, u32 size)
  65 {
  66         int err;
  67
  68         err = mutex_lock_interruptible(&ggtt->vm.mutex);
  69         if (err)
  70                 return err;
  71
  72         memset(node, 0, sizeof(*node));
  73         err = drm_mm_insert_node_in_range(&ggtt->vm.mm, node,
  74                                           size, 0, I915_COLOR_UNEVICTABLE,
  75                                           0, ggtt->mappable_end,
  76                                           DRM_MM_INSERT_LOW);
  77
  78         mutex_unlock(&ggtt->vm.mutex);
  79
  80         return err;
  81 }
  82
  83 static void
  84 remove_mappable_node(struct i915_ggtt *ggtt, struct drm_mm_node *node)
  85 {
  86         mutex_lock(&ggtt->vm.mutex);
  87         drm_mm_remove_node(node);
  88         mutex_unlock(&ggtt->vm.mutex);
  89 }
  90
  91 int
  92 i915_gem_get_aperture_ioctl(struct drm_device *dev, void *data,
  93                             struct drm_file *file)
  94 {
  95         struct drm_i915_private *i915 = to_i915(dev);
  96         struct i915_ggtt *ggtt = to_gt(i915)->ggtt;
  97         struct drm_i915_gem_get_aperture *args = data;
  98         struct i915_vma *vma;
  99         u64 pinned;
 100
 101         if (mutex_lock_interruptible(&ggtt->vm.mutex))
 102                 return -EINTR;
 103
 104         pinned = ggtt->vm.reserved;
 105         list_for_each_entry(vma, &ggtt->vm.bound_list, vm_link)
 106                 if (i915_vma_is_pinned(vma))
 107                         pinned += vma->node.size;
 108
 109         mutex_unlock(&ggtt->vm.mutex);
 110
 111         args->aper_size = ggtt->vm.total;
 112         args->aper_available_size = args->aper_size - pinned;
 113
 114         return 0;
 115 }
 116
 117 int i915_gem_object_unbind(struct drm_i915_gem_object *obj,
 118                            unsigned long flags)
 119 {
 120         struct intel_runtime_pm *rpm = &to_i915(obj->base.dev)->runtime_pm;
 121         bool vm_trylock = !!(flags & I915_GEM_OBJECT_UNBIND_VM_TRYLOCK);
 122         LIST_HEAD(still_in_list);
 123         intel_wakeref_t wakeref;
 124         struct i915_vma *vma;
 125         int ret;
 126
 127         assert_object_held(obj);
 128
 129         if (list_empty(&obj->vma.list))
 130                 return 0;
 131
 132         /*
 133          * As some machines use ACPI to handle runtime-resume callbacks, and
 134          * ACPI is quite kmalloc happy, we cannot resume beneath the vm->mutex
 135          * as they are required by the shrinker. Ergo, we wake the device up
 136          * first just in case.
 137          */
 138         wakeref = intel_runtime_pm_get(rpm);
 139
 140 try_again:
 141         ret = 0;
 142         spin_lock(&obj->vma.lock);
 143         while (!ret && (vma = list_first_entry_or_null(&obj->vma.list,
 144                                                        struct i915_vma,
 145                                                        obj_link))) {
 146                 list_move_tail(&vma->obj_link, &still_in_list);
 147                 if (!i915_vma_is_bound(vma, I915_VMA_BIND_MASK))
 148                         continue;
 149
 150                 if (flags & I915_GEM_OBJECT_UNBIND_TEST) {
 151                         ret = -EBUSY;
 152                         break;
 153                 }
 154
 155                 /*
 156                  * Requiring the vm destructor to take the object lock
 157                  * before destroying a vma would help us eliminate the
 158                  * i915_vm_tryget() here, AND thus also the barrier stuff
 159                  * at the end. That's an easy fix, but sleeping locks in
 160                  * a kthread should generally be avoided.
 161                  */
 162                 ret = -EAGAIN;
 163                 if (!i915_vm_tryget(vma->vm))
 164                         break;
 165
 166                 spin_unlock(&obj->vma.lock);
 167
 168                 /*
 169                  * Since i915_vma_parked() takes the object lock
 170                  * before vma destruction, it won't race us here,
 171                  * and destroy the vma from under us.
 172                  */
 173
 174                 ret = -EBUSY;
 175                 if (flags & I915_GEM_OBJECT_UNBIND_ASYNC) {
 176                         assert_object_held(vma->obj);
 177                         ret = i915_vma_unbind_async(vma, vm_trylock);
 178                 }
 179
 180                 if (ret == -EBUSY && (flags & I915_GEM_OBJECT_UNBIND_ACTIVE ||
 181                                       !i915_vma_is_active(vma))) {
 182                         if (vm_trylock) {
 183                                 if (mutex_trylock(&vma->vm->mutex)) {
 184                                         ret = __i915_vma_unbind(vma);
 185                                         mutex_unlock(&vma->vm->mutex);
 186                                 }
 187                         } else {
 188                                 ret = i915_vma_unbind(vma);
 189                         }
 190                 }
 191
 192                 i915_vm_put(vma->vm);
 193                 spin_lock(&obj->vma.lock);
 194         }
 195         list_splice_init(&still_in_list, &obj->vma.list);
 196         spin_unlock(&obj->vma.lock);
 197
 198         if (ret == -EAGAIN && flags & I915_GEM_OBJECT_UNBIND_BARRIER) {
 199                 rcu_barrier(); /* flush the i915_vm_release() */
 200                 goto try_again;
 201         }
 202
 203         intel_runtime_pm_put(rpm, wakeref);
 204
 205         return ret;
 206 }
 207
 208 static int
 209 shmem_pread(struct page *page, int offset, int len, char __user *user_data,
 210             bool needs_clflush)
 211 {
 212         char *vaddr;
 213         int ret;
 214
 215         vaddr = kmap(page);
 216
 217         if (needs_clflush)
 218                 drm_clflush_virt_range(vaddr + offset, len);
 219
 220         ret = __copy_to_user(user_data, vaddr + offset, len);
 221
 222         kunmap(page);
 223
 224         return ret ? -EFAULT : 0;
 225 }
 226
 227 static int
 228 i915_gem_shmem_pread(struct drm_i915_gem_object *obj,
 229                      struct drm_i915_gem_pread *args)
 230 {
 231         unsigned int needs_clflush;
 232         char __user *user_data;
 233         unsigned long offset;
 234         pgoff_t idx;
 235         u64 remain;
 236         int ret;
 237
 238         ret = i915_gem_object_lock_interruptible(obj, NULL);
 239         if (ret)
 240                 return ret;
 241
 242         ret = i915_gem_object_pin_pages(obj);
 243         if (ret)
 244                 goto err_unlock;
 245
 246         ret = i915_gem_object_prepare_read(obj, &needs_clflush);
 247         if (ret)
 248                 goto err_unpin;
 249
 250         i915_gem_object_finish_access(obj);
 251         i915_gem_object_unlock(obj);
 252
 253         remain = args->size;
 254         user_data = u64_to_user_ptr(args->data_ptr);
 255         offset = offset_in_page(args->offset);
 256         for (idx = args->offset >> PAGE_SHIFT; remain; idx++) {
 257                 struct page *page = i915_gem_object_get_page(obj, idx);
 258                 unsigned int length = min_t(u64, remain, PAGE_SIZE - offset);
 259
 260                 ret = shmem_pread(page, offset, length, user_data,
 261                                   needs_clflush);
 262                 if (ret)
 263                         break;
 264
 265                 remain -= length;
 266                 user_data += length;
 267                 offset = 0;
 268         }
 269
 270         i915_gem_object_unpin_pages(obj);
 271         return ret;
 272
 273 err_unpin:
 274         i915_gem_object_unpin_pages(obj);
 275 err_unlock:
 276         i915_gem_object_unlock(obj);
 277         return ret;
 278 }
 279
 280 static inline bool
 281 gtt_user_read(struct io_mapping *mapping,
 282               loff_t base, int offset,
 283               char __user *user_data, int length)
 284 {
 285         void __iomem *vaddr;
 286         unsigned long unwritten;
 287
 288         /* We can use the cpu mem copy function because this is X86. */
 289         vaddr = io_mapping_map_atomic_wc(mapping, base);
 290         unwritten = __copy_to_user_inatomic(user_data,
 291                                             (void __force *)vaddr + offset,
 292                                             length);
 293         io_mapping_unmap_atomic(vaddr);
 294         if (unwritten) {
 295                 vaddr = io_mapping_map_wc(mapping, base, PAGE_SIZE);
 296                 unwritten = copy_to_user(user_data,
 297                                          (void __force *)vaddr + offset,
 298                                          length);
 299                 io_mapping_unmap(vaddr);
 300         }
 301         return unwritten;
 302 }
 303
 304 static struct i915_vma *i915_gem_gtt_prepare(struct drm_i915_gem_object *obj,
 305                                              struct drm_mm_node *node,
 306                                              bool write)
 307 {
 308         struct drm_i915_private *i915 = to_i915(obj->base.dev);
 309         struct i915_ggtt *ggtt = to_gt(i915)->ggtt;
 310         struct i915_vma *vma;
 311         struct i915_gem_ww_ctx ww;
 312         int ret;
 313
 314         i915_gem_ww_ctx_init(&ww, true);
 315 retry:
 316         vma = ERR_PTR(-ENODEV);
 317         ret = i915_gem_object_lock(obj, &ww);
 318         if (ret)
 319                 goto err_ww;
 320
 321         ret = i915_gem_object_set_to_gtt_domain(obj, write);
 322         if (ret)
 323                 goto err_ww;
 324
 325         if (!i915_gem_object_is_tiled(obj))
 326                 vma = i915_gem_object_ggtt_pin_ww(obj, &ww, NULL, 0, 0,
 327                                                   PIN_MAPPABLE |
 328                                                   PIN_NONBLOCK /* NOWARN */ |
 329                                                   PIN_NOEVICT);
 330         if (vma == ERR_PTR(-EDEADLK)) {
 331                 ret = -EDEADLK;
 332                 goto err_ww;
 333         } else if (!IS_ERR(vma)) {
 334                 node->start = i915_ggtt_offset(vma);
 335                 node->flags = 0;
 336         } else {
 337                 ret = insert_mappable_node(ggtt, node, PAGE_SIZE);
 338                 if (ret)
 339                         goto err_ww;
 340                 GEM_BUG_ON(!drm_mm_node_allocated(node));
 341                 vma = NULL;
 342         }
 343
 344         ret = i915_gem_object_pin_pages(obj);
 345         if (ret) {
 346                 if (drm_mm_node_allocated(node)) {
 347                         ggtt->vm.clear_range(&ggtt->vm, node->start, node->size);
 348                         remove_mappable_node(ggtt, node);
 349                 } else {
 350                         i915_vma_unpin(vma);
 351                 }
 352         }
 353
 354 err_ww:
 355         if (ret == -EDEADLK) {
 356                 ret = i915_gem_ww_ctx_backoff(&ww);
 357                 if (!ret)
 358                         goto retry;
 359         }
 360         i915_gem_ww_ctx_fini(&ww);
 361
 362         return ret ? ERR_PTR(ret) : vma;
 363 }
 364
 365 static void i915_gem_gtt_cleanup(struct drm_i915_gem_object *obj,
 366                                  struct drm_mm_node *node,
 367                                  struct i915_vma *vma)
 368 {
 369         struct drm_i915_private *i915 = to_i915(obj->base.dev);
 370         struct i915_ggtt *ggtt = to_gt(i915)->ggtt;
 371
 372         i915_gem_object_unpin_pages(obj);
 373         if (drm_mm_node_allocated(node)) {
 374                 ggtt->vm.clear_range(&ggtt->vm, node->start, node->size);
 375                 remove_mappable_node(ggtt, node);
 376         } else {
 377                 i915_vma_unpin(vma);
 378         }
 379 }
 380
 381 static int
 382 i915_gem_gtt_pread(struct drm_i915_gem_object *obj,
 383                    const struct drm_i915_gem_pread *args)
 384 {
 385         struct drm_i915_private *i915 = to_i915(obj->base.dev);
 386         struct i915_ggtt *ggtt = to_gt(i915)->ggtt;
 387         unsigned long remain, offset;
 388         intel_wakeref_t wakeref;
 389         struct drm_mm_node node;
 390         void __user *user_data;
 391         struct i915_vma *vma;
 392         int ret = 0;
 393
 394         if (overflows_type(args->size, remain) ||
 395             overflows_type(args->offset, offset))
 396                 return -EINVAL;
 397
 398         wakeref = intel_runtime_pm_get(&i915->runtime_pm);
 399
 400         vma = i915_gem_gtt_prepare(obj, &node, false);
 401         if (IS_ERR(vma)) {
 402                 ret = PTR_ERR(vma);
 403                 goto out_rpm;
 404         }
 405
 406         user_data = u64_to_user_ptr(args->data_ptr);
 407         remain = args->size;
 408         offset = args->offset;
 409
 410         while (remain > 0) {
 411                 /* Operation in this page
 412                  *
 413                  * page_base = page offset within aperture
 414                  * page_offset = offset within page
 415                  * page_length = bytes to copy for this page
 416                  */
 417                 u32 page_base = node.start;
 418                 unsigned page_offset = offset_in_page(offset);
 419                 unsigned page_length = PAGE_SIZE - page_offset;
 420                 page_length = remain < page_length ? remain : page_length;
 421                 if (drm_mm_node_allocated(&node)) {
 422                         ggtt->vm.insert_page(&ggtt->vm,
 423                                              i915_gem_object_get_dma_address(obj, offset >> PAGE_SHIFT),
 424                                              node.start, I915_CACHE_NONE, 0);
 425                 } else {
 426                         page_base += offset & PAGE_MASK;
 427                 }
 428
 429                 if (gtt_user_read(&ggtt->iomap, page_base, page_offset,
 430                                   user_data, page_length)) {
 431                         ret = -EFAULT;
 432                         break;
 433                 }
 434
 435                 remain -= page_length;
 436                 user_data += page_length;
 437                 offset += page_length;
 438         }
 439
 440         i915_gem_gtt_cleanup(obj, &node, vma);
 441 out_rpm:
 442         intel_runtime_pm_put(&i915->runtime_pm, wakeref);
 443         return ret;
 444 }
 445
 446 /**
 447  * i915_gem_pread_ioctl - Reads data from the object referenced by handle.
 448  * @dev: drm device pointer
 449  * @data: ioctl data blob
 450  * @file: drm file pointer
 451  *
 452  * On error, the contents of *data are undefined.
 453  */
 454 int
 455 i915_gem_pread_ioctl(struct drm_device *dev, void *data,
 456                      struct drm_file *file)
 457 {
 458         struct drm_i915_private *i915 = to_i915(dev);
 459         struct drm_i915_gem_pread *args = data;
 460         struct drm_i915_gem_object *obj;
 461         int ret;
 462
 463         /* PREAD is disallowed for all platforms after TGL-LP.  This also
 464          * covers all platforms with local memory.
 465          */
 466         if (GRAPHICS_VER(i915) >= 12 && !IS_TIGERLAKE(i915))
 467                 return -EOPNOTSUPP;
 468
 469         if (args->size == 0)
 470                 return 0;
 471
 472         if (!access_ok(u64_to_user_ptr(args->data_ptr),
 473                        args->size))
 474                 return -EFAULT;
 475
 476         obj = i915_gem_object_lookup(file, args->handle);
 477         if (!obj)
 478                 return -ENOENT;
 479
 480         /* Bounds check source.  */
 481         if (range_overflows_t(u64, args->offset, args->size, obj->base.size)) {
 482                 ret = -EINVAL;
 483                 goto out;
 484         }
 485
 486         trace_i915_gem_object_pread(obj, args->offset, args->size);
 487         ret = -ENODEV;
 488         if (obj->ops->pread)
 489                 ret = obj->ops->pread(obj, args);
 490         if (ret != -ENODEV)
 491                 goto out;
 492
 493         ret = i915_gem_object_wait(obj,
 494                                    I915_WAIT_INTERRUPTIBLE,
 495                                    MAX_SCHEDULE_TIMEOUT);
 496         if (ret)
 497                 goto out;
 498
 499         ret = i915_gem_shmem_pread(obj, args);
 500         if (ret == -EFAULT || ret == -ENODEV)
 501                 ret = i915_gem_gtt_pread(obj, args);
 502
 503 out:
 504         i915_gem_object_put(obj);
 505         return ret;
 506 }
 507
 508 /* This is the fast write path which cannot handle
 509  * page faults in the source data
 510  */
 511
 512 static inline bool
 513 ggtt_write(struct io_mapping *mapping,
 514            loff_t base, int offset,
 515            char __user *user_data, int length)
 516 {
 517         void __iomem *vaddr;
 518         unsigned long unwritten;
 519
 520         /* We can use the cpu mem copy function because this is X86. */
 521         vaddr = io_mapping_map_atomic_wc(mapping, base);
 522         unwritten = __copy_from_user_inatomic_nocache((void __force *)vaddr + offset,
 523                                                       user_data, length);
 524         io_mapping_unmap_atomic(vaddr);
 525         if (unwritten) {
 526                 vaddr = io_mapping_map_wc(mapping, base, PAGE_SIZE);
 527                 unwritten = copy_from_user((void __force *)vaddr + offset,
 528                                            user_data, length);
 529                 io_mapping_unmap(vaddr);
 530         }
 531
 532         return unwritten;
 533 }
 534
 535 /**
 536  * i915_gem_gtt_pwrite_fast - This is the fast pwrite path, where we copy the data directly from the
 537  * user into the GTT, uncached.
 538  * @obj: i915 GEM object
 539  * @args: pwrite arguments structure
 540  */
 541 static int
 542 i915_gem_gtt_pwrite_fast(struct drm_i915_gem_object *obj,
 543                          const struct drm_i915_gem_pwrite *args)
 544 {
 545         struct drm_i915_private *i915 = to_i915(obj->base.dev);
 546         struct i915_ggtt *ggtt = to_gt(i915)->ggtt;
 547         struct intel_runtime_pm *rpm = &i915->runtime_pm;
 548         unsigned long remain, offset;
 549         intel_wakeref_t wakeref;
 550         struct drm_mm_node node;
 551         struct i915_vma *vma;
 552         void __user *user_data;
 553         int ret = 0;
 554
 555         if (overflows_type(args->size, remain) ||
 556             overflows_type(args->offset, offset))
 557                 return -EINVAL;
 558
 559         if (i915_gem_object_has_struct_page(obj)) {
 560                 /*
 561                  * Avoid waking the device up if we can fallback, as
 562                  * waking/resuming is very slow (worst-case 10-100 ms
 563                  * depending on PCI sleeps and our own resume time).
 564                  * This easily dwarfs any performance advantage from
 565                  * using the cache bypass of indirect GGTT access.
 566                  */
 567                 wakeref = intel_runtime_pm_get_if_in_use(rpm);
 568                 if (!wakeref)
 569                         return -EFAULT;
 570         } else {
 571                 /* No backing pages, no fallback, we must force GGTT access */
 572                 wakeref = intel_runtime_pm_get(rpm);
 573         }
 574
 575         vma = i915_gem_gtt_prepare(obj, &node, true);
 576         if (IS_ERR(vma)) {
 577                 ret = PTR_ERR(vma);
 578                 goto out_rpm;
 579         }
 580
 581         i915_gem_object_invalidate_frontbuffer(obj, ORIGIN_CPU);
 582
 583         user_data = u64_to_user_ptr(args->data_ptr);
 584         offset = args->offset;
 585         remain = args->size;
 586         while (remain) {
 587                 /* Operation in this page
 588                  *
 589                  * page_base = page offset within aperture
 590                  * page_offset = offset within page
 591                  * page_length = bytes to copy for this page
 592                  */
 593                 u32 page_base = node.start;
 594                 unsigned int page_offset = offset_in_page(offset);
 595                 unsigned int page_length = PAGE_SIZE - page_offset;
 596                 page_length = remain < page_length ? remain : page_length;
 597                 if (drm_mm_node_allocated(&node)) {
 598                         /* flush the write before we modify the GGTT */
 599                         intel_gt_flush_ggtt_writes(ggtt->vm.gt);
 600                         ggtt->vm.insert_page(&ggtt->vm,
 601                                              i915_gem_object_get_dma_address(obj, offset >> PAGE_SHIFT),
 602                                              node.start, I915_CACHE_NONE, 0);
 603                         wmb(); /* flush modifications to the GGTT (insert_page) */
 604                 } else {
 605                         page_base += offset & PAGE_MASK;
 606                 }
 607                 /* If we get a fault while copying data, then (presumably) our
 608                  * source page isn't available.  Return the error and we'll
 609                  * retry in the slow path.
 610                  * If the object is non-shmem backed, we retry again with the
 611                  * path that handles page fault.
 612                  */
 613                 if (ggtt_write(&ggtt->iomap, page_base, page_offset,
 614                                user_data, page_length)) {
 615                         ret = -EFAULT;
 616                         break;
 617                 }
 618
 619                 remain -= page_length;
 620                 user_data += page_length;
 621                 offset += page_length;
 622         }
 623
 624         intel_gt_flush_ggtt_writes(ggtt->vm.gt);
 625         i915_gem_object_flush_frontbuffer(obj, ORIGIN_CPU);
 626
 627         i915_gem_gtt_cleanup(obj, &node, vma);
 628 out_rpm:
 629         intel_runtime_pm_put(rpm, wakeref);
 630         return ret;
 631 }
 632
 633 /* Per-page copy function for the shmem pwrite fastpath.
 634  * Flushes invalid cachelines before writing to the target if
 635  * needs_clflush_before is set and flushes out any written cachelines after
 636  * writing if needs_clflush is set.
 637  */
 638 static int
 639 shmem_pwrite(struct page *page, int offset, int len, char __user *user_data,
 640              bool needs_clflush_before,
 641              bool needs_clflush_after)
 642 {
 643         char *vaddr;
 644         int ret;
 645
 646         vaddr = kmap(page);
 647
 648         if (needs_clflush_before)
 649                 drm_clflush_virt_range(vaddr + offset, len);
 650
 651         ret = __copy_from_user(vaddr + offset, user_data, len);
 652         if (!ret && needs_clflush_after)
 653                 drm_clflush_virt_range(vaddr + offset, len);
 654
 655         kunmap(page);
 656
 657         return ret ? -EFAULT : 0;
 658 }
 659
 660 static int
 661 i915_gem_shmem_pwrite(struct drm_i915_gem_object *obj,
 662                       const struct drm_i915_gem_pwrite *args)
 663 {
 664         unsigned int partial_cacheline_write;
 665         unsigned int needs_clflush;
 666         void __user *user_data;
 667         unsigned long offset;
 668         pgoff_t idx;
 669         u64 remain;
 670         int ret;
 671
 672         ret = i915_gem_object_lock_interruptible(obj, NULL);
 673         if (ret)
 674                 return ret;
 675
 676         ret = i915_gem_object_pin_pages(obj);
 677         if (ret)
 678                 goto err_unlock;
 679
 680         ret = i915_gem_object_prepare_write(obj, &needs_clflush);
 681         if (ret)
 682                 goto err_unpin;
 683
 684         i915_gem_object_finish_access(obj);
 685         i915_gem_object_unlock(obj);
 686
 687         /* If we don't overwrite a cacheline completely we need to be
 688          * careful to have up-to-date data by first clflushing. Don't
 689          * overcomplicate things and flush the entire patch.
 690          */
 691         partial_cacheline_write = 0;
 692         if (needs_clflush & CLFLUSH_BEFORE)
 693                 partial_cacheline_write = boot_cpu_data.x86_clflush_size - 1;
 694
 695         user_data = u64_to_user_ptr(args->data_ptr);
 696         remain = args->size;
 697         offset = offset_in_page(args->offset);
 698         for (idx = args->offset >> PAGE_SHIFT; remain; idx++) {
 699                 struct page *page = i915_gem_object_get_page(obj, idx);
 700                 unsigned int length = min_t(u64, remain, PAGE_SIZE - offset);
 701
 702                 ret = shmem_pwrite(page, offset, length, user_data,
 703                                    (offset | length) & partial_cacheline_write,
 704                                    needs_clflush & CLFLUSH_AFTER);
 705                 if (ret)
 706                         break;
 707
 708                 remain -= length;
 709                 user_data += length;
 710                 offset = 0;
 711         }
 712
 713         i915_gem_object_flush_frontbuffer(obj, ORIGIN_CPU);
 714
 715         i915_gem_object_unpin_pages(obj);
 716         return ret;
 717
 718 err_unpin:
 719         i915_gem_object_unpin_pages(obj);
 720 err_unlock:
 721         i915_gem_object_unlock(obj);
 722         return ret;
 723 }
 724
 725 /**
 726  * i915_gem_pwrite_ioctl - Writes data to the object referenced by handle.
 727  * @dev: drm device
 728  * @data: ioctl data blob
 729  * @file: drm file
 730  *
 731  * On error, the contents of the buffer that were to be modified are undefined.
 732  */
 733 int
 734 i915_gem_pwrite_ioctl(struct drm_device *dev, void *data,
 735                       struct drm_file *file)
 736 {
 737         struct drm_i915_private *i915 = to_i915(dev);
 738         struct drm_i915_gem_pwrite *args = data;
 739         struct drm_i915_gem_object *obj;
 740         int ret;
 741
 742         /* PWRITE is disallowed for all platforms after TGL-LP.  This also
 743          * covers all platforms with local memory.
 744          */
 745         if (GRAPHICS_VER(i915) >= 12 && !IS_TIGERLAKE(i915))
 746                 return -EOPNOTSUPP;
 747
 748         if (args->size == 0)
 749                 return 0;
 750
 751         if (!access_ok(u64_to_user_ptr(args->data_ptr), args->size))
 752                 return -EFAULT;
 753
 754         obj = i915_gem_object_lookup(file, args->handle);
 755         if (!obj)
 756                 return -ENOENT;
 757
 758         /* Bounds check destination. */
 759         if (range_overflows_t(u64, args->offset, args->size, obj->base.size)) {
 760                 ret = -EINVAL;
 761                 goto err;
 762         }
 763
 764         /* Writes not allowed into this read-only object */
 765         if (i915_gem_object_is_readonly(obj)) {
 766                 ret = -EINVAL;
 767                 goto err;
 768         }
 769
 770         trace_i915_gem_object_pwrite(obj, args->offset, args->size);
 771
 772         ret = -ENODEV;
 773         if (obj->ops->pwrite)
 774                 ret = obj->ops->pwrite(obj, args);
 775         if (ret != -ENODEV)
 776                 goto err;
 777
 778         ret = i915_gem_object_wait(obj,
 779                                    I915_WAIT_INTERRUPTIBLE |
 780                                    I915_WAIT_ALL,
 781                                    MAX_SCHEDULE_TIMEOUT);
 782         if (ret)
 783                 goto err;
 784
 785         ret = -EFAULT;
 786         /* We can only do the GTT pwrite on untiled buffers, as otherwise
 787          * it would end up going through the fenced access, and we'll get
 788          * different detiling behavior between reading and writing.
 789          * pread/pwrite currently are reading and writing from the CPU
 790          * perspective, requiring manual detiling by the client.
 791          */
 792         if (!i915_gem_object_has_struct_page(obj) ||
 793             i915_gem_cpu_write_needs_clflush(obj))
 794                 /* Note that the gtt paths might fail with non-page-backed user
 795                  * pointers (e.g. gtt mappings when moving data between
 796                  * textures). Fallback to the shmem path in that case.
 797                  */
 798                 ret = i915_gem_gtt_pwrite_fast(obj, args);
 799
 800         if (ret == -EFAULT || ret == -ENOSPC) {
 801                 if (i915_gem_object_has_struct_page(obj))
 802                         ret = i915_gem_shmem_pwrite(obj, args);
 803         }
 804
 805 err:
 806         i915_gem_object_put(obj);
 807         return ret;
 808 }
 809
 810 /**
 811  * i915_gem_sw_finish_ioctl - Called when user space has done writes to this buffer
 812  * @dev: drm device
 813  * @data: ioctl data blob
 814  * @file: drm file
 815  */
 816 int
 817 i915_gem_sw_finish_ioctl(struct drm_device *dev, void *data,
 818                          struct drm_file *file)
 819 {
 820         struct drm_i915_gem_sw_finish *args = data;
 821         struct drm_i915_gem_object *obj;
 822
 823         obj = i915_gem_object_lookup(file, args->handle);
 824         if (!obj)
 825                 return -ENOENT;
 826
 827         /*
 828          * Proxy objects are barred from CPU access, so there is no
 829          * need to ban sw_finish as it is a nop.
 830          */
 831
 832         /* Pinned buffers may be scanout, so flush the cache */
 833         i915_gem_object_flush_if_display(obj);
 834         i915_gem_object_put(obj);
 835
 836         return 0;
 837 }
 838
 839 void i915_gem_runtime_suspend(struct drm_i915_private *i915)
 840 {
 841         struct drm_i915_gem_object *obj, *on;
 842         int i;
 843
 844         /*
 845          * Only called during RPM suspend. All users of the userfault_list
 846          * must be holding an RPM wakeref to ensure that this can not
 847          * run concurrently with themselves (and use the struct_mutex for
 848          * protection between themselves).
 849          */
 850
 851         list_for_each_entry_safe(obj, on,
 852                                  &to_gt(i915)->ggtt->userfault_list, userfault_link)
 853                 __i915_gem_object_release_mmap_gtt(obj);
 854
 855         list_for_each_entry_safe(obj, on,
 856                                  &i915->runtime_pm.lmem_userfault_list, userfault_link)
 857                 i915_gem_object_runtime_pm_release_mmap_offset(obj);
 858
 859         /*
 860          * The fence will be lost when the device powers down. If any were
 861          * in use by hardware (i.e. they are pinned), we should not be powering
 862          * down! All other fences will be reacquired by the user upon waking.
 863          */
 864         for (i = 0; i < to_gt(i915)->ggtt->num_fences; i++) {
 865                 struct i915_fence_reg *reg = &to_gt(i915)->ggtt->fence_regs[i];
 866
 867                 /*
 868                  * Ideally we want to assert that the fence register is not
 869                  * live at this point (i.e. that no piece of code will be
 870                  * trying to write through fence + GTT, as that both violates
 871                  * our tracking of activity and associated locking/barriers,
 872                  * but also is illegal given that the hw is powered down).
 873                  *
 874                  * Previously we used reg->pin_count as a "liveness" indicator.
 875                  * That is not sufficient, and we need a more fine-grained
 876                  * tool if we want to have a sanity check here.
 877                  */
 878
 879                 if (!reg->vma)
 880                         continue;
 881
 882                 GEM_BUG_ON(i915_vma_has_userfault(reg->vma));
 883                 reg->dirty = true;
 884         }
 885 }
 886
 887 static void discard_ggtt_vma(struct i915_vma *vma)
 888 {
 889         struct drm_i915_gem_object *obj = vma->obj;
 890
 891         spin_lock(&obj->vma.lock);
 892         if (!RB_EMPTY_NODE(&vma->obj_node)) {
 893                 rb_erase(&vma->obj_node, &obj->vma.tree);
 894                 RB_CLEAR_NODE(&vma->obj_node);
 895         }
 896         spin_unlock(&obj->vma.lock);
 897 }
 898
 899 struct i915_vma *
 900 i915_gem_object_ggtt_pin_ww(struct drm_i915_gem_object *obj,
 901                             struct i915_gem_ww_ctx *ww,
 902                             const struct i915_gtt_view *view,
 903                             u64 size, u64 alignment, u64 flags)
 904 {
 905         struct drm_i915_private *i915 = to_i915(obj->base.dev);
 906         struct i915_ggtt *ggtt = to_gt(i915)->ggtt;
 907         struct i915_vma *vma;
 908         int ret;
 909
 910         GEM_WARN_ON(!ww);
 911
 912         if (flags & PIN_MAPPABLE &&
 913             (!view || view->type == I915_GTT_VIEW_NORMAL)) {
 914                 /*
 915                  * If the required space is larger than the available
 916                  * aperture, we will not able to find a slot for the
 917                  * object and unbinding the object now will be in
 918                  * vain. Worse, doing so may cause us to ping-pong
 919                  * the object in and out of the Global GTT and
 920                  * waste a lot of cycles under the mutex.
 921                  */
 922                 if (obj->base.size > ggtt->mappable_end)
 923                         return ERR_PTR(-E2BIG);
 924
 925                 /*
 926                  * If NONBLOCK is set the caller is optimistically
 927                  * trying to cache the full object within the mappable
 928                  * aperture, and *must* have a fallback in place for
 929                  * situations where we cannot bind the object. We
 930                  * can be a little more lax here and use the fallback
 931                  * more often to avoid costly migrations of ourselves
 932                  * and other objects within the aperture.
 933                  *
 934                  * Half-the-aperture is used as a simple heuristic.
 935                  * More interesting would to do search for a free
 936                  * block prior to making the commitment to unbind.
 937                  * That caters for the self-harm case, and with a
 938                  * little more heuristics (e.g. NOFAULT, NOEVICT)
 939                  * we could try to minimise harm to others.
 940                  */
 941                 if (flags & PIN_NONBLOCK &&
 942                     obj->base.size > ggtt->mappable_end / 2)
 943                         return ERR_PTR(-ENOSPC);
 944         }
 945
 946 new_vma:
 947         vma = i915_vma_instance(obj, &ggtt->vm, view);
 948         if (IS_ERR(vma))
 949                 return vma;
 950
 951         if (i915_vma_misplaced(vma, size, alignment, flags)) {
 952                 if (flags & PIN_NONBLOCK) {
 953                         if (i915_vma_is_pinned(vma) || i915_vma_is_active(vma))
 954                                 return ERR_PTR(-ENOSPC);
 955
 956                         /*
 957                          * If this misplaced vma is too big (i.e, at-least
 958                          * half the size of aperture) or hasn't been pinned
 959                          * mappable before, we ignore the misplacement when
 960                          * PIN_NONBLOCK is set in order to avoid the ping-pong
 961                          * issue described above. In other words, we try to
 962                          * avoid the costly operation of unbinding this vma
 963                          * from the GGTT and rebinding it back because there
 964                          * may not be enough space for this vma in the aperture.
 965                          */
 966                         if (flags & PIN_MAPPABLE &&
 967                             (vma->fence_size > ggtt->mappable_end / 2 ||
 968                             !i915_vma_is_map_and_fenceable(vma)))
 969                                 return ERR_PTR(-ENOSPC);
 970                 }
 971
 972                 if (i915_vma_is_pinned(vma) || i915_vma_is_active(vma)) {
 973                         discard_ggtt_vma(vma);
 974                         goto new_vma;
 975                 }
 976
 977                 ret = i915_vma_unbind(vma);
 978                 if (ret)
 979                         return ERR_PTR(ret);
 980         }
 981
 982         ret = i915_vma_pin_ww(vma, ww, size, alignment, flags | PIN_GLOBAL);
 983
 984         if (ret)
 985                 return ERR_PTR(ret);
 986
 987         if (vma->fence && !i915_gem_object_is_tiled(obj)) {
 988                 mutex_lock(&ggtt->vm.mutex);
 989                 i915_vma_revoke_fence(vma);
 990                 mutex_unlock(&ggtt->vm.mutex);
 991         }
 992
 993         ret = i915_vma_wait_for_bind(vma);
 994         if (ret) {
 995                 i915_vma_unpin(vma);
 996                 return ERR_PTR(ret);
 997         }
 998
 999         return vma;
1000 }
1001
1002 struct i915_vma * __must_check
1003 i915_gem_object_ggtt_pin(struct drm_i915_gem_object *obj,
1004                          const struct i915_gtt_view *view,
1005                          u64 size, u64 alignment, u64 flags)
1006 {
1007         struct i915_gem_ww_ctx ww;
1008         struct i915_vma *ret;
1009         int err;
1010
1011         for_i915_gem_ww(&ww, err, true) {
1012                 err = i915_gem_object_lock(obj, &ww);
1013                 if (err)
1014                         continue;
1015
1016                 ret = i915_gem_object_ggtt_pin_ww(obj, &ww, view, size,
1017                                                   alignment, flags);
1018                 if (IS_ERR(ret))
1019                         err = PTR_ERR(ret);
1020         }
1021
1022         return err ? ERR_PTR(err) : ret;
1023 }
1024
1025 int
1026 i915_gem_madvise_ioctl(struct drm_device *dev, void *data,
1027                        struct drm_file *file_priv)
1028 {
1029         struct drm_i915_private *i915 = to_i915(dev);
1030         struct drm_i915_gem_madvise *args = data;
1031         struct drm_i915_gem_object *obj;
1032         int err;
1033
1034         switch (args->madv) {
1035         case I915_MADV_DONTNEED:
1036         case I915_MADV_WILLNEED:
1037             break;
1038         default:
1039             return -EINVAL;
1040         }
1041
1042         obj = i915_gem_object_lookup(file_priv, args->handle);
1043         if (!obj)
1044                 return -ENOENT;
1045
1046         err = i915_gem_object_lock_interruptible(obj, NULL);
1047         if (err)
1048                 goto out;
1049
1050         if (i915_gem_object_has_pages(obj) &&
1051             i915_gem_object_is_tiled(obj) &&
1052             i915->gem_quirks & GEM_QUIRK_PIN_SWIZZLED_PAGES) {
1053                 if (obj->mm.madv == I915_MADV_WILLNEED) {
1054                         GEM_BUG_ON(!i915_gem_object_has_tiling_quirk(obj));
1055                         i915_gem_object_clear_tiling_quirk(obj);
1056                         i915_gem_object_make_shrinkable(obj);
1057                 }
1058                 if (args->madv == I915_MADV_WILLNEED) {
1059                         GEM_BUG_ON(i915_gem_object_has_tiling_quirk(obj));
1060                         i915_gem_object_make_unshrinkable(obj);
1061                         i915_gem_object_set_tiling_quirk(obj);
1062                 }
1063         }
1064
1065         if (obj->mm.madv != __I915_MADV_PURGED) {
1066                 obj->mm.madv = args->madv;
1067                 if (obj->ops->adjust_lru)
1068                         obj->ops->adjust_lru(obj);
1069         }
1070
1071         if (i915_gem_object_has_pages(obj) ||
1072             i915_gem_object_has_self_managed_shrink_list(obj)) {
1073                 unsigned long flags;
1074
1075                 spin_lock_irqsave(&i915->mm.obj_lock, flags);
1076                 if (!list_empty(&obj->mm.link)) {
1077                         struct list_head *list;
1078
1079                         if (obj->mm.madv != I915_MADV_WILLNEED)
1080                                 list = &i915->mm.purge_list;
1081                         else
1082                                 list = &i915->mm.shrink_list;
1083                         list_move_tail(&obj->mm.link, list);
1084
1085                 }
1086                 spin_unlock_irqrestore(&i915->mm.obj_lock, flags);
1087         }
1088
1089         /* if the object is no longer attached, discard its backing storage */
1090         if (obj->mm.madv == I915_MADV_DONTNEED &&
1091             !i915_gem_object_has_pages(obj))
1092                 i915_gem_object_truncate(obj);
1093
1094         args->retained = obj->mm.madv != __I915_MADV_PURGED;
1095
1096         i915_gem_object_unlock(obj);
1097 out:
1098         i915_gem_object_put(obj);
1099         return err;
1100 }
1101
1102 /*
1103  * A single pass should suffice to release all the freed objects (along most
1104  * call paths), but be a little more paranoid in that freeing the objects does
1105  * take a little amount of time, during which the rcu callbacks could have added
1106  * new objects into the freed list, and armed the work again.
1107  */
1108 void i915_gem_drain_freed_objects(struct drm_i915_private *i915)
1109 {
1110         while (atomic_read(&i915->mm.free_count)) {
1111                 flush_work(&i915->mm.free_work);
1112                 drain_workqueue(i915->bdev.wq);
1113                 rcu_barrier();
1114         }
1115 }
1116
1117 /*
1118  * Similar to objects above (see i915_gem_drain_freed-objects), in general we
1119  * have workers that are armed by RCU and then rearm themselves in their
1120  * callbacks. To be paranoid, we need to drain the workqueue a second time after
1121  * waiting for the RCU grace period so that we catch work queued via RCU from
1122  * the first pass. As neither drain_workqueue() nor flush_workqueue() report a
1123  * result, we make an assumption that we only don't require more than 3 passes
1124  * to catch all _recursive_ RCU delayed work.
1125  */
1126 void i915_gem_drain_workqueue(struct drm_i915_private *i915)
1127 {
1128         int i;
1129
1130         for (i = 0; i < 3; i++) {
1131                 flush_workqueue(i915->wq);
1132                 rcu_barrier();
1133                 i915_gem_drain_freed_objects(i915);
1134         }
1135
1136         drain_workqueue(i915->wq);
1137 }
1138
1139 int i915_gem_init(struct drm_i915_private *dev_priv)
1140 {
1141         struct intel_gt *gt;
1142         unsigned int i;
1143         int ret;
1144
1145         /* We need to fallback to 4K pages if host doesn't support huge gtt. */
1146         if (intel_vgpu_active(dev_priv) && !intel_vgpu_has_huge_gtt(dev_priv))
1147                 RUNTIME_INFO(dev_priv)->page_sizes = I915_GTT_PAGE_SIZE_4K;
1148
1149         ret = i915_gem_init_userptr(dev_priv);
1150         if (ret)
1151                 return ret;
1152
1153         for_each_gt(gt, dev_priv, i) {
1154                 intel_uc_fetch_firmwares(&gt->uc);
1155                 intel_wopcm_init(&gt->wopcm);
1156                 if (GRAPHICS_VER(dev_priv) >= 8)
1157                         setup_private_pat(gt);
1158         }
1159
1160         ret = i915_init_ggtt(dev_priv);
1161         if (ret) {
1162                 GEM_BUG_ON(ret == -EIO);
1163                 goto err_unlock;
1164         }
1165
1166         /*
1167          * Despite its name intel_clock_gating_init applies both display
1168          * clock gating workarounds; GT mmio workarounds and the occasional
1169          * GT power context workaround. Worse, sometimes it includes a context
1170          * register workaround which we need to apply before we record the
1171          * default HW state for all contexts.
1172          *
1173          * FIXME: break up the workarounds and apply them at the right time!
1174          */
1175         intel_clock_gating_init(dev_priv);
1176
1177         for_each_gt(gt, dev_priv, i) {
1178                 ret = intel_gt_init(gt);
1179                 if (ret)
1180                         goto err_unlock;
1181         }
1182
1183         return 0;
1184
1185         /*
1186          * Unwinding is complicated by that we want to handle -EIO to mean
1187          * disable GPU submission but keep KMS alive. We want to mark the
1188          * HW as irrevisibly wedged, but keep enough state around that the
1189          * driver doesn't explode during runtime.
1190          */
1191 err_unlock:
1192         i915_gem_drain_workqueue(dev_priv);
1193
1194         if (ret != -EIO) {
1195                 for_each_gt(gt, dev_priv, i) {
1196                         intel_gt_driver_remove(gt);
1197                         intel_gt_driver_release(gt);
1198                         intel_uc_cleanup_firmwares(&gt->uc);
1199                 }
1200         }
1201
1202         if (ret == -EIO) {
1203                 /*
1204                  * Allow engines or uC initialisation to fail by marking the GPU
1205                  * as wedged. But we only want to do this when the GPU is angry,
1206                  * for all other failure, such as an allocation failure, bail.
1207                  */
1208                 for_each_gt(gt, dev_priv, i) {
1209                         if (!intel_gt_is_wedged(gt)) {
1210                                 i915_probe_error(dev_priv,
1211                                                  "Failed to initialize GPU, declaring it wedged!\n");
1212                                 intel_gt_set_wedged(gt);
1213                         }
1214                 }
1215
1216                 /* Minimal basic recovery for KMS */
1217                 ret = i915_ggtt_enable_hw(dev_priv);
1218                 i915_ggtt_resume(to_gt(dev_priv)->ggtt);
1219                 intel_clock_gating_init(dev_priv);
1220         }
1221
1222         i915_gem_drain_freed_objects(dev_priv);
1223
1224         return ret;
1225 }
1226
1227 void i915_gem_driver_register(struct drm_i915_private *i915)
1228 {
1229         i915_gem_driver_register__shrinker(i915);
1230
1231         intel_engines_driver_register(i915);
1232 }
1233
1234 void i915_gem_driver_unregister(struct drm_i915_private *i915)
1235 {
1236         i915_gem_driver_unregister__shrinker(i915);
1237 }
1238
1239 void i915_gem_driver_remove(struct drm_i915_private *dev_priv)
1240 {
1241         struct intel_gt *gt;
1242         unsigned int i;
1243
1244         i915_gem_suspend_late(dev_priv);
1245         for_each_gt(gt, dev_priv, i)
1246                 intel_gt_driver_remove(gt);
1247         dev_priv->uabi_engines = RB_ROOT;
1248
1249         /* Flush any outstanding unpin_work. */
1250         i915_gem_drain_workqueue(dev_priv);
1251 }
1252
1253 void i915_gem_driver_release(struct drm_i915_private *dev_priv)
1254 {
1255         struct intel_gt *gt;
1256         unsigned int i;
1257
1258         for_each_gt(gt, dev_priv, i) {
1259                 intel_gt_driver_release(gt);
1260                 intel_uc_cleanup_firmwares(&gt->uc);
1261         }
1262
1263         /* Flush any outstanding work, including i915_gem_context.release_work. */
1264         i915_gem_drain_workqueue(dev_priv);
1265
1266         drm_WARN_ON(&dev_priv->drm, !list_empty(&dev_priv->gem.contexts.list));
1267 }
1268
1269 static void i915_gem_init__mm(struct drm_i915_private *i915)
1270 {
1271         spin_lock_init(&i915->mm.obj_lock);
1272
1273         init_llist_head(&i915->mm.free_list);
1274
1275         INIT_LIST_HEAD(&i915->mm.purge_list);
1276         INIT_LIST_HEAD(&i915->mm.shrink_list);
1277
1278         i915_gem_init__objects(i915);
1279 }
1280
1281 void i915_gem_init_early(struct drm_i915_private *dev_priv)
1282 {
1283         i915_gem_init__mm(dev_priv);
1284         i915_gem_init__contexts(dev_priv);
1285
1286         spin_lock_init(&dev_priv->display.fb_tracking.lock);
1287 }
1288
1289 void i915_gem_cleanup_early(struct drm_i915_private *dev_priv)
1290 {
1291         i915_gem_drain_workqueue(dev_priv);
1292         GEM_BUG_ON(!llist_empty(&dev_priv->mm.free_list));
1293         GEM_BUG_ON(atomic_read(&dev_priv->mm.free_count));
1294         drm_WARN_ON(&dev_priv->drm, dev_priv->mm.shrink_count);
1295 }
1296
1297 int i915_gem_open(struct drm_i915_private *i915, struct drm_file *file)
1298 {
1299         struct drm_i915_file_private *file_priv;
1300         struct i915_drm_client *client;
1301         int ret = -ENOMEM;
1302
1303         drm_dbg(&i915->drm, "\n");
1304
1305         file_priv = kzalloc(sizeof(*file_priv), GFP_KERNEL);
1306         if (!file_priv)
1307                 goto err_alloc;
1308
1309         client = i915_drm_client_add(&i915->clients);
1310         if (IS_ERR(client)) {
1311                 ret = PTR_ERR(client);
1312                 goto err_client;
1313         }
1314
1315         file->driver_priv = file_priv;
1316         file_priv->i915 = i915;
1317         file_priv->file = file;
1318         file_priv->client = client;
1319
1320         file_priv->bsd_engine = -1;
1321         file_priv->hang_timestamp = jiffies;
1322
1323         ret = i915_gem_context_open(i915, file);
1324         if (ret)
1325                 goto err_context;
1326
1327         return 0;
1328
1329 err_context:
1330         i915_drm_client_put(client);
1331 err_client:
1332         kfree(file_priv);
1333 err_alloc:
1334         return ret;
1335 }
1336
1337 #if IS_ENABLED(CONFIG_DRM_I915_SELFTEST)
1338 #include "selftests/mock_gem_device.c"
1339 #include "selftests/i915_gem.c"
1340 #endif