sound/pci/hda/patch_hdmi.c

   1 // SPDX-License-Identifier: GPL-2.0-or-later
   2 /*
   3  *
   4  *  patch_hdmi.c - routines for HDMI/DisplayPort codecs
   5  *
   6  *  Copyright(c) 2008-2010 Intel Corporation. All rights reserved.
   7  *  Copyright (c) 2006 ATI Technologies Inc.
   8  *  Copyright (c) 2008 NVIDIA Corp.  All rights reserved.
   9  *  Copyright (c) 2008 Wei Ni <[email protected]>
  10  *  Copyright (c) 2013 Anssi Hannula <[email protected]>
  11  *
  12  *  Authors:
  13  *                      Wu Fengguang <[email protected]>
  14  *
  15  *  Maintained by:
  16  *                      Wu Fengguang <[email protected]>
  17  */
  18
  19 #include <linux/init.h>
  20 #include <linux/delay.h>
  21 #include <linux/pci.h>
  22 #include <linux/slab.h>
  23 #include <linux/module.h>
  24 #include <linux/pm_runtime.h>
  25 #include <sound/core.h>
  26 #include <sound/jack.h>
  27 #include <sound/asoundef.h>
  28 #include <sound/tlv.h>
  29 #include <sound/hdaudio.h>
  30 #include <sound/hda_i915.h>
  31 #include <sound/hda_chmap.h>
  32 #include <sound/hda_codec.h>
  33 #include "hda_local.h"
  34 #include "hda_jack.h"
  35 #include "hda_controller.h"
  36
  37 static bool static_hdmi_pcm;
  38 module_param(static_hdmi_pcm, bool, 0644);
  39 MODULE_PARM_DESC(static_hdmi_pcm, "Don't restrict PCM parameters per ELD info");
  40
  41 static bool enable_acomp = true;
  42 module_param(enable_acomp, bool, 0444);
  43 MODULE_PARM_DESC(enable_acomp, "Enable audio component binding (default=yes)");
  44
  45 static bool enable_silent_stream =
  46 IS_ENABLED(CONFIG_SND_HDA_INTEL_HDMI_SILENT_STREAM);
  47 module_param(enable_silent_stream, bool, 0644);
  48 MODULE_PARM_DESC(enable_silent_stream, "Enable Silent Stream for HDMI devices");
  49
  50 struct hdmi_spec_per_cvt {
  51         hda_nid_t cvt_nid;
  52         int assigned;
  53         unsigned int channels_min;
  54         unsigned int channels_max;
  55         u32 rates;
  56         u64 formats;
  57         unsigned int maxbps;
  58 };
  59
  60 /* max. connections to a widget */
  61 #define HDA_MAX_CONNECTIONS     32
  62
  63 struct hdmi_spec_per_pin {
  64         hda_nid_t pin_nid;
  65         int dev_id;
  66         /* pin idx, different device entries on the same pin use the same idx */
  67         int pin_nid_idx;
  68         int num_mux_nids;
  69         hda_nid_t mux_nids[HDA_MAX_CONNECTIONS];
  70         int mux_idx;
  71         hda_nid_t cvt_nid;
  72
  73         struct hda_codec *codec;
  74         struct hdmi_eld sink_eld;
  75         struct mutex lock;
  76         struct delayed_work work;
  77         struct hdmi_pcm *pcm; /* pointer to spec->pcm_rec[n] dynamically*/
  78         int pcm_idx; /* which pcm is attached. -1 means no pcm is attached */
  79         int repoll_count;
  80         bool setup; /* the stream has been set up by prepare callback */
  81         int channels; /* current number of channels */
  82         bool non_pcm;
  83         bool chmap_set;         /* channel-map override by ALSA API? */
  84         unsigned char chmap[8]; /* ALSA API channel-map */
  85 #ifdef CONFIG_SND_PROC_FS
  86         struct snd_info_entry *proc_entry;
  87 #endif
  88 };
  89
  90 /* operations used by generic code that can be overridden by patches */
  91 struct hdmi_ops {
  92         int (*pin_get_eld)(struct hda_codec *codec, hda_nid_t pin_nid,
  93                            int dev_id, unsigned char *buf, int *eld_size);
  94
  95         void (*pin_setup_infoframe)(struct hda_codec *codec, hda_nid_t pin_nid,
  96                                     int dev_id,
  97                                     int ca, int active_channels, int conn_type);
  98
  99         /* enable/disable HBR (HD passthrough) */
 100         int (*pin_hbr_setup)(struct hda_codec *codec, hda_nid_t pin_nid,
 101                              int dev_id, bool hbr);
 102
 103         int (*setup_stream)(struct hda_codec *codec, hda_nid_t cvt_nid,
 104                             hda_nid_t pin_nid, int dev_id, u32 stream_tag,
 105                             int format);
 106
 107         void (*pin_cvt_fixup)(struct hda_codec *codec,
 108                               struct hdmi_spec_per_pin *per_pin,
 109                               hda_nid_t cvt_nid);
 110 };
 111
 112 struct hdmi_pcm {
 113         struct hda_pcm *pcm;
 114         struct snd_jack *jack;
 115         struct snd_kcontrol *eld_ctl;
 116 };
 117
 118 struct hdmi_spec {
 119         struct hda_codec *codec;
 120         int num_cvts;
 121         struct snd_array cvts; /* struct hdmi_spec_per_cvt */
 122         hda_nid_t cvt_nids[4]; /* only for haswell fix */
 123
 124         /*
 125          * num_pins is the number of virtual pins
 126          * for example, there are 3 pins, and each pin
 127          * has 4 device entries, then the num_pins is 12
 128          */
 129         int num_pins;
 130         /*
 131          * num_nids is the number of real pins
 132          * In the above example, num_nids is 3
 133          */
 134         int num_nids;
 135         /*
 136          * dev_num is the number of device entries
 137          * on each pin.
 138          * In the above example, dev_num is 4
 139          */
 140         int dev_num;
 141         struct snd_array pins; /* struct hdmi_spec_per_pin */
 142         struct hdmi_pcm pcm_rec[16];
 143         struct mutex pcm_lock;
 144         struct mutex bind_lock; /* for audio component binding */
 145         /* pcm_bitmap means which pcms have been assigned to pins*/
 146         unsigned long pcm_bitmap;
 147         int pcm_used;   /* counter of pcm_rec[] */
 148         /* bitmap shows whether the pcm is opened in user space
 149          * bit 0 means the first playback PCM (PCM3);
 150          * bit 1 means the second playback PCM, and so on.
 151          */
 152         unsigned long pcm_in_use;
 153
 154         struct hdmi_eld temp_eld;
 155         struct hdmi_ops ops;
 156
 157         bool dyn_pin_out;
 158         bool dyn_pcm_assign;
 159         bool intel_hsw_fixup;   /* apply Intel platform-specific fixups */
 160         /*
 161          * Non-generic VIA/NVIDIA specific
 162          */
 163         struct hda_multi_out multiout;
 164         struct hda_pcm_stream pcm_playback;
 165
 166         bool use_acomp_notifier; /* use eld_notify callback for hotplug */
 167         bool acomp_registered; /* audio component registered in this driver */
 168         struct drm_audio_component_audio_ops drm_audio_ops;
 169         int (*port2pin)(struct hda_codec *, int); /* reverse port/pin mapping */
 170
 171         struct hdac_chmap chmap;
 172         hda_nid_t vendor_nid;
 173         const int *port_map;
 174         int port_num;
 175         bool send_silent_stream; /* Flag to enable silent stream feature */
 176 };
 177
 178 #ifdef CONFIG_SND_HDA_COMPONENT
 179 static inline bool codec_has_acomp(struct hda_codec *codec)
 180 {
 181         struct hdmi_spec *spec = codec->spec;
 182         return spec->use_acomp_notifier;
 183 }
 184 #else
 185 #define codec_has_acomp(codec)  false
 186 #endif
 187
 188 struct hdmi_audio_infoframe {
 189         u8 type; /* 0x84 */
 190         u8 ver;  /* 0x01 */
 191         u8 len;  /* 0x0a */
 192
 193         u8 checksum;
 194
 195         u8 CC02_CT47;   /* CC in bits 0:2, CT in 4:7 */
 196         u8 SS01_SF24;
 197         u8 CXT04;
 198         u8 CA;
 199         u8 LFEPBL01_LSV36_DM_INH7;
 200 };
 201
 202 struct dp_audio_infoframe {
 203         u8 type; /* 0x84 */
 204         u8 len;  /* 0x1b */
 205         u8 ver;  /* 0x11 << 2 */
 206
 207         u8 CC02_CT47;   /* match with HDMI infoframe from this on */
 208         u8 SS01_SF24;
 209         u8 CXT04;
 210         u8 CA;
 211         u8 LFEPBL01_LSV36_DM_INH7;
 212 };
 213
 214 union audio_infoframe {
 215         struct hdmi_audio_infoframe hdmi;
 216         struct dp_audio_infoframe dp;
 217         u8 bytes[0];
 218 };
 219
 220 /*
 221  * HDMI routines
 222  */
 223
 224 #define get_pin(spec, idx) \
 225         ((struct hdmi_spec_per_pin *)snd_array_elem(&spec->pins, idx))
 226 #define get_cvt(spec, idx) \
 227         ((struct hdmi_spec_per_cvt  *)snd_array_elem(&spec->cvts, idx))
 228 /* obtain hdmi_pcm object assigned to idx */
 229 #define get_hdmi_pcm(spec, idx) (&(spec)->pcm_rec[idx])
 230 /* obtain hda_pcm object assigned to idx */
 231 #define get_pcm_rec(spec, idx)  (get_hdmi_pcm(spec, idx)->pcm)
 232
 233 static int pin_id_to_pin_index(struct hda_codec *codec,
 234                                hda_nid_t pin_nid, int dev_id)
 235 {
 236         struct hdmi_spec *spec = codec->spec;
 237         int pin_idx;
 238         struct hdmi_spec_per_pin *per_pin;
 239
 240         /*
 241          * (dev_id == -1) means it is NON-MST pin
 242          * return the first virtual pin on this port
 243          */
 244         if (dev_id == -1)
 245                 dev_id = 0;
 246
 247         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
 248                 per_pin = get_pin(spec, pin_idx);
 249                 if ((per_pin->pin_nid == pin_nid) &&
 250                         (per_pin->dev_id == dev_id))
 251                         return pin_idx;
 252         }
 253
 254         codec_warn(codec, "HDMI: pin nid %d not registered\n", pin_nid);
 255         return -EINVAL;
 256 }
 257
 258 static int hinfo_to_pcm_index(struct hda_codec *codec,
 259                         struct hda_pcm_stream *hinfo)
 260 {
 261         struct hdmi_spec *spec = codec->spec;
 262         int pcm_idx;
 263
 264         for (pcm_idx = 0; pcm_idx < spec->pcm_used; pcm_idx++)
 265                 if (get_pcm_rec(spec, pcm_idx)->stream == hinfo)
 266                         return pcm_idx;
 267
 268         codec_warn(codec, "HDMI: hinfo %p not tied to a PCM\n", hinfo);
 269         return -EINVAL;
 270 }
 271
 272 static int hinfo_to_pin_index(struct hda_codec *codec,
 273                               struct hda_pcm_stream *hinfo)
 274 {
 275         struct hdmi_spec *spec = codec->spec;
 276         struct hdmi_spec_per_pin *per_pin;
 277         int pin_idx;
 278
 279         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
 280                 per_pin = get_pin(spec, pin_idx);
 281                 if (per_pin->pcm &&
 282                         per_pin->pcm->pcm->stream == hinfo)
 283                         return pin_idx;
 284         }
 285
 286         codec_dbg(codec, "HDMI: hinfo %p (pcm %d) not registered\n", hinfo,
 287                   hinfo_to_pcm_index(codec, hinfo));
 288         return -EINVAL;
 289 }
 290
 291 static struct hdmi_spec_per_pin *pcm_idx_to_pin(struct hdmi_spec *spec,
 292                                                 int pcm_idx)
 293 {
 294         int i;
 295         struct hdmi_spec_per_pin *per_pin;
 296
 297         for (i = 0; i < spec->num_pins; i++) {
 298                 per_pin = get_pin(spec, i);
 299                 if (per_pin->pcm_idx == pcm_idx)
 300                         return per_pin;
 301         }
 302         return NULL;
 303 }
 304
 305 static int cvt_nid_to_cvt_index(struct hda_codec *codec, hda_nid_t cvt_nid)
 306 {
 307         struct hdmi_spec *spec = codec->spec;
 308         int cvt_idx;
 309
 310         for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++)
 311                 if (get_cvt(spec, cvt_idx)->cvt_nid == cvt_nid)
 312                         return cvt_idx;
 313
 314         codec_warn(codec, "HDMI: cvt nid %d not registered\n", cvt_nid);
 315         return -EINVAL;
 316 }
 317
 318 static int hdmi_eld_ctl_info(struct snd_kcontrol *kcontrol,
 319                         struct snd_ctl_elem_info *uinfo)
 320 {
 321         struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
 322         struct hdmi_spec *spec = codec->spec;
 323         struct hdmi_spec_per_pin *per_pin;
 324         struct hdmi_eld *eld;
 325         int pcm_idx;
 326
 327         uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES;
 328
 329         pcm_idx = kcontrol->private_value;
 330         mutex_lock(&spec->pcm_lock);
 331         per_pin = pcm_idx_to_pin(spec, pcm_idx);
 332         if (!per_pin) {
 333                 /* no pin is bound to the pcm */
 334                 uinfo->count = 0;
 335                 goto unlock;
 336         }
 337         eld = &per_pin->sink_eld;
 338         uinfo->count = eld->eld_valid ? eld->eld_size : 0;
 339
 340  unlock:
 341         mutex_unlock(&spec->pcm_lock);
 342         return 0;
 343 }
 344
 345 static int hdmi_eld_ctl_get(struct snd_kcontrol *kcontrol,
 346                         struct snd_ctl_elem_value *ucontrol)
 347 {
 348         struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
 349         struct hdmi_spec *spec = codec->spec;
 350         struct hdmi_spec_per_pin *per_pin;
 351         struct hdmi_eld *eld;
 352         int pcm_idx;
 353         int err = 0;
 354
 355         pcm_idx = kcontrol->private_value;
 356         mutex_lock(&spec->pcm_lock);
 357         per_pin = pcm_idx_to_pin(spec, pcm_idx);
 358         if (!per_pin) {
 359                 /* no pin is bound to the pcm */
 360                 memset(ucontrol->value.bytes.data, 0,
 361                        ARRAY_SIZE(ucontrol->value.bytes.data));
 362                 goto unlock;
 363         }
 364
 365         eld = &per_pin->sink_eld;
 366         if (eld->eld_size > ARRAY_SIZE(ucontrol->value.bytes.data) ||
 367             eld->eld_size > ELD_MAX_SIZE) {
 368                 snd_BUG();
 369                 err = -EINVAL;
 370                 goto unlock;
 371         }
 372
 373         memset(ucontrol->value.bytes.data, 0,
 374                ARRAY_SIZE(ucontrol->value.bytes.data));
 375         if (eld->eld_valid)
 376                 memcpy(ucontrol->value.bytes.data, eld->eld_buffer,
 377                        eld->eld_size);
 378
 379  unlock:
 380         mutex_unlock(&spec->pcm_lock);
 381         return err;
 382 }
 383
 384 static const struct snd_kcontrol_new eld_bytes_ctl = {
 385         .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE |
 386                 SNDRV_CTL_ELEM_ACCESS_SKIP_CHECK,
 387         .iface = SNDRV_CTL_ELEM_IFACE_PCM,
 388         .name = "ELD",
 389         .info = hdmi_eld_ctl_info,
 390         .get = hdmi_eld_ctl_get,
 391 };
 392
 393 static int hdmi_create_eld_ctl(struct hda_codec *codec, int pcm_idx,
 394                         int device)
 395 {
 396         struct snd_kcontrol *kctl;
 397         struct hdmi_spec *spec = codec->spec;
 398         int err;
 399
 400         kctl = snd_ctl_new1(&eld_bytes_ctl, codec);
 401         if (!kctl)
 402                 return -ENOMEM;
 403         kctl->private_value = pcm_idx;
 404         kctl->id.device = device;
 405
 406         /* no pin nid is associated with the kctl now
 407          * tbd: associate pin nid to eld ctl later
 408          */
 409         err = snd_hda_ctl_add(codec, 0, kctl);
 410         if (err < 0)
 411                 return err;
 412
 413         get_hdmi_pcm(spec, pcm_idx)->eld_ctl = kctl;
 414         return 0;
 415 }
 416
 417 #ifdef BE_PARANOID
 418 static void hdmi_get_dip_index(struct hda_codec *codec, hda_nid_t pin_nid,
 419                                 int *packet_index, int *byte_index)
 420 {
 421         int val;
 422
 423         val = snd_hda_codec_read(codec, pin_nid, 0,
 424                                  AC_VERB_GET_HDMI_DIP_INDEX, 0);
 425
 426         *packet_index = val >> 5;
 427         *byte_index = val & 0x1f;
 428 }
 429 #endif
 430
 431 static void hdmi_set_dip_index(struct hda_codec *codec, hda_nid_t pin_nid,
 432                                 int packet_index, int byte_index)
 433 {
 434         int val;
 435
 436         val = (packet_index << 5) | (byte_index & 0x1f);
 437
 438         snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_INDEX, val);
 439 }
 440
 441 static void hdmi_write_dip_byte(struct hda_codec *codec, hda_nid_t pin_nid,
 442                                 unsigned char val)
 443 {
 444         snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_DATA, val);
 445 }
 446
 447 static void hdmi_init_pin(struct hda_codec *codec, hda_nid_t pin_nid)
 448 {
 449         struct hdmi_spec *spec = codec->spec;
 450         int pin_out;
 451
 452         /* Unmute */
 453         if (get_wcaps(codec, pin_nid) & AC_WCAP_OUT_AMP)
 454                 snd_hda_codec_write(codec, pin_nid, 0,
 455                                 AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE);
 456
 457         if (spec->dyn_pin_out)
 458                 /* Disable pin out until stream is active */
 459                 pin_out = 0;
 460         else
 461                 /* Enable pin out: some machines with GM965 gets broken output
 462                  * when the pin is disabled or changed while using with HDMI
 463                  */
 464                 pin_out = PIN_OUT;
 465
 466         snd_hda_codec_write(codec, pin_nid, 0,
 467                             AC_VERB_SET_PIN_WIDGET_CONTROL, pin_out);
 468 }
 469
 470 /*
 471  * ELD proc files
 472  */
 473
 474 #ifdef CONFIG_SND_PROC_FS
 475 static void print_eld_info(struct snd_info_entry *entry,
 476                            struct snd_info_buffer *buffer)
 477 {
 478         struct hdmi_spec_per_pin *per_pin = entry->private_data;
 479
 480         mutex_lock(&per_pin->lock);
 481         snd_hdmi_print_eld_info(&per_pin->sink_eld, buffer);
 482         mutex_unlock(&per_pin->lock);
 483 }
 484
 485 static void write_eld_info(struct snd_info_entry *entry,
 486                            struct snd_info_buffer *buffer)
 487 {
 488         struct hdmi_spec_per_pin *per_pin = entry->private_data;
 489
 490         mutex_lock(&per_pin->lock);
 491         snd_hdmi_write_eld_info(&per_pin->sink_eld, buffer);
 492         mutex_unlock(&per_pin->lock);
 493 }
 494
 495 static int eld_proc_new(struct hdmi_spec_per_pin *per_pin, int index)
 496 {
 497         char name[32];
 498         struct hda_codec *codec = per_pin->codec;
 499         struct snd_info_entry *entry;
 500         int err;
 501
 502         snprintf(name, sizeof(name), "eld#%d.%d", codec->addr, index);
 503         err = snd_card_proc_new(codec->card, name, &entry);
 504         if (err < 0)
 505                 return err;
 506
 507         snd_info_set_text_ops(entry, per_pin, print_eld_info);
 508         entry->c.text.write = write_eld_info;
 509         entry->mode |= 0200;
 510         per_pin->proc_entry = entry;
 511
 512         return 0;
 513 }
 514
 515 static void eld_proc_free(struct hdmi_spec_per_pin *per_pin)
 516 {
 517         if (!per_pin->codec->bus->shutdown) {
 518                 snd_info_free_entry(per_pin->proc_entry);
 519                 per_pin->proc_entry = NULL;
 520         }
 521 }
 522 #else
 523 static inline int eld_proc_new(struct hdmi_spec_per_pin *per_pin,
 524                                int index)
 525 {
 526         return 0;
 527 }
 528 static inline void eld_proc_free(struct hdmi_spec_per_pin *per_pin)
 529 {
 530 }
 531 #endif
 532
 533 /*
 534  * Audio InfoFrame routines
 535  */
 536
 537 /*
 538  * Enable Audio InfoFrame Transmission
 539  */
 540 static void hdmi_start_infoframe_trans(struct hda_codec *codec,
 541                                        hda_nid_t pin_nid)
 542 {
 543         hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
 544         snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_XMIT,
 545                                                 AC_DIPXMIT_BEST);
 546 }
 547
 548 /*
 549  * Disable Audio InfoFrame Transmission
 550  */
 551 static void hdmi_stop_infoframe_trans(struct hda_codec *codec,
 552                                       hda_nid_t pin_nid)
 553 {
 554         hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
 555         snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_XMIT,
 556                                                 AC_DIPXMIT_DISABLE);
 557 }
 558
 559 static void hdmi_debug_dip_size(struct hda_codec *codec, hda_nid_t pin_nid)
 560 {
 561 #ifdef CONFIG_SND_DEBUG_VERBOSE
 562         int i;
 563         int size;
 564
 565         size = snd_hdmi_get_eld_size(codec, pin_nid);
 566         codec_dbg(codec, "HDMI: ELD buf size is %d\n", size);
 567
 568         for (i = 0; i < 8; i++) {
 569                 size = snd_hda_codec_read(codec, pin_nid, 0,
 570                                                 AC_VERB_GET_HDMI_DIP_SIZE, i);
 571                 codec_dbg(codec, "HDMI: DIP GP[%d] buf size is %d\n", i, size);
 572         }
 573 #endif
 574 }
 575
 576 static void hdmi_clear_dip_buffers(struct hda_codec *codec, hda_nid_t pin_nid)
 577 {
 578 #ifdef BE_PARANOID
 579         int i, j;
 580         int size;
 581         int pi, bi;
 582         for (i = 0; i < 8; i++) {
 583                 size = snd_hda_codec_read(codec, pin_nid, 0,
 584                                                 AC_VERB_GET_HDMI_DIP_SIZE, i);
 585                 if (size == 0)
 586                         continue;
 587
 588                 hdmi_set_dip_index(codec, pin_nid, i, 0x0);
 589                 for (j = 1; j < 1000; j++) {
 590                         hdmi_write_dip_byte(codec, pin_nid, 0x0);
 591                         hdmi_get_dip_index(codec, pin_nid, &pi, &bi);
 592                         if (pi != i)
 593                                 codec_dbg(codec, "dip index %d: %d != %d\n",
 594                                                 bi, pi, i);
 595                         if (bi == 0) /* byte index wrapped around */
 596                                 break;
 597                 }
 598                 codec_dbg(codec,
 599                         "HDMI: DIP GP[%d] buf reported size=%d, written=%d\n",
 600                         i, size, j);
 601         }
 602 #endif
 603 }
 604
 605 static void hdmi_checksum_audio_infoframe(struct hdmi_audio_infoframe *hdmi_ai)
 606 {
 607         u8 *bytes = (u8 *)hdmi_ai;
 608         u8 sum = 0;
 609         int i;
 610
 611         hdmi_ai->checksum = 0;
 612
 613         for (i = 0; i < sizeof(*hdmi_ai); i++)
 614                 sum += bytes[i];
 615
 616         hdmi_ai->checksum = -sum;
 617 }
 618
 619 static void hdmi_fill_audio_infoframe(struct hda_codec *codec,
 620                                       hda_nid_t pin_nid,
 621                                       u8 *dip, int size)
 622 {
 623         int i;
 624
 625         hdmi_debug_dip_size(codec, pin_nid);
 626         hdmi_clear_dip_buffers(codec, pin_nid); /* be paranoid */
 627
 628         hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
 629         for (i = 0; i < size; i++)
 630                 hdmi_write_dip_byte(codec, pin_nid, dip[i]);
 631 }
 632
 633 static bool hdmi_infoframe_uptodate(struct hda_codec *codec, hda_nid_t pin_nid,
 634                                     u8 *dip, int size)
 635 {
 636         u8 val;
 637         int i;
 638
 639         if (snd_hda_codec_read(codec, pin_nid, 0, AC_VERB_GET_HDMI_DIP_XMIT, 0)
 640                                                             != AC_DIPXMIT_BEST)
 641                 return false;
 642
 643         hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
 644         for (i = 0; i < size; i++) {
 645                 val = snd_hda_codec_read(codec, pin_nid, 0,
 646                                          AC_VERB_GET_HDMI_DIP_DATA, 0);
 647                 if (val != dip[i])
 648                         return false;
 649         }
 650
 651         return true;
 652 }
 653
 654 static int hdmi_pin_get_eld(struct hda_codec *codec, hda_nid_t nid,
 655                             int dev_id, unsigned char *buf, int *eld_size)
 656 {
 657         snd_hda_set_dev_select(codec, nid, dev_id);
 658
 659         return snd_hdmi_get_eld(codec, nid, buf, eld_size);
 660 }
 661
 662 static void hdmi_pin_setup_infoframe(struct hda_codec *codec,
 663                                      hda_nid_t pin_nid, int dev_id,
 664                                      int ca, int active_channels,
 665                                      int conn_type)
 666 {
 667         union audio_infoframe ai;
 668
 669         memset(&ai, 0, sizeof(ai));
 670         if (conn_type == 0) { /* HDMI */
 671                 struct hdmi_audio_infoframe *hdmi_ai = &ai.hdmi;
 672
 673                 hdmi_ai->type           = 0x84;
 674                 hdmi_ai->ver            = 0x01;
 675                 hdmi_ai->len            = 0x0a;
 676                 hdmi_ai->CC02_CT47      = active_channels - 1;
 677                 hdmi_ai->CA             = ca;
 678                 hdmi_checksum_audio_infoframe(hdmi_ai);
 679         } else if (conn_type == 1) { /* DisplayPort */
 680                 struct dp_audio_infoframe *dp_ai = &ai.dp;
 681
 682                 dp_ai->type             = 0x84;
 683                 dp_ai->len              = 0x1b;
 684                 dp_ai->ver              = 0x11 << 2;
 685                 dp_ai->CC02_CT47        = active_channels - 1;
 686                 dp_ai->CA               = ca;
 687         } else {
 688                 codec_dbg(codec, "HDMI: unknown connection type at pin %d\n",
 689                             pin_nid);
 690                 return;
 691         }
 692
 693         snd_hda_set_dev_select(codec, pin_nid, dev_id);
 694
 695         /*
 696          * sizeof(ai) is used instead of sizeof(*hdmi_ai) or
 697          * sizeof(*dp_ai) to avoid partial match/update problems when
 698          * the user switches between HDMI/DP monitors.
 699          */
 700         if (!hdmi_infoframe_uptodate(codec, pin_nid, ai.bytes,
 701                                         sizeof(ai))) {
 702                 codec_dbg(codec,
 703                           "hdmi_pin_setup_infoframe: pin=%d channels=%d ca=0x%02x\n",
 704                             pin_nid,
 705                             active_channels, ca);
 706                 hdmi_stop_infoframe_trans(codec, pin_nid);
 707                 hdmi_fill_audio_infoframe(codec, pin_nid,
 708                                             ai.bytes, sizeof(ai));
 709                 hdmi_start_infoframe_trans(codec, pin_nid);
 710         }
 711 }
 712
 713 static void hdmi_setup_audio_infoframe(struct hda_codec *codec,
 714                                        struct hdmi_spec_per_pin *per_pin,
 715                                        bool non_pcm)
 716 {
 717         struct hdmi_spec *spec = codec->spec;
 718         struct hdac_chmap *chmap = &spec->chmap;
 719         hda_nid_t pin_nid = per_pin->pin_nid;
 720         int dev_id = per_pin->dev_id;
 721         int channels = per_pin->channels;
 722         int active_channels;
 723         struct hdmi_eld *eld;
 724         int ca;
 725
 726         if (!channels)
 727                 return;
 728
 729         snd_hda_set_dev_select(codec, pin_nid, dev_id);
 730
 731         /* some HW (e.g. HSW+) needs reprogramming the amp at each time */
 732         if (get_wcaps(codec, pin_nid) & AC_WCAP_OUT_AMP)
 733                 snd_hda_codec_write(codec, pin_nid, 0,
 734                                             AC_VERB_SET_AMP_GAIN_MUTE,
 735                                             AMP_OUT_UNMUTE);
 736
 737         eld = &per_pin->sink_eld;
 738
 739         ca = snd_hdac_channel_allocation(&codec->core,
 740                         eld->info.spk_alloc, channels,
 741                         per_pin->chmap_set, non_pcm, per_pin->chmap);
 742
 743         active_channels = snd_hdac_get_active_channels(ca);
 744
 745         chmap->ops.set_channel_count(&codec->core, per_pin->cvt_nid,
 746                                                 active_channels);
 747
 748         /*
 749          * always configure channel mapping, it may have been changed by the
 750          * user in the meantime
 751          */
 752         snd_hdac_setup_channel_mapping(&spec->chmap,
 753                                 pin_nid, non_pcm, ca, channels,
 754                                 per_pin->chmap, per_pin->chmap_set);
 755
 756         spec->ops.pin_setup_infoframe(codec, pin_nid, dev_id,
 757                                       ca, active_channels, eld->info.conn_type);
 758
 759         per_pin->non_pcm = non_pcm;
 760 }
 761
 762 /*
 763  * Unsolicited events
 764  */
 765
 766 static void hdmi_present_sense(struct hdmi_spec_per_pin *per_pin, int repoll);
 767
 768 static void check_presence_and_report(struct hda_codec *codec, hda_nid_t nid,
 769                                       int dev_id)
 770 {
 771         struct hdmi_spec *spec = codec->spec;
 772         int pin_idx = pin_id_to_pin_index(codec, nid, dev_id);
 773
 774         if (pin_idx < 0)
 775                 return;
 776         mutex_lock(&spec->pcm_lock);
 777         hdmi_present_sense(get_pin(spec, pin_idx), 1);
 778         mutex_unlock(&spec->pcm_lock);
 779 }
 780
 781 static void jack_callback(struct hda_codec *codec,
 782                           struct hda_jack_callback *jack)
 783 {
 784         /* stop polling when notification is enabled */
 785         if (codec_has_acomp(codec))
 786                 return;
 787
 788         check_presence_and_report(codec, jack->nid, jack->dev_id);
 789 }
 790
 791 static void hdmi_intrinsic_event(struct hda_codec *codec, unsigned int res,
 792                                  struct hda_jack_tbl *jack)
 793 {
 794         jack->jack_dirty = 1;
 795
 796         codec_dbg(codec,
 797                 "HDMI hot plug event: Codec=%d Pin=%d Device=%d Inactive=%d Presence_Detect=%d ELD_Valid=%d\n",
 798                 codec->addr, jack->nid, jack->dev_id, !!(res & AC_UNSOL_RES_IA),
 799                 !!(res & AC_UNSOL_RES_PD), !!(res & AC_UNSOL_RES_ELDV));
 800
 801         check_presence_and_report(codec, jack->nid, jack->dev_id);
 802 }
 803
 804 static void hdmi_non_intrinsic_event(struct hda_codec *codec, unsigned int res)
 805 {
 806         int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
 807         int subtag = (res & AC_UNSOL_RES_SUBTAG) >> AC_UNSOL_RES_SUBTAG_SHIFT;
 808         int cp_state = !!(res & AC_UNSOL_RES_CP_STATE);
 809         int cp_ready = !!(res & AC_UNSOL_RES_CP_READY);
 810
 811         codec_info(codec,
 812                 "HDMI CP event: CODEC=%d TAG=%d SUBTAG=0x%x CP_STATE=%d CP_READY=%d\n",
 813                 codec->addr,
 814                 tag,
 815                 subtag,
 816                 cp_state,
 817                 cp_ready);
 818
 819         /* TODO */
 820         if (cp_state) {
 821                 ;
 822         }
 823         if (cp_ready) {
 824                 ;
 825         }
 826 }
 827
 828
 829 static void hdmi_unsol_event(struct hda_codec *codec, unsigned int res)
 830 {
 831         int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
 832         int subtag = (res & AC_UNSOL_RES_SUBTAG) >> AC_UNSOL_RES_SUBTAG_SHIFT;
 833         struct hda_jack_tbl *jack;
 834
 835         if (codec_has_acomp(codec))
 836                 return;
 837
 838         if (codec->dp_mst) {
 839                 int dev_entry =
 840                         (res & AC_UNSOL_RES_DE) >> AC_UNSOL_RES_DE_SHIFT;
 841
 842                 jack = snd_hda_jack_tbl_get_from_tag(codec, tag, dev_entry);
 843         } else {
 844                 jack = snd_hda_jack_tbl_get_from_tag(codec, tag, 0);
 845         }
 846
 847         if (!jack) {
 848                 codec_dbg(codec, "Unexpected HDMI event tag 0x%x\n", tag);
 849                 return;
 850         }
 851
 852         if (subtag == 0)
 853                 hdmi_intrinsic_event(codec, res, jack);
 854         else
 855                 hdmi_non_intrinsic_event(codec, res);
 856 }
 857
 858 static void haswell_verify_D0(struct hda_codec *codec,
 859                 hda_nid_t cvt_nid, hda_nid_t nid)
 860 {
 861         int pwr;
 862
 863         /* For Haswell, the converter 1/2 may keep in D3 state after bootup,
 864          * thus pins could only choose converter 0 for use. Make sure the
 865          * converters are in correct power state */
 866         if (!snd_hda_check_power_state(codec, cvt_nid, AC_PWRST_D0))
 867                 snd_hda_codec_write(codec, cvt_nid, 0, AC_VERB_SET_POWER_STATE, AC_PWRST_D0);
 868
 869         if (!snd_hda_check_power_state(codec, nid, AC_PWRST_D0)) {
 870                 snd_hda_codec_write(codec, nid, 0, AC_VERB_SET_POWER_STATE,
 871                                     AC_PWRST_D0);
 872                 msleep(40);
 873                 pwr = snd_hda_codec_read(codec, nid, 0, AC_VERB_GET_POWER_STATE, 0);
 874                 pwr = (pwr & AC_PWRST_ACTUAL) >> AC_PWRST_ACTUAL_SHIFT;
 875                 codec_dbg(codec, "Haswell HDMI audio: Power for pin 0x%x is now D%d\n", nid, pwr);
 876         }
 877 }
 878
 879 /*
 880  * Callbacks
 881  */
 882
 883 /* HBR should be Non-PCM, 8 channels */
 884 #define is_hbr_format(format) \
 885         ((format & AC_FMT_TYPE_NON_PCM) && (format & AC_FMT_CHAN_MASK) == 7)
 886
 887 static int hdmi_pin_hbr_setup(struct hda_codec *codec, hda_nid_t pin_nid,
 888                               int dev_id, bool hbr)
 889 {
 890         int pinctl, new_pinctl;
 891
 892         if (snd_hda_query_pin_caps(codec, pin_nid) & AC_PINCAP_HBR) {
 893                 snd_hda_set_dev_select(codec, pin_nid, dev_id);
 894                 pinctl = snd_hda_codec_read(codec, pin_nid, 0,
 895                                             AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
 896
 897                 if (pinctl < 0)
 898                         return hbr ? -EINVAL : 0;
 899
 900                 new_pinctl = pinctl & ~AC_PINCTL_EPT;
 901                 if (hbr)
 902                         new_pinctl |= AC_PINCTL_EPT_HBR;
 903                 else
 904                         new_pinctl |= AC_PINCTL_EPT_NATIVE;
 905
 906                 codec_dbg(codec,
 907                           "hdmi_pin_hbr_setup: NID=0x%x, %spinctl=0x%x\n",
 908                             pin_nid,
 909                             pinctl == new_pinctl ? "" : "new-",
 910                             new_pinctl);
 911
 912                 if (pinctl != new_pinctl)
 913                         snd_hda_codec_write(codec, pin_nid, 0,
 914                                             AC_VERB_SET_PIN_WIDGET_CONTROL,
 915                                             new_pinctl);
 916         } else if (hbr)
 917                 return -EINVAL;
 918
 919         return 0;
 920 }
 921
 922 static int hdmi_setup_stream(struct hda_codec *codec, hda_nid_t cvt_nid,
 923                               hda_nid_t pin_nid, int dev_id,
 924                               u32 stream_tag, int format)
 925 {
 926         struct hdmi_spec *spec = codec->spec;
 927         unsigned int param;
 928         int err;
 929
 930         err = spec->ops.pin_hbr_setup(codec, pin_nid, dev_id,
 931                                       is_hbr_format(format));
 932
 933         if (err) {
 934                 codec_dbg(codec, "hdmi_setup_stream: HBR is not supported\n");
 935                 return err;
 936         }
 937
 938         if (spec->intel_hsw_fixup) {
 939
 940                 /*
 941                  * on recent platforms IEC Coding Type is required for HBR
 942                  * support, read current Digital Converter settings and set
 943                  * ICT bitfield if needed.
 944                  */
 945                 param = snd_hda_codec_read(codec, cvt_nid, 0,
 946                                            AC_VERB_GET_DIGI_CONVERT_1, 0);
 947
 948                 param = (param >> 16) & ~(AC_DIG3_ICT);
 949
 950                 /* on recent platforms ICT mode is required for HBR support */
 951                 if (is_hbr_format(format))
 952                         param |= 0x1;
 953
 954                 snd_hda_codec_write(codec, cvt_nid, 0,
 955                                     AC_VERB_SET_DIGI_CONVERT_3, param);
 956         }
 957
 958         snd_hda_codec_setup_stream(codec, cvt_nid, stream_tag, 0, format);
 959         return 0;
 960 }
 961
 962 /* Try to find an available converter
 963  * If pin_idx is less then zero, just try to find an available converter.
 964  * Otherwise, try to find an available converter and get the cvt mux index
 965  * of the pin.
 966  */
 967 static int hdmi_choose_cvt(struct hda_codec *codec,
 968                            int pin_idx, int *cvt_id)
 969 {
 970         struct hdmi_spec *spec = codec->spec;
 971         struct hdmi_spec_per_pin *per_pin;
 972         struct hdmi_spec_per_cvt *per_cvt = NULL;
 973         int cvt_idx, mux_idx = 0;
 974
 975         /* pin_idx < 0 means no pin will be bound to the converter */
 976         if (pin_idx < 0)
 977                 per_pin = NULL;
 978         else
 979                 per_pin = get_pin(spec, pin_idx);
 980
 981         /* Dynamically assign converter to stream */
 982         for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++) {
 983                 per_cvt = get_cvt(spec, cvt_idx);
 984
 985                 /* Must not already be assigned */
 986                 if (per_cvt->assigned)
 987                         continue;
 988                 if (per_pin == NULL)
 989                         break;
 990                 /* Must be in pin's mux's list of converters */
 991                 for (mux_idx = 0; mux_idx < per_pin->num_mux_nids; mux_idx++)
 992                         if (per_pin->mux_nids[mux_idx] == per_cvt->cvt_nid)
 993                                 break;
 994                 /* Not in mux list */
 995                 if (mux_idx == per_pin->num_mux_nids)
 996                         continue;
 997                 break;
 998         }
 999
1000         /* No free converters */
1001         if (cvt_idx == spec->num_cvts)
1002                 return -EBUSY;
1003
1004         if (per_pin != NULL)
1005                 per_pin->mux_idx = mux_idx;
1006
1007         if (cvt_id)
1008                 *cvt_id = cvt_idx;
1009
1010         return 0;
1011 }
1012
1013 /* Assure the pin select the right convetor */
1014 static void intel_verify_pin_cvt_connect(struct hda_codec *codec,
1015                         struct hdmi_spec_per_pin *per_pin)
1016 {
1017         hda_nid_t pin_nid = per_pin->pin_nid;
1018         int mux_idx, curr;
1019
1020         mux_idx = per_pin->mux_idx;
1021         curr = snd_hda_codec_read(codec, pin_nid, 0,
1022                                           AC_VERB_GET_CONNECT_SEL, 0);
1023         if (curr != mux_idx)
1024                 snd_hda_codec_write_cache(codec, pin_nid, 0,
1025                                             AC_VERB_SET_CONNECT_SEL,
1026                                             mux_idx);
1027 }
1028
1029 /* get the mux index for the converter of the pins
1030  * converter's mux index is the same for all pins on Intel platform
1031  */
1032 static int intel_cvt_id_to_mux_idx(struct hdmi_spec *spec,
1033                         hda_nid_t cvt_nid)
1034 {
1035         int i;
1036
1037         for (i = 0; i < spec->num_cvts; i++)
1038                 if (spec->cvt_nids[i] == cvt_nid)
1039                         return i;
1040         return -EINVAL;
1041 }
1042
1043 /* Intel HDMI workaround to fix audio routing issue:
1044  * For some Intel display codecs, pins share the same connection list.
1045  * So a conveter can be selected by multiple pins and playback on any of these
1046  * pins will generate sound on the external display, because audio flows from
1047  * the same converter to the display pipeline. Also muting one pin may make
1048  * other pins have no sound output.
1049  * So this function assures that an assigned converter for a pin is not selected
1050  * by any other pins.
1051  */
1052 static void intel_not_share_assigned_cvt(struct hda_codec *codec,
1053                                          hda_nid_t pin_nid,
1054                                          int dev_id, int mux_idx)
1055 {
1056         struct hdmi_spec *spec = codec->spec;
1057         hda_nid_t nid;
1058         int cvt_idx, curr;
1059         struct hdmi_spec_per_cvt *per_cvt;
1060         struct hdmi_spec_per_pin *per_pin;
1061         int pin_idx;
1062
1063         /* configure the pins connections */
1064         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
1065                 int dev_id_saved;
1066                 int dev_num;
1067
1068                 per_pin = get_pin(spec, pin_idx);
1069                 /*
1070                  * pin not connected to monitor
1071                  * no need to operate on it
1072                  */
1073                 if (!per_pin->pcm)
1074                         continue;
1075
1076                 if ((per_pin->pin_nid == pin_nid) &&
1077                         (per_pin->dev_id == dev_id))
1078                         continue;
1079
1080                 /*
1081                  * if per_pin->dev_id >= dev_num,
1082                  * snd_hda_get_dev_select() will fail,
1083                  * and the following operation is unpredictable.
1084                  * So skip this situation.
1085                  */
1086                 dev_num = snd_hda_get_num_devices(codec, per_pin->pin_nid) + 1;
1087                 if (per_pin->dev_id >= dev_num)
1088                         continue;
1089
1090                 nid = per_pin->pin_nid;
1091
1092                 /*
1093                  * Calling this function should not impact
1094                  * on the device entry selection
1095                  * So let's save the dev id for each pin,
1096                  * and restore it when return
1097                  */
1098                 dev_id_saved = snd_hda_get_dev_select(codec, nid);
1099                 snd_hda_set_dev_select(codec, nid, per_pin->dev_id);
1100                 curr = snd_hda_codec_read(codec, nid, 0,
1101                                           AC_VERB_GET_CONNECT_SEL, 0);
1102                 if (curr != mux_idx) {
1103                         snd_hda_set_dev_select(codec, nid, dev_id_saved);
1104                         continue;
1105                 }
1106
1107
1108                 /* choose an unassigned converter. The conveters in the
1109                  * connection list are in the same order as in the codec.
1110                  */
1111                 for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++) {
1112                         per_cvt = get_cvt(spec, cvt_idx);
1113                         if (!per_cvt->assigned) {
1114                                 codec_dbg(codec,
1115                                           "choose cvt %d for pin nid %d\n",
1116                                         cvt_idx, nid);
1117                                 snd_hda_codec_write_cache(codec, nid, 0,
1118                                             AC_VERB_SET_CONNECT_SEL,
1119                                             cvt_idx);
1120                                 break;
1121                         }
1122                 }
1123                 snd_hda_set_dev_select(codec, nid, dev_id_saved);
1124         }
1125 }
1126
1127 /* A wrapper of intel_not_share_asigned_cvt() */
1128 static void intel_not_share_assigned_cvt_nid(struct hda_codec *codec,
1129                         hda_nid_t pin_nid, int dev_id, hda_nid_t cvt_nid)
1130 {
1131         int mux_idx;
1132         struct hdmi_spec *spec = codec->spec;
1133
1134         /* On Intel platform, the mapping of converter nid to
1135          * mux index of the pins are always the same.
1136          * The pin nid may be 0, this means all pins will not
1137          * share the converter.
1138          */
1139         mux_idx = intel_cvt_id_to_mux_idx(spec, cvt_nid);
1140         if (mux_idx >= 0)
1141                 intel_not_share_assigned_cvt(codec, pin_nid, dev_id, mux_idx);
1142 }
1143
1144 /* skeleton caller of pin_cvt_fixup ops */
1145 static void pin_cvt_fixup(struct hda_codec *codec,
1146                           struct hdmi_spec_per_pin *per_pin,
1147                           hda_nid_t cvt_nid)
1148 {
1149         struct hdmi_spec *spec = codec->spec;
1150
1151         if (spec->ops.pin_cvt_fixup)
1152                 spec->ops.pin_cvt_fixup(codec, per_pin, cvt_nid);
1153 }
1154
1155 /* called in hdmi_pcm_open when no pin is assigned to the PCM
1156  * in dyn_pcm_assign mode.
1157  */
1158 static int hdmi_pcm_open_no_pin(struct hda_pcm_stream *hinfo,
1159                          struct hda_codec *codec,
1160                          struct snd_pcm_substream *substream)
1161 {
1162         struct hdmi_spec *spec = codec->spec;
1163         struct snd_pcm_runtime *runtime = substream->runtime;
1164         int cvt_idx, pcm_idx;
1165         struct hdmi_spec_per_cvt *per_cvt = NULL;
1166         int err;
1167
1168         pcm_idx = hinfo_to_pcm_index(codec, hinfo);
1169         if (pcm_idx < 0)
1170                 return -EINVAL;
1171
1172         err = hdmi_choose_cvt(codec, -1, &cvt_idx);
1173         if (err)
1174                 return err;
1175
1176         per_cvt = get_cvt(spec, cvt_idx);
1177         per_cvt->assigned = 1;
1178         hinfo->nid = per_cvt->cvt_nid;
1179
1180         pin_cvt_fixup(codec, NULL, per_cvt->cvt_nid);
1181
1182         set_bit(pcm_idx, &spec->pcm_in_use);
1183         /* todo: setup spdif ctls assign */
1184
1185         /* Initially set the converter's capabilities */
1186         hinfo->channels_min = per_cvt->channels_min;
1187         hinfo->channels_max = per_cvt->channels_max;
1188         hinfo->rates = per_cvt->rates;
1189         hinfo->formats = per_cvt->formats;
1190         hinfo->maxbps = per_cvt->maxbps;
1191
1192         /* Store the updated parameters */
1193         runtime->hw.channels_min = hinfo->channels_min;
1194         runtime->hw.channels_max = hinfo->channels_max;
1195         runtime->hw.formats = hinfo->formats;
1196         runtime->hw.rates = hinfo->rates;
1197
1198         snd_pcm_hw_constraint_step(substream->runtime, 0,
1199                                    SNDRV_PCM_HW_PARAM_CHANNELS, 2);
1200         return 0;
1201 }
1202
1203 /*
1204  * HDA PCM callbacks
1205  */
1206 static int hdmi_pcm_open(struct hda_pcm_stream *hinfo,
1207                          struct hda_codec *codec,
1208                          struct snd_pcm_substream *substream)
1209 {
1210         struct hdmi_spec *spec = codec->spec;
1211         struct snd_pcm_runtime *runtime = substream->runtime;
1212         int pin_idx, cvt_idx, pcm_idx;
1213         struct hdmi_spec_per_pin *per_pin;
1214         struct hdmi_eld *eld;
1215         struct hdmi_spec_per_cvt *per_cvt = NULL;
1216         int err;
1217
1218         /* Validate hinfo */
1219         pcm_idx = hinfo_to_pcm_index(codec, hinfo);
1220         if (pcm_idx < 0)
1221                 return -EINVAL;
1222
1223         mutex_lock(&spec->pcm_lock);
1224         pin_idx = hinfo_to_pin_index(codec, hinfo);
1225         if (!spec->dyn_pcm_assign) {
1226                 if (snd_BUG_ON(pin_idx < 0)) {
1227                         err = -EINVAL;
1228                         goto unlock;
1229                 }
1230         } else {
1231                 /* no pin is assigned to the PCM
1232                  * PA need pcm open successfully when probe
1233                  */
1234                 if (pin_idx < 0) {
1235                         err = hdmi_pcm_open_no_pin(hinfo, codec, substream);
1236                         goto unlock;
1237                 }
1238         }
1239
1240         err = hdmi_choose_cvt(codec, pin_idx, &cvt_idx);
1241         if (err < 0)
1242                 goto unlock;
1243
1244         per_cvt = get_cvt(spec, cvt_idx);
1245         /* Claim converter */
1246         per_cvt->assigned = 1;
1247
1248         set_bit(pcm_idx, &spec->pcm_in_use);
1249         per_pin = get_pin(spec, pin_idx);
1250         per_pin->cvt_nid = per_cvt->cvt_nid;
1251         hinfo->nid = per_cvt->cvt_nid;
1252
1253         /* flip stripe flag for the assigned stream if supported */
1254         if (get_wcaps(codec, per_cvt->cvt_nid) & AC_WCAP_STRIPE)
1255                 azx_stream(get_azx_dev(substream))->stripe = 1;
1256
1257         snd_hda_set_dev_select(codec, per_pin->pin_nid, per_pin->dev_id);
1258         snd_hda_codec_write_cache(codec, per_pin->pin_nid, 0,
1259                             AC_VERB_SET_CONNECT_SEL,
1260                             per_pin->mux_idx);
1261
1262         /* configure unused pins to choose other converters */
1263         pin_cvt_fixup(codec, per_pin, 0);
1264
1265         snd_hda_spdif_ctls_assign(codec, pcm_idx, per_cvt->cvt_nid);
1266
1267         /* Initially set the converter's capabilities */
1268         hinfo->channels_min = per_cvt->channels_min;
1269         hinfo->channels_max = per_cvt->channels_max;
1270         hinfo->rates = per_cvt->rates;
1271         hinfo->formats = per_cvt->formats;
1272         hinfo->maxbps = per_cvt->maxbps;
1273
1274         eld = &per_pin->sink_eld;
1275         /* Restrict capabilities by ELD if this isn't disabled */
1276         if (!static_hdmi_pcm && eld->eld_valid) {
1277                 snd_hdmi_eld_update_pcm_info(&eld->info, hinfo);
1278                 if (hinfo->channels_min > hinfo->channels_max ||
1279                     !hinfo->rates || !hinfo->formats) {
1280                         per_cvt->assigned = 0;
1281                         hinfo->nid = 0;
1282                         snd_hda_spdif_ctls_unassign(codec, pcm_idx);
1283                         err = -ENODEV;
1284                         goto unlock;
1285                 }
1286         }
1287
1288         /* Store the updated parameters */
1289         runtime->hw.channels_min = hinfo->channels_min;
1290         runtime->hw.channels_max = hinfo->channels_max;
1291         runtime->hw.formats = hinfo->formats;
1292         runtime->hw.rates = hinfo->rates;
1293
1294         snd_pcm_hw_constraint_step(substream->runtime, 0,
1295                                    SNDRV_PCM_HW_PARAM_CHANNELS, 2);
1296  unlock:
1297         mutex_unlock(&spec->pcm_lock);
1298         return err;
1299 }
1300
1301 /*
1302  * HDA/HDMI auto parsing
1303  */
1304 static int hdmi_read_pin_conn(struct hda_codec *codec, int pin_idx)
1305 {
1306         struct hdmi_spec *spec = codec->spec;
1307         struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
1308         hda_nid_t pin_nid = per_pin->pin_nid;
1309         int dev_id = per_pin->dev_id;
1310         int conns;
1311
1312         if (!(get_wcaps(codec, pin_nid) & AC_WCAP_CONN_LIST)) {
1313                 codec_warn(codec,
1314                            "HDMI: pin %d wcaps %#x does not support connection list\n",
1315                            pin_nid, get_wcaps(codec, pin_nid));
1316                 return -EINVAL;
1317         }
1318
1319         snd_hda_set_dev_select(codec, pin_nid, dev_id);
1320
1321         if (spec->intel_hsw_fixup) {
1322                 conns = spec->num_cvts;
1323                 memcpy(per_pin->mux_nids, spec->cvt_nids,
1324                        sizeof(hda_nid_t) * conns);
1325         } else {
1326                 conns = snd_hda_get_raw_connections(codec, pin_nid,
1327                                                     per_pin->mux_nids,
1328                                                     HDA_MAX_CONNECTIONS);
1329         }
1330
1331         /* all the device entries on the same pin have the same conn list */
1332         per_pin->num_mux_nids = conns;
1333
1334         return 0;
1335 }
1336
1337 static int hdmi_find_pcm_slot(struct hdmi_spec *spec,
1338                               struct hdmi_spec_per_pin *per_pin)
1339 {
1340         int i;
1341
1342         /*
1343          * generic_hdmi_build_pcms() may allocate extra PCMs on some
1344          * platforms (with maximum of 'num_nids + dev_num - 1')
1345          *
1346          * The per_pin of pin_nid_idx=n and dev_id=m prefers to get pcm-n
1347          * if m==0. This guarantees that dynamic pcm assignments are compatible
1348          * with the legacy static per_pin-pcm assignment that existed in the
1349          * days before DP-MST.
1350          *
1351          * Intel DP-MST prefers this legacy behavior for compatibility, too.
1352          *
1353          * per_pin of m!=0 prefers to get pcm=(num_nids + (m - 1)).
1354          */
1355
1356         if (per_pin->dev_id == 0 || spec->intel_hsw_fixup) {
1357                 if (!test_bit(per_pin->pin_nid_idx, &spec->pcm_bitmap))
1358                         return per_pin->pin_nid_idx;
1359         } else {
1360                 i = spec->num_nids + (per_pin->dev_id - 1);
1361                 if (i < spec->pcm_used && !(test_bit(i, &spec->pcm_bitmap)))
1362                         return i;
1363         }
1364
1365         /* have a second try; check the area over num_nids */
1366         for (i = spec->num_nids; i < spec->pcm_used; i++) {
1367                 if (!test_bit(i, &spec->pcm_bitmap))
1368                         return i;
1369         }
1370
1371         /* the last try; check the empty slots in pins */
1372         for (i = 0; i < spec->num_nids; i++) {
1373                 if (!test_bit(i, &spec->pcm_bitmap))
1374                         return i;
1375         }
1376         return -EBUSY;
1377 }
1378
1379 static void hdmi_attach_hda_pcm(struct hdmi_spec *spec,
1380                                 struct hdmi_spec_per_pin *per_pin)
1381 {
1382         int idx;
1383
1384         /* pcm already be attached to the pin */
1385         if (per_pin->pcm)
1386                 return;
1387         idx = hdmi_find_pcm_slot(spec, per_pin);
1388         if (idx == -EBUSY)
1389                 return;
1390         per_pin->pcm_idx = idx;
1391         per_pin->pcm = get_hdmi_pcm(spec, idx);
1392         set_bit(idx, &spec->pcm_bitmap);
1393 }
1394
1395 static void hdmi_detach_hda_pcm(struct hdmi_spec *spec,
1396                                 struct hdmi_spec_per_pin *per_pin)
1397 {
1398         int idx;
1399
1400         /* pcm already be detached from the pin */
1401         if (!per_pin->pcm)
1402                 return;
1403         idx = per_pin->pcm_idx;
1404         per_pin->pcm_idx = -1;
1405         per_pin->pcm = NULL;
1406         if (idx >= 0 && idx < spec->pcm_used)
1407                 clear_bit(idx, &spec->pcm_bitmap);
1408 }
1409
1410 static int hdmi_get_pin_cvt_mux(struct hdmi_spec *spec,
1411                 struct hdmi_spec_per_pin *per_pin, hda_nid_t cvt_nid)
1412 {
1413         int mux_idx;
1414
1415         for (mux_idx = 0; mux_idx < per_pin->num_mux_nids; mux_idx++)
1416                 if (per_pin->mux_nids[mux_idx] == cvt_nid)
1417                         break;
1418         return mux_idx;
1419 }
1420
1421 static bool check_non_pcm_per_cvt(struct hda_codec *codec, hda_nid_t cvt_nid);
1422
1423 static void hdmi_pcm_setup_pin(struct hdmi_spec *spec,
1424                            struct hdmi_spec_per_pin *per_pin)
1425 {
1426         struct hda_codec *codec = per_pin->codec;
1427         struct hda_pcm *pcm;
1428         struct hda_pcm_stream *hinfo;
1429         struct snd_pcm_substream *substream;
1430         int mux_idx;
1431         bool non_pcm;
1432
1433         if (per_pin->pcm_idx >= 0 && per_pin->pcm_idx < spec->pcm_used)
1434                 pcm = get_pcm_rec(spec, per_pin->pcm_idx);
1435         else
1436                 return;
1437         if (!pcm->pcm)
1438                 return;
1439         if (!test_bit(per_pin->pcm_idx, &spec->pcm_in_use))
1440                 return;
1441
1442         /* hdmi audio only uses playback and one substream */
1443         hinfo = pcm->stream;
1444         substream = pcm->pcm->streams[0].substream;
1445
1446         per_pin->cvt_nid = hinfo->nid;
1447
1448         mux_idx = hdmi_get_pin_cvt_mux(spec, per_pin, hinfo->nid);
1449         if (mux_idx < per_pin->num_mux_nids) {
1450                 snd_hda_set_dev_select(codec, per_pin->pin_nid,
1451                                    per_pin->dev_id);
1452                 snd_hda_codec_write_cache(codec, per_pin->pin_nid, 0,
1453                                 AC_VERB_SET_CONNECT_SEL,
1454                                 mux_idx);
1455         }
1456         snd_hda_spdif_ctls_assign(codec, per_pin->pcm_idx, hinfo->nid);
1457
1458         non_pcm = check_non_pcm_per_cvt(codec, hinfo->nid);
1459         if (substream->runtime)
1460                 per_pin->channels = substream->runtime->channels;
1461         per_pin->setup = true;
1462         per_pin->mux_idx = mux_idx;
1463
1464         hdmi_setup_audio_infoframe(codec, per_pin, non_pcm);
1465 }
1466
1467 static void hdmi_pcm_reset_pin(struct hdmi_spec *spec,
1468                            struct hdmi_spec_per_pin *per_pin)
1469 {
1470         if (per_pin->pcm_idx >= 0 && per_pin->pcm_idx < spec->pcm_used)
1471                 snd_hda_spdif_ctls_unassign(per_pin->codec, per_pin->pcm_idx);
1472
1473         per_pin->chmap_set = false;
1474         memset(per_pin->chmap, 0, sizeof(per_pin->chmap));
1475
1476         per_pin->setup = false;
1477         per_pin->channels = 0;
1478 }
1479
1480 static struct snd_jack *pin_idx_to_pcm_jack(struct hda_codec *codec,
1481                                             struct hdmi_spec_per_pin *per_pin)
1482 {
1483         struct hdmi_spec *spec = codec->spec;
1484
1485         if (per_pin->pcm_idx >= 0)
1486                 return spec->pcm_rec[per_pin->pcm_idx].jack;
1487         else
1488                 return NULL;
1489 }
1490
1491 /* update per_pin ELD from the given new ELD;
1492  * setup info frame and notification accordingly
1493  * also notify ELD kctl and report jack status changes
1494  */
1495 static void update_eld(struct hda_codec *codec,
1496                        struct hdmi_spec_per_pin *per_pin,
1497                        struct hdmi_eld *eld,
1498                        int repoll)
1499 {
1500         struct hdmi_eld *pin_eld = &per_pin->sink_eld;
1501         struct hdmi_spec *spec = codec->spec;
1502         struct snd_jack *pcm_jack;
1503         bool old_eld_valid = pin_eld->eld_valid;
1504         bool eld_changed;
1505         int pcm_idx;
1506
1507         if (eld->eld_valid) {
1508                 if (eld->eld_size <= 0 ||
1509                     snd_hdmi_parse_eld(codec, &eld->info, eld->eld_buffer,
1510                                        eld->eld_size) < 0) {
1511                         eld->eld_valid = false;
1512                         if (repoll) {
1513                                 schedule_delayed_work(&per_pin->work,
1514                                                       msecs_to_jiffies(300));
1515                                 return;
1516                         }
1517                 }
1518         }
1519
1520         if (!eld->eld_valid || eld->eld_size <= 0) {
1521                 eld->eld_valid = false;
1522                 eld->eld_size = 0;
1523         }
1524
1525         /* for monitor disconnection, save pcm_idx firstly */
1526         pcm_idx = per_pin->pcm_idx;
1527
1528         /*
1529          * pcm_idx >=0 before update_eld() means it is in monitor
1530          * disconnected event. Jack must be fetched before update_eld().
1531          */
1532         pcm_jack = pin_idx_to_pcm_jack(codec, per_pin);
1533
1534         if (spec->dyn_pcm_assign) {
1535                 if (eld->eld_valid) {
1536                         hdmi_attach_hda_pcm(spec, per_pin);
1537                         hdmi_pcm_setup_pin(spec, per_pin);
1538                 } else {
1539                         hdmi_pcm_reset_pin(spec, per_pin);
1540                         hdmi_detach_hda_pcm(spec, per_pin);
1541                 }
1542         }
1543         /* if pcm_idx == -1, it means this is in monitor connection event
1544          * we can get the correct pcm_idx now.
1545          */
1546         if (pcm_idx == -1)
1547                 pcm_idx = per_pin->pcm_idx;
1548         if (!pcm_jack)
1549                 pcm_jack = pin_idx_to_pcm_jack(codec, per_pin);
1550
1551         if (eld->eld_valid)
1552                 snd_hdmi_show_eld(codec, &eld->info);
1553
1554         eld_changed = (pin_eld->eld_valid != eld->eld_valid);
1555         eld_changed |= (pin_eld->monitor_present != eld->monitor_present);
1556         if (!eld_changed && eld->eld_valid && pin_eld->eld_valid)
1557                 if (pin_eld->eld_size != eld->eld_size ||
1558                     memcmp(pin_eld->eld_buffer, eld->eld_buffer,
1559                            eld->eld_size) != 0)
1560                         eld_changed = true;
1561
1562         if (eld_changed) {
1563                 pin_eld->monitor_present = eld->monitor_present;
1564                 pin_eld->eld_valid = eld->eld_valid;
1565                 pin_eld->eld_size = eld->eld_size;
1566                 if (eld->eld_valid)
1567                         memcpy(pin_eld->eld_buffer, eld->eld_buffer,
1568                                eld->eld_size);
1569                 pin_eld->info = eld->info;
1570         }
1571
1572         /*
1573          * Re-setup pin and infoframe. This is needed e.g. when
1574          * - sink is first plugged-in
1575          * - transcoder can change during stream playback on Haswell
1576          *   and this can make HW reset converter selection on a pin.
1577          */
1578         if (eld->eld_valid && !old_eld_valid && per_pin->setup) {
1579                 pin_cvt_fixup(codec, per_pin, 0);
1580                 hdmi_setup_audio_infoframe(codec, per_pin, per_pin->non_pcm);
1581         }
1582
1583         if (eld_changed && pcm_idx >= 0)
1584                 snd_ctl_notify(codec->card,
1585                                SNDRV_CTL_EVENT_MASK_VALUE |
1586                                SNDRV_CTL_EVENT_MASK_INFO,
1587                                &get_hdmi_pcm(spec, pcm_idx)->eld_ctl->id);
1588
1589         if (eld_changed && pcm_jack)
1590                 snd_jack_report(pcm_jack,
1591                                 (eld->monitor_present && eld->eld_valid) ?
1592                                 SND_JACK_AVOUT : 0);
1593 }
1594
1595 /* update ELD and jack state via HD-audio verbs */
1596 static void hdmi_present_sense_via_verbs(struct hdmi_spec_per_pin *per_pin,
1597                                          int repoll)
1598 {
1599         struct hda_codec *codec = per_pin->codec;
1600         struct hdmi_spec *spec = codec->spec;
1601         struct hdmi_eld *eld = &spec->temp_eld;
1602         hda_nid_t pin_nid = per_pin->pin_nid;
1603         int dev_id = per_pin->dev_id;
1604         /*
1605          * Always execute a GetPinSense verb here, even when called from
1606          * hdmi_intrinsic_event; for some NVIDIA HW, the unsolicited
1607          * response's PD bit is not the real PD value, but indicates that
1608          * the real PD value changed. An older version of the HD-audio
1609          * specification worked this way. Hence, we just ignore the data in
1610          * the unsolicited response to avoid custom WARs.
1611          */
1612         int present;
1613         int ret;
1614
1615         ret = snd_hda_power_up_pm(codec);
1616         if (ret < 0 && pm_runtime_suspended(hda_codec_dev(codec)))
1617                 goto out;
1618
1619         present = snd_hda_jack_pin_sense(codec, pin_nid, dev_id);
1620
1621         mutex_lock(&per_pin->lock);
1622         eld->monitor_present = !!(present & AC_PINSENSE_PRESENCE);
1623         if (eld->monitor_present)
1624                 eld->eld_valid  = !!(present & AC_PINSENSE_ELDV);
1625         else
1626                 eld->eld_valid = false;
1627
1628         codec_dbg(codec,
1629                 "HDMI status: Codec=%d Pin=%d Presence_Detect=%d ELD_Valid=%d\n",
1630                 codec->addr, pin_nid, eld->monitor_present, eld->eld_valid);
1631
1632         if (eld->eld_valid) {
1633                 if (spec->ops.pin_get_eld(codec, pin_nid, dev_id,
1634                                           eld->eld_buffer, &eld->eld_size) < 0)
1635                         eld->eld_valid = false;
1636         }
1637
1638         update_eld(codec, per_pin, eld, repoll);
1639         mutex_unlock(&per_pin->lock);
1640  out:
1641         snd_hda_power_down_pm(codec);
1642 }
1643
1644 static void silent_stream_enable(struct hda_codec *codec,
1645                                 struct hdmi_spec_per_pin *per_pin)
1646 {
1647         unsigned int newval, oldval;
1648
1649         codec_dbg(codec, "hdmi: enabling silent stream for NID %d\n",
1650                         per_pin->pin_nid);
1651
1652         mutex_lock(&per_pin->lock);
1653
1654         if (!per_pin->channels)
1655                 per_pin->channels = 2;
1656
1657         oldval = snd_hda_codec_read(codec, per_pin->pin_nid, 0,
1658                         AC_VERB_GET_CONV, 0);
1659         newval = (oldval & 0xF0) | 0xF;
1660         snd_hda_codec_write(codec, per_pin->pin_nid, 0,
1661                         AC_VERB_SET_CHANNEL_STREAMID, newval);
1662
1663         hdmi_setup_audio_infoframe(codec, per_pin, per_pin->non_pcm);
1664
1665         mutex_unlock(&per_pin->lock);
1666 }
1667
1668 /* update ELD and jack state via audio component */
1669 static void sync_eld_via_acomp(struct hda_codec *codec,
1670                                struct hdmi_spec_per_pin *per_pin)
1671 {
1672         struct hdmi_spec *spec = codec->spec;
1673         struct hdmi_eld *eld = &spec->temp_eld;
1674         bool monitor_prev, monitor_next;
1675
1676         mutex_lock(&per_pin->lock);
1677         eld->monitor_present = false;
1678         monitor_prev = per_pin->sink_eld.monitor_present;
1679         eld->eld_size = snd_hdac_acomp_get_eld(&codec->core, per_pin->pin_nid,
1680                                       per_pin->dev_id, &eld->monitor_present,
1681                                       eld->eld_buffer, ELD_MAX_SIZE);
1682         eld->eld_valid = (eld->eld_size > 0);
1683         update_eld(codec, per_pin, eld, 0);
1684         monitor_next = per_pin->sink_eld.monitor_present;
1685         mutex_unlock(&per_pin->lock);
1686
1687         /*
1688          * Power-up will call hdmi_present_sense, so the PM calls
1689          * have to be done without mutex held.
1690          */
1691
1692         if (spec->send_silent_stream) {
1693                 int pm_ret;
1694
1695                 if (!monitor_prev && monitor_next) {
1696                         pm_ret = snd_hda_power_up_pm(codec);
1697                         if (pm_ret < 0)
1698                                 codec_err(codec,
1699                                 "Monitor plugged-in, Failed to power up codec ret=[%d]\n",
1700                                 pm_ret);
1701                         silent_stream_enable(codec, per_pin);
1702                 } else if (monitor_prev && !monitor_next) {
1703                         pm_ret = snd_hda_power_down_pm(codec);
1704                         if (pm_ret < 0)
1705                                 codec_err(codec,
1706                                 "Monitor plugged-out, Failed to power down codec ret=[%d]\n",
1707                                 pm_ret);
1708                 }
1709         }
1710 }
1711
1712 static void hdmi_present_sense(struct hdmi_spec_per_pin *per_pin, int repoll)
1713 {
1714         struct hda_codec *codec = per_pin->codec;
1715
1716         if (!codec_has_acomp(codec))
1717                 hdmi_present_sense_via_verbs(per_pin, repoll);
1718         else
1719                 sync_eld_via_acomp(codec, per_pin);
1720 }
1721
1722 static void hdmi_repoll_eld(struct work_struct *work)
1723 {
1724         struct hdmi_spec_per_pin *per_pin =
1725         container_of(to_delayed_work(work), struct hdmi_spec_per_pin, work);
1726         struct hda_codec *codec = per_pin->codec;
1727         struct hdmi_spec *spec = codec->spec;
1728         struct hda_jack_tbl *jack;
1729
1730         jack = snd_hda_jack_tbl_get_mst(codec, per_pin->pin_nid,
1731                                         per_pin->dev_id);
1732         if (jack)
1733                 jack->jack_dirty = 1;
1734
1735         if (per_pin->repoll_count++ > 6)
1736                 per_pin->repoll_count = 0;
1737
1738         mutex_lock(&spec->pcm_lock);
1739         hdmi_present_sense(per_pin, per_pin->repoll_count);
1740         mutex_unlock(&spec->pcm_lock);
1741 }
1742
1743 static int hdmi_add_pin(struct hda_codec *codec, hda_nid_t pin_nid)
1744 {
1745         struct hdmi_spec *spec = codec->spec;
1746         unsigned int caps, config;
1747         int pin_idx;
1748         struct hdmi_spec_per_pin *per_pin;
1749         int err;
1750         int dev_num, i;
1751
1752         caps = snd_hda_query_pin_caps(codec, pin_nid);
1753         if (!(caps & (AC_PINCAP_HDMI | AC_PINCAP_DP)))
1754                 return 0;
1755
1756         /*
1757          * For DP MST audio, Configuration Default is the same for
1758          * all device entries on the same pin
1759          */
1760         config = snd_hda_codec_get_pincfg(codec, pin_nid);
1761         if (get_defcfg_connect(config) == AC_JACK_PORT_NONE)
1762                 return 0;
1763
1764         /*
1765          * To simplify the implementation, malloc all
1766          * the virtual pins in the initialization statically
1767          */
1768         if (spec->intel_hsw_fixup) {
1769                 /*
1770                  * On Intel platforms, device entries number is
1771                  * changed dynamically. If there is a DP MST
1772                  * hub connected, the device entries number is 3.
1773                  * Otherwise, it is 1.
1774                  * Here we manually set dev_num to 3, so that
1775                  * we can initialize all the device entries when
1776                  * bootup statically.
1777                  */
1778                 dev_num = 3;
1779                 spec->dev_num = 3;
1780         } else if (spec->dyn_pcm_assign && codec->dp_mst) {
1781                 dev_num = snd_hda_get_num_devices(codec, pin_nid) + 1;
1782                 /*
1783                  * spec->dev_num is the maxinum number of device entries
1784                  * among all the pins
1785                  */
1786                 spec->dev_num = (spec->dev_num > dev_num) ?
1787                         spec->dev_num : dev_num;
1788         } else {
1789                 /*
1790                  * If the platform doesn't support DP MST,
1791                  * manually set dev_num to 1. This means
1792                  * the pin has only one device entry.
1793                  */
1794                 dev_num = 1;
1795                 spec->dev_num = 1;
1796         }
1797
1798         for (i = 0; i < dev_num; i++) {
1799                 pin_idx = spec->num_pins;
1800                 per_pin = snd_array_new(&spec->pins);
1801
1802                 if (!per_pin)
1803                         return -ENOMEM;
1804
1805                 if (spec->dyn_pcm_assign) {
1806                         per_pin->pcm = NULL;
1807                         per_pin->pcm_idx = -1;
1808                 } else {
1809                         per_pin->pcm = get_hdmi_pcm(spec, pin_idx);
1810                         per_pin->pcm_idx = pin_idx;
1811                 }
1812                 per_pin->pin_nid = pin_nid;
1813                 per_pin->pin_nid_idx = spec->num_nids;
1814                 per_pin->dev_id = i;
1815                 per_pin->non_pcm = false;
1816                 snd_hda_set_dev_select(codec, pin_nid, i);
1817                 err = hdmi_read_pin_conn(codec, pin_idx);
1818                 if (err < 0)
1819                         return err;
1820                 spec->num_pins++;
1821         }
1822         spec->num_nids++;
1823
1824         return 0;
1825 }
1826
1827 static int hdmi_add_cvt(struct hda_codec *codec, hda_nid_t cvt_nid)
1828 {
1829         struct hdmi_spec *spec = codec->spec;
1830         struct hdmi_spec_per_cvt *per_cvt;
1831         unsigned int chans;
1832         int err;
1833
1834         chans = get_wcaps(codec, cvt_nid);
1835         chans = get_wcaps_channels(chans);
1836
1837         per_cvt = snd_array_new(&spec->cvts);
1838         if (!per_cvt)
1839                 return -ENOMEM;
1840
1841         per_cvt->cvt_nid = cvt_nid;
1842         per_cvt->channels_min = 2;
1843         if (chans <= 16) {
1844                 per_cvt->channels_max = chans;
1845                 if (chans > spec->chmap.channels_max)
1846                         spec->chmap.channels_max = chans;
1847         }
1848
1849         err = snd_hda_query_supported_pcm(codec, cvt_nid,
1850                                           &per_cvt->rates,
1851                                           &per_cvt->formats,
1852                                           &per_cvt->maxbps);
1853         if (err < 0)
1854                 return err;
1855
1856         if (spec->num_cvts < ARRAY_SIZE(spec->cvt_nids))
1857                 spec->cvt_nids[spec->num_cvts] = cvt_nid;
1858         spec->num_cvts++;
1859
1860         return 0;
1861 }
1862
1863 static int hdmi_parse_codec(struct hda_codec *codec)
1864 {
1865         hda_nid_t start_nid;
1866         unsigned int caps;
1867         int i, nodes;
1868
1869         nodes = snd_hda_get_sub_nodes(codec, codec->core.afg, &start_nid);
1870         if (!start_nid || nodes < 0) {
1871                 codec_warn(codec, "HDMI: failed to get afg sub nodes\n");
1872                 return -EINVAL;
1873         }
1874
1875         /*
1876          * hdmi_add_pin() assumes total amount of converters to
1877          * be known, so first discover all converters
1878          */
1879         for (i = 0; i < nodes; i++) {
1880                 hda_nid_t nid = start_nid + i;
1881
1882                 caps = get_wcaps(codec, nid);
1883
1884                 if (!(caps & AC_WCAP_DIGITAL))
1885                         continue;
1886
1887                 if (get_wcaps_type(caps) == AC_WID_AUD_OUT)
1888                         hdmi_add_cvt(codec, nid);
1889         }
1890
1891         /* discover audio pins */
1892         for (i = 0; i < nodes; i++) {
1893                 hda_nid_t nid = start_nid + i;
1894
1895                 caps = get_wcaps(codec, nid);
1896
1897                 if (!(caps & AC_WCAP_DIGITAL))
1898                         continue;
1899
1900                 if (get_wcaps_type(caps) == AC_WID_PIN)
1901                         hdmi_add_pin(codec, nid);
1902         }
1903
1904         return 0;
1905 }
1906
1907 /*
1908  */
1909 static bool check_non_pcm_per_cvt(struct hda_codec *codec, hda_nid_t cvt_nid)
1910 {
1911         struct hda_spdif_out *spdif;
1912         bool non_pcm;
1913
1914         mutex_lock(&codec->spdif_mutex);
1915         spdif = snd_hda_spdif_out_of_nid(codec, cvt_nid);
1916         /* Add sanity check to pass klockwork check.
1917          * This should never happen.
1918          */
1919         if (WARN_ON(spdif == NULL)) {
1920                 mutex_unlock(&codec->spdif_mutex);
1921                 return true;
1922         }
1923         non_pcm = !!(spdif->status & IEC958_AES0_NONAUDIO);
1924         mutex_unlock(&codec->spdif_mutex);
1925         return non_pcm;
1926 }
1927
1928 /*
1929  * HDMI callbacks
1930  */
1931
1932 static int generic_hdmi_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
1933                                            struct hda_codec *codec,
1934                                            unsigned int stream_tag,
1935                                            unsigned int format,
1936                                            struct snd_pcm_substream *substream)
1937 {
1938         hda_nid_t cvt_nid = hinfo->nid;
1939         struct hdmi_spec *spec = codec->spec;
1940         int pin_idx;
1941         struct hdmi_spec_per_pin *per_pin;
1942         struct snd_pcm_runtime *runtime = substream->runtime;
1943         bool non_pcm;
1944         int pinctl, stripe;
1945         int err = 0;
1946
1947         mutex_lock(&spec->pcm_lock);
1948         pin_idx = hinfo_to_pin_index(codec, hinfo);
1949         if (spec->dyn_pcm_assign && pin_idx < 0) {
1950                 /* when dyn_pcm_assign and pcm is not bound to a pin
1951                  * skip pin setup and return 0 to make audio playback
1952                  * be ongoing
1953                  */
1954                 pin_cvt_fixup(codec, NULL, cvt_nid);
1955                 snd_hda_codec_setup_stream(codec, cvt_nid,
1956                                         stream_tag, 0, format);
1957                 goto unlock;
1958         }
1959
1960         if (snd_BUG_ON(pin_idx < 0)) {
1961                 err = -EINVAL;
1962                 goto unlock;
1963         }
1964         per_pin = get_pin(spec, pin_idx);
1965
1966         /* Verify pin:cvt selections to avoid silent audio after S3.
1967          * After S3, the audio driver restores pin:cvt selections
1968          * but this can happen before gfx is ready and such selection
1969          * is overlooked by HW. Thus multiple pins can share a same
1970          * default convertor and mute control will affect each other,
1971          * which can cause a resumed audio playback become silent
1972          * after S3.
1973          */
1974         pin_cvt_fixup(codec, per_pin, 0);
1975
1976         /* Call sync_audio_rate to set the N/CTS/M manually if necessary */
1977         /* Todo: add DP1.2 MST audio support later */
1978         if (codec_has_acomp(codec))
1979                 snd_hdac_sync_audio_rate(&codec->core, per_pin->pin_nid,
1980                                          per_pin->dev_id, runtime->rate);
1981
1982         non_pcm = check_non_pcm_per_cvt(codec, cvt_nid);
1983         mutex_lock(&per_pin->lock);
1984         per_pin->channels = substream->runtime->channels;
1985         per_pin->setup = true;
1986
1987         if (get_wcaps(codec, cvt_nid) & AC_WCAP_STRIPE) {
1988                 stripe = snd_hdac_get_stream_stripe_ctl(&codec->bus->core,
1989                                                         substream);
1990                 snd_hda_codec_write(codec, cvt_nid, 0,
1991                                     AC_VERB_SET_STRIPE_CONTROL,
1992                                     stripe);
1993         }
1994
1995         hdmi_setup_audio_infoframe(codec, per_pin, non_pcm);
1996         mutex_unlock(&per_pin->lock);
1997         if (spec->dyn_pin_out) {
1998                 snd_hda_set_dev_select(codec, per_pin->pin_nid,
1999                                        per_pin->dev_id);
2000                 pinctl = snd_hda_codec_read(codec, per_pin->pin_nid, 0,
2001                                             AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
2002                 snd_hda_codec_write(codec, per_pin->pin_nid, 0,
2003                                     AC_VERB_SET_PIN_WIDGET_CONTROL,
2004                                     pinctl | PIN_OUT);
2005         }
2006
2007         /* snd_hda_set_dev_select() has been called before */
2008         err = spec->ops.setup_stream(codec, cvt_nid, per_pin->pin_nid,
2009                                      per_pin->dev_id, stream_tag, format);
2010  unlock:
2011         mutex_unlock(&spec->pcm_lock);
2012         return err;
2013 }
2014
2015 static int generic_hdmi_playback_pcm_cleanup(struct hda_pcm_stream *hinfo,
2016                                              struct hda_codec *codec,
2017                                              struct snd_pcm_substream *substream)
2018 {
2019         snd_hda_codec_cleanup_stream(codec, hinfo->nid);
2020         return 0;
2021 }
2022
2023 static int hdmi_pcm_close(struct hda_pcm_stream *hinfo,
2024                           struct hda_codec *codec,
2025                           struct snd_pcm_substream *substream)
2026 {
2027         struct hdmi_spec *spec = codec->spec;
2028         int cvt_idx, pin_idx, pcm_idx;
2029         struct hdmi_spec_per_cvt *per_cvt;
2030         struct hdmi_spec_per_pin *per_pin;
2031         int pinctl;
2032         int err = 0;
2033
2034         if (hinfo->nid) {
2035                 pcm_idx = hinfo_to_pcm_index(codec, hinfo);
2036                 if (snd_BUG_ON(pcm_idx < 0))
2037                         return -EINVAL;
2038                 cvt_idx = cvt_nid_to_cvt_index(codec, hinfo->nid);
2039                 if (snd_BUG_ON(cvt_idx < 0))
2040                         return -EINVAL;
2041                 per_cvt = get_cvt(spec, cvt_idx);
2042
2043                 snd_BUG_ON(!per_cvt->assigned);
2044                 per_cvt->assigned = 0;
2045                 hinfo->nid = 0;
2046
2047                 azx_stream(get_azx_dev(substream))->stripe = 0;
2048
2049                 mutex_lock(&spec->pcm_lock);
2050                 snd_hda_spdif_ctls_unassign(codec, pcm_idx);
2051                 clear_bit(pcm_idx, &spec->pcm_in_use);
2052                 pin_idx = hinfo_to_pin_index(codec, hinfo);
2053                 if (spec->dyn_pcm_assign && pin_idx < 0)
2054                         goto unlock;
2055
2056                 if (snd_BUG_ON(pin_idx < 0)) {
2057                         err = -EINVAL;
2058                         goto unlock;
2059                 }
2060                 per_pin = get_pin(spec, pin_idx);
2061
2062                 if (spec->dyn_pin_out) {
2063                         snd_hda_set_dev_select(codec, per_pin->pin_nid,
2064                                                per_pin->dev_id);
2065                         pinctl = snd_hda_codec_read(codec, per_pin->pin_nid, 0,
2066                                         AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
2067                         snd_hda_codec_write(codec, per_pin->pin_nid, 0,
2068                                             AC_VERB_SET_PIN_WIDGET_CONTROL,
2069                                             pinctl & ~PIN_OUT);
2070                 }
2071
2072                 mutex_lock(&per_pin->lock);
2073                 per_pin->chmap_set = false;
2074                 memset(per_pin->chmap, 0, sizeof(per_pin->chmap));
2075
2076                 per_pin->setup = false;
2077                 per_pin->channels = 0;
2078                 mutex_unlock(&per_pin->lock);
2079         unlock:
2080                 mutex_unlock(&spec->pcm_lock);
2081         }
2082
2083         return err;
2084 }
2085
2086 static const struct hda_pcm_ops generic_ops = {
2087         .open = hdmi_pcm_open,
2088         .close = hdmi_pcm_close,
2089         .prepare = generic_hdmi_playback_pcm_prepare,
2090         .cleanup = generic_hdmi_playback_pcm_cleanup,
2091 };
2092
2093 static int hdmi_get_spk_alloc(struct hdac_device *hdac, int pcm_idx)
2094 {
2095         struct hda_codec *codec = hdac_to_hda_codec(hdac);
2096         struct hdmi_spec *spec = codec->spec;
2097         struct hdmi_spec_per_pin *per_pin = pcm_idx_to_pin(spec, pcm_idx);
2098
2099         if (!per_pin)
2100                 return 0;
2101
2102         return per_pin->sink_eld.info.spk_alloc;
2103 }
2104
2105 static void hdmi_get_chmap(struct hdac_device *hdac, int pcm_idx,
2106                                         unsigned char *chmap)
2107 {
2108         struct hda_codec *codec = hdac_to_hda_codec(hdac);
2109         struct hdmi_spec *spec = codec->spec;
2110         struct hdmi_spec_per_pin *per_pin = pcm_idx_to_pin(spec, pcm_idx);
2111
2112         /* chmap is already set to 0 in caller */
2113         if (!per_pin)
2114                 return;
2115
2116         memcpy(chmap, per_pin->chmap, ARRAY_SIZE(per_pin->chmap));
2117 }
2118
2119 static void hdmi_set_chmap(struct hdac_device *hdac, int pcm_idx,
2120                                 unsigned char *chmap, int prepared)
2121 {
2122         struct hda_codec *codec = hdac_to_hda_codec(hdac);
2123         struct hdmi_spec *spec = codec->spec;
2124         struct hdmi_spec_per_pin *per_pin = pcm_idx_to_pin(spec, pcm_idx);
2125
2126         if (!per_pin)
2127                 return;
2128         mutex_lock(&per_pin->lock);
2129         per_pin->chmap_set = true;
2130         memcpy(per_pin->chmap, chmap, ARRAY_SIZE(per_pin->chmap));
2131         if (prepared)
2132                 hdmi_setup_audio_infoframe(codec, per_pin, per_pin->non_pcm);
2133         mutex_unlock(&per_pin->lock);
2134 }
2135
2136 static bool is_hdmi_pcm_attached(struct hdac_device *hdac, int pcm_idx)
2137 {
2138         struct hda_codec *codec = hdac_to_hda_codec(hdac);
2139         struct hdmi_spec *spec = codec->spec;
2140         struct hdmi_spec_per_pin *per_pin = pcm_idx_to_pin(spec, pcm_idx);
2141
2142         return per_pin ? true:false;
2143 }
2144
2145 static int generic_hdmi_build_pcms(struct hda_codec *codec)
2146 {
2147         struct hdmi_spec *spec = codec->spec;
2148         int idx, pcm_num;
2149
2150         /*
2151          * for non-mst mode, pcm number is the same as before
2152          * for DP MST mode without extra PCM, pcm number is same
2153          * for DP MST mode with extra PCMs, pcm number is
2154          *  (nid number + dev_num - 1)
2155          * dev_num is the device entry number in a pin
2156          */
2157
2158         if (codec->mst_no_extra_pcms)
2159                 pcm_num = spec->num_nids;
2160         else
2161                 pcm_num = spec->num_nids + spec->dev_num - 1;
2162
2163         codec_dbg(codec, "hdmi: pcm_num set to %d\n", pcm_num);
2164
2165         for (idx = 0; idx < pcm_num; idx++) {
2166                 struct hda_pcm *info;
2167                 struct hda_pcm_stream *pstr;
2168
2169                 info = snd_hda_codec_pcm_new(codec, "HDMI %d", idx);
2170                 if (!info)
2171                         return -ENOMEM;
2172
2173                 spec->pcm_rec[idx].pcm = info;
2174                 spec->pcm_used++;
2175                 info->pcm_type = HDA_PCM_TYPE_HDMI;
2176                 info->own_chmap = true;
2177
2178                 pstr = &info->stream[SNDRV_PCM_STREAM_PLAYBACK];
2179                 pstr->substreams = 1;
2180                 pstr->ops = generic_ops;
2181                 /* pcm number is less than 16 */
2182                 if (spec->pcm_used >= 16)
2183                         break;
2184                 /* other pstr fields are set in open */
2185         }
2186
2187         return 0;
2188 }
2189
2190 static void free_hdmi_jack_priv(struct snd_jack *jack)
2191 {
2192         struct hdmi_pcm *pcm = jack->private_data;
2193
2194         pcm->jack = NULL;
2195 }
2196
2197 static int generic_hdmi_build_jack(struct hda_codec *codec, int pcm_idx)
2198 {
2199         char hdmi_str[32] = "HDMI/DP";
2200         struct hdmi_spec *spec = codec->spec;
2201         struct hdmi_spec_per_pin *per_pin = get_pin(spec, pcm_idx);
2202         struct snd_jack *jack;
2203         int pcmdev = get_pcm_rec(spec, pcm_idx)->device;
2204         int err;
2205
2206         if (pcmdev > 0)
2207                 sprintf(hdmi_str + strlen(hdmi_str), ",pcm=%d", pcmdev);
2208         if (!spec->dyn_pcm_assign &&
2209             !is_jack_detectable(codec, per_pin->pin_nid))
2210                 strncat(hdmi_str, " Phantom",
2211                         sizeof(hdmi_str) - strlen(hdmi_str) - 1);
2212
2213         err = snd_jack_new(codec->card, hdmi_str, SND_JACK_AVOUT, &jack,
2214                            true, false);
2215         if (err < 0)
2216                 return err;
2217
2218         spec->pcm_rec[pcm_idx].jack = jack;
2219         jack->private_data = &spec->pcm_rec[pcm_idx];
2220         jack->private_free = free_hdmi_jack_priv;
2221         return 0;
2222 }
2223
2224 static int generic_hdmi_build_controls(struct hda_codec *codec)
2225 {
2226         struct hdmi_spec *spec = codec->spec;
2227         int dev, err;
2228         int pin_idx, pcm_idx;
2229
2230         for (pcm_idx = 0; pcm_idx < spec->pcm_used; pcm_idx++) {
2231                 if (!get_pcm_rec(spec, pcm_idx)->pcm) {
2232                         /* no PCM: mark this for skipping permanently */
2233                         set_bit(pcm_idx, &spec->pcm_bitmap);
2234                         continue;
2235                 }
2236
2237                 err = generic_hdmi_build_jack(codec, pcm_idx);
2238                 if (err < 0)
2239                         return err;
2240
2241                 /* create the spdif for each pcm
2242                  * pin will be bound when monitor is connected
2243                  */
2244                 if (spec->dyn_pcm_assign)
2245                         err = snd_hda_create_dig_out_ctls(codec,
2246                                           0, spec->cvt_nids[0],
2247                                           HDA_PCM_TYPE_HDMI);
2248                 else {
2249                         struct hdmi_spec_per_pin *per_pin =
2250                                 get_pin(spec, pcm_idx);
2251                         err = snd_hda_create_dig_out_ctls(codec,
2252                                                   per_pin->pin_nid,
2253                                                   per_pin->mux_nids[0],
2254                                                   HDA_PCM_TYPE_HDMI);
2255                 }
2256                 if (err < 0)
2257                         return err;
2258                 snd_hda_spdif_ctls_unassign(codec, pcm_idx);
2259
2260                 dev = get_pcm_rec(spec, pcm_idx)->device;
2261                 if (dev != SNDRV_PCM_INVALID_DEVICE) {
2262                         /* add control for ELD Bytes */
2263                         err = hdmi_create_eld_ctl(codec, pcm_idx, dev);
2264                         if (err < 0)
2265                                 return err;
2266                 }
2267         }
2268
2269         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2270                 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2271                 struct hdmi_eld *pin_eld = &per_pin->sink_eld;
2272
2273                 pin_eld->eld_valid = false;
2274                 hdmi_present_sense(per_pin, 0);
2275         }
2276
2277         /* add channel maps */
2278         for (pcm_idx = 0; pcm_idx < spec->pcm_used; pcm_idx++) {
2279                 struct hda_pcm *pcm;
2280
2281                 pcm = get_pcm_rec(spec, pcm_idx);
2282                 if (!pcm || !pcm->pcm)
2283                         break;
2284                 err = snd_hdac_add_chmap_ctls(pcm->pcm, pcm_idx, &spec->chmap);
2285                 if (err < 0)
2286                         return err;
2287         }
2288
2289         return 0;
2290 }
2291
2292 static int generic_hdmi_init_per_pins(struct hda_codec *codec)
2293 {
2294         struct hdmi_spec *spec = codec->spec;
2295         int pin_idx;
2296
2297         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2298                 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2299
2300                 per_pin->codec = codec;
2301                 mutex_init(&per_pin->lock);
2302                 INIT_DELAYED_WORK(&per_pin->work, hdmi_repoll_eld);
2303                 eld_proc_new(per_pin, pin_idx);
2304         }
2305         return 0;
2306 }
2307
2308 static int generic_hdmi_init(struct hda_codec *codec)
2309 {
2310         struct hdmi_spec *spec = codec->spec;
2311         int pin_idx;
2312
2313         mutex_lock(&spec->bind_lock);
2314         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2315                 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2316                 hda_nid_t pin_nid = per_pin->pin_nid;
2317                 int dev_id = per_pin->dev_id;
2318
2319                 snd_hda_set_dev_select(codec, pin_nid, dev_id);
2320                 hdmi_init_pin(codec, pin_nid);
2321                 if (codec_has_acomp(codec))
2322                         continue;
2323                 snd_hda_jack_detect_enable_callback_mst(codec, pin_nid, dev_id,
2324                                                         jack_callback);
2325         }
2326         mutex_unlock(&spec->bind_lock);
2327         return 0;
2328 }
2329
2330 static void hdmi_array_init(struct hdmi_spec *spec, int nums)
2331 {
2332         snd_array_init(&spec->pins, sizeof(struct hdmi_spec_per_pin), nums);
2333         snd_array_init(&spec->cvts, sizeof(struct hdmi_spec_per_cvt), nums);
2334 }
2335
2336 static void hdmi_array_free(struct hdmi_spec *spec)
2337 {
2338         snd_array_free(&spec->pins);
2339         snd_array_free(&spec->cvts);
2340 }
2341
2342 static void generic_spec_free(struct hda_codec *codec)
2343 {
2344         struct hdmi_spec *spec = codec->spec;
2345
2346         if (spec) {
2347                 hdmi_array_free(spec);
2348                 kfree(spec);
2349                 codec->spec = NULL;
2350         }
2351         codec->dp_mst = false;
2352 }
2353
2354 static void generic_hdmi_free(struct hda_codec *codec)
2355 {
2356         struct hdmi_spec *spec = codec->spec;
2357         int pin_idx, pcm_idx;
2358
2359         if (spec->acomp_registered) {
2360                 snd_hdac_acomp_exit(&codec->bus->core);
2361         } else if (codec_has_acomp(codec)) {
2362                 snd_hdac_acomp_register_notifier(&codec->bus->core, NULL);
2363         }
2364         codec->relaxed_resume = 0;
2365
2366         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2367                 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2368                 cancel_delayed_work_sync(&per_pin->work);
2369                 eld_proc_free(per_pin);
2370         }
2371
2372         for (pcm_idx = 0; pcm_idx < spec->pcm_used; pcm_idx++) {
2373                 if (spec->pcm_rec[pcm_idx].jack == NULL)
2374                         continue;
2375                 if (spec->dyn_pcm_assign)
2376                         snd_device_free(codec->card,
2377                                         spec->pcm_rec[pcm_idx].jack);
2378                 else
2379                         spec->pcm_rec[pcm_idx].jack = NULL;
2380         }
2381
2382         generic_spec_free(codec);
2383 }
2384
2385 #ifdef CONFIG_PM
2386 static int generic_hdmi_resume(struct hda_codec *codec)
2387 {
2388         struct hdmi_spec *spec = codec->spec;
2389         int pin_idx;
2390
2391         codec->patch_ops.init(codec);
2392         snd_hda_regmap_sync(codec);
2393
2394         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2395                 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2396                 hdmi_present_sense(per_pin, 1);
2397         }
2398         return 0;
2399 }
2400 #endif
2401
2402 static const struct hda_codec_ops generic_hdmi_patch_ops = {
2403         .init                   = generic_hdmi_init,
2404         .free                   = generic_hdmi_free,
2405         .build_pcms             = generic_hdmi_build_pcms,
2406         .build_controls         = generic_hdmi_build_controls,
2407         .unsol_event            = hdmi_unsol_event,
2408 #ifdef CONFIG_PM
2409         .resume                 = generic_hdmi_resume,
2410 #endif
2411 };
2412
2413 static const struct hdmi_ops generic_standard_hdmi_ops = {
2414         .pin_get_eld                            = hdmi_pin_get_eld,
2415         .pin_setup_infoframe                    = hdmi_pin_setup_infoframe,
2416         .pin_hbr_setup                          = hdmi_pin_hbr_setup,
2417         .setup_stream                           = hdmi_setup_stream,
2418 };
2419
2420 /* allocate codec->spec and assign/initialize generic parser ops */
2421 static int alloc_generic_hdmi(struct hda_codec *codec)
2422 {
2423         struct hdmi_spec *spec;
2424
2425         spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2426         if (!spec)
2427                 return -ENOMEM;
2428
2429         spec->codec = codec;
2430         spec->ops = generic_standard_hdmi_ops;
2431         spec->dev_num = 1;      /* initialize to 1 */
2432         mutex_init(&spec->pcm_lock);
2433         mutex_init(&spec->bind_lock);
2434         snd_hdac_register_chmap_ops(&codec->core, &spec->chmap);
2435
2436         spec->chmap.ops.get_chmap = hdmi_get_chmap;
2437         spec->chmap.ops.set_chmap = hdmi_set_chmap;
2438         spec->chmap.ops.is_pcm_attached = is_hdmi_pcm_attached;
2439         spec->chmap.ops.get_spk_alloc = hdmi_get_spk_alloc,
2440
2441         codec->spec = spec;
2442         hdmi_array_init(spec, 4);
2443
2444         codec->patch_ops = generic_hdmi_patch_ops;
2445
2446         return 0;
2447 }
2448
2449 /* generic HDMI parser */
2450 static int patch_generic_hdmi(struct hda_codec *codec)
2451 {
2452         int err;
2453
2454         err = alloc_generic_hdmi(codec);
2455         if (err < 0)
2456                 return err;
2457
2458         err = hdmi_parse_codec(codec);
2459         if (err < 0) {
2460                 generic_spec_free(codec);
2461                 return err;
2462         }
2463
2464         generic_hdmi_init_per_pins(codec);
2465         return 0;
2466 }
2467
2468 /*
2469  * generic audio component binding
2470  */
2471
2472 /* turn on / off the unsol event jack detection dynamically */
2473 static void reprogram_jack_detect(struct hda_codec *codec, hda_nid_t nid,
2474                                   int dev_id, bool use_acomp)
2475 {
2476         struct hda_jack_tbl *tbl;
2477
2478         tbl = snd_hda_jack_tbl_get_mst(codec, nid, dev_id);
2479         if (tbl) {
2480                 /* clear unsol even if component notifier is used, or re-enable
2481                  * if notifier is cleared
2482                  */
2483                 unsigned int val = use_acomp ? 0 : (AC_USRSP_EN | tbl->tag);
2484                 snd_hda_codec_write_cache(codec, nid, 0,
2485                                           AC_VERB_SET_UNSOLICITED_ENABLE, val);
2486         }
2487 }
2488
2489 /* set up / clear component notifier dynamically */
2490 static void generic_acomp_notifier_set(struct drm_audio_component *acomp,
2491                                        bool use_acomp)
2492 {
2493         struct hdmi_spec *spec;
2494         int i;
2495
2496         spec = container_of(acomp->audio_ops, struct hdmi_spec, drm_audio_ops);
2497         mutex_lock(&spec->bind_lock);
2498         spec->use_acomp_notifier = use_acomp;
2499         spec->codec->relaxed_resume = use_acomp;
2500         spec->codec->bus->keep_power = 0;
2501         /* reprogram each jack detection logic depending on the notifier */
2502         for (i = 0; i < spec->num_pins; i++)
2503                 reprogram_jack_detect(spec->codec,
2504                                       get_pin(spec, i)->pin_nid,
2505                                       get_pin(spec, i)->dev_id,
2506                                       use_acomp);
2507         mutex_unlock(&spec->bind_lock);
2508 }
2509
2510 /* enable / disable the notifier via master bind / unbind */
2511 static int generic_acomp_master_bind(struct device *dev,
2512                                      struct drm_audio_component *acomp)
2513 {
2514         generic_acomp_notifier_set(acomp, true);
2515         return 0;
2516 }
2517
2518 static void generic_acomp_master_unbind(struct device *dev,
2519                                         struct drm_audio_component *acomp)
2520 {
2521         generic_acomp_notifier_set(acomp, false);
2522 }
2523
2524 /* check whether both HD-audio and DRM PCI devices belong to the same bus */
2525 static int match_bound_vga(struct device *dev, int subtype, void *data)
2526 {
2527         struct hdac_bus *bus = data;
2528         struct pci_dev *pci, *master;
2529
2530         if (!dev_is_pci(dev) || !dev_is_pci(bus->dev))
2531                 return 0;
2532         master = to_pci_dev(bus->dev);
2533         pci = to_pci_dev(dev);
2534         return master->bus == pci->bus;
2535 }
2536
2537 /* audio component notifier for AMD/Nvidia HDMI codecs */
2538 static void generic_acomp_pin_eld_notify(void *audio_ptr, int port, int dev_id)
2539 {
2540         struct hda_codec *codec = audio_ptr;
2541         struct hdmi_spec *spec = codec->spec;
2542         hda_nid_t pin_nid = spec->port2pin(codec, port);
2543
2544         if (!pin_nid)
2545                 return;
2546         if (get_wcaps_type(get_wcaps(codec, pin_nid)) != AC_WID_PIN)
2547                 return;
2548         /* skip notification during system suspend (but not in runtime PM);
2549          * the state will be updated at resume
2550          */
2551         if (snd_power_get_state(codec->card) != SNDRV_CTL_POWER_D0)
2552                 return;
2553         /* ditto during suspend/resume process itself */
2554         if (snd_hdac_is_in_pm(&codec->core))
2555                 return;
2556
2557         check_presence_and_report(codec, pin_nid, dev_id);
2558 }
2559
2560 /* set up the private drm_audio_ops from the template */
2561 static void setup_drm_audio_ops(struct hda_codec *codec,
2562                                 const struct drm_audio_component_audio_ops *ops)
2563 {
2564         struct hdmi_spec *spec = codec->spec;
2565
2566         spec->drm_audio_ops.audio_ptr = codec;
2567         /* intel_audio_codec_enable() or intel_audio_codec_disable()
2568          * will call pin_eld_notify with using audio_ptr pointer
2569          * We need make sure audio_ptr is really setup
2570          */
2571         wmb();
2572         spec->drm_audio_ops.pin2port = ops->pin2port;
2573         spec->drm_audio_ops.pin_eld_notify = ops->pin_eld_notify;
2574         spec->drm_audio_ops.master_bind = ops->master_bind;
2575         spec->drm_audio_ops.master_unbind = ops->master_unbind;
2576 }
2577
2578 /* initialize the generic HDMI audio component */
2579 static void generic_acomp_init(struct hda_codec *codec,
2580                                const struct drm_audio_component_audio_ops *ops,
2581                                int (*port2pin)(struct hda_codec *, int))
2582 {
2583         struct hdmi_spec *spec = codec->spec;
2584
2585         if (!enable_acomp) {
2586                 codec_info(codec, "audio component disabled by module option\n");
2587                 return;
2588         }
2589
2590         spec->port2pin = port2pin;
2591         setup_drm_audio_ops(codec, ops);
2592         if (!snd_hdac_acomp_init(&codec->bus->core, &spec->drm_audio_ops,
2593                                  match_bound_vga, 0)) {
2594                 spec->acomp_registered = true;
2595         }
2596 }
2597
2598 /*
2599  * Intel codec parsers and helpers
2600  */
2601
2602 #define INTEL_GET_VENDOR_VERB   0xf81
2603 #define INTEL_SET_VENDOR_VERB   0x781
2604 #define INTEL_EN_DP12           0x02    /* enable DP 1.2 features */
2605 #define INTEL_EN_ALL_PIN_CVTS   0x01    /* enable 2nd & 3rd pins and convertors */
2606
2607 static void intel_haswell_enable_all_pins(struct hda_codec *codec,
2608                                           bool update_tree)
2609 {
2610         unsigned int vendor_param;
2611         struct hdmi_spec *spec = codec->spec;
2612
2613         vendor_param = snd_hda_codec_read(codec, spec->vendor_nid, 0,
2614                                 INTEL_GET_VENDOR_VERB, 0);
2615         if (vendor_param == -1 || vendor_param & INTEL_EN_ALL_PIN_CVTS)
2616                 return;
2617
2618         vendor_param |= INTEL_EN_ALL_PIN_CVTS;
2619         vendor_param = snd_hda_codec_read(codec, spec->vendor_nid, 0,
2620                                 INTEL_SET_VENDOR_VERB, vendor_param);
2621         if (vendor_param == -1)
2622                 return;
2623
2624         if (update_tree)
2625                 snd_hda_codec_update_widgets(codec);
2626 }
2627
2628 static void intel_haswell_fixup_enable_dp12(struct hda_codec *codec)
2629 {
2630         unsigned int vendor_param;
2631         struct hdmi_spec *spec = codec->spec;
2632
2633         vendor_param = snd_hda_codec_read(codec, spec->vendor_nid, 0,
2634                                 INTEL_GET_VENDOR_VERB, 0);
2635         if (vendor_param == -1 || vendor_param & INTEL_EN_DP12)
2636                 return;
2637
2638         /* enable DP1.2 mode */
2639         vendor_param |= INTEL_EN_DP12;
2640         snd_hdac_regmap_add_vendor_verb(&codec->core, INTEL_SET_VENDOR_VERB);
2641         snd_hda_codec_write_cache(codec, spec->vendor_nid, 0,
2642                                 INTEL_SET_VENDOR_VERB, vendor_param);
2643 }
2644
2645 /* Haswell needs to re-issue the vendor-specific verbs before turning to D0.
2646  * Otherwise you may get severe h/w communication errors.
2647  */
2648 static void haswell_set_power_state(struct hda_codec *codec, hda_nid_t fg,
2649                                 unsigned int power_state)
2650 {
2651         if (power_state == AC_PWRST_D0) {
2652                 intel_haswell_enable_all_pins(codec, false);
2653                 intel_haswell_fixup_enable_dp12(codec);
2654         }
2655
2656         snd_hda_codec_read(codec, fg, 0, AC_VERB_SET_POWER_STATE, power_state);
2657         snd_hda_codec_set_power_to_all(codec, fg, power_state);
2658 }
2659
2660 /* There is a fixed mapping between audio pin node and display port.
2661  * on SNB, IVY, HSW, BSW, SKL, BXT, KBL:
2662  * Pin Widget 5 - PORT B (port = 1 in i915 driver)
2663  * Pin Widget 6 - PORT C (port = 2 in i915 driver)
2664  * Pin Widget 7 - PORT D (port = 3 in i915 driver)
2665  *
2666  * on VLV, ILK:
2667  * Pin Widget 4 - PORT B (port = 1 in i915 driver)
2668  * Pin Widget 5 - PORT C (port = 2 in i915 driver)
2669  * Pin Widget 6 - PORT D (port = 3 in i915 driver)
2670  */
2671 static int intel_base_nid(struct hda_codec *codec)
2672 {
2673         switch (codec->core.vendor_id) {
2674         case 0x80860054: /* ILK */
2675         case 0x80862804: /* ILK */
2676         case 0x80862882: /* VLV */
2677                 return 4;
2678         default:
2679                 return 5;
2680         }
2681 }
2682
2683 static int intel_pin2port(void *audio_ptr, int pin_nid)
2684 {
2685         struct hda_codec *codec = audio_ptr;
2686         struct hdmi_spec *spec = codec->spec;
2687         int base_nid, i;
2688
2689         if (!spec->port_num) {
2690                 base_nid = intel_base_nid(codec);
2691                 if (WARN_ON(pin_nid < base_nid || pin_nid >= base_nid + 3))
2692                         return -1;
2693                 return pin_nid - base_nid + 1;
2694         }
2695
2696         /*
2697          * looking for the pin number in the mapping table and return
2698          * the index which indicate the port number
2699          */
2700         for (i = 0; i < spec->port_num; i++) {
2701                 if (pin_nid == spec->port_map[i])
2702                         return i;
2703         }
2704
2705         codec_info(codec, "Can't find the HDMI/DP port for pin %d\n", pin_nid);
2706         return -1;
2707 }
2708
2709 static int intel_port2pin(struct hda_codec *codec, int port)
2710 {
2711         struct hdmi_spec *spec = codec->spec;
2712
2713         if (!spec->port_num) {
2714                 /* we assume only from port-B to port-D */
2715                 if (port < 1 || port > 3)
2716                         return 0;
2717                 return port + intel_base_nid(codec) - 1;
2718         }
2719
2720         if (port < 0 || port >= spec->port_num)
2721                 return 0;
2722         return spec->port_map[port];
2723 }
2724
2725 static void intel_pin_eld_notify(void *audio_ptr, int port, int pipe)
2726 {
2727         struct hda_codec *codec = audio_ptr;
2728         int pin_nid;
2729         int dev_id = pipe;
2730
2731         pin_nid = intel_port2pin(codec, port);
2732         if (!pin_nid)
2733                 return;
2734         /* skip notification during system suspend (but not in runtime PM);
2735          * the state will be updated at resume
2736          */
2737         if (snd_power_get_state(codec->card) != SNDRV_CTL_POWER_D0)
2738                 return;
2739         /* ditto during suspend/resume process itself */
2740         if (snd_hdac_is_in_pm(&codec->core))
2741                 return;
2742
2743         snd_hdac_i915_set_bclk(&codec->bus->core);
2744         check_presence_and_report(codec, pin_nid, dev_id);
2745 }
2746
2747 static const struct drm_audio_component_audio_ops intel_audio_ops = {
2748         .pin2port = intel_pin2port,
2749         .pin_eld_notify = intel_pin_eld_notify,
2750 };
2751
2752 /* register i915 component pin_eld_notify callback */
2753 static void register_i915_notifier(struct hda_codec *codec)
2754 {
2755         struct hdmi_spec *spec = codec->spec;
2756
2757         spec->use_acomp_notifier = true;
2758         spec->port2pin = intel_port2pin;
2759         setup_drm_audio_ops(codec, &intel_audio_ops);
2760         snd_hdac_acomp_register_notifier(&codec->bus->core,
2761                                         &spec->drm_audio_ops);
2762         /* no need for forcible resume for jack check thanks to notifier */
2763         codec->relaxed_resume = 1;
2764 }
2765
2766 /* setup_stream ops override for HSW+ */
2767 static int i915_hsw_setup_stream(struct hda_codec *codec, hda_nid_t cvt_nid,
2768                                  hda_nid_t pin_nid, int dev_id, u32 stream_tag,
2769                                  int format)
2770 {
2771         haswell_verify_D0(codec, cvt_nid, pin_nid);
2772         return hdmi_setup_stream(codec, cvt_nid, pin_nid, dev_id,
2773                                  stream_tag, format);
2774 }
2775
2776 /* pin_cvt_fixup ops override for HSW+ and VLV+ */
2777 static void i915_pin_cvt_fixup(struct hda_codec *codec,
2778                                struct hdmi_spec_per_pin *per_pin,
2779                                hda_nid_t cvt_nid)
2780 {
2781         if (per_pin) {
2782                 snd_hda_set_dev_select(codec, per_pin->pin_nid,
2783                                per_pin->dev_id);
2784                 intel_verify_pin_cvt_connect(codec, per_pin);
2785                 intel_not_share_assigned_cvt(codec, per_pin->pin_nid,
2786                                      per_pin->dev_id, per_pin->mux_idx);
2787         } else {
2788                 intel_not_share_assigned_cvt_nid(codec, 0, 0, cvt_nid);
2789         }
2790 }
2791
2792 /* precondition and allocation for Intel codecs */
2793 static int alloc_intel_hdmi(struct hda_codec *codec)
2794 {
2795         int err;
2796
2797         /* requires i915 binding */
2798         if (!codec->bus->core.audio_component) {
2799                 codec_info(codec, "No i915 binding for Intel HDMI/DP codec\n");
2800                 /* set probe_id here to prevent generic fallback binding */
2801                 codec->probe_id = HDA_CODEC_ID_SKIP_PROBE;
2802                 return -ENODEV;
2803         }
2804
2805         err = alloc_generic_hdmi(codec);
2806         if (err < 0)
2807                 return err;
2808         /* no need to handle unsol events */
2809         codec->patch_ops.unsol_event = NULL;
2810         return 0;
2811 }
2812
2813 /* parse and post-process for Intel codecs */
2814 static int parse_intel_hdmi(struct hda_codec *codec)
2815 {
2816         int err, retries = 3;
2817
2818         do {
2819                 err = hdmi_parse_codec(codec);
2820         } while (err < 0 && retries--);
2821
2822         if (err < 0) {
2823                 generic_spec_free(codec);
2824                 return err;
2825         }
2826
2827         generic_hdmi_init_per_pins(codec);
2828         register_i915_notifier(codec);
2829         return 0;
2830 }
2831
2832 /* Intel Haswell and onwards; audio component with eld notifier */
2833 static int intel_hsw_common_init(struct hda_codec *codec, hda_nid_t vendor_nid,
2834                                  const int *port_map, int port_num)
2835 {
2836         struct hdmi_spec *spec;
2837         int err;
2838
2839         err = alloc_intel_hdmi(codec);
2840         if (err < 0)
2841                 return err;
2842         spec = codec->spec;
2843         codec->dp_mst = true;
2844         spec->dyn_pcm_assign = true;
2845         spec->vendor_nid = vendor_nid;
2846         spec->port_map = port_map;
2847         spec->port_num = port_num;
2848         spec->intel_hsw_fixup = true;
2849
2850         intel_haswell_enable_all_pins(codec, true);
2851         intel_haswell_fixup_enable_dp12(codec);
2852
2853         codec->display_power_control = 1;
2854
2855         codec->patch_ops.set_power_state = haswell_set_power_state;
2856         codec->depop_delay = 0;
2857         codec->auto_runtime_pm = 1;
2858
2859         spec->ops.setup_stream = i915_hsw_setup_stream;
2860         spec->ops.pin_cvt_fixup = i915_pin_cvt_fixup;
2861
2862         /*
2863          * Enable silent stream feature, if it is enabled via
2864          * module param or Kconfig option
2865          */
2866         if (enable_silent_stream)
2867                 spec->send_silent_stream = true;
2868
2869         return parse_intel_hdmi(codec);
2870 }
2871
2872 static int patch_i915_hsw_hdmi(struct hda_codec *codec)
2873 {
2874         return intel_hsw_common_init(codec, 0x08, NULL, 0);
2875 }
2876
2877 static int patch_i915_glk_hdmi(struct hda_codec *codec)
2878 {
2879         return intel_hsw_common_init(codec, 0x0b, NULL, 0);
2880 }
2881
2882 static int patch_i915_icl_hdmi(struct hda_codec *codec)
2883 {
2884         /*
2885          * pin to port mapping table where the value indicate the pin number and
2886          * the index indicate the port number.
2887          */
2888         static const int map[] = {0x0, 0x4, 0x6, 0x8, 0xa, 0xb};
2889
2890         return intel_hsw_common_init(codec, 0x02, map, ARRAY_SIZE(map));
2891 }
2892
2893 static int patch_i915_tgl_hdmi(struct hda_codec *codec)
2894 {
2895         /*
2896          * pin to port mapping table where the value indicate the pin number and
2897          * the index indicate the port number.
2898          */
2899         static const int map[] = {0x4, 0x6, 0x8, 0xa, 0xb, 0xc, 0xd, 0xe, 0xf};
2900
2901         return intel_hsw_common_init(codec, 0x02, map, ARRAY_SIZE(map));
2902 }
2903
2904 /* Intel Baytrail and Braswell; with eld notifier */
2905 static int patch_i915_byt_hdmi(struct hda_codec *codec)
2906 {
2907         struct hdmi_spec *spec;
2908         int err;
2909
2910         err = alloc_intel_hdmi(codec);
2911         if (err < 0)
2912                 return err;
2913         spec = codec->spec;
2914
2915         /* For Valleyview/Cherryview, only the display codec is in the display
2916          * power well and can use link_power ops to request/release the power.
2917          */
2918         codec->display_power_control = 1;
2919
2920         codec->depop_delay = 0;
2921         codec->auto_runtime_pm = 1;
2922
2923         spec->ops.pin_cvt_fixup = i915_pin_cvt_fixup;
2924
2925         return parse_intel_hdmi(codec);
2926 }
2927
2928 /* Intel IronLake, SandyBridge and IvyBridge; with eld notifier */
2929 static int patch_i915_cpt_hdmi(struct hda_codec *codec)
2930 {
2931         int err;
2932
2933         err = alloc_intel_hdmi(codec);
2934         if (err < 0)
2935                 return err;
2936         return parse_intel_hdmi(codec);
2937 }
2938
2939 /*
2940  * Shared non-generic implementations
2941  */
2942
2943 static int simple_playback_build_pcms(struct hda_codec *codec)
2944 {
2945         struct hdmi_spec *spec = codec->spec;
2946         struct hda_pcm *info;
2947         unsigned int chans;
2948         struct hda_pcm_stream *pstr;
2949         struct hdmi_spec_per_cvt *per_cvt;
2950
2951         per_cvt = get_cvt(spec, 0);
2952         chans = get_wcaps(codec, per_cvt->cvt_nid);
2953         chans = get_wcaps_channels(chans);
2954
2955         info = snd_hda_codec_pcm_new(codec, "HDMI 0");
2956         if (!info)
2957                 return -ENOMEM;
2958         spec->pcm_rec[0].pcm = info;
2959         info->pcm_type = HDA_PCM_TYPE_HDMI;
2960         pstr = &info->stream[SNDRV_PCM_STREAM_PLAYBACK];
2961         *pstr = spec->pcm_playback;
2962         pstr->nid = per_cvt->cvt_nid;
2963         if (pstr->channels_max <= 2 && chans && chans <= 16)
2964                 pstr->channels_max = chans;
2965
2966         return 0;
2967 }
2968
2969 /* unsolicited event for jack sensing */
2970 static void simple_hdmi_unsol_event(struct hda_codec *codec,
2971                                     unsigned int res)
2972 {
2973         snd_hda_jack_set_dirty_all(codec);
2974         snd_hda_jack_report_sync(codec);
2975 }
2976
2977 /* generic_hdmi_build_jack can be used for simple_hdmi, too,
2978  * as long as spec->pins[] is set correctly
2979  */
2980 #define simple_hdmi_build_jack  generic_hdmi_build_jack
2981
2982 static int simple_playback_build_controls(struct hda_codec *codec)
2983 {
2984         struct hdmi_spec *spec = codec->spec;
2985         struct hdmi_spec_per_cvt *per_cvt;
2986         int err;
2987
2988         per_cvt = get_cvt(spec, 0);
2989         err = snd_hda_create_dig_out_ctls(codec, per_cvt->cvt_nid,
2990                                           per_cvt->cvt_nid,
2991                                           HDA_PCM_TYPE_HDMI);
2992         if (err < 0)
2993                 return err;
2994         return simple_hdmi_build_jack(codec, 0);
2995 }
2996
2997 static int simple_playback_init(struct hda_codec *codec)
2998 {
2999         struct hdmi_spec *spec = codec->spec;
3000         struct hdmi_spec_per_pin *per_pin = get_pin(spec, 0);
3001         hda_nid_t pin = per_pin->pin_nid;
3002
3003         snd_hda_codec_write(codec, pin, 0,
3004                             AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT);
3005         /* some codecs require to unmute the pin */
3006         if (get_wcaps(codec, pin) & AC_WCAP_OUT_AMP)
3007                 snd_hda_codec_write(codec, pin, 0, AC_VERB_SET_AMP_GAIN_MUTE,
3008                                     AMP_OUT_UNMUTE);
3009         snd_hda_jack_detect_enable(codec, pin, per_pin->dev_id);
3010         return 0;
3011 }
3012
3013 static void simple_playback_free(struct hda_codec *codec)
3014 {
3015         struct hdmi_spec *spec = codec->spec;
3016
3017         hdmi_array_free(spec);
3018         kfree(spec);
3019 }
3020
3021 /*
3022  * Nvidia specific implementations
3023  */
3024
3025 #define Nv_VERB_SET_Channel_Allocation          0xF79
3026 #define Nv_VERB_SET_Info_Frame_Checksum         0xF7A
3027 #define Nv_VERB_SET_Audio_Protection_On         0xF98
3028 #define Nv_VERB_SET_Audio_Protection_Off        0xF99
3029
3030 #define nvhdmi_master_con_nid_7x        0x04
3031 #define nvhdmi_master_pin_nid_7x        0x05
3032
3033 static const hda_nid_t nvhdmi_con_nids_7x[4] = {
3034         /*front, rear, clfe, rear_surr */
3035         0x6, 0x8, 0xa, 0xc,
3036 };
3037
3038 static const struct hda_verb nvhdmi_basic_init_7x_2ch[] = {
3039         /* set audio protect on */
3040         { 0x1, Nv_VERB_SET_Audio_Protection_On, 0x1},
3041         /* enable digital output on pin widget */
3042         { 0x5, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
3043         {} /* terminator */
3044 };
3045
3046 static const struct hda_verb nvhdmi_basic_init_7x_8ch[] = {
3047         /* set audio protect on */
3048         { 0x1, Nv_VERB_SET_Audio_Protection_On, 0x1},
3049         /* enable digital output on pin widget */
3050         { 0x5, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
3051         { 0x7, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
3052         { 0x9, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
3053         { 0xb, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
3054         { 0xd, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
3055         {} /* terminator */
3056 };
3057
3058 #ifdef LIMITED_RATE_FMT_SUPPORT
3059 /* support only the safe format and rate */
3060 #define SUPPORTED_RATES         SNDRV_PCM_RATE_48000
3061 #define SUPPORTED_MAXBPS        16
3062 #define SUPPORTED_FORMATS       SNDRV_PCM_FMTBIT_S16_LE
3063 #else
3064 /* support all rates and formats */
3065 #define SUPPORTED_RATES \
3066         (SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000 |\
3067         SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_176400 |\
3068          SNDRV_PCM_RATE_192000)
3069 #define SUPPORTED_MAXBPS        24
3070 #define SUPPORTED_FORMATS \
3071         (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE)
3072 #endif
3073
3074 static int nvhdmi_7x_init_2ch(struct hda_codec *codec)
3075 {
3076         snd_hda_sequence_write(codec, nvhdmi_basic_init_7x_2ch);
3077         return 0;
3078 }
3079
3080 static int nvhdmi_7x_init_8ch(struct hda_codec *codec)
3081 {
3082         snd_hda_sequence_write(codec, nvhdmi_basic_init_7x_8ch);
3083         return 0;
3084 }
3085
3086 static const unsigned int channels_2_6_8[] = {
3087         2, 6, 8
3088 };
3089
3090 static const unsigned int channels_2_8[] = {
3091         2, 8
3092 };
3093
3094 static const struct snd_pcm_hw_constraint_list hw_constraints_2_6_8_channels = {
3095         .count = ARRAY_SIZE(channels_2_6_8),
3096         .list = channels_2_6_8,
3097         .mask = 0,
3098 };
3099
3100 static const struct snd_pcm_hw_constraint_list hw_constraints_2_8_channels = {
3101         .count = ARRAY_SIZE(channels_2_8),
3102         .list = channels_2_8,
3103         .mask = 0,
3104 };
3105
3106 static int simple_playback_pcm_open(struct hda_pcm_stream *hinfo,
3107                                     struct hda_codec *codec,
3108                                     struct snd_pcm_substream *substream)
3109 {
3110         struct hdmi_spec *spec = codec->spec;
3111         const struct snd_pcm_hw_constraint_list *hw_constraints_channels = NULL;
3112
3113         switch (codec->preset->vendor_id) {
3114         case 0x10de0002:
3115         case 0x10de0003:
3116         case 0x10de0005:
3117         case 0x10de0006:
3118                 hw_constraints_channels = &hw_constraints_2_8_channels;
3119                 break;
3120         case 0x10de0007:
3121                 hw_constraints_channels = &hw_constraints_2_6_8_channels;
3122                 break;
3123         default:
3124                 break;
3125         }
3126
3127         if (hw_constraints_channels != NULL) {
3128                 snd_pcm_hw_constraint_list(substream->runtime, 0,
3129                                 SNDRV_PCM_HW_PARAM_CHANNELS,
3130                                 hw_constraints_channels);
3131         } else {
3132                 snd_pcm_hw_constraint_step(substream->runtime, 0,
3133                                            SNDRV_PCM_HW_PARAM_CHANNELS, 2);
3134         }
3135
3136         return snd_hda_multi_out_dig_open(codec, &spec->multiout);
3137 }
3138
3139 static int simple_playback_pcm_close(struct hda_pcm_stream *hinfo,
3140                                      struct hda_codec *codec,
3141                                      struct snd_pcm_substream *substream)
3142 {
3143         struct hdmi_spec *spec = codec->spec;
3144         return snd_hda_multi_out_dig_close(codec, &spec->multiout);
3145 }
3146
3147 static int simple_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
3148                                        struct hda_codec *codec,
3149                                        unsigned int stream_tag,
3150                                        unsigned int format,
3151                                        struct snd_pcm_substream *substream)
3152 {
3153         struct hdmi_spec *spec = codec->spec;
3154         return snd_hda_multi_out_dig_prepare(codec, &spec->multiout,
3155                                              stream_tag, format, substream);
3156 }
3157
3158 static const struct hda_pcm_stream simple_pcm_playback = {
3159         .substreams = 1,
3160         .channels_min = 2,
3161         .channels_max = 2,
3162         .ops = {
3163                 .open = simple_playback_pcm_open,
3164                 .close = simple_playback_pcm_close,
3165                 .prepare = simple_playback_pcm_prepare
3166         },
3167 };
3168
3169 static const struct hda_codec_ops simple_hdmi_patch_ops = {
3170         .build_controls = simple_playback_build_controls,
3171         .build_pcms = simple_playback_build_pcms,
3172         .init = simple_playback_init,
3173         .free = simple_playback_free,
3174         .unsol_event = simple_hdmi_unsol_event,
3175 };
3176
3177 static int patch_simple_hdmi(struct hda_codec *codec,
3178                              hda_nid_t cvt_nid, hda_nid_t pin_nid)
3179 {
3180         struct hdmi_spec *spec;
3181         struct hdmi_spec_per_cvt *per_cvt;
3182         struct hdmi_spec_per_pin *per_pin;
3183
3184         spec = kzalloc(sizeof(*spec), GFP_KERNEL);
3185         if (!spec)
3186                 return -ENOMEM;
3187
3188         spec->codec = codec;
3189         codec->spec = spec;
3190         hdmi_array_init(spec, 1);
3191
3192         spec->multiout.num_dacs = 0;  /* no analog */
3193         spec->multiout.max_channels = 2;
3194         spec->multiout.dig_out_nid = cvt_nid;
3195         spec->num_cvts = 1;
3196         spec->num_pins = 1;
3197         per_pin = snd_array_new(&spec->pins);
3198         per_cvt = snd_array_new(&spec->cvts);
3199         if (!per_pin || !per_cvt) {
3200                 simple_playback_free(codec);
3201                 return -ENOMEM;
3202         }
3203         per_cvt->cvt_nid = cvt_nid;
3204         per_pin->pin_nid = pin_nid;
3205         spec->pcm_playback = simple_pcm_playback;
3206
3207         codec->patch_ops = simple_hdmi_patch_ops;
3208
3209         return 0;
3210 }
3211
3212 static void nvhdmi_8ch_7x_set_info_frame_parameters(struct hda_codec *codec,
3213                                                     int channels)
3214 {
3215         unsigned int chanmask;
3216         int chan = channels ? (channels - 1) : 1;
3217
3218         switch (channels) {
3219         default:
3220         case 0:
3221         case 2:
3222                 chanmask = 0x00;
3223                 break;
3224         case 4:
3225                 chanmask = 0x08;
3226                 break;
3227         case 6:
3228                 chanmask = 0x0b;
3229                 break;
3230         case 8:
3231                 chanmask = 0x13;
3232                 break;
3233         }
3234
3235         /* Set the audio infoframe channel allocation and checksum fields.  The
3236          * channel count is computed implicitly by the hardware. */
3237         snd_hda_codec_write(codec, 0x1, 0,
3238                         Nv_VERB_SET_Channel_Allocation, chanmask);
3239
3240         snd_hda_codec_write(codec, 0x1, 0,
3241                         Nv_VERB_SET_Info_Frame_Checksum,
3242                         (0x71 - chan - chanmask));
3243 }
3244
3245 static int nvhdmi_8ch_7x_pcm_close(struct hda_pcm_stream *hinfo,
3246                                    struct hda_codec *codec,
3247                                    struct snd_pcm_substream *substream)
3248 {
3249         struct hdmi_spec *spec = codec->spec;
3250         int i;
3251
3252         snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x,
3253                         0, AC_VERB_SET_CHANNEL_STREAMID, 0);
3254         for (i = 0; i < 4; i++) {
3255                 /* set the stream id */
3256                 snd_hda_codec_write(codec, nvhdmi_con_nids_7x[i], 0,
3257                                 AC_VERB_SET_CHANNEL_STREAMID, 0);
3258                 /* set the stream format */
3259                 snd_hda_codec_write(codec, nvhdmi_con_nids_7x[i], 0,
3260                                 AC_VERB_SET_STREAM_FORMAT, 0);
3261         }
3262
3263         /* The audio hardware sends a channel count of 0x7 (8ch) when all the
3264          * streams are disabled. */
3265         nvhdmi_8ch_7x_set_info_frame_parameters(codec, 8);
3266
3267         return snd_hda_multi_out_dig_close(codec, &spec->multiout);
3268 }
3269
3270 static int nvhdmi_8ch_7x_pcm_prepare(struct hda_pcm_stream *hinfo,
3271                                      struct hda_codec *codec,
3272                                      unsigned int stream_tag,
3273                                      unsigned int format,
3274                                      struct snd_pcm_substream *substream)
3275 {
3276         int chs;
3277         unsigned int dataDCC2, channel_id;
3278         int i;
3279         struct hdmi_spec *spec = codec->spec;
3280         struct hda_spdif_out *spdif;
3281         struct hdmi_spec_per_cvt *per_cvt;
3282
3283         mutex_lock(&codec->spdif_mutex);
3284         per_cvt = get_cvt(spec, 0);
3285         spdif = snd_hda_spdif_out_of_nid(codec, per_cvt->cvt_nid);
3286
3287         chs = substream->runtime->channels;
3288
3289         dataDCC2 = 0x2;
3290
3291         /* turn off SPDIF once; otherwise the IEC958 bits won't be updated */
3292         if (codec->spdif_status_reset && (spdif->ctls & AC_DIG1_ENABLE))
3293                 snd_hda_codec_write(codec,
3294                                 nvhdmi_master_con_nid_7x,
3295                                 0,
3296                                 AC_VERB_SET_DIGI_CONVERT_1,
3297                                 spdif->ctls & ~AC_DIG1_ENABLE & 0xff);
3298
3299         /* set the stream id */
3300         snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x, 0,
3301                         AC_VERB_SET_CHANNEL_STREAMID, (stream_tag << 4) | 0x0);
3302
3303         /* set the stream format */
3304         snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x, 0,
3305                         AC_VERB_SET_STREAM_FORMAT, format);
3306
3307         /* turn on again (if needed) */
3308         /* enable and set the channel status audio/data flag */
3309         if (codec->spdif_status_reset && (spdif->ctls & AC_DIG1_ENABLE)) {
3310                 snd_hda_codec_write(codec,
3311                                 nvhdmi_master_con_nid_7x,
3312                                 0,
3313                                 AC_VERB_SET_DIGI_CONVERT_1,
3314                                 spdif->ctls & 0xff);
3315                 snd_hda_codec_write(codec,
3316                                 nvhdmi_master_con_nid_7x,
3317                                 0,
3318                                 AC_VERB_SET_DIGI_CONVERT_2, dataDCC2);
3319         }
3320
3321         for (i = 0; i < 4; i++) {
3322                 if (chs == 2)
3323                         channel_id = 0;
3324                 else
3325                         channel_id = i * 2;
3326
3327                 /* turn off SPDIF once;
3328                  *otherwise the IEC958 bits won't be updated
3329                  */
3330                 if (codec->spdif_status_reset &&
3331                 (spdif->ctls & AC_DIG1_ENABLE))
3332                         snd_hda_codec_write(codec,
3333                                 nvhdmi_con_nids_7x[i],
3334                                 0,
3335                                 AC_VERB_SET_DIGI_CONVERT_1,
3336                                 spdif->ctls & ~AC_DIG1_ENABLE & 0xff);
3337                 /* set the stream id */
3338                 snd_hda_codec_write(codec,
3339                                 nvhdmi_con_nids_7x[i],
3340                                 0,
3341                                 AC_VERB_SET_CHANNEL_STREAMID,
3342                                 (stream_tag << 4) | channel_id);
3343                 /* set the stream format */
3344                 snd_hda_codec_write(codec,
3345                                 nvhdmi_con_nids_7x[i],
3346                                 0,
3347                                 AC_VERB_SET_STREAM_FORMAT,
3348                                 format);
3349                 /* turn on again (if needed) */
3350                 /* enable and set the channel status audio/data flag */
3351                 if (codec->spdif_status_reset &&
3352                 (spdif->ctls & AC_DIG1_ENABLE)) {
3353                         snd_hda_codec_write(codec,
3354                                         nvhdmi_con_nids_7x[i],
3355                                         0,
3356                                         AC_VERB_SET_DIGI_CONVERT_1,
3357                                         spdif->ctls & 0xff);
3358                         snd_hda_codec_write(codec,
3359                                         nvhdmi_con_nids_7x[i],
3360                                         0,
3361                                         AC_VERB_SET_DIGI_CONVERT_2, dataDCC2);
3362                 }
3363         }
3364
3365         nvhdmi_8ch_7x_set_info_frame_parameters(codec, chs);
3366
3367         mutex_unlock(&codec->spdif_mutex);
3368         return 0;
3369 }
3370
3371 static const struct hda_pcm_stream nvhdmi_pcm_playback_8ch_7x = {
3372         .substreams = 1,
3373         .channels_min = 2,
3374         .channels_max = 8,
3375         .nid = nvhdmi_master_con_nid_7x,
3376         .rates = SUPPORTED_RATES,
3377         .maxbps = SUPPORTED_MAXBPS,
3378         .formats = SUPPORTED_FORMATS,
3379         .ops = {
3380                 .open = simple_playback_pcm_open,
3381                 .close = nvhdmi_8ch_7x_pcm_close,
3382                 .prepare = nvhdmi_8ch_7x_pcm_prepare
3383         },
3384 };
3385
3386 static int patch_nvhdmi_2ch(struct hda_codec *codec)
3387 {
3388         struct hdmi_spec *spec;
3389         int err = patch_simple_hdmi(codec, nvhdmi_master_con_nid_7x,
3390                                     nvhdmi_master_pin_nid_7x);
3391         if (err < 0)
3392                 return err;
3393
3394         codec->patch_ops.init = nvhdmi_7x_init_2ch;
3395         /* override the PCM rates, etc, as the codec doesn't give full list */
3396         spec = codec->spec;
3397         spec->pcm_playback.rates = SUPPORTED_RATES;
3398         spec->pcm_playback.maxbps = SUPPORTED_MAXBPS;
3399         spec->pcm_playback.formats = SUPPORTED_FORMATS;
3400         return 0;
3401 }
3402
3403 static int nvhdmi_7x_8ch_build_pcms(struct hda_codec *codec)
3404 {
3405         struct hdmi_spec *spec = codec->spec;
3406         int err = simple_playback_build_pcms(codec);
3407         if (!err) {
3408                 struct hda_pcm *info = get_pcm_rec(spec, 0);
3409                 info->own_chmap = true;
3410         }
3411         return err;
3412 }
3413
3414 static int nvhdmi_7x_8ch_build_controls(struct hda_codec *codec)
3415 {
3416         struct hdmi_spec *spec = codec->spec;
3417         struct hda_pcm *info;
3418         struct snd_pcm_chmap *chmap;
3419         int err;
3420
3421         err = simple_playback_build_controls(codec);
3422         if (err < 0)
3423                 return err;
3424
3425         /* add channel maps */
3426         info = get_pcm_rec(spec, 0);
3427         err = snd_pcm_add_chmap_ctls(info->pcm,
3428                                      SNDRV_PCM_STREAM_PLAYBACK,
3429                                      snd_pcm_alt_chmaps, 8, 0, &chmap);
3430         if (err < 0)
3431                 return err;
3432         switch (codec->preset->vendor_id) {
3433         case 0x10de0002:
3434         case 0x10de0003:
3435         case 0x10de0005:
3436         case 0x10de0006:
3437                 chmap->channel_mask = (1U << 2) | (1U << 8);
3438                 break;
3439         case 0x10de0007:
3440                 chmap->channel_mask = (1U << 2) | (1U << 6) | (1U << 8);
3441         }
3442         return 0;
3443 }
3444
3445 static int patch_nvhdmi_8ch_7x(struct hda_codec *codec)
3446 {
3447         struct hdmi_spec *spec;
3448         int err = patch_nvhdmi_2ch(codec);
3449         if (err < 0)
3450                 return err;
3451         spec = codec->spec;
3452         spec->multiout.max_channels = 8;
3453         spec->pcm_playback = nvhdmi_pcm_playback_8ch_7x;
3454         codec->patch_ops.init = nvhdmi_7x_init_8ch;
3455         codec->patch_ops.build_pcms = nvhdmi_7x_8ch_build_pcms;
3456         codec->patch_ops.build_controls = nvhdmi_7x_8ch_build_controls;
3457
3458         /* Initialize the audio infoframe channel mask and checksum to something
3459          * valid */
3460         nvhdmi_8ch_7x_set_info_frame_parameters(codec, 8);
3461
3462         return 0;
3463 }
3464
3465 /*
3466  * NVIDIA codecs ignore ASP mapping for 2ch - confirmed on:
3467  * - 0x10de0015
3468  * - 0x10de0040
3469  */
3470 static int nvhdmi_chmap_cea_alloc_validate_get_type(struct hdac_chmap *chmap,
3471                 struct hdac_cea_channel_speaker_allocation *cap, int channels)
3472 {
3473         if (cap->ca_index == 0x00 && channels == 2)
3474                 return SNDRV_CTL_TLVT_CHMAP_FIXED;
3475
3476         /* If the speaker allocation matches the channel count, it is OK. */
3477         if (cap->channels != channels)
3478                 return -1;
3479
3480         /* all channels are remappable freely */
3481         return SNDRV_CTL_TLVT_CHMAP_VAR;
3482 }
3483
3484 static int nvhdmi_chmap_validate(struct hdac_chmap *chmap,
3485                 int ca, int chs, unsigned char *map)
3486 {
3487         if (ca == 0x00 && (map[0] != SNDRV_CHMAP_FL || map[1] != SNDRV_CHMAP_FR))
3488                 return -EINVAL;
3489
3490         return 0;
3491 }
3492
3493 /* map from pin NID to port; port is 0-based */
3494 /* for Nvidia: assume widget NID starting from 4, with step 1 (4, 5, 6, ...) */
3495 static int nvhdmi_pin2port(void *audio_ptr, int pin_nid)
3496 {
3497         return pin_nid - 4;
3498 }
3499
3500 /* reverse-map from port to pin NID: see above */
3501 static int nvhdmi_port2pin(struct hda_codec *codec, int port)
3502 {
3503         return port + 4;
3504 }
3505
3506 static const struct drm_audio_component_audio_ops nvhdmi_audio_ops = {
3507         .pin2port = nvhdmi_pin2port,
3508         .pin_eld_notify = generic_acomp_pin_eld_notify,
3509         .master_bind = generic_acomp_master_bind,
3510         .master_unbind = generic_acomp_master_unbind,
3511 };
3512
3513 static int patch_nvhdmi(struct hda_codec *codec)
3514 {
3515         struct hdmi_spec *spec;
3516         int err;
3517
3518         err = alloc_generic_hdmi(codec);
3519         if (err < 0)
3520                 return err;
3521         codec->dp_mst = true;
3522
3523         spec = codec->spec;
3524         spec->dyn_pcm_assign = true;
3525
3526         err = hdmi_parse_codec(codec);
3527         if (err < 0) {
3528                 generic_spec_free(codec);
3529                 return err;
3530         }
3531
3532         generic_hdmi_init_per_pins(codec);
3533
3534         spec->dyn_pin_out = true;
3535
3536         spec->chmap.ops.chmap_cea_alloc_validate_get_type =
3537                 nvhdmi_chmap_cea_alloc_validate_get_type;
3538         spec->chmap.ops.chmap_validate = nvhdmi_chmap_validate;
3539
3540         codec->link_down_at_suspend = 1;
3541
3542         generic_acomp_init(codec, &nvhdmi_audio_ops, nvhdmi_port2pin);
3543
3544         return 0;
3545 }
3546
3547 static int patch_nvhdmi_legacy(struct hda_codec *codec)
3548 {
3549         struct hdmi_spec *spec;
3550         int err;
3551
3552         err = patch_generic_hdmi(codec);
3553         if (err)
3554                 return err;
3555
3556         spec = codec->spec;
3557         spec->dyn_pin_out = true;
3558
3559         spec->chmap.ops.chmap_cea_alloc_validate_get_type =
3560                 nvhdmi_chmap_cea_alloc_validate_get_type;
3561         spec->chmap.ops.chmap_validate = nvhdmi_chmap_validate;
3562
3563         codec->link_down_at_suspend = 1;
3564
3565         return 0;
3566 }
3567
3568 /*
3569  * The HDA codec on NVIDIA Tegra contains two scratch registers that are
3570  * accessed using vendor-defined verbs. These registers can be used for
3571  * interoperability between the HDA and HDMI drivers.
3572  */
3573
3574 /* Audio Function Group node */
3575 #define NVIDIA_AFG_NID 0x01
3576
3577 /*
3578  * The SCRATCH0 register is used to notify the HDMI codec of changes in audio
3579  * format. On Tegra, bit 31 is used as a trigger that causes an interrupt to
3580  * be raised in the HDMI codec. The remainder of the bits is arbitrary. This
3581  * implementation stores the HDA format (see AC_FMT_*) in bits [15:0] and an
3582  * additional bit (at position 30) to signal the validity of the format.
3583  *
3584  * | 31      | 30    | 29  16 | 15   0 |
3585  * +---------+-------+--------+--------+
3586  * | TRIGGER | VALID | UNUSED | FORMAT |
3587  * +-----------------------------------|
3588  *
3589  * Note that for the trigger bit to take effect it needs to change value
3590  * (i.e. it needs to be toggled).
3591  */
3592 #define NVIDIA_GET_SCRATCH0             0xfa6
3593 #define NVIDIA_SET_SCRATCH0_BYTE0       0xfa7
3594 #define NVIDIA_SET_SCRATCH0_BYTE1       0xfa8
3595 #define NVIDIA_SET_SCRATCH0_BYTE2       0xfa9
3596 #define NVIDIA_SET_SCRATCH0_BYTE3       0xfaa
3597 #define NVIDIA_SCRATCH_TRIGGER (1 << 7)
3598 #define NVIDIA_SCRATCH_VALID   (1 << 6)
3599
3600 #define NVIDIA_GET_SCRATCH1             0xfab
3601 #define NVIDIA_SET_SCRATCH1_BYTE0       0xfac
3602 #define NVIDIA_SET_SCRATCH1_BYTE1       0xfad
3603 #define NVIDIA_SET_SCRATCH1_BYTE2       0xfae
3604 #define NVIDIA_SET_SCRATCH1_BYTE3       0xfaf
3605
3606 /*
3607  * The format parameter is the HDA audio format (see AC_FMT_*). If set to 0,
3608  * the format is invalidated so that the HDMI codec can be disabled.
3609  */
3610 static void tegra_hdmi_set_format(struct hda_codec *codec, unsigned int format)
3611 {
3612         unsigned int value;
3613
3614         /* bits [31:30] contain the trigger and valid bits */
3615         value = snd_hda_codec_read(codec, NVIDIA_AFG_NID, 0,
3616                                    NVIDIA_GET_SCRATCH0, 0);
3617         value = (value >> 24) & 0xff;
3618
3619         /* bits [15:0] are used to store the HDA format */
3620         snd_hda_codec_write(codec, NVIDIA_AFG_NID, 0,
3621                             NVIDIA_SET_SCRATCH0_BYTE0,
3622                             (format >> 0) & 0xff);
3623         snd_hda_codec_write(codec, NVIDIA_AFG_NID, 0,
3624                             NVIDIA_SET_SCRATCH0_BYTE1,
3625                             (format >> 8) & 0xff);
3626
3627         /* bits [16:24] are unused */
3628         snd_hda_codec_write(codec, NVIDIA_AFG_NID, 0,
3629                             NVIDIA_SET_SCRATCH0_BYTE2, 0);
3630
3631         /*
3632          * Bit 30 signals that the data is valid and hence that HDMI audio can
3633          * be enabled.
3634          */
3635         if (format == 0)
3636                 value &= ~NVIDIA_SCRATCH_VALID;
3637         else
3638                 value |= NVIDIA_SCRATCH_VALID;
3639
3640         /*
3641          * Whenever the trigger bit is toggled, an interrupt is raised in the
3642          * HDMI codec. The HDMI driver will use that as trigger to update its
3643          * configuration.
3644          */
3645         value ^= NVIDIA_SCRATCH_TRIGGER;
3646
3647         snd_hda_codec_write(codec, NVIDIA_AFG_NID, 0,
3648                             NVIDIA_SET_SCRATCH0_BYTE3, value);
3649 }
3650
3651 static int tegra_hdmi_pcm_prepare(struct hda_pcm_stream *hinfo,
3652                                   struct hda_codec *codec,
3653                                   unsigned int stream_tag,
3654                                   unsigned int format,
3655                                   struct snd_pcm_substream *substream)
3656 {
3657         int err;
3658
3659         err = generic_hdmi_playback_pcm_prepare(hinfo, codec, stream_tag,
3660                                                 format, substream);
3661         if (err < 0)
3662                 return err;
3663
3664         /* notify the HDMI codec of the format change */
3665         tegra_hdmi_set_format(codec, format);
3666
3667         return 0;
3668 }
3669
3670 static int tegra_hdmi_pcm_cleanup(struct hda_pcm_stream *hinfo,
3671                                   struct hda_codec *codec,
3672                                   struct snd_pcm_substream *substream)
3673 {
3674         /* invalidate the format in the HDMI codec */
3675         tegra_hdmi_set_format(codec, 0);
3676
3677         return generic_hdmi_playback_pcm_cleanup(hinfo, codec, substream);
3678 }
3679
3680 static struct hda_pcm *hda_find_pcm_by_type(struct hda_codec *codec, int type)
3681 {
3682         struct hdmi_spec *spec = codec->spec;
3683         unsigned int i;
3684
3685         for (i = 0; i < spec->num_pins; i++) {
3686                 struct hda_pcm *pcm = get_pcm_rec(spec, i);
3687
3688                 if (pcm->pcm_type == type)
3689                         return pcm;
3690         }
3691
3692         return NULL;
3693 }
3694
3695 static int tegra_hdmi_build_pcms(struct hda_codec *codec)
3696 {
3697         struct hda_pcm_stream *stream;
3698         struct hda_pcm *pcm;
3699         int err;
3700
3701         err = generic_hdmi_build_pcms(codec);
3702         if (err < 0)
3703                 return err;
3704
3705         pcm = hda_find_pcm_by_type(codec, HDA_PCM_TYPE_HDMI);
3706         if (!pcm)
3707                 return -ENODEV;
3708
3709         /*
3710          * Override ->prepare() and ->cleanup() operations to notify the HDMI
3711          * codec about format changes.
3712          */
3713         stream = &pcm->stream[SNDRV_PCM_STREAM_PLAYBACK];
3714         stream->ops.prepare = tegra_hdmi_pcm_prepare;
3715         stream->ops.cleanup = tegra_hdmi_pcm_cleanup;
3716
3717         return 0;
3718 }
3719
3720 static int patch_tegra_hdmi(struct hda_codec *codec)
3721 {
3722         int err;
3723
3724         err = patch_generic_hdmi(codec);
3725         if (err)
3726                 return err;
3727
3728         codec->patch_ops.build_pcms = tegra_hdmi_build_pcms;
3729
3730         return 0;
3731 }
3732
3733 /*
3734  * ATI/AMD-specific implementations
3735  */
3736
3737 #define is_amdhdmi_rev3_or_later(codec) \
3738         ((codec)->core.vendor_id == 0x1002aa01 && \
3739          ((codec)->core.revision_id & 0xff00) >= 0x0300)
3740 #define has_amd_full_remap_support(codec) is_amdhdmi_rev3_or_later(codec)
3741
3742 /* ATI/AMD specific HDA pin verbs, see the AMD HDA Verbs specification */
3743 #define ATI_VERB_SET_CHANNEL_ALLOCATION 0x771
3744 #define ATI_VERB_SET_DOWNMIX_INFO       0x772
3745 #define ATI_VERB_SET_MULTICHANNEL_01    0x777
3746 #define ATI_VERB_SET_MULTICHANNEL_23    0x778
3747 #define ATI_VERB_SET_MULTICHANNEL_45    0x779
3748 #define ATI_VERB_SET_MULTICHANNEL_67    0x77a
3749 #define ATI_VERB_SET_HBR_CONTROL        0x77c
3750 #define ATI_VERB_SET_MULTICHANNEL_1     0x785
3751 #define ATI_VERB_SET_MULTICHANNEL_3     0x786
3752 #define ATI_VERB_SET_MULTICHANNEL_5     0x787
3753 #define ATI_VERB_SET_MULTICHANNEL_7     0x788
3754 #define ATI_VERB_SET_MULTICHANNEL_MODE  0x789
3755 #define ATI_VERB_GET_CHANNEL_ALLOCATION 0xf71
3756 #define ATI_VERB_GET_DOWNMIX_INFO       0xf72
3757 #define ATI_VERB_GET_MULTICHANNEL_01    0xf77
3758 #define ATI_VERB_GET_MULTICHANNEL_23    0xf78
3759 #define ATI_VERB_GET_MULTICHANNEL_45    0xf79
3760 #define ATI_VERB_GET_MULTICHANNEL_67    0xf7a
3761 #define ATI_VERB_GET_HBR_CONTROL        0xf7c
3762 #define ATI_VERB_GET_MULTICHANNEL_1     0xf85
3763 #define ATI_VERB_GET_MULTICHANNEL_3     0xf86
3764 #define ATI_VERB_GET_MULTICHANNEL_5     0xf87
3765 #define ATI_VERB_GET_MULTICHANNEL_7     0xf88
3766 #define ATI_VERB_GET_MULTICHANNEL_MODE  0xf89
3767
3768 /* AMD specific HDA cvt verbs */
3769 #define ATI_VERB_SET_RAMP_RATE          0x770
3770 #define ATI_VERB_GET_RAMP_RATE          0xf70
3771
3772 #define ATI_OUT_ENABLE 0x1
3773
3774 #define ATI_MULTICHANNEL_MODE_PAIRED    0
3775 #define ATI_MULTICHANNEL_MODE_SINGLE    1
3776
3777 #define ATI_HBR_CAPABLE 0x01
3778 #define ATI_HBR_ENABLE 0x10
3779
3780 static int atihdmi_pin_get_eld(struct hda_codec *codec, hda_nid_t nid,
3781                                int dev_id, unsigned char *buf, int *eld_size)
3782 {
3783         WARN_ON(dev_id != 0);
3784         /* call hda_eld.c ATI/AMD-specific function */
3785         return snd_hdmi_get_eld_ati(codec, nid, buf, eld_size,
3786                                     is_amdhdmi_rev3_or_later(codec));
3787 }
3788
3789 static void atihdmi_pin_setup_infoframe(struct hda_codec *codec,
3790                                         hda_nid_t pin_nid, int dev_id, int ca,
3791                                         int active_channels, int conn_type)
3792 {
3793         WARN_ON(dev_id != 0);
3794         snd_hda_codec_write(codec, pin_nid, 0, ATI_VERB_SET_CHANNEL_ALLOCATION, ca);
3795 }
3796
3797 static int atihdmi_paired_swap_fc_lfe(int pos)
3798 {
3799         /*
3800          * ATI/AMD have automatic FC/LFE swap built-in
3801          * when in pairwise mapping mode.
3802          */
3803
3804         switch (pos) {
3805                 /* see channel_allocations[].speakers[] */
3806                 case 2: return 3;
3807                 case 3: return 2;
3808                 default: break;
3809         }
3810
3811         return pos;
3812 }
3813
3814 static int atihdmi_paired_chmap_validate(struct hdac_chmap *chmap,
3815                         int ca, int chs, unsigned char *map)
3816 {
3817         struct hdac_cea_channel_speaker_allocation *cap;
3818         int i, j;
3819
3820         /* check that only channel pairs need to be remapped on old pre-rev3 ATI/AMD */
3821
3822         cap = snd_hdac_get_ch_alloc_from_ca(ca);
3823         for (i = 0; i < chs; ++i) {
3824                 int mask = snd_hdac_chmap_to_spk_mask(map[i]);
3825                 bool ok = false;
3826                 bool companion_ok = false;
3827
3828                 if (!mask)
3829                         continue;
3830
3831                 for (j = 0 + i % 2; j < 8; j += 2) {
3832                         int chan_idx = 7 - atihdmi_paired_swap_fc_lfe(j);
3833                         if (cap->speakers[chan_idx] == mask) {
3834                                 /* channel is in a supported position */
3835                                 ok = true;
3836
3837                                 if (i % 2 == 0 && i + 1 < chs) {
3838                                         /* even channel, check the odd companion */
3839                                         int comp_chan_idx = 7 - atihdmi_paired_swap_fc_lfe(j + 1);
3840                                         int comp_mask_req = snd_hdac_chmap_to_spk_mask(map[i+1]);
3841                                         int comp_mask_act = cap->speakers[comp_chan_idx];
3842
3843                                         if (comp_mask_req == comp_mask_act)
3844                                                 companion_ok = true;
3845                                         else
3846                                                 return -EINVAL;
3847                                 }
3848                                 break;
3849                         }
3850                 }
3851
3852                 if (!ok)
3853                         return -EINVAL;
3854
3855                 if (companion_ok)
3856                         i++; /* companion channel already checked */
3857         }
3858
3859         return 0;
3860 }
3861
3862 static int atihdmi_pin_set_slot_channel(struct hdac_device *hdac,
3863                 hda_nid_t pin_nid, int hdmi_slot, int stream_channel)
3864 {
3865         struct hda_codec *codec = hdac_to_hda_codec(hdac);
3866         int verb;
3867         int ati_channel_setup = 0;
3868
3869         if (hdmi_slot > 7)
3870                 return -EINVAL;
3871
3872         if (!has_amd_full_remap_support(codec)) {
3873                 hdmi_slot = atihdmi_paired_swap_fc_lfe(hdmi_slot);
3874
3875                 /* In case this is an odd slot but without stream channel, do not
3876                  * disable the slot since the corresponding even slot could have a
3877                  * channel. In case neither have a channel, the slot pair will be
3878                  * disabled when this function is called for the even slot. */
3879                 if (hdmi_slot % 2 != 0 && stream_channel == 0xf)
3880                         return 0;
3881
3882                 hdmi_slot -= hdmi_slot % 2;
3883
3884                 if (stream_channel != 0xf)
3885                         stream_channel -= stream_channel % 2;
3886         }
3887
3888         verb = ATI_VERB_SET_MULTICHANNEL_01 + hdmi_slot/2 + (hdmi_slot % 2) * 0x00e;
3889
3890         /* ati_channel_setup format: [7..4] = stream_channel_id, [1] = mute, [0] = enable */
3891
3892         if (stream_channel != 0xf)
3893                 ati_channel_setup = (stream_channel << 4) | ATI_OUT_ENABLE;
3894
3895         return snd_hda_codec_write(codec, pin_nid, 0, verb, ati_channel_setup);
3896 }
3897
3898 static int atihdmi_pin_get_slot_channel(struct hdac_device *hdac,
3899                                 hda_nid_t pin_nid, int asp_slot)
3900 {
3901         struct hda_codec *codec = hdac_to_hda_codec(hdac);
3902         bool was_odd = false;
3903         int ati_asp_slot = asp_slot;
3904         int verb;
3905         int ati_channel_setup;
3906
3907         if (asp_slot > 7)
3908                 return -EINVAL;
3909
3910         if (!has_amd_full_remap_support(codec)) {
3911                 ati_asp_slot = atihdmi_paired_swap_fc_lfe(asp_slot);
3912                 if (ati_asp_slot % 2 != 0) {
3913                         ati_asp_slot -= 1;
3914                         was_odd = true;
3915                 }
3916         }
3917
3918         verb = ATI_VERB_GET_MULTICHANNEL_01 + ati_asp_slot/2 + (ati_asp_slot % 2) * 0x00e;
3919
3920         ati_channel_setup = snd_hda_codec_read(codec, pin_nid, 0, verb, 0);
3921
3922         if (!(ati_channel_setup & ATI_OUT_ENABLE))
3923                 return 0xf;
3924
3925         return ((ati_channel_setup & 0xf0) >> 4) + !!was_odd;
3926 }
3927
3928 static int atihdmi_paired_chmap_cea_alloc_validate_get_type(
3929                 struct hdac_chmap *chmap,
3930                 struct hdac_cea_channel_speaker_allocation *cap,
3931                 int channels)
3932 {
3933         int c;
3934
3935         /*
3936          * Pre-rev3 ATI/AMD codecs operate in a paired channel mode, so
3937          * we need to take that into account (a single channel may take 2
3938          * channel slots if we need to carry a silent channel next to it).
3939          * On Rev3+ AMD codecs this function is not used.
3940          */
3941         int chanpairs = 0;
3942
3943         /* We only produce even-numbered channel count TLVs */
3944         if ((channels % 2) != 0)
3945                 return -1;
3946
3947         for (c = 0; c < 7; c += 2) {
3948                 if (cap->speakers[c] || cap->speakers[c+1])
3949                         chanpairs++;
3950         }
3951
3952         if (chanpairs * 2 != channels)
3953                 return -1;
3954
3955         return SNDRV_CTL_TLVT_CHMAP_PAIRED;
3956 }
3957
3958 static void atihdmi_paired_cea_alloc_to_tlv_chmap(struct hdac_chmap *hchmap,
3959                 struct hdac_cea_channel_speaker_allocation *cap,
3960                 unsigned int *chmap, int channels)
3961 {
3962         /* produce paired maps for pre-rev3 ATI/AMD codecs */
3963         int count = 0;
3964         int c;
3965
3966         for (c = 7; c >= 0; c--) {
3967                 int chan = 7 - atihdmi_paired_swap_fc_lfe(7 - c);
3968                 int spk = cap->speakers[chan];
3969                 if (!spk) {
3970                         /* add N/A channel if the companion channel is occupied */
3971                         if (cap->speakers[chan + (chan % 2 ? -1 : 1)])
3972                                 chmap[count++] = SNDRV_CHMAP_NA;
3973
3974                         continue;
3975                 }
3976
3977                 chmap[count++] = snd_hdac_spk_to_chmap(spk);
3978         }
3979
3980         WARN_ON(count != channels);
3981 }
3982
3983 static int atihdmi_pin_hbr_setup(struct hda_codec *codec, hda_nid_t pin_nid,
3984                                  int dev_id, bool hbr)
3985 {
3986         int hbr_ctl, hbr_ctl_new;
3987
3988         WARN_ON(dev_id != 0);
3989
3990         hbr_ctl = snd_hda_codec_read(codec, pin_nid, 0, ATI_VERB_GET_HBR_CONTROL, 0);
3991         if (hbr_ctl >= 0 && (hbr_ctl & ATI_HBR_CAPABLE)) {
3992                 if (hbr)
3993                         hbr_ctl_new = hbr_ctl | ATI_HBR_ENABLE;
3994                 else
3995                         hbr_ctl_new = hbr_ctl & ~ATI_HBR_ENABLE;
3996
3997                 codec_dbg(codec,
3998                           "atihdmi_pin_hbr_setup: NID=0x%x, %shbr-ctl=0x%x\n",
3999                                 pin_nid,
4000                                 hbr_ctl == hbr_ctl_new ? "" : "new-",
4001                                 hbr_ctl_new);
4002
4003                 if (hbr_ctl != hbr_ctl_new)
4004                         snd_hda_codec_write(codec, pin_nid, 0,
4005                                                 ATI_VERB_SET_HBR_CONTROL,
4006                                                 hbr_ctl_new);
4007
4008         } else if (hbr)
4009                 return -EINVAL;
4010
4011         return 0;
4012 }
4013
4014 static int atihdmi_setup_stream(struct hda_codec *codec, hda_nid_t cvt_nid,
4015                                 hda_nid_t pin_nid, int dev_id,
4016                                 u32 stream_tag, int format)
4017 {
4018         if (is_amdhdmi_rev3_or_later(codec)) {
4019                 int ramp_rate = 180; /* default as per AMD spec */
4020                 /* disable ramp-up/down for non-pcm as per AMD spec */
4021                 if (format & AC_FMT_TYPE_NON_PCM)
4022                         ramp_rate = 0;
4023
4024                 snd_hda_codec_write(codec, cvt_nid, 0, ATI_VERB_SET_RAMP_RATE, ramp_rate);
4025         }
4026
4027         return hdmi_setup_stream(codec, cvt_nid, pin_nid, dev_id,
4028                                  stream_tag, format);
4029 }
4030
4031
4032 static int atihdmi_init(struct hda_codec *codec)
4033 {
4034         struct hdmi_spec *spec = codec->spec;
4035         int pin_idx, err;
4036
4037         err = generic_hdmi_init(codec);
4038
4039         if (err)
4040                 return err;
4041
4042         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
4043                 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
4044
4045                 /* make sure downmix information in infoframe is zero */
4046                 snd_hda_codec_write(codec, per_pin->pin_nid, 0, ATI_VERB_SET_DOWNMIX_INFO, 0);
4047
4048                 /* enable channel-wise remap mode if supported */
4049                 if (has_amd_full_remap_support(codec))
4050                         snd_hda_codec_write(codec, per_pin->pin_nid, 0,
4051                                             ATI_VERB_SET_MULTICHANNEL_MODE,
4052                                             ATI_MULTICHANNEL_MODE_SINGLE);
4053         }
4054         codec->auto_runtime_pm = 1;
4055
4056         return 0;
4057 }
4058
4059 /* map from pin NID to port; port is 0-based */
4060 /* for AMD: assume widget NID starting from 3, with step 2 (3, 5, 7, ...) */
4061 static int atihdmi_pin2port(void *audio_ptr, int pin_nid)
4062 {
4063         return pin_nid / 2 - 1;
4064 }
4065
4066 /* reverse-map from port to pin NID: see above */
4067 static int atihdmi_port2pin(struct hda_codec *codec, int port)
4068 {
4069         return port * 2 + 3;
4070 }
4071
4072 static const struct drm_audio_component_audio_ops atihdmi_audio_ops = {
4073         .pin2port = atihdmi_pin2port,
4074         .pin_eld_notify = generic_acomp_pin_eld_notify,
4075         .master_bind = generic_acomp_master_bind,
4076         .master_unbind = generic_acomp_master_unbind,
4077 };
4078
4079 static int patch_atihdmi(struct hda_codec *codec)
4080 {
4081         struct hdmi_spec *spec;
4082         struct hdmi_spec_per_cvt *per_cvt;
4083         int err, cvt_idx;
4084
4085         err = patch_generic_hdmi(codec);
4086
4087         if (err)
4088                 return err;
4089
4090         codec->patch_ops.init = atihdmi_init;
4091
4092         spec = codec->spec;
4093
4094         spec->ops.pin_get_eld = atihdmi_pin_get_eld;
4095         spec->ops.pin_setup_infoframe = atihdmi_pin_setup_infoframe;
4096         spec->ops.pin_hbr_setup = atihdmi_pin_hbr_setup;
4097         spec->ops.setup_stream = atihdmi_setup_stream;
4098
4099         spec->chmap.ops.pin_get_slot_channel = atihdmi_pin_get_slot_channel;
4100         spec->chmap.ops.pin_set_slot_channel = atihdmi_pin_set_slot_channel;
4101
4102         if (!has_amd_full_remap_support(codec)) {
4103                 /* override to ATI/AMD-specific versions with pairwise mapping */
4104                 spec->chmap.ops.chmap_cea_alloc_validate_get_type =
4105                         atihdmi_paired_chmap_cea_alloc_validate_get_type;
4106                 spec->chmap.ops.cea_alloc_to_tlv_chmap =
4107                                 atihdmi_paired_cea_alloc_to_tlv_chmap;
4108                 spec->chmap.ops.chmap_validate = atihdmi_paired_chmap_validate;
4109         }
4110
4111         /* ATI/AMD converters do not advertise all of their capabilities */
4112         for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++) {
4113                 per_cvt = get_cvt(spec, cvt_idx);
4114                 per_cvt->channels_max = max(per_cvt->channels_max, 8u);
4115                 per_cvt->rates |= SUPPORTED_RATES;
4116                 per_cvt->formats |= SUPPORTED_FORMATS;
4117                 per_cvt->maxbps = max(per_cvt->maxbps, 24u);
4118         }
4119
4120         spec->chmap.channels_max = max(spec->chmap.channels_max, 8u);
4121
4122         /* AMD GPUs have neither EPSS nor CLKSTOP bits, hence preventing
4123          * the link-down as is.  Tell the core to allow it.
4124          */
4125         codec->link_down_at_suspend = 1;
4126
4127         generic_acomp_init(codec, &atihdmi_audio_ops, atihdmi_port2pin);
4128
4129         return 0;
4130 }
4131
4132 /* VIA HDMI Implementation */
4133 #define VIAHDMI_CVT_NID 0x02    /* audio converter1 */
4134 #define VIAHDMI_PIN_NID 0x03    /* HDMI output pin1 */
4135
4136 static int patch_via_hdmi(struct hda_codec *codec)
4137 {
4138         return patch_simple_hdmi(codec, VIAHDMI_CVT_NID, VIAHDMI_PIN_NID);
4139 }
4140
4141 /*
4142  * patch entries
4143  */
4144 static const struct hda_device_id snd_hda_id_hdmi[] = {
4145 HDA_CODEC_ENTRY(0x1002793c, "RS600 HDMI",       patch_atihdmi),
4146 HDA_CODEC_ENTRY(0x10027919, "RS600 HDMI",       patch_atihdmi),
4147 HDA_CODEC_ENTRY(0x1002791a, "RS690/780 HDMI",   patch_atihdmi),
4148 HDA_CODEC_ENTRY(0x1002aa01, "R6xx HDMI",        patch_atihdmi),
4149 HDA_CODEC_ENTRY(0x10951390, "SiI1390 HDMI",     patch_generic_hdmi),
4150 HDA_CODEC_ENTRY(0x10951392, "SiI1392 HDMI",     patch_generic_hdmi),
4151 HDA_CODEC_ENTRY(0x17e80047, "Chrontel HDMI",    patch_generic_hdmi),
4152 HDA_CODEC_ENTRY(0x10de0001, "MCP73 HDMI",       patch_nvhdmi_2ch),
4153 HDA_CODEC_ENTRY(0x10de0002, "MCP77/78 HDMI",    patch_nvhdmi_8ch_7x),
4154 HDA_CODEC_ENTRY(0x10de0003, "MCP77/78 HDMI",    patch_nvhdmi_8ch_7x),
4155 HDA_CODEC_ENTRY(0x10de0004, "GPU 04 HDMI",      patch_nvhdmi_8ch_7x),
4156 HDA_CODEC_ENTRY(0x10de0005, "MCP77/78 HDMI",    patch_nvhdmi_8ch_7x),
4157 HDA_CODEC_ENTRY(0x10de0006, "MCP77/78 HDMI",    patch_nvhdmi_8ch_7x),
4158 HDA_CODEC_ENTRY(0x10de0007, "MCP79/7A HDMI",    patch_nvhdmi_8ch_7x),
4159 HDA_CODEC_ENTRY(0x10de0008, "GPU 08 HDMI/DP",   patch_nvhdmi_legacy),
4160 HDA_CODEC_ENTRY(0x10de0009, "GPU 09 HDMI/DP",   patch_nvhdmi_legacy),
4161 HDA_CODEC_ENTRY(0x10de000a, "GPU 0a HDMI/DP",   patch_nvhdmi_legacy),
4162 HDA_CODEC_ENTRY(0x10de000b, "GPU 0b HDMI/DP",   patch_nvhdmi_legacy),
4163 HDA_CODEC_ENTRY(0x10de000c, "MCP89 HDMI",       patch_nvhdmi_legacy),
4164 HDA_CODEC_ENTRY(0x10de000d, "GPU 0d HDMI/DP",   patch_nvhdmi_legacy),
4165 HDA_CODEC_ENTRY(0x10de0010, "GPU 10 HDMI/DP",   patch_nvhdmi_legacy),
4166 HDA_CODEC_ENTRY(0x10de0011, "GPU 11 HDMI/DP",   patch_nvhdmi_legacy),
4167 HDA_CODEC_ENTRY(0x10de0012, "GPU 12 HDMI/DP",   patch_nvhdmi_legacy),
4168 HDA_CODEC_ENTRY(0x10de0013, "GPU 13 HDMI/DP",   patch_nvhdmi_legacy),
4169 HDA_CODEC_ENTRY(0x10de0014, "GPU 14 HDMI/DP",   patch_nvhdmi_legacy),
4170 HDA_CODEC_ENTRY(0x10de0015, "GPU 15 HDMI/DP",   patch_nvhdmi_legacy),
4171 HDA_CODEC_ENTRY(0x10de0016, "GPU 16 HDMI/DP",   patch_nvhdmi_legacy),
4172 /* 17 is known to be absent */
4173 HDA_CODEC_ENTRY(0x10de0018, "GPU 18 HDMI/DP",   patch_nvhdmi_legacy),
4174 HDA_CODEC_ENTRY(0x10de0019, "GPU 19 HDMI/DP",   patch_nvhdmi_legacy),
4175 HDA_CODEC_ENTRY(0x10de001a, "GPU 1a HDMI/DP",   patch_nvhdmi_legacy),
4176 HDA_CODEC_ENTRY(0x10de001b, "GPU 1b HDMI/DP",   patch_nvhdmi_legacy),
4177 HDA_CODEC_ENTRY(0x10de001c, "GPU 1c HDMI/DP",   patch_nvhdmi_legacy),
4178 HDA_CODEC_ENTRY(0x10de0020, "Tegra30 HDMI",     patch_tegra_hdmi),
4179 HDA_CODEC_ENTRY(0x10de0022, "Tegra114 HDMI",    patch_tegra_hdmi),
4180 HDA_CODEC_ENTRY(0x10de0028, "Tegra124 HDMI",    patch_tegra_hdmi),
4181 HDA_CODEC_ENTRY(0x10de0029, "Tegra210 HDMI/DP", patch_tegra_hdmi),
4182 HDA_CODEC_ENTRY(0x10de002d, "Tegra186 HDMI/DP0", patch_tegra_hdmi),
4183 HDA_CODEC_ENTRY(0x10de002e, "Tegra186 HDMI/DP1", patch_tegra_hdmi),
4184 HDA_CODEC_ENTRY(0x10de002f, "Tegra194 HDMI/DP2", patch_tegra_hdmi),
4185 HDA_CODEC_ENTRY(0x10de0030, "Tegra194 HDMI/DP3", patch_tegra_hdmi),
4186 HDA_CODEC_ENTRY(0x10de0040, "GPU 40 HDMI/DP",   patch_nvhdmi),
4187 HDA_CODEC_ENTRY(0x10de0041, "GPU 41 HDMI/DP",   patch_nvhdmi),
4188 HDA_CODEC_ENTRY(0x10de0042, "GPU 42 HDMI/DP",   patch_nvhdmi),
4189 HDA_CODEC_ENTRY(0x10de0043, "GPU 43 HDMI/DP",   patch_nvhdmi),
4190 HDA_CODEC_ENTRY(0x10de0044, "GPU 44 HDMI/DP",   patch_nvhdmi),
4191 HDA_CODEC_ENTRY(0x10de0045, "GPU 45 HDMI/DP",   patch_nvhdmi),
4192 HDA_CODEC_ENTRY(0x10de0050, "GPU 50 HDMI/DP",   patch_nvhdmi),
4193 HDA_CODEC_ENTRY(0x10de0051, "GPU 51 HDMI/DP",   patch_nvhdmi),
4194 HDA_CODEC_ENTRY(0x10de0052, "GPU 52 HDMI/DP",   patch_nvhdmi),
4195 HDA_CODEC_ENTRY(0x10de0060, "GPU 60 HDMI/DP",   patch_nvhdmi),
4196 HDA_CODEC_ENTRY(0x10de0061, "GPU 61 HDMI/DP",   patch_nvhdmi),
4197 HDA_CODEC_ENTRY(0x10de0062, "GPU 62 HDMI/DP",   patch_nvhdmi),
4198 HDA_CODEC_ENTRY(0x10de0067, "MCP67 HDMI",       patch_nvhdmi_2ch),
4199 HDA_CODEC_ENTRY(0x10de0070, "GPU 70 HDMI/DP",   patch_nvhdmi),
4200 HDA_CODEC_ENTRY(0x10de0071, "GPU 71 HDMI/DP",   patch_nvhdmi),
4201 HDA_CODEC_ENTRY(0x10de0072, "GPU 72 HDMI/DP",   patch_nvhdmi),
4202 HDA_CODEC_ENTRY(0x10de0073, "GPU 73 HDMI/DP",   patch_nvhdmi),
4203 HDA_CODEC_ENTRY(0x10de0074, "GPU 74 HDMI/DP",   patch_nvhdmi),
4204 HDA_CODEC_ENTRY(0x10de0076, "GPU 76 HDMI/DP",   patch_nvhdmi),
4205 HDA_CODEC_ENTRY(0x10de007b, "GPU 7b HDMI/DP",   patch_nvhdmi),
4206 HDA_CODEC_ENTRY(0x10de007c, "GPU 7c HDMI/DP",   patch_nvhdmi),
4207 HDA_CODEC_ENTRY(0x10de007d, "GPU 7d HDMI/DP",   patch_nvhdmi),
4208 HDA_CODEC_ENTRY(0x10de007e, "GPU 7e HDMI/DP",   patch_nvhdmi),
4209 HDA_CODEC_ENTRY(0x10de0080, "GPU 80 HDMI/DP",   patch_nvhdmi),
4210 HDA_CODEC_ENTRY(0x10de0081, "GPU 81 HDMI/DP",   patch_nvhdmi),
4211 HDA_CODEC_ENTRY(0x10de0082, "GPU 82 HDMI/DP",   patch_nvhdmi),
4212 HDA_CODEC_ENTRY(0x10de0083, "GPU 83 HDMI/DP",   patch_nvhdmi),
4213 HDA_CODEC_ENTRY(0x10de0084, "GPU 84 HDMI/DP",   patch_nvhdmi),
4214 HDA_CODEC_ENTRY(0x10de0090, "GPU 90 HDMI/DP",   patch_nvhdmi),
4215 HDA_CODEC_ENTRY(0x10de0091, "GPU 91 HDMI/DP",   patch_nvhdmi),
4216 HDA_CODEC_ENTRY(0x10de0092, "GPU 92 HDMI/DP",   patch_nvhdmi),
4217 HDA_CODEC_ENTRY(0x10de0093, "GPU 93 HDMI/DP",   patch_nvhdmi),
4218 HDA_CODEC_ENTRY(0x10de0094, "GPU 94 HDMI/DP",   patch_nvhdmi),
4219 HDA_CODEC_ENTRY(0x10de0095, "GPU 95 HDMI/DP",   patch_nvhdmi),
4220 HDA_CODEC_ENTRY(0x10de0097, "GPU 97 HDMI/DP",   patch_nvhdmi),
4221 HDA_CODEC_ENTRY(0x10de0098, "GPU 98 HDMI/DP",   patch_nvhdmi),
4222 HDA_CODEC_ENTRY(0x10de0099, "GPU 99 HDMI/DP",   patch_nvhdmi),
4223 HDA_CODEC_ENTRY(0x10de009a, "GPU 9a HDMI/DP",   patch_nvhdmi),
4224 HDA_CODEC_ENTRY(0x10de009d, "GPU 9d HDMI/DP",   patch_nvhdmi),
4225 HDA_CODEC_ENTRY(0x10de009e, "GPU 9e HDMI/DP",   patch_nvhdmi),
4226 HDA_CODEC_ENTRY(0x10de009f, "GPU 9f HDMI/DP",   patch_nvhdmi),
4227 HDA_CODEC_ENTRY(0x10de00a0, "GPU a0 HDMI/DP",   patch_nvhdmi),
4228 HDA_CODEC_ENTRY(0x10de8001, "MCP73 HDMI",       patch_nvhdmi_2ch),
4229 HDA_CODEC_ENTRY(0x10de8067, "MCP67/68 HDMI",    patch_nvhdmi_2ch),
4230 HDA_CODEC_ENTRY(0x11069f80, "VX900 HDMI/DP",    patch_via_hdmi),
4231 HDA_CODEC_ENTRY(0x11069f81, "VX900 HDMI/DP",    patch_via_hdmi),
4232 HDA_CODEC_ENTRY(0x11069f84, "VX11 HDMI/DP",     patch_generic_hdmi),
4233 HDA_CODEC_ENTRY(0x11069f85, "VX11 HDMI/DP",     patch_generic_hdmi),
4234 HDA_CODEC_ENTRY(0x80860054, "IbexPeak HDMI",    patch_i915_cpt_hdmi),
4235 HDA_CODEC_ENTRY(0x80862800, "Geminilake HDMI",  patch_i915_glk_hdmi),
4236 HDA_CODEC_ENTRY(0x80862801, "Bearlake HDMI",    patch_generic_hdmi),
4237 HDA_CODEC_ENTRY(0x80862802, "Cantiga HDMI",     patch_generic_hdmi),
4238 HDA_CODEC_ENTRY(0x80862803, "Eaglelake HDMI",   patch_generic_hdmi),
4239 HDA_CODEC_ENTRY(0x80862804, "IbexPeak HDMI",    patch_i915_cpt_hdmi),
4240 HDA_CODEC_ENTRY(0x80862805, "CougarPoint HDMI", patch_i915_cpt_hdmi),
4241 HDA_CODEC_ENTRY(0x80862806, "PantherPoint HDMI", patch_i915_cpt_hdmi),
4242 HDA_CODEC_ENTRY(0x80862807, "Haswell HDMI",     patch_i915_hsw_hdmi),
4243 HDA_CODEC_ENTRY(0x80862808, "Broadwell HDMI",   patch_i915_hsw_hdmi),
4244 HDA_CODEC_ENTRY(0x80862809, "Skylake HDMI",     patch_i915_hsw_hdmi),
4245 HDA_CODEC_ENTRY(0x8086280a, "Broxton HDMI",     patch_i915_hsw_hdmi),
4246 HDA_CODEC_ENTRY(0x8086280b, "Kabylake HDMI",    patch_i915_hsw_hdmi),
4247 HDA_CODEC_ENTRY(0x8086280c, "Cannonlake HDMI",  patch_i915_glk_hdmi),
4248 HDA_CODEC_ENTRY(0x8086280d, "Geminilake HDMI",  patch_i915_glk_hdmi),
4249 HDA_CODEC_ENTRY(0x8086280f, "Icelake HDMI",     patch_i915_icl_hdmi),
4250 HDA_CODEC_ENTRY(0x80862812, "Tigerlake HDMI",   patch_i915_tgl_hdmi),
4251 HDA_CODEC_ENTRY(0x8086281a, "Jasperlake HDMI",  patch_i915_icl_hdmi),
4252 HDA_CODEC_ENTRY(0x8086281b, "Elkhartlake HDMI", patch_i915_icl_hdmi),
4253 HDA_CODEC_ENTRY(0x80862880, "CedarTrail HDMI",  patch_generic_hdmi),
4254 HDA_CODEC_ENTRY(0x80862882, "Valleyview2 HDMI", patch_i915_byt_hdmi),
4255 HDA_CODEC_ENTRY(0x80862883, "Braswell HDMI",    patch_i915_byt_hdmi),
4256 HDA_CODEC_ENTRY(0x808629fb, "Crestline HDMI",   patch_generic_hdmi),
4257 /* special ID for generic HDMI */
4258 HDA_CODEC_ENTRY(HDA_CODEC_ID_GENERIC_HDMI, "Generic HDMI", patch_generic_hdmi),
4259 {} /* terminator */
4260 };
4261 MODULE_DEVICE_TABLE(hdaudio, snd_hda_id_hdmi);
4262
4263 MODULE_LICENSE("GPL");
4264 MODULE_DESCRIPTION("HDMI HD-audio codec");
4265 MODULE_ALIAS("snd-hda-codec-intelhdmi");
4266 MODULE_ALIAS("snd-hda-codec-nvhdmi");
4267 MODULE_ALIAS("snd-hda-codec-atihdmi");
4268
4269 static struct hda_codec_driver hdmi_driver = {
4270         .id = snd_hda_id_hdmi,
4271 };
4272
4273 module_hda_codec_driver(hdmi_driver);