drivers/gpu/drm/vc4/vc4_dpi.c

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /*
   3  * Copyright (C) 2016 Broadcom Limited
   4  */
   5
   6 /**
   7  * DOC: VC4 DPI module
   8  *
   9  * The VC4 DPI hardware supports MIPI DPI type 4 and Nokia ViSSI
  10  * signals.  On BCM2835, these can be routed out to GPIO0-27 with the
  11  * ALT2 function.
  12  */
  13
  14 #include <drm/drm_atomic_helper.h>
  15 #include <drm/drm_bridge.h>
  16 #include <drm/drm_drv.h>
  17 #include <drm/drm_edid.h>
  18 #include <drm/drm_of.h>
  19 #include <drm/drm_panel.h>
  20 #include <drm/drm_probe_helper.h>
  21 #include <drm/drm_simple_kms_helper.h>
  22 #include <linux/clk.h>
  23 #include <linux/component.h>
  24 #include <linux/media-bus-format.h>
  25 #include <linux/of_graph.h>
  26 #include <linux/of_platform.h>
  27 #include "vc4_drv.h"
  28 #include "vc4_regs.h"
  29
  30 #define DPI_C                   0x00
  31 # define DPI_OUTPUT_ENABLE_MODE         BIT(16)
  32
  33 /* The order field takes the incoming 24 bit RGB from the pixel valve
  34  * and shuffles the 3 channels.
  35  */
  36 # define DPI_ORDER_MASK                 VC4_MASK(15, 14)
  37 # define DPI_ORDER_SHIFT                14
  38 # define DPI_ORDER_RGB                  0
  39 # define DPI_ORDER_BGR                  1
  40 # define DPI_ORDER_GRB                  2
  41 # define DPI_ORDER_BRG                  3
  42
  43 /* The format field takes the ORDER-shuffled pixel valve data and
  44  * formats it onto the output lines.
  45  */
  46 # define DPI_FORMAT_MASK                VC4_MASK(13, 11)
  47 # define DPI_FORMAT_SHIFT               11
  48 /* This define is named in the hardware, but actually just outputs 0. */
  49 # define DPI_FORMAT_9BIT_666_RGB        0
  50 /* Outputs 00000000rrrrrggggggbbbbb */
  51 # define DPI_FORMAT_16BIT_565_RGB_1     1
  52 /* Outputs 000rrrrr00gggggg000bbbbb */
  53 # define DPI_FORMAT_16BIT_565_RGB_2     2
  54 /* Outputs 00rrrrr000gggggg00bbbbb0 */
  55 # define DPI_FORMAT_16BIT_565_RGB_3     3
  56 /* Outputs 000000rrrrrrggggggbbbbbb */
  57 # define DPI_FORMAT_18BIT_666_RGB_1     4
  58 /* Outputs 00rrrrrr00gggggg00bbbbbb */
  59 # define DPI_FORMAT_18BIT_666_RGB_2     5
  60 /* Outputs rrrrrrrrggggggggbbbbbbbb */
  61 # define DPI_FORMAT_24BIT_888_RGB       6
  62
  63 /* Reverses the polarity of the corresponding signal */
  64 # define DPI_PIXEL_CLK_INVERT           BIT(10)
  65 # define DPI_HSYNC_INVERT               BIT(9)
  66 # define DPI_VSYNC_INVERT               BIT(8)
  67 # define DPI_OUTPUT_ENABLE_INVERT       BIT(7)
  68
  69 /* Outputs the signal the falling clock edge instead of rising. */
  70 # define DPI_HSYNC_NEGATE               BIT(6)
  71 # define DPI_VSYNC_NEGATE               BIT(5)
  72 # define DPI_OUTPUT_ENABLE_NEGATE       BIT(4)
  73
  74 /* Disables the signal */
  75 # define DPI_HSYNC_DISABLE              BIT(3)
  76 # define DPI_VSYNC_DISABLE              BIT(2)
  77 # define DPI_OUTPUT_ENABLE_DISABLE      BIT(1)
  78
  79 /* Power gate to the device, full reset at 0 -> 1 transition */
  80 # define DPI_ENABLE                     BIT(0)
  81
  82 /* All other registers besides DPI_C return the ID */
  83 #define DPI_ID                  0x04
  84 # define DPI_ID_VALUE           0x00647069
  85
  86 /* General DPI hardware state. */
  87 struct vc4_dpi {
  88         struct vc4_encoder encoder;
  89
  90         struct platform_device *pdev;
  91
  92         void __iomem *regs;
  93
  94         struct clk *pixel_clock;
  95         struct clk *core_clock;
  96
  97         struct debugfs_regset32 regset;
  98 };
  99
 100 static inline struct vc4_dpi *
 101 to_vc4_dpi(struct drm_encoder *encoder)
 102 {
 103         return container_of(encoder, struct vc4_dpi, encoder.base);
 104 }
 105
 106 #define DPI_READ(offset)                                                                \
 107         ({                                                                              \
 108                 kunit_fail_current_test("Accessing a register in a unit test!\n");      \
 109                 readl(dpi->regs + (offset));                                            \
 110         })
 111
 112 #define DPI_WRITE(offset, val)                                                          \
 113         do {                                                                            \
 114                 kunit_fail_current_test("Accessing a register in a unit test!\n");      \
 115                 writel(val, dpi->regs + (offset));                                      \
 116         } while (0)
 117
 118 static const struct debugfs_reg32 dpi_regs[] = {
 119         VC4_REG32(DPI_C),
 120         VC4_REG32(DPI_ID),
 121 };
 122
 123 static void vc4_dpi_encoder_disable(struct drm_encoder *encoder)
 124 {
 125         struct drm_device *dev = encoder->dev;
 126         struct vc4_dpi *dpi = to_vc4_dpi(encoder);
 127         int idx;
 128
 129         if (!drm_dev_enter(dev, &idx))
 130                 return;
 131
 132         clk_disable_unprepare(dpi->pixel_clock);
 133
 134         drm_dev_exit(idx);
 135 }
 136
 137 static void vc4_dpi_encoder_enable(struct drm_encoder *encoder)
 138 {
 139         struct drm_device *dev = encoder->dev;
 140         struct drm_display_mode *mode = &encoder->crtc->mode;
 141         struct vc4_dpi *dpi = to_vc4_dpi(encoder);
 142         struct drm_connector_list_iter conn_iter;
 143         struct drm_connector *connector = NULL, *connector_scan;
 144         u32 dpi_c = DPI_ENABLE;
 145         int idx;
 146         int ret;
 147
 148         /* Look up the connector attached to DPI so we can get the
 149          * bus_format.  Ideally the bridge would tell us the
 150          * bus_format we want, but it doesn't yet, so assume that it's
 151          * uniform throughout the bridge chain.
 152          */
 153         drm_connector_list_iter_begin(dev, &conn_iter);
 154         drm_for_each_connector_iter(connector_scan, &conn_iter) {
 155                 if (connector_scan->encoder == encoder) {
 156                         connector = connector_scan;
 157                         break;
 158                 }
 159         }
 160         drm_connector_list_iter_end(&conn_iter);
 161
 162         /* Default to 18bit if no connector or format found. */
 163         dpi_c |= VC4_SET_FIELD(DPI_FORMAT_18BIT_666_RGB_1, DPI_FORMAT);
 164
 165         if (connector) {
 166                 if (connector->display_info.num_bus_formats) {
 167                         u32 bus_format = connector->display_info.bus_formats[0];
 168
 169                         dpi_c &= ~DPI_FORMAT_MASK;
 170
 171                         switch (bus_format) {
 172                         case MEDIA_BUS_FMT_RGB888_1X24:
 173                                 dpi_c |= VC4_SET_FIELD(DPI_FORMAT_24BIT_888_RGB,
 174                                                        DPI_FORMAT);
 175                                 break;
 176                         case MEDIA_BUS_FMT_BGR888_1X24:
 177                                 dpi_c |= VC4_SET_FIELD(DPI_FORMAT_24BIT_888_RGB,
 178                                                        DPI_FORMAT);
 179                                 dpi_c |= VC4_SET_FIELD(DPI_ORDER_BGR,
 180                                                        DPI_ORDER);
 181                                 break;
 182                         case MEDIA_BUS_FMT_BGR666_1X24_CPADHI:
 183                                 dpi_c |= VC4_SET_FIELD(DPI_ORDER_BGR, DPI_ORDER);
 184                                 fallthrough;
 185                         case MEDIA_BUS_FMT_RGB666_1X24_CPADHI:
 186                                 dpi_c |= VC4_SET_FIELD(DPI_FORMAT_18BIT_666_RGB_2,
 187                                                        DPI_FORMAT);
 188                                 break;
 189                         case MEDIA_BUS_FMT_BGR666_1X18:
 190                                 dpi_c |= VC4_SET_FIELD(DPI_ORDER_BGR, DPI_ORDER);
 191                                 fallthrough;
 192                         case MEDIA_BUS_FMT_RGB666_1X18:
 193                                 dpi_c |= VC4_SET_FIELD(DPI_FORMAT_18BIT_666_RGB_1,
 194                                                        DPI_FORMAT);
 195                                 break;
 196                         case MEDIA_BUS_FMT_RGB565_1X16:
 197                                 dpi_c |= VC4_SET_FIELD(DPI_FORMAT_16BIT_565_RGB_1,
 198                                                        DPI_FORMAT);
 199                                 break;
 200                         case MEDIA_BUS_FMT_RGB565_1X24_CPADHI:
 201                                 dpi_c |= VC4_SET_FIELD(DPI_FORMAT_16BIT_565_RGB_2,
 202                                                        DPI_FORMAT);
 203                                 break;
 204                         default:
 205                                 DRM_ERROR("Unknown media bus format %d\n",
 206                                           bus_format);
 207                                 break;
 208                         }
 209                 }
 210
 211                 if (connector->display_info.bus_flags & DRM_BUS_FLAG_PIXDATA_DRIVE_NEGEDGE)
 212                         dpi_c |= DPI_PIXEL_CLK_INVERT;
 213
 214                 if (connector->display_info.bus_flags & DRM_BUS_FLAG_DE_LOW)
 215                         dpi_c |= DPI_OUTPUT_ENABLE_INVERT;
 216         }
 217
 218         if (mode->flags & DRM_MODE_FLAG_CSYNC) {
 219                 if (mode->flags & DRM_MODE_FLAG_NCSYNC)
 220                         dpi_c |= DPI_OUTPUT_ENABLE_INVERT;
 221         } else {
 222                 dpi_c |= DPI_OUTPUT_ENABLE_MODE;
 223
 224                 if (mode->flags & DRM_MODE_FLAG_NHSYNC)
 225                         dpi_c |= DPI_HSYNC_INVERT;
 226                 else if (!(mode->flags & DRM_MODE_FLAG_PHSYNC))
 227                         dpi_c |= DPI_HSYNC_DISABLE;
 228
 229                 if (mode->flags & DRM_MODE_FLAG_NVSYNC)
 230                         dpi_c |= DPI_VSYNC_INVERT;
 231                 else if (!(mode->flags & DRM_MODE_FLAG_PVSYNC))
 232                         dpi_c |= DPI_VSYNC_DISABLE;
 233         }
 234
 235         if (!drm_dev_enter(dev, &idx))
 236                 return;
 237
 238         DPI_WRITE(DPI_C, dpi_c);
 239
 240         ret = clk_set_rate(dpi->pixel_clock, mode->clock * 1000);
 241         if (ret)
 242                 DRM_ERROR("Failed to set clock rate: %d\n", ret);
 243
 244         ret = clk_prepare_enable(dpi->pixel_clock);
 245         if (ret)
 246                 DRM_ERROR("Failed to set clock rate: %d\n", ret);
 247
 248         drm_dev_exit(idx);
 249 }
 250
 251 static enum drm_mode_status vc4_dpi_encoder_mode_valid(struct drm_encoder *encoder,
 252                                                        const struct drm_display_mode *mode)
 253 {
 254         if (mode->flags & DRM_MODE_FLAG_INTERLACE)
 255                 return MODE_NO_INTERLACE;
 256
 257         return MODE_OK;
 258 }
 259
 260 static const struct drm_encoder_helper_funcs vc4_dpi_encoder_helper_funcs = {
 261         .disable = vc4_dpi_encoder_disable,
 262         .enable = vc4_dpi_encoder_enable,
 263         .mode_valid = vc4_dpi_encoder_mode_valid,
 264 };
 265
 266 static int vc4_dpi_late_register(struct drm_encoder *encoder)
 267 {
 268         struct drm_device *drm = encoder->dev;
 269         struct vc4_dpi *dpi = to_vc4_dpi(encoder);
 270
 271         vc4_debugfs_add_regset32(drm, "dpi_regs", &dpi->regset);
 272
 273         return 0;
 274 }
 275
 276 static const struct drm_encoder_funcs vc4_dpi_encoder_funcs = {
 277         .late_register = vc4_dpi_late_register,
 278 };
 279
 280 static const struct of_device_id vc4_dpi_dt_match[] = {
 281         { .compatible = "brcm,bcm2835-dpi", .data = NULL },
 282         {}
 283 };
 284
 285 /* Sets up the next link in the display chain, whether it's a panel or
 286  * a bridge.
 287  */
 288 static int vc4_dpi_init_bridge(struct vc4_dpi *dpi)
 289 {
 290         struct drm_device *drm = dpi->encoder.base.dev;
 291         struct device *dev = &dpi->pdev->dev;
 292         struct drm_bridge *bridge;
 293
 294         bridge = drmm_of_get_bridge(drm, dev->of_node, 0, 0);
 295         if (IS_ERR(bridge)) {
 296                 /* If nothing was connected in the DT, that's not an
 297                  * error.
 298                  */
 299                 if (PTR_ERR(bridge) == -ENODEV)
 300                         return 0;
 301                 else
 302                         return PTR_ERR(bridge);
 303         }
 304
 305         return drm_bridge_attach(&dpi->encoder.base, bridge, NULL, 0);
 306 }
 307
 308 static void vc4_dpi_disable_clock(void *ptr)
 309 {
 310         struct vc4_dpi *dpi = ptr;
 311
 312         clk_disable_unprepare(dpi->core_clock);
 313 }
 314
 315 static int vc4_dpi_bind(struct device *dev, struct device *master, void *data)
 316 {
 317         struct platform_device *pdev = to_platform_device(dev);
 318         struct drm_device *drm = dev_get_drvdata(master);
 319         struct vc4_dpi *dpi;
 320         int ret;
 321
 322         dpi = drmm_kzalloc(drm, sizeof(*dpi), GFP_KERNEL);
 323         if (!dpi)
 324                 return -ENOMEM;
 325
 326         dpi->encoder.type = VC4_ENCODER_TYPE_DPI;
 327         dpi->pdev = pdev;
 328         dpi->regs = vc4_ioremap_regs(pdev, 0);
 329         if (IS_ERR(dpi->regs))
 330                 return PTR_ERR(dpi->regs);
 331         dpi->regset.base = dpi->regs;
 332         dpi->regset.regs = dpi_regs;
 333         dpi->regset.nregs = ARRAY_SIZE(dpi_regs);
 334
 335         if (DPI_READ(DPI_ID) != DPI_ID_VALUE) {
 336                 dev_err(dev, "Port returned 0x%08x for ID instead of 0x%08x\n",
 337                         DPI_READ(DPI_ID), DPI_ID_VALUE);
 338                 return -ENODEV;
 339         }
 340
 341         dpi->core_clock = devm_clk_get(dev, "core");
 342         if (IS_ERR(dpi->core_clock)) {
 343                 ret = PTR_ERR(dpi->core_clock);
 344                 if (ret != -EPROBE_DEFER)
 345                         DRM_ERROR("Failed to get core clock: %d\n", ret);
 346                 return ret;
 347         }
 348
 349         dpi->pixel_clock = devm_clk_get(dev, "pixel");
 350         if (IS_ERR(dpi->pixel_clock)) {
 351                 ret = PTR_ERR(dpi->pixel_clock);
 352                 if (ret != -EPROBE_DEFER)
 353                         DRM_ERROR("Failed to get pixel clock: %d\n", ret);
 354                 return ret;
 355         }
 356
 357         ret = clk_prepare_enable(dpi->core_clock);
 358         if (ret) {
 359                 DRM_ERROR("Failed to turn on core clock: %d\n", ret);
 360                 return ret;
 361         }
 362
 363         ret = devm_add_action_or_reset(dev, vc4_dpi_disable_clock, dpi);
 364         if (ret)
 365                 return ret;
 366
 367         ret = drmm_encoder_init(drm, &dpi->encoder.base,
 368                                 &vc4_dpi_encoder_funcs,
 369                                 DRM_MODE_ENCODER_DPI,
 370                                 NULL);
 371         if (ret)
 372                 return ret;
 373
 374         drm_encoder_helper_add(&dpi->encoder.base, &vc4_dpi_encoder_helper_funcs);
 375
 376         ret = vc4_dpi_init_bridge(dpi);
 377         if (ret)
 378                 return ret;
 379
 380         dev_set_drvdata(dev, dpi);
 381
 382         return 0;
 383 }
 384
 385 static const struct component_ops vc4_dpi_ops = {
 386         .bind   = vc4_dpi_bind,
 387 };
 388
 389 static int vc4_dpi_dev_probe(struct platform_device *pdev)
 390 {
 391         return component_add(&pdev->dev, &vc4_dpi_ops);
 392 }
 393
 394 static int vc4_dpi_dev_remove(struct platform_device *pdev)
 395 {
 396         component_del(&pdev->dev, &vc4_dpi_ops);
 397         return 0;
 398 }
 399
 400 struct platform_driver vc4_dpi_driver = {
 401         .probe = vc4_dpi_dev_probe,
 402         .remove = vc4_dpi_dev_remove,
 403         .driver = {
 404                 .name = "vc4_dpi",
 405                 .of_match_table = vc4_dpi_dt_match,
 406         },
 407 };