1 // SPDX-License-Identifier: GPL-2.0
7 * Copyright (C) 2004 Intel Corp.
10 #include <linux/delay.h>
11 #include <linux/init.h>
12 #include <linux/irqdomain.h>
13 #include <linux/pci.h>
14 #include <linux/msi.h>
15 #include <linux/pci_hotplug.h>
16 #include <linux/module.h>
17 #include <linux/pci-aspm.h>
18 #include <linux/pci-acpi.h>
19 #include <linux/pm_runtime.h>
20 #include <linux/pm_qos.h>
24 * The GUID is defined in the PCI Firmware Specification available here:
25 * https://www.pcisig.com/members/downloads/pcifw_r3_1_13Dec10.pdf
27 const guid_t pci_acpi_dsm_guid =
28 GUID_INIT(0xe5c937d0, 0x3553, 0x4d7a,
29 0x91, 0x17, 0xea, 0x4d, 0x19, 0xc3, 0x43, 0x4d);
31 #if defined(CONFIG_PCI_QUIRKS) && defined(CONFIG_ARM64)
32 static int acpi_get_rc_addr(struct acpi_device *adev, struct resource *res)
34 struct device *dev = &adev->dev;
35 struct resource_entry *entry;
36 struct list_head list;
40 INIT_LIST_HEAD(&list);
41 flags = IORESOURCE_MEM;
42 ret = acpi_dev_get_resources(adev, &list,
43 acpi_dev_filter_resource_type_cb,
46 dev_err(dev, "failed to parse _CRS method, error code %d\n",
52 dev_err(dev, "no IO and memory resources present in _CRS\n");
56 entry = list_first_entry(&list, struct resource_entry, node);
58 acpi_dev_free_resource_list(&list);
62 static acpi_status acpi_match_rc(acpi_handle handle, u32 lvl, void *context,
65 u16 *segment = context;
66 unsigned long long uid;
69 status = acpi_evaluate_integer(handle, "_UID", NULL, &uid);
70 if (ACPI_FAILURE(status) || uid != *segment)
73 *(acpi_handle *)retval = handle;
74 return AE_CTRL_TERMINATE;
77 int acpi_get_rc_resources(struct device *dev, const char *hid, u16 segment,
80 struct acpi_device *adev;
85 status = acpi_get_devices(hid, acpi_match_rc, &segment, &handle);
86 if (ACPI_FAILURE(status)) {
87 dev_err(dev, "can't find _HID %s device to locate resources\n",
92 ret = acpi_bus_get_device(handle, &adev);
96 ret = acpi_get_rc_addr(adev, res);
98 dev_err(dev, "can't get resource from %s\n",
99 dev_name(&adev->dev));
107 phys_addr_t acpi_pci_root_get_mcfg_addr(acpi_handle handle)
109 acpi_status status = AE_NOT_EXIST;
110 unsigned long long mcfg_addr;
113 status = acpi_evaluate_integer(handle, METHOD_NAME__CBA,
115 if (ACPI_FAILURE(status))
118 return (phys_addr_t)mcfg_addr;
121 static acpi_status decode_type0_hpx_record(union acpi_object *record,
122 struct hpp_type0 *hpx0)
125 union acpi_object *fields = record->package.elements;
126 u32 revision = fields[1].integer.value;
130 if (record->package.count != 6)
132 for (i = 2; i < 6; i++)
133 if (fields[i].type != ACPI_TYPE_INTEGER)
135 hpx0->revision = revision;
136 hpx0->cache_line_size = fields[2].integer.value;
137 hpx0->latency_timer = fields[3].integer.value;
138 hpx0->enable_serr = fields[4].integer.value;
139 hpx0->enable_perr = fields[5].integer.value;
142 pr_warn("%s: Type 0 Revision %d record not supported\n",
149 static acpi_status decode_type1_hpx_record(union acpi_object *record,
150 struct hpp_type1 *hpx1)
153 union acpi_object *fields = record->package.elements;
154 u32 revision = fields[1].integer.value;
158 if (record->package.count != 5)
160 for (i = 2; i < 5; i++)
161 if (fields[i].type != ACPI_TYPE_INTEGER)
163 hpx1->revision = revision;
164 hpx1->max_mem_read = fields[2].integer.value;
165 hpx1->avg_max_split = fields[3].integer.value;
166 hpx1->tot_max_split = fields[4].integer.value;
169 pr_warn("%s: Type 1 Revision %d record not supported\n",
176 static acpi_status decode_type2_hpx_record(union acpi_object *record,
177 struct hpp_type2 *hpx2)
180 union acpi_object *fields = record->package.elements;
181 u32 revision = fields[1].integer.value;
185 if (record->package.count != 18)
187 for (i = 2; i < 18; i++)
188 if (fields[i].type != ACPI_TYPE_INTEGER)
190 hpx2->revision = revision;
191 hpx2->unc_err_mask_and = fields[2].integer.value;
192 hpx2->unc_err_mask_or = fields[3].integer.value;
193 hpx2->unc_err_sever_and = fields[4].integer.value;
194 hpx2->unc_err_sever_or = fields[5].integer.value;
195 hpx2->cor_err_mask_and = fields[6].integer.value;
196 hpx2->cor_err_mask_or = fields[7].integer.value;
197 hpx2->adv_err_cap_and = fields[8].integer.value;
198 hpx2->adv_err_cap_or = fields[9].integer.value;
199 hpx2->pci_exp_devctl_and = fields[10].integer.value;
200 hpx2->pci_exp_devctl_or = fields[11].integer.value;
201 hpx2->pci_exp_lnkctl_and = fields[12].integer.value;
202 hpx2->pci_exp_lnkctl_or = fields[13].integer.value;
203 hpx2->sec_unc_err_sever_and = fields[14].integer.value;
204 hpx2->sec_unc_err_sever_or = fields[15].integer.value;
205 hpx2->sec_unc_err_mask_and = fields[16].integer.value;
206 hpx2->sec_unc_err_mask_or = fields[17].integer.value;
209 pr_warn("%s: Type 2 Revision %d record not supported\n",
216 static void parse_hpx3_register(struct hpx_type3 *hpx3_reg,
217 union acpi_object *reg_fields)
219 hpx3_reg->device_type = reg_fields[0].integer.value;
220 hpx3_reg->function_type = reg_fields[1].integer.value;
221 hpx3_reg->config_space_location = reg_fields[2].integer.value;
222 hpx3_reg->pci_exp_cap_id = reg_fields[3].integer.value;
223 hpx3_reg->pci_exp_cap_ver = reg_fields[4].integer.value;
224 hpx3_reg->pci_exp_vendor_id = reg_fields[5].integer.value;
225 hpx3_reg->dvsec_id = reg_fields[6].integer.value;
226 hpx3_reg->dvsec_rev = reg_fields[7].integer.value;
227 hpx3_reg->match_offset = reg_fields[8].integer.value;
228 hpx3_reg->match_mask_and = reg_fields[9].integer.value;
229 hpx3_reg->match_value = reg_fields[10].integer.value;
230 hpx3_reg->reg_offset = reg_fields[11].integer.value;
231 hpx3_reg->reg_mask_and = reg_fields[12].integer.value;
232 hpx3_reg->reg_mask_or = reg_fields[13].integer.value;
235 static acpi_status program_type3_hpx_record(struct pci_dev *dev,
236 union acpi_object *record,
237 const struct hotplug_program_ops *hp_ops)
239 union acpi_object *fields = record->package.elements;
240 u32 desc_count, expected_length, revision;
241 union acpi_object *reg_fields;
242 struct hpx_type3 hpx3;
245 revision = fields[1].integer.value;
248 desc_count = fields[2].integer.value;
249 expected_length = 3 + desc_count * 14;
251 if (record->package.count != expected_length)
254 for (i = 2; i < expected_length; i++)
255 if (fields[i].type != ACPI_TYPE_INTEGER)
258 for (i = 0; i < desc_count; i++) {
259 reg_fields = fields + 3 + i * 14;
260 parse_hpx3_register(&hpx3, reg_fields);
261 hp_ops->program_type3(dev, &hpx3);
267 "%s: Type 3 Revision %d record not supported\n",
274 static acpi_status acpi_run_hpx(struct pci_dev *dev, acpi_handle handle,
275 const struct hotplug_program_ops *hp_ops)
278 struct acpi_buffer buffer = {ACPI_ALLOCATE_BUFFER, NULL};
279 union acpi_object *package, *record, *fields;
280 struct hpp_type0 hpx0;
281 struct hpp_type1 hpx1;
282 struct hpp_type2 hpx2;
286 status = acpi_evaluate_object(handle, "_HPX", NULL, &buffer);
287 if (ACPI_FAILURE(status))
290 package = (union acpi_object *)buffer.pointer;
291 if (package->type != ACPI_TYPE_PACKAGE) {
296 for (i = 0; i < package->package.count; i++) {
297 record = &package->package.elements[i];
298 if (record->type != ACPI_TYPE_PACKAGE) {
303 fields = record->package.elements;
304 if (fields[0].type != ACPI_TYPE_INTEGER ||
305 fields[1].type != ACPI_TYPE_INTEGER) {
310 type = fields[0].integer.value;
313 memset(&hpx0, 0, sizeof(hpx0));
314 status = decode_type0_hpx_record(record, &hpx0);
315 if (ACPI_FAILURE(status))
317 hp_ops->program_type0(dev, &hpx0);
320 memset(&hpx1, 0, sizeof(hpx1));
321 status = decode_type1_hpx_record(record, &hpx1);
322 if (ACPI_FAILURE(status))
324 hp_ops->program_type1(dev, &hpx1);
327 memset(&hpx2, 0, sizeof(hpx2));
328 status = decode_type2_hpx_record(record, &hpx2);
329 if (ACPI_FAILURE(status))
331 hp_ops->program_type2(dev, &hpx2);
334 status = program_type3_hpx_record(dev, record, hp_ops);
335 if (ACPI_FAILURE(status))
339 pr_err("%s: Type %d record not supported\n",
346 kfree(buffer.pointer);
350 static acpi_status acpi_run_hpp(struct pci_dev *dev, acpi_handle handle,
351 const struct hotplug_program_ops *hp_ops)
354 struct acpi_buffer buffer = { ACPI_ALLOCATE_BUFFER, NULL };
355 union acpi_object *package, *fields;
356 struct hpp_type0 hpp0;
359 memset(&hpp0, 0, sizeof(hpp0));
361 status = acpi_evaluate_object(handle, "_HPP", NULL, &buffer);
362 if (ACPI_FAILURE(status))
365 package = (union acpi_object *) buffer.pointer;
366 if (package->type != ACPI_TYPE_PACKAGE ||
367 package->package.count != 4) {
372 fields = package->package.elements;
373 for (i = 0; i < 4; i++) {
374 if (fields[i].type != ACPI_TYPE_INTEGER) {
381 hpp0.cache_line_size = fields[0].integer.value;
382 hpp0.latency_timer = fields[1].integer.value;
383 hpp0.enable_serr = fields[2].integer.value;
384 hpp0.enable_perr = fields[3].integer.value;
386 hp_ops->program_type0(dev, &hpp0);
389 kfree(buffer.pointer);
395 * @dev - the pci_dev for which we want parameters
396 * @hpp - allocated by the caller
398 int pci_acpi_program_hp_params(struct pci_dev *dev,
399 const struct hotplug_program_ops *hp_ops)
402 acpi_handle handle, phandle;
403 struct pci_bus *pbus;
405 if (acpi_pci_disabled)
409 for (pbus = dev->bus; pbus; pbus = pbus->parent) {
410 handle = acpi_pci_get_bridge_handle(pbus);
416 * _HPP settings apply to all child buses, until another _HPP is
417 * encountered. If we don't find an _HPP for the input pci dev,
418 * look for it in the parent device scope since that would apply to
422 status = acpi_run_hpx(dev, handle, hp_ops);
423 if (ACPI_SUCCESS(status))
425 status = acpi_run_hpp(dev, handle, hp_ops);
426 if (ACPI_SUCCESS(status))
428 if (acpi_is_root_bridge(handle))
430 status = acpi_get_parent(handle, &phandle);
431 if (ACPI_FAILURE(status))
439 * pciehp_is_native - Check whether a hotplug port is handled by the OS
440 * @bridge: Hotplug port to check
442 * Returns true if the given @bridge is handled by the native PCIe hotplug
445 bool pciehp_is_native(struct pci_dev *bridge)
447 const struct pci_host_bridge *host;
450 if (!IS_ENABLED(CONFIG_HOTPLUG_PCI_PCIE))
453 pcie_capability_read_dword(bridge, PCI_EXP_SLTCAP, &slot_cap);
454 if (!(slot_cap & PCI_EXP_SLTCAP_HPC))
457 if (pcie_ports_native)
460 host = pci_find_host_bridge(bridge->bus);
461 return host->native_pcie_hotplug;
465 * shpchp_is_native - Check whether a hotplug port is handled by the OS
466 * @bridge: Hotplug port to check
468 * Returns true if the given @bridge is handled by the native SHPC hotplug
471 bool shpchp_is_native(struct pci_dev *bridge)
473 return bridge->shpc_managed;
477 * pci_acpi_wake_bus - Root bus wakeup notification fork function.
478 * @context: Device wakeup context.
480 static void pci_acpi_wake_bus(struct acpi_device_wakeup_context *context)
482 struct acpi_device *adev;
483 struct acpi_pci_root *root;
485 adev = container_of(context, struct acpi_device, wakeup.context);
486 root = acpi_driver_data(adev);
487 pci_pme_wakeup_bus(root->bus);
491 * pci_acpi_wake_dev - PCI device wakeup notification work function.
492 * @context: Device wakeup context.
494 static void pci_acpi_wake_dev(struct acpi_device_wakeup_context *context)
496 struct pci_dev *pci_dev;
498 pci_dev = to_pci_dev(context->dev);
500 if (pci_dev->pme_poll)
501 pci_dev->pme_poll = false;
503 if (pci_dev->current_state == PCI_D3cold) {
504 pci_wakeup_event(pci_dev);
505 pm_request_resume(&pci_dev->dev);
509 /* Clear PME Status if set. */
510 if (pci_dev->pme_support)
511 pci_check_pme_status(pci_dev);
513 pci_wakeup_event(pci_dev);
514 pm_request_resume(&pci_dev->dev);
516 pci_pme_wakeup_bus(pci_dev->subordinate);
520 * pci_acpi_add_bus_pm_notifier - Register PM notifier for root PCI bus.
521 * @dev: PCI root bridge ACPI device.
523 acpi_status pci_acpi_add_bus_pm_notifier(struct acpi_device *dev)
525 return acpi_add_pm_notifier(dev, NULL, pci_acpi_wake_bus);
529 * pci_acpi_add_pm_notifier - Register PM notifier for given PCI device.
530 * @dev: ACPI device to add the notifier for.
531 * @pci_dev: PCI device to check for the PME status if an event is signaled.
533 acpi_status pci_acpi_add_pm_notifier(struct acpi_device *dev,
534 struct pci_dev *pci_dev)
536 return acpi_add_pm_notifier(dev, &pci_dev->dev, pci_acpi_wake_dev);
540 * _SxD returns the D-state with the highest power
541 * (lowest D-state number) supported in the S-state "x".
543 * If the devices does not have a _PRW
544 * (Power Resources for Wake) supporting system wakeup from "x"
545 * then the OS is free to choose a lower power (higher number
546 * D-state) than the return value from _SxD.
548 * But if _PRW is enabled at S-state "x", the OS
549 * must not choose a power lower than _SxD --
550 * unless the device has an _SxW method specifying
551 * the lowest power (highest D-state number) the device
552 * may enter while still able to wake the system.
554 * ie. depending on global OS policy:
556 * if (_PRW at S-state x)
557 * choose from highest power _SxD to lowest power _SxW
558 * else // no _PRW at S-state x
559 * choose highest power _SxD or any lower power
562 static pci_power_t acpi_pci_choose_state(struct pci_dev *pdev)
564 int acpi_state, d_max;
567 d_max = ACPI_STATE_D3_HOT;
569 d_max = ACPI_STATE_D3_COLD;
570 acpi_state = acpi_pm_device_sleep_state(&pdev->dev, NULL, d_max);
572 return PCI_POWER_ERROR;
574 switch (acpi_state) {
581 case ACPI_STATE_D3_HOT:
583 case ACPI_STATE_D3_COLD:
586 return PCI_POWER_ERROR;
589 static struct acpi_device *acpi_pci_find_companion(struct device *dev);
591 static bool acpi_pci_bridge_d3(struct pci_dev *dev)
593 const struct fwnode_handle *fwnode;
594 struct acpi_device *adev;
595 struct pci_dev *root;
598 if (!dev->is_hotplug_bridge)
602 * Look for a special _DSD property for the root port and if it
603 * is set we know the hierarchy behind it supports D3 just fine.
605 root = pci_find_pcie_root_port(dev);
609 adev = ACPI_COMPANION(&root->dev);
612 * It is possible that the ACPI companion is not yet bound
613 * for the root port so look it up manually here.
615 if (!adev && !pci_dev_is_added(root))
616 adev = acpi_pci_find_companion(&root->dev);
622 fwnode = acpi_fwnode_handle(adev);
623 if (fwnode_property_read_u8(fwnode, "HotPlugSupportInD3", &val))
629 static bool acpi_pci_power_manageable(struct pci_dev *dev)
631 struct acpi_device *adev = ACPI_COMPANION(&dev->dev);
632 return adev ? acpi_device_power_manageable(adev) : false;
635 static int acpi_pci_set_power_state(struct pci_dev *dev, pci_power_t state)
637 struct acpi_device *adev = ACPI_COMPANION(&dev->dev);
638 static const u8 state_conv[] = {
639 [PCI_D0] = ACPI_STATE_D0,
640 [PCI_D1] = ACPI_STATE_D1,
641 [PCI_D2] = ACPI_STATE_D2,
642 [PCI_D3hot] = ACPI_STATE_D3_HOT,
643 [PCI_D3cold] = ACPI_STATE_D3_COLD,
647 /* If the ACPI device has _EJ0, ignore the device */
648 if (!adev || acpi_has_method(adev->handle, "_EJ0"))
653 if (dev_pm_qos_flags(&dev->dev, PM_QOS_FLAG_NO_POWER_OFF) ==
663 error = acpi_device_set_power(adev, state_conv[state]);
667 pci_dbg(dev, "power state changed by ACPI to %s\n",
668 acpi_power_state_string(state_conv[state]));
673 static pci_power_t acpi_pci_get_power_state(struct pci_dev *dev)
675 struct acpi_device *adev = ACPI_COMPANION(&dev->dev);
676 static const pci_power_t state_conv[] = {
677 [ACPI_STATE_D0] = PCI_D0,
678 [ACPI_STATE_D1] = PCI_D1,
679 [ACPI_STATE_D2] = PCI_D2,
680 [ACPI_STATE_D3_HOT] = PCI_D3hot,
681 [ACPI_STATE_D3_COLD] = PCI_D3cold,
685 if (!adev || !acpi_device_power_manageable(adev))
688 if (acpi_device_get_power(adev, &state) || state == ACPI_STATE_UNKNOWN)
691 return state_conv[state];
694 static int acpi_pci_propagate_wakeup(struct pci_bus *bus, bool enable)
696 while (bus->parent) {
697 if (acpi_pm_device_can_wakeup(&bus->self->dev))
698 return acpi_pm_set_bridge_wakeup(&bus->self->dev, enable);
703 /* We have reached the root bus. */
705 if (acpi_pm_device_can_wakeup(bus->bridge))
706 return acpi_pm_set_bridge_wakeup(bus->bridge, enable);
711 static int acpi_pci_wakeup(struct pci_dev *dev, bool enable)
713 if (acpi_pm_device_can_wakeup(&dev->dev))
714 return acpi_pm_set_device_wakeup(&dev->dev, enable);
716 return acpi_pci_propagate_wakeup(dev->bus, enable);
719 static bool acpi_pci_need_resume(struct pci_dev *dev)
721 struct acpi_device *adev = ACPI_COMPANION(&dev->dev);
724 * In some cases (eg. Samsung 305V4A) leaving a bridge in suspend over
725 * system-wide suspend/resume confuses the platform firmware, so avoid
726 * doing that. According to Section 16.1.6 of ACPI 6.2, endpoint
727 * devices are expected to be in D3 before invoking the S3 entry path
728 * from the firmware, so they should not be affected by this issue.
730 if (pci_is_bridge(dev) && acpi_target_system_state() != ACPI_STATE_S0)
733 if (!adev || !acpi_device_power_manageable(adev))
736 if (adev->wakeup.flags.valid &&
737 device_may_wakeup(&dev->dev) != !!adev->wakeup.prepare_count)
740 if (acpi_target_system_state() == ACPI_STATE_S0)
743 return !!adev->power.flags.dsw_present;
746 static const struct pci_platform_pm_ops acpi_pci_platform_pm = {
747 .bridge_d3 = acpi_pci_bridge_d3,
748 .is_manageable = acpi_pci_power_manageable,
749 .set_state = acpi_pci_set_power_state,
750 .get_state = acpi_pci_get_power_state,
751 .choose_state = acpi_pci_choose_state,
752 .set_wakeup = acpi_pci_wakeup,
753 .need_resume = acpi_pci_need_resume,
756 void acpi_pci_add_bus(struct pci_bus *bus)
758 union acpi_object *obj;
759 struct pci_host_bridge *bridge;
761 if (acpi_pci_disabled || !bus->bridge || !ACPI_HANDLE(bus->bridge))
764 acpi_pci_slot_enumerate(bus);
765 acpiphp_enumerate_slots(bus);
768 * For a host bridge, check its _DSM for function 8 and if
769 * that is available, mark it in pci_host_bridge.
771 if (!pci_is_root_bus(bus))
774 obj = acpi_evaluate_dsm(ACPI_HANDLE(bus->bridge), &pci_acpi_dsm_guid, 3,
775 RESET_DELAY_DSM, NULL);
779 if (obj->type == ACPI_TYPE_INTEGER && obj->integer.value == 1) {
780 bridge = pci_find_host_bridge(bus);
781 bridge->ignore_reset_delay = 1;
786 void acpi_pci_remove_bus(struct pci_bus *bus)
788 if (acpi_pci_disabled || !bus->bridge)
791 acpiphp_remove_slots(bus);
792 acpi_pci_slot_remove(bus);
796 static struct acpi_device *acpi_pci_find_companion(struct device *dev)
798 struct pci_dev *pci_dev = to_pci_dev(dev);
802 check_children = pci_is_bridge(pci_dev);
803 /* Please ref to ACPI spec for the syntax of _ADR */
804 addr = (PCI_SLOT(pci_dev->devfn) << 16) | PCI_FUNC(pci_dev->devfn);
805 return acpi_find_child_device(ACPI_COMPANION(dev->parent), addr,
810 * pci_acpi_optimize_delay - optimize PCI D3 and D3cold delay from ACPI
811 * @pdev: the PCI device whose delay is to be updated
812 * @handle: ACPI handle of this device
814 * Update the d3_delay and d3cold_delay of a PCI device from the ACPI _DSM
815 * control method of either the device itself or the PCI host bridge.
817 * Function 8, "Reset Delay," applies to the entire hierarchy below a PCI
818 * host bridge. If it returns one, the OS may assume that all devices in
819 * the hierarchy have already completed power-on reset delays.
821 * Function 9, "Device Readiness Durations," applies only to the object
822 * where it is located. It returns delay durations required after various
823 * events if the device requires less time than the spec requires. Delays
824 * from this function take precedence over the Reset Delay function.
826 * These _DSM functions are defined by the draft ECN of January 28, 2014,
827 * titled "ACPI additions for FW latency optimizations."
829 static void pci_acpi_optimize_delay(struct pci_dev *pdev,
832 struct pci_host_bridge *bridge = pci_find_host_bridge(pdev->bus);
834 union acpi_object *obj, *elements;
836 if (bridge->ignore_reset_delay)
837 pdev->d3cold_delay = 0;
839 obj = acpi_evaluate_dsm(handle, &pci_acpi_dsm_guid, 3,
840 FUNCTION_DELAY_DSM, NULL);
844 if (obj->type == ACPI_TYPE_PACKAGE && obj->package.count == 5) {
845 elements = obj->package.elements;
846 if (elements[0].type == ACPI_TYPE_INTEGER) {
847 value = (int)elements[0].integer.value / 1000;
848 if (value < PCI_PM_D3COLD_WAIT)
849 pdev->d3cold_delay = value;
851 if (elements[3].type == ACPI_TYPE_INTEGER) {
852 value = (int)elements[3].integer.value / 1000;
853 if (value < PCI_PM_D3_WAIT)
854 pdev->d3_delay = value;
860 static void pci_acpi_set_untrusted(struct pci_dev *dev)
864 if (pci_pcie_type(dev) != PCI_EXP_TYPE_ROOT_PORT)
866 if (device_property_read_u8(&dev->dev, "ExternalFacingPort", &val))
870 * These root ports expose PCIe (including DMA) outside of the
871 * system so make sure we treat them and everything behind as
878 static void pci_acpi_setup(struct device *dev)
880 struct pci_dev *pci_dev = to_pci_dev(dev);
881 struct acpi_device *adev = ACPI_COMPANION(dev);
886 pci_acpi_optimize_delay(pci_dev, adev->handle);
887 pci_acpi_set_untrusted(pci_dev);
889 pci_acpi_add_pm_notifier(adev, pci_dev);
890 if (!adev->wakeup.flags.valid)
893 device_set_wakeup_capable(dev, true);
895 * For bridges that can do D3 we enable wake automatically (as
896 * we do for the power management itself in that case). The
897 * reason is that the bridge may have additional methods such as
898 * _DSW that need to be called.
900 if (pci_dev->bridge_d3)
901 device_wakeup_enable(dev);
903 acpi_pci_wakeup(pci_dev, false);
906 static void pci_acpi_cleanup(struct device *dev)
908 struct acpi_device *adev = ACPI_COMPANION(dev);
909 struct pci_dev *pci_dev = to_pci_dev(dev);
914 pci_acpi_remove_pm_notifier(adev);
915 if (adev->wakeup.flags.valid) {
916 if (pci_dev->bridge_d3)
917 device_wakeup_disable(dev);
919 device_set_wakeup_capable(dev, false);
923 static bool pci_acpi_bus_match(struct device *dev)
925 return dev_is_pci(dev);
928 static struct acpi_bus_type acpi_pci_bus = {
930 .match = pci_acpi_bus_match,
931 .find_companion = acpi_pci_find_companion,
932 .setup = pci_acpi_setup,
933 .cleanup = pci_acpi_cleanup,
937 static struct fwnode_handle *(*pci_msi_get_fwnode_cb)(struct device *dev);
940 * pci_msi_register_fwnode_provider - Register callback to retrieve fwnode
941 * @fn: Callback matching a device to a fwnode that identifies a PCI
944 * This should be called by irqchip driver, which is the parent of
945 * the MSI domain to provide callback interface to query fwnode.
948 pci_msi_register_fwnode_provider(struct fwnode_handle *(*fn)(struct device *))
950 pci_msi_get_fwnode_cb = fn;
954 * pci_host_bridge_acpi_msi_domain - Retrieve MSI domain of a PCI host bridge
955 * @bus: The PCI host bridge bus.
957 * This function uses the callback function registered by
958 * pci_msi_register_fwnode_provider() to retrieve the irq_domain with
959 * type DOMAIN_BUS_PCI_MSI of the specified host bridge bus.
960 * This returns NULL on error or when the domain is not found.
962 struct irq_domain *pci_host_bridge_acpi_msi_domain(struct pci_bus *bus)
964 struct fwnode_handle *fwnode;
966 if (!pci_msi_get_fwnode_cb)
969 fwnode = pci_msi_get_fwnode_cb(&bus->dev);
973 return irq_find_matching_fwnode(fwnode, DOMAIN_BUS_PCI_MSI);
976 static int __init acpi_pci_init(void)
980 if (acpi_gbl_FADT.boot_flags & ACPI_FADT_NO_MSI) {
981 pr_info("ACPI FADT declares the system doesn't support MSI, so disable it\n");
985 if (acpi_gbl_FADT.boot_flags & ACPI_FADT_NO_ASPM) {
986 pr_info("ACPI FADT declares the system doesn't support PCIe ASPM, so disable it\n");
990 ret = register_acpi_bus_type(&acpi_pci_bus);
994 pci_set_platform_pm(&acpi_pci_platform_pm);
995 acpi_pci_slot_init();
1000 arch_initcall(acpi_pci_init);