drivers/memstick/host/r592.c

   1 /*
   2  * Copyright (C) 2010 - Maxim Levitsky
   3  * driver for Ricoh memstick readers
   4  *
   5  * This program is free software; you can redistribute it and/or modify
   6  * it under the terms of the GNU General Public License version 2 as
   7  * published by the Free Software Foundation.
   8  */
   9
  10 #include <linux/kernel.h>
  11 #include <linux/module.h>
  12 #include <linux/freezer.h>
  13 #include <linux/jiffies.h>
  14 #include <linux/interrupt.h>
  15 #include <linux/pci.h>
  16 #include <linux/pci_ids.h>
  17 #include <linux/delay.h>
  18 #include <linux/slab.h>
  19 #include <linux/kthread.h>
  20 #include <linux/sched.h>
  21 #include <linux/highmem.h>
  22 #include <asm/byteorder.h>
  23 #include <linux/swab.h>
  24 #include "r592.h"
  25
  26 static bool r592_enable_dma = 1;
  27 static int debug;
  28
  29 static const char *tpc_names[] = {
  30         "MS_TPC_READ_MG_STATUS",
  31         "MS_TPC_READ_LONG_DATA",
  32         "MS_TPC_READ_SHORT_DATA",
  33         "MS_TPC_READ_REG",
  34         "MS_TPC_READ_QUAD_DATA",
  35         "INVALID",
  36         "MS_TPC_GET_INT",
  37         "MS_TPC_SET_RW_REG_ADRS",
  38         "MS_TPC_EX_SET_CMD",
  39         "MS_TPC_WRITE_QUAD_DATA",
  40         "MS_TPC_WRITE_REG",
  41         "MS_TPC_WRITE_SHORT_DATA",
  42         "MS_TPC_WRITE_LONG_DATA",
  43         "MS_TPC_SET_CMD",
  44 };
  45
  46 /**
  47  * memstick_debug_get_tpc_name - debug helper that returns string for
  48  * a TPC number
  49  */
  50 const char *memstick_debug_get_tpc_name(int tpc)
  51 {
  52         return tpc_names[tpc-1];
  53 }
  54 EXPORT_SYMBOL(memstick_debug_get_tpc_name);
  55
  56
  57 /* Read a register*/
  58 static inline u32 r592_read_reg(struct r592_device *dev, int address)
  59 {
  60         u32 value = readl(dev->mmio + address);
  61         dbg_reg("reg #%02d == 0x%08x", address, value);
  62         return value;
  63 }
  64
  65 /* Write a register */
  66 static inline void r592_write_reg(struct r592_device *dev,
  67                                                         int address, u32 value)
  68 {
  69         dbg_reg("reg #%02d <- 0x%08x", address, value);
  70         writel(value, dev->mmio + address);
  71 }
  72
  73 /* Reads a big endian DWORD register */
  74 static inline u32 r592_read_reg_raw_be(struct r592_device *dev, int address)
  75 {
  76         u32 value = __raw_readl(dev->mmio + address);
  77         dbg_reg("reg #%02d == 0x%08x", address, value);
  78         return be32_to_cpu(value);
  79 }
  80
  81 /* Writes a big endian DWORD register */
  82 static inline void r592_write_reg_raw_be(struct r592_device *dev,
  83                                                         int address, u32 value)
  84 {
  85         dbg_reg("reg #%02d <- 0x%08x", address, value);
  86         __raw_writel(cpu_to_be32(value), dev->mmio + address);
  87 }
  88
  89 /* Set specific bits in a register (little endian) */
  90 static inline void r592_set_reg_mask(struct r592_device *dev,
  91                                                         int address, u32 mask)
  92 {
  93         u32 reg = readl(dev->mmio + address);
  94         dbg_reg("reg #%02d |= 0x%08x (old =0x%08x)", address, mask, reg);
  95         writel(reg | mask , dev->mmio + address);
  96 }
  97
  98 /* Clear specific bits in a register (little endian) */
  99 static inline void r592_clear_reg_mask(struct r592_device *dev,
 100                                                 int address, u32 mask)
 101 {
 102         u32 reg = readl(dev->mmio + address);
 103         dbg_reg("reg #%02d &= 0x%08x (old = 0x%08x, mask = 0x%08x)",
 104                                                 address, ~mask, reg, mask);
 105         writel(reg & ~mask, dev->mmio + address);
 106 }
 107
 108
 109 /* Wait for status bits while checking for errors */
 110 static int r592_wait_status(struct r592_device *dev, u32 mask, u32 wanted_mask)
 111 {
 112         unsigned long timeout = jiffies + msecs_to_jiffies(1000);
 113         u32 reg = r592_read_reg(dev, R592_STATUS);
 114
 115         if ((reg & mask) == wanted_mask)
 116                 return 0;
 117
 118         while (time_before(jiffies, timeout)) {
 119
 120                 reg = r592_read_reg(dev, R592_STATUS);
 121
 122                 if ((reg & mask) == wanted_mask)
 123                         return 0;
 124
 125                 if (reg & (R592_STATUS_SEND_ERR | R592_STATUS_RECV_ERR))
 126                         return -EIO;
 127
 128                 cpu_relax();
 129         }
 130         return -ETIME;
 131 }
 132
 133
 134 /* Enable/disable device */
 135 static int r592_enable_device(struct r592_device *dev, bool enable)
 136 {
 137         dbg("%sabling the device", enable ? "en" : "dis");
 138
 139         if (enable) {
 140
 141                 /* Power up the card */
 142                 r592_write_reg(dev, R592_POWER, R592_POWER_0 | R592_POWER_1);
 143
 144                 /* Perform a reset */
 145                 r592_set_reg_mask(dev, R592_IO, R592_IO_RESET);
 146
 147                 msleep(100);
 148         } else
 149                 /* Power down the card */
 150                 r592_write_reg(dev, R592_POWER, 0);
 151
 152         return 0;
 153 }
 154
 155 /* Set serial/parallel mode */
 156 static int r592_set_mode(struct r592_device *dev, bool parallel_mode)
 157 {
 158         if (!parallel_mode) {
 159                 dbg("switching to serial mode");
 160
 161                 /* Set serial mode */
 162                 r592_write_reg(dev, R592_IO_MODE, R592_IO_MODE_SERIAL);
 163
 164                 r592_clear_reg_mask(dev, R592_POWER, R592_POWER_20);
 165
 166         } else {
 167                 dbg("switching to parallel mode");
 168
 169                 /* This setting should be set _before_ switch TPC */
 170                 r592_set_reg_mask(dev, R592_POWER, R592_POWER_20);
 171
 172                 r592_clear_reg_mask(dev, R592_IO,
 173                         R592_IO_SERIAL1 | R592_IO_SERIAL2);
 174
 175                 /* Set the parallel mode now */
 176                 r592_write_reg(dev, R592_IO_MODE, R592_IO_MODE_PARALLEL);
 177         }
 178
 179         dev->parallel_mode = parallel_mode;
 180         return 0;
 181 }
 182
 183 /* Perform a controller reset without powering down the card */
 184 static void r592_host_reset(struct r592_device *dev)
 185 {
 186         r592_set_reg_mask(dev, R592_IO, R592_IO_RESET);
 187         msleep(100);
 188         r592_set_mode(dev, dev->parallel_mode);
 189 }
 190
 191 #ifdef CONFIG_PM_SLEEP
 192 /* Disable all hardware interrupts */
 193 static void r592_clear_interrupts(struct r592_device *dev)
 194 {
 195         /* Disable & ACK all interrupts */
 196         r592_clear_reg_mask(dev, R592_REG_MSC, IRQ_ALL_ACK_MASK);
 197         r592_clear_reg_mask(dev, R592_REG_MSC, IRQ_ALL_EN_MASK);
 198 }
 199 #endif
 200
 201 /* Tests if there is an CRC error */
 202 static int r592_test_io_error(struct r592_device *dev)
 203 {
 204         if (!(r592_read_reg(dev, R592_STATUS) &
 205                 (R592_STATUS_SEND_ERR | R592_STATUS_RECV_ERR)))
 206                 return 0;
 207
 208         return -EIO;
 209 }
 210
 211 /* Ensure that FIFO is ready for use */
 212 static int r592_test_fifo_empty(struct r592_device *dev)
 213 {
 214         if (r592_read_reg(dev, R592_REG_MSC) & R592_REG_MSC_FIFO_EMPTY)
 215                 return 0;
 216
 217         dbg("FIFO not ready, trying to reset the device");
 218         r592_host_reset(dev);
 219
 220         if (r592_read_reg(dev, R592_REG_MSC) & R592_REG_MSC_FIFO_EMPTY)
 221                 return 0;
 222
 223         message("FIFO still not ready, giving up");
 224         return -EIO;
 225 }
 226
 227 /* Activates the DMA transfer from to FIFO */
 228 static void r592_start_dma(struct r592_device *dev, bool is_write)
 229 {
 230         unsigned long flags;
 231         u32 reg;
 232         spin_lock_irqsave(&dev->irq_lock, flags);
 233
 234         /* Ack interrupts (just in case) + enable them */
 235         r592_clear_reg_mask(dev, R592_REG_MSC, DMA_IRQ_ACK_MASK);
 236         r592_set_reg_mask(dev, R592_REG_MSC, DMA_IRQ_EN_MASK);
 237
 238         /* Set DMA address */
 239         r592_write_reg(dev, R592_FIFO_DMA, sg_dma_address(&dev->req->sg));
 240
 241         /* Enable the DMA */
 242         reg = r592_read_reg(dev, R592_FIFO_DMA_SETTINGS);
 243         reg |= R592_FIFO_DMA_SETTINGS_EN;
 244
 245         if (!is_write)
 246                 reg |= R592_FIFO_DMA_SETTINGS_DIR;
 247         else
 248                 reg &= ~R592_FIFO_DMA_SETTINGS_DIR;
 249         r592_write_reg(dev, R592_FIFO_DMA_SETTINGS, reg);
 250
 251         spin_unlock_irqrestore(&dev->irq_lock, flags);
 252 }
 253
 254 /* Cleanups DMA related settings */
 255 static void r592_stop_dma(struct r592_device *dev, int error)
 256 {
 257         r592_clear_reg_mask(dev, R592_FIFO_DMA_SETTINGS,
 258                 R592_FIFO_DMA_SETTINGS_EN);
 259
 260         /* This is only a precation */
 261         r592_write_reg(dev, R592_FIFO_DMA,
 262                         dev->dummy_dma_page_physical_address);
 263
 264         r592_clear_reg_mask(dev, R592_REG_MSC, DMA_IRQ_EN_MASK);
 265         r592_clear_reg_mask(dev, R592_REG_MSC, DMA_IRQ_ACK_MASK);
 266         dev->dma_error = error;
 267 }
 268
 269 /* Test if hardware supports DMA */
 270 static void r592_check_dma(struct r592_device *dev)
 271 {
 272         dev->dma_capable = r592_enable_dma &&
 273                 (r592_read_reg(dev, R592_FIFO_DMA_SETTINGS) &
 274                         R592_FIFO_DMA_SETTINGS_CAP);
 275 }
 276
 277 /* Transfers fifo contents in/out using DMA */
 278 static int r592_transfer_fifo_dma(struct r592_device *dev)
 279 {
 280         int len, sg_count;
 281         bool is_write;
 282
 283         if (!dev->dma_capable || !dev->req->long_data)
 284                 return -EINVAL;
 285
 286         len = dev->req->sg.length;
 287         is_write = dev->req->data_dir == WRITE;
 288
 289         if (len != R592_LFIFO_SIZE)
 290                 return -EINVAL;
 291
 292         dbg_verbose("doing dma transfer");
 293
 294         dev->dma_error = 0;
 295         reinit_completion(&dev->dma_done);
 296
 297         /* TODO: hidden assumption about nenth beeing always 1 */
 298         sg_count = dma_map_sg(&dev->pci_dev->dev, &dev->req->sg, 1, is_write ?
 299                 PCI_DMA_TODEVICE : PCI_DMA_FROMDEVICE);
 300
 301         if (sg_count != 1 || sg_dma_len(&dev->req->sg) < R592_LFIFO_SIZE) {
 302                 message("problem in dma_map_sg");
 303                 return -EIO;
 304         }
 305
 306         r592_start_dma(dev, is_write);
 307
 308         /* Wait for DMA completion */
 309         if (!wait_for_completion_timeout(
 310                         &dev->dma_done, msecs_to_jiffies(1000))) {
 311                 message("DMA timeout");
 312                 r592_stop_dma(dev, -ETIMEDOUT);
 313         }
 314
 315         dma_unmap_sg(&dev->pci_dev->dev, &dev->req->sg, 1, is_write ?
 316                 PCI_DMA_TODEVICE : PCI_DMA_FROMDEVICE);
 317
 318
 319         return dev->dma_error;
 320 }
 321
 322 /*
 323  * Writes the FIFO in 4 byte chunks.
 324  * If length isn't 4 byte aligned, rest of the data if put to a fifo
 325  * to be written later
 326  * Use r592_flush_fifo_write to flush that fifo when writing for the
 327  * last time
 328  */
 329 static void r592_write_fifo_pio(struct r592_device *dev,
 330                                         unsigned char *buffer, int len)
 331 {
 332         /* flush spill from former write */
 333         if (!kfifo_is_empty(&dev->pio_fifo)) {
 334
 335                 u8 tmp[4] = {0};
 336                 int copy_len = kfifo_in(&dev->pio_fifo, buffer, len);
 337
 338                 if (!kfifo_is_full(&dev->pio_fifo))
 339                         return;
 340                 len -= copy_len;
 341                 buffer += copy_len;
 342
 343                 copy_len = kfifo_out(&dev->pio_fifo, tmp, 4);
 344                 WARN_ON(copy_len != 4);
 345                 r592_write_reg_raw_be(dev, R592_FIFO_PIO, *(u32 *)tmp);
 346         }
 347
 348         WARN_ON(!kfifo_is_empty(&dev->pio_fifo));
 349
 350         /* write full dwords */
 351         while (len >= 4) {
 352                 r592_write_reg_raw_be(dev, R592_FIFO_PIO, *(u32 *)buffer);
 353                 buffer += 4;
 354                 len -= 4;
 355         }
 356
 357         /* put remaining bytes to the spill */
 358         if (len)
 359                 kfifo_in(&dev->pio_fifo, buffer, len);
 360 }
 361
 362 /* Flushes the temporary FIFO used to make aligned DWORD writes */
 363 static void r592_flush_fifo_write(struct r592_device *dev)
 364 {
 365         u8 buffer[4] = { 0 };
 366         int len;
 367
 368         if (kfifo_is_empty(&dev->pio_fifo))
 369                 return;
 370
 371         len = kfifo_out(&dev->pio_fifo, buffer, 4);
 372         r592_write_reg_raw_be(dev, R592_FIFO_PIO, *(u32 *)buffer);
 373 }
 374
 375 /*
 376  * Read a fifo in 4 bytes chunks.
 377  * If input doesn't fit the buffer, it places bytes of last dword in spill
 378  * buffer, so that they don't get lost on last read, just throw these away.
 379  */
 380 static void r592_read_fifo_pio(struct r592_device *dev,
 381                                                 unsigned char *buffer, int len)
 382 {
 383         u8 tmp[4];
 384
 385         /* Read from last spill */
 386         if (!kfifo_is_empty(&dev->pio_fifo)) {
 387                 int bytes_copied =
 388                         kfifo_out(&dev->pio_fifo, buffer, min(4, len));
 389                 buffer += bytes_copied;
 390                 len -= bytes_copied;
 391
 392                 if (!kfifo_is_empty(&dev->pio_fifo))
 393                         return;
 394         }
 395
 396         /* Reads dwords from FIFO */
 397         while (len >= 4) {
 398                 *(u32 *)buffer = r592_read_reg_raw_be(dev, R592_FIFO_PIO);
 399                 buffer += 4;
 400                 len -= 4;
 401         }
 402
 403         if (len) {
 404                 *(u32 *)tmp = r592_read_reg_raw_be(dev, R592_FIFO_PIO);
 405                 kfifo_in(&dev->pio_fifo, tmp, 4);
 406                 len -= kfifo_out(&dev->pio_fifo, buffer, len);
 407         }
 408
 409         WARN_ON(len);
 410         return;
 411 }
 412
 413 /* Transfers actual data using PIO. */
 414 static int r592_transfer_fifo_pio(struct r592_device *dev)
 415 {
 416         unsigned long flags;
 417
 418         bool is_write = dev->req->tpc >= MS_TPC_SET_RW_REG_ADRS;
 419         struct sg_mapping_iter miter;
 420
 421         kfifo_reset(&dev->pio_fifo);
 422
 423         if (!dev->req->long_data) {
 424                 if (is_write) {
 425                         r592_write_fifo_pio(dev, dev->req->data,
 426                                                         dev->req->data_len);
 427                         r592_flush_fifo_write(dev);
 428                 } else
 429                         r592_read_fifo_pio(dev, dev->req->data,
 430                                                         dev->req->data_len);
 431                 return 0;
 432         }
 433
 434         local_irq_save(flags);
 435         sg_miter_start(&miter, &dev->req->sg, 1, SG_MITER_ATOMIC |
 436                 (is_write ? SG_MITER_FROM_SG : SG_MITER_TO_SG));
 437
 438         /* Do the transfer fifo<->memory*/
 439         while (sg_miter_next(&miter))
 440                 if (is_write)
 441                         r592_write_fifo_pio(dev, miter.addr, miter.length);
 442                 else
 443                         r592_read_fifo_pio(dev, miter.addr, miter.length);
 444
 445
 446         /* Write last few non aligned bytes*/
 447         if (is_write)
 448                 r592_flush_fifo_write(dev);
 449
 450         sg_miter_stop(&miter);
 451         local_irq_restore(flags);
 452         return 0;
 453 }
 454
 455 /* Executes one TPC (data is read/written from small or large fifo) */
 456 static void r592_execute_tpc(struct r592_device *dev)
 457 {
 458         bool is_write;
 459         int len, error;
 460         u32 status, reg;
 461
 462         if (!dev->req) {
 463                 message("BUG: tpc execution without request!");
 464                 return;
 465         }
 466
 467         is_write = dev->req->tpc >= MS_TPC_SET_RW_REG_ADRS;
 468         len = dev->req->long_data ?
 469                 dev->req->sg.length : dev->req->data_len;
 470
 471         /* Ensure that FIFO can hold the input data */
 472         if (len > R592_LFIFO_SIZE) {
 473                 message("IO: hardware doesn't support TPCs longer that 512");
 474                 error = -ENOSYS;
 475                 goto out;
 476         }
 477
 478         if (!(r592_read_reg(dev, R592_REG_MSC) & R592_REG_MSC_PRSNT)) {
 479                 dbg("IO: refusing to send TPC because card is absent");
 480                 error = -ENODEV;
 481                 goto out;
 482         }
 483
 484         dbg("IO: executing %s LEN=%d",
 485                         memstick_debug_get_tpc_name(dev->req->tpc), len);
 486
 487         /* Set IO direction */
 488         if (is_write)
 489                 r592_set_reg_mask(dev, R592_IO, R592_IO_DIRECTION);
 490         else
 491                 r592_clear_reg_mask(dev, R592_IO, R592_IO_DIRECTION);
 492
 493
 494         error = r592_test_fifo_empty(dev);
 495         if (error)
 496                 goto out;
 497
 498         /* Transfer write data */
 499         if (is_write) {
 500                 error = r592_transfer_fifo_dma(dev);
 501                 if (error == -EINVAL)
 502                         error = r592_transfer_fifo_pio(dev);
 503         }
 504
 505         if (error)
 506                 goto out;
 507
 508         /* Trigger the TPC */
 509         reg = (len << R592_TPC_EXEC_LEN_SHIFT) |
 510                 (dev->req->tpc << R592_TPC_EXEC_TPC_SHIFT) |
 511                         R592_TPC_EXEC_BIG_FIFO;
 512
 513         r592_write_reg(dev, R592_TPC_EXEC, reg);
 514
 515         /* Wait for TPC completion */
 516         status = R592_STATUS_RDY;
 517         if (dev->req->need_card_int)
 518                 status |= R592_STATUS_CED;
 519
 520         error = r592_wait_status(dev, status, status);
 521         if (error) {
 522                 message("card didn't respond");
 523                 goto out;
 524         }
 525
 526         /* Test IO errors */
 527         error = r592_test_io_error(dev);
 528         if (error) {
 529                 dbg("IO error");
 530                 goto out;
 531         }
 532
 533         /* Read data from FIFO */
 534         if (!is_write) {
 535                 error = r592_transfer_fifo_dma(dev);
 536                 if (error == -EINVAL)
 537                         error = r592_transfer_fifo_pio(dev);
 538         }
 539
 540         /* read INT reg. This can be shortened with shifts, but that way
 541                 its more readable */
 542         if (dev->parallel_mode && dev->req->need_card_int) {
 543
 544                 dev->req->int_reg = 0;
 545                 status = r592_read_reg(dev, R592_STATUS);
 546
 547                 if (status & R592_STATUS_P_CMDNACK)
 548                         dev->req->int_reg |= MEMSTICK_INT_CMDNAK;
 549                 if (status & R592_STATUS_P_BREQ)
 550                         dev->req->int_reg |= MEMSTICK_INT_BREQ;
 551                 if (status & R592_STATUS_P_INTERR)
 552                         dev->req->int_reg |= MEMSTICK_INT_ERR;
 553                 if (status & R592_STATUS_P_CED)
 554                         dev->req->int_reg |= MEMSTICK_INT_CED;
 555         }
 556
 557         if (error)
 558                 dbg("FIFO read error");
 559 out:
 560         dev->req->error = error;
 561         r592_clear_reg_mask(dev, R592_REG_MSC, R592_REG_MSC_LED);
 562         return;
 563 }
 564
 565 /* Main request processing thread */
 566 static int r592_process_thread(void *data)
 567 {
 568         int error;
 569         struct r592_device *dev = (struct r592_device *)data;
 570         unsigned long flags;
 571
 572         while (!kthread_should_stop()) {
 573                 spin_lock_irqsave(&dev->io_thread_lock, flags);
 574                 set_current_state(TASK_INTERRUPTIBLE);
 575                 error = memstick_next_req(dev->host, &dev->req);
 576                 spin_unlock_irqrestore(&dev->io_thread_lock, flags);
 577
 578                 if (error) {
 579                         if (error == -ENXIO || error == -EAGAIN) {
 580                                 dbg_verbose("IO: done IO, sleeping");
 581                         } else {
 582                                 dbg("IO: unknown error from "
 583                                         "memstick_next_req %d", error);
 584                         }
 585
 586                         if (kthread_should_stop())
 587                                 set_current_state(TASK_RUNNING);
 588
 589                         schedule();
 590                 } else {
 591                         set_current_state(TASK_RUNNING);
 592                         r592_execute_tpc(dev);
 593                 }
 594         }
 595         return 0;
 596 }
 597
 598 /* Reprogram chip to detect change in card state */
 599 /* eg, if card is detected, arm it to detect removal, and vice versa */
 600 static void r592_update_card_detect(struct r592_device *dev)
 601 {
 602         u32 reg = r592_read_reg(dev, R592_REG_MSC);
 603         bool card_detected = reg & R592_REG_MSC_PRSNT;
 604
 605         dbg("update card detect. card state: %s", card_detected ?
 606                 "present" : "absent");
 607
 608         reg &= ~((R592_REG_MSC_IRQ_REMOVE | R592_REG_MSC_IRQ_INSERT) << 16);
 609
 610         if (card_detected)
 611                 reg |= (R592_REG_MSC_IRQ_REMOVE << 16);
 612         else
 613                 reg |= (R592_REG_MSC_IRQ_INSERT << 16);
 614
 615         r592_write_reg(dev, R592_REG_MSC, reg);
 616 }
 617
 618 /* Timer routine that fires 1 second after last card detection event, */
 619 static void r592_detect_timer(struct timer_list *t)
 620 {
 621         struct r592_device *dev = from_timer(dev, t, detect_timer);
 622         r592_update_card_detect(dev);
 623         memstick_detect_change(dev->host);
 624 }
 625
 626 /* Interrupt handler */
 627 static irqreturn_t r592_irq(int irq, void *data)
 628 {
 629         struct r592_device *dev = (struct r592_device *)data;
 630         irqreturn_t ret = IRQ_NONE;
 631         u32 reg;
 632         u16 irq_enable, irq_status;
 633         unsigned long flags;
 634         int error;
 635
 636         spin_lock_irqsave(&dev->irq_lock, flags);
 637
 638         reg = r592_read_reg(dev, R592_REG_MSC);
 639         irq_enable = reg >> 16;
 640         irq_status = reg & 0xFFFF;
 641
 642         /* Ack the interrupts */
 643         reg &= ~irq_status;
 644         r592_write_reg(dev, R592_REG_MSC, reg);
 645
 646         /* Get the IRQ status minus bits that aren't enabled */
 647         irq_status &= (irq_enable);
 648
 649         /* Due to limitation of memstick core, we don't look at bits that
 650                 indicate that card was removed/inserted and/or present */
 651         if (irq_status & (R592_REG_MSC_IRQ_INSERT | R592_REG_MSC_IRQ_REMOVE)) {
 652
 653                 bool card_was_added = irq_status & R592_REG_MSC_IRQ_INSERT;
 654                 ret = IRQ_HANDLED;
 655
 656                 message("IRQ: card %s", card_was_added ? "added" : "removed");
 657
 658                 mod_timer(&dev->detect_timer,
 659                         jiffies + msecs_to_jiffies(card_was_added ? 500 : 50));
 660         }
 661
 662         if (irq_status &
 663                 (R592_REG_MSC_FIFO_DMA_DONE | R592_REG_MSC_FIFO_DMA_ERR)) {
 664                 ret = IRQ_HANDLED;
 665
 666                 if (irq_status & R592_REG_MSC_FIFO_DMA_ERR) {
 667                         message("IRQ: DMA error");
 668                         error = -EIO;
 669                 } else {
 670                         dbg_verbose("IRQ: dma done");
 671                         error = 0;
 672                 }
 673
 674                 r592_stop_dma(dev, error);
 675                 complete(&dev->dma_done);
 676         }
 677
 678         spin_unlock_irqrestore(&dev->irq_lock, flags);
 679         return ret;
 680 }
 681
 682 /* External inteface: set settings */
 683 static int r592_set_param(struct memstick_host *host,
 684                         enum memstick_param param, int value)
 685 {
 686         struct r592_device *dev = memstick_priv(host);
 687
 688         switch (param) {
 689         case MEMSTICK_POWER:
 690                 switch (value) {
 691                 case MEMSTICK_POWER_ON:
 692                         return r592_enable_device(dev, true);
 693                 case MEMSTICK_POWER_OFF:
 694                         return r592_enable_device(dev, false);
 695                 default:
 696                         return -EINVAL;
 697                 }
 698         case MEMSTICK_INTERFACE:
 699                 switch (value) {
 700                 case MEMSTICK_SERIAL:
 701                         return r592_set_mode(dev, 0);
 702                 case MEMSTICK_PAR4:
 703                         return r592_set_mode(dev, 1);
 704                 default:
 705                         return -EINVAL;
 706                 }
 707         default:
 708                 return -EINVAL;
 709         }
 710 }
 711
 712 /* External interface: submit requests */
 713 static void r592_submit_req(struct memstick_host *host)
 714 {
 715         struct r592_device *dev = memstick_priv(host);
 716         unsigned long flags;
 717
 718         if (dev->req)
 719                 return;
 720
 721         spin_lock_irqsave(&dev->io_thread_lock, flags);
 722         if (wake_up_process(dev->io_thread))
 723                 dbg_verbose("IO thread woken to process requests");
 724         spin_unlock_irqrestore(&dev->io_thread_lock, flags);
 725 }
 726
 727 static const struct pci_device_id r592_pci_id_tbl[] = {
 728
 729         { PCI_VDEVICE(RICOH, 0x0592), },
 730         { },
 731 };
 732
 733 /* Main entry */
 734 static int r592_probe(struct pci_dev *pdev, const struct pci_device_id *id)
 735 {
 736         int error = -ENOMEM;
 737         struct memstick_host *host;
 738         struct r592_device *dev;
 739
 740         /* Allocate memory */
 741         host = memstick_alloc_host(sizeof(struct r592_device), &pdev->dev);
 742         if (!host)
 743                 goto error1;
 744
 745         dev = memstick_priv(host);
 746         dev->host = host;
 747         dev->pci_dev = pdev;
 748         pci_set_drvdata(pdev, dev);
 749
 750         /* pci initialization */
 751         error = pci_enable_device(pdev);
 752         if (error)
 753                 goto error2;
 754
 755         pci_set_master(pdev);
 756         error = dma_set_mask(&pdev->dev, DMA_BIT_MASK(32));
 757         if (error)
 758                 goto error3;
 759
 760         error = pci_request_regions(pdev, DRV_NAME);
 761         if (error)
 762                 goto error3;
 763
 764         dev->mmio = pci_ioremap_bar(pdev, 0);
 765         if (!dev->mmio)
 766                 goto error4;
 767
 768         dev->irq = pdev->irq;
 769         spin_lock_init(&dev->irq_lock);
 770         spin_lock_init(&dev->io_thread_lock);
 771         init_completion(&dev->dma_done);
 772         INIT_KFIFO(dev->pio_fifo);
 773         timer_setup(&dev->detect_timer, r592_detect_timer, 0);
 774
 775         /* Host initialization */
 776         host->caps = MEMSTICK_CAP_PAR4;
 777         host->request = r592_submit_req;
 778         host->set_param = r592_set_param;
 779         r592_check_dma(dev);
 780
 781         dev->io_thread = kthread_run(r592_process_thread, dev, "r592_io");
 782         if (IS_ERR(dev->io_thread)) {
 783                 error = PTR_ERR(dev->io_thread);
 784                 goto error5;
 785         }
 786
 787         /* This is just a precation, so don't fail */
 788         dev->dummy_dma_page = dma_alloc_coherent(&pdev->dev, PAGE_SIZE,
 789                 &dev->dummy_dma_page_physical_address, GFP_KERNEL);
 790         r592_stop_dma(dev , 0);
 791
 792         if (request_irq(dev->irq, &r592_irq, IRQF_SHARED,
 793                           DRV_NAME, dev))
 794                 goto error6;
 795
 796         r592_update_card_detect(dev);
 797         if (memstick_add_host(host))
 798                 goto error7;
 799
 800         message("driver successfully loaded");
 801         return 0;
 802 error7:
 803         free_irq(dev->irq, dev);
 804 error6:
 805         if (dev->dummy_dma_page)
 806                 dma_free_coherent(&pdev->dev, PAGE_SIZE, dev->dummy_dma_page,
 807                         dev->dummy_dma_page_physical_address);
 808
 809         kthread_stop(dev->io_thread);
 810 error5:
 811         iounmap(dev->mmio);
 812 error4:
 813         pci_release_regions(pdev);
 814 error3:
 815         pci_disable_device(pdev);
 816 error2:
 817         memstick_free_host(host);
 818 error1:
 819         return error;
 820 }
 821
 822 static void r592_remove(struct pci_dev *pdev)
 823 {
 824         int error = 0;
 825         struct r592_device *dev = pci_get_drvdata(pdev);
 826
 827         /* Stop the processing thread.
 828         That ensures that we won't take any more requests */
 829         kthread_stop(dev->io_thread);
 830
 831         r592_enable_device(dev, false);
 832
 833         while (!error && dev->req) {
 834                 dev->req->error = -ETIME;
 835                 error = memstick_next_req(dev->host, &dev->req);
 836         }
 837         memstick_remove_host(dev->host);
 838
 839         free_irq(dev->irq, dev);
 840         iounmap(dev->mmio);
 841         pci_release_regions(pdev);
 842         pci_disable_device(pdev);
 843         memstick_free_host(dev->host);
 844
 845         if (dev->dummy_dma_page)
 846                 dma_free_coherent(&pdev->dev, PAGE_SIZE, dev->dummy_dma_page,
 847                         dev->dummy_dma_page_physical_address);
 848 }
 849
 850 #ifdef CONFIG_PM_SLEEP
 851 static int r592_suspend(struct device *core_dev)
 852 {
 853         struct pci_dev *pdev = to_pci_dev(core_dev);
 854         struct r592_device *dev = pci_get_drvdata(pdev);
 855
 856         r592_clear_interrupts(dev);
 857         memstick_suspend_host(dev->host);
 858         del_timer_sync(&dev->detect_timer);
 859         return 0;
 860 }
 861
 862 static int r592_resume(struct device *core_dev)
 863 {
 864         struct pci_dev *pdev = to_pci_dev(core_dev);
 865         struct r592_device *dev = pci_get_drvdata(pdev);
 866
 867         r592_clear_interrupts(dev);
 868         r592_enable_device(dev, false);
 869         memstick_resume_host(dev->host);
 870         r592_update_card_detect(dev);
 871         return 0;
 872 }
 873 #endif
 874
 875 static SIMPLE_DEV_PM_OPS(r592_pm_ops, r592_suspend, r592_resume);
 876
 877 MODULE_DEVICE_TABLE(pci, r592_pci_id_tbl);
 878
 879 static struct pci_driver r852_pci_driver = {
 880         .name           = DRV_NAME,
 881         .id_table       = r592_pci_id_tbl,
 882         .probe          = r592_probe,
 883         .remove         = r592_remove,
 884         .driver.pm      = &r592_pm_ops,
 885 };
 886
 887 module_pci_driver(r852_pci_driver);
 888
 889 module_param_named(enable_dma, r592_enable_dma, bool, S_IRUGO);
 890 MODULE_PARM_DESC(enable_dma, "Enable usage of the DMA (default)");
 891 module_param(debug, int, S_IRUGO | S_IWUSR);
 892 MODULE_PARM_DESC(debug, "Debug level (0-3)");
 893
 894 MODULE_LICENSE("GPL");
 895 MODULE_AUTHOR("Maxim Levitsky <[email protected]>");
 896 MODULE_DESCRIPTION("Ricoh R5C592 Memstick/Memstick PRO card reader driver");