1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (c) Microsoft Corporation.
8 * This driver acts as a paravirtual front-end for PCI Express root buses.
9 * When a PCI Express function (either an entire device or an SR-IOV
10 * Virtual Function) is being passed through to the VM, this driver exposes
11 * a new bus to the guest VM. This is modeled as a root PCI bus because
12 * no bridges are being exposed to the VM. In fact, with a "Generation 2"
13 * VM within Hyper-V, there may seem to be no PCI bus at all in the VM
14 * until a device as been exposed using this driver.
16 * Each root PCI bus has its own PCI domain, which is called "Segment" in
17 * the PCI Firmware Specifications. Thus while each device passed through
18 * to the VM using this front-end will appear at "device 0", the domain will
19 * be unique. Typically, each bus will have one PCI function on it, though
20 * this driver does support more than one.
22 * In order to map the interrupts from the device through to the guest VM,
23 * this driver also implements an IRQ Domain, which handles interrupts (either
24 * MSI or MSI-X) associated with the functions on the bus. As interrupts are
25 * set up, torn down, or reaffined, this driver communicates with the
26 * underlying hypervisor to adjust the mappings in the I/O MMU so that each
27 * interrupt will be delivered to the correct virtual processor at the right
28 * vector. This driver does not support level-triggered (line-based)
29 * interrupts, and will report that the Interrupt Line register in the
30 * function's configuration space is zero.
32 * The rest of this driver mostly maps PCI concepts onto underlying Hyper-V
33 * facilities. For instance, the configuration space of a function exposed
34 * by Hyper-V is mapped into a single page of memory space, and the
35 * read and write handlers for config space must be aware of this mechanism.
36 * Similarly, device setup and teardown involves messages sent to and from
37 * the PCI back-end driver in Hyper-V.
40 #include <linux/kernel.h>
41 #include <linux/module.h>
42 #include <linux/pci.h>
43 #include <linux/delay.h>
44 #include <linux/semaphore.h>
45 #include <linux/irqdomain.h>
46 #include <asm/irqdomain.h>
48 #include <linux/irq.h>
49 #include <linux/msi.h>
50 #include <linux/hyperv.h>
51 #include <linux/refcount.h>
52 #include <asm/mshyperv.h>
55 * Protocol versions. The low word is the minor version, the high word the
59 #define PCI_MAKE_VERSION(major, minor) ((u32)(((major) << 16) | (minor)))
60 #define PCI_MAJOR_VERSION(version) ((u32)(version) >> 16)
61 #define PCI_MINOR_VERSION(version) ((u32)(version) & 0xff)
63 enum pci_protocol_version_t {
64 PCI_PROTOCOL_VERSION_1_1 = PCI_MAKE_VERSION(1, 1), /* Win10 */
65 PCI_PROTOCOL_VERSION_1_2 = PCI_MAKE_VERSION(1, 2), /* RS1 */
68 #define CPU_AFFINITY_ALL -1ULL
71 * Supported protocol versions in the order of probing - highest go
74 static enum pci_protocol_version_t pci_protocol_versions[] = {
75 PCI_PROTOCOL_VERSION_1_2,
76 PCI_PROTOCOL_VERSION_1_1,
80 * Protocol version negotiated by hv_pci_protocol_negotiation().
82 static enum pci_protocol_version_t pci_protocol_version;
84 #define PCI_CONFIG_MMIO_LENGTH 0x2000
85 #define CFG_PAGE_OFFSET 0x1000
86 #define CFG_PAGE_SIZE (PCI_CONFIG_MMIO_LENGTH - CFG_PAGE_OFFSET)
88 #define MAX_SUPPORTED_MSI_MESSAGES 0x400
90 #define STATUS_REVISION_MISMATCH 0xC0000059
92 /* space for 32bit serial number as string */
93 #define SLOT_NAME_SIZE 11
99 enum pci_message_type {
103 PCI_MESSAGE_BASE = 0x42490000,
104 PCI_BUS_RELATIONS = PCI_MESSAGE_BASE + 0,
105 PCI_QUERY_BUS_RELATIONS = PCI_MESSAGE_BASE + 1,
106 PCI_POWER_STATE_CHANGE = PCI_MESSAGE_BASE + 4,
107 PCI_QUERY_RESOURCE_REQUIREMENTS = PCI_MESSAGE_BASE + 5,
108 PCI_QUERY_RESOURCE_RESOURCES = PCI_MESSAGE_BASE + 6,
109 PCI_BUS_D0ENTRY = PCI_MESSAGE_BASE + 7,
110 PCI_BUS_D0EXIT = PCI_MESSAGE_BASE + 8,
111 PCI_READ_BLOCK = PCI_MESSAGE_BASE + 9,
112 PCI_WRITE_BLOCK = PCI_MESSAGE_BASE + 0xA,
113 PCI_EJECT = PCI_MESSAGE_BASE + 0xB,
114 PCI_QUERY_STOP = PCI_MESSAGE_BASE + 0xC,
115 PCI_REENABLE = PCI_MESSAGE_BASE + 0xD,
116 PCI_QUERY_STOP_FAILED = PCI_MESSAGE_BASE + 0xE,
117 PCI_EJECTION_COMPLETE = PCI_MESSAGE_BASE + 0xF,
118 PCI_RESOURCES_ASSIGNED = PCI_MESSAGE_BASE + 0x10,
119 PCI_RESOURCES_RELEASED = PCI_MESSAGE_BASE + 0x11,
120 PCI_INVALIDATE_BLOCK = PCI_MESSAGE_BASE + 0x12,
121 PCI_QUERY_PROTOCOL_VERSION = PCI_MESSAGE_BASE + 0x13,
122 PCI_CREATE_INTERRUPT_MESSAGE = PCI_MESSAGE_BASE + 0x14,
123 PCI_DELETE_INTERRUPT_MESSAGE = PCI_MESSAGE_BASE + 0x15,
124 PCI_RESOURCES_ASSIGNED2 = PCI_MESSAGE_BASE + 0x16,
125 PCI_CREATE_INTERRUPT_MESSAGE2 = PCI_MESSAGE_BASE + 0x17,
126 PCI_DELETE_INTERRUPT_MESSAGE2 = PCI_MESSAGE_BASE + 0x18, /* unused */
131 * Structures defining the virtual PCI Express protocol.
143 * Function numbers are 8-bits wide on Express, as interpreted through ARI,
144 * which is all this driver does. This representation is the one used in
145 * Windows, which is what is expected when sending this back and forth with
146 * the Hyper-V parent partition.
148 union win_slot_encoding {
158 * Pretty much as defined in the PCI Specifications.
160 struct pci_function_description {
161 u16 v_id; /* vendor ID */
162 u16 d_id; /* device ID */
168 union win_slot_encoding win_slot;
169 u32 ser; /* serial number */
175 * @delivery_mode: As defined in Intel's Programmer's
176 * Reference Manual, Volume 3, Chapter 8.
177 * @vector_count: Number of contiguous entries in the
178 * Interrupt Descriptor Table that are
179 * occupied by this Message-Signaled
180 * Interrupt. For "MSI", as first defined
181 * in PCI 2.2, this can be between 1 and
182 * 32. For "MSI-X," as first defined in PCI
183 * 3.0, this must be 1, as each MSI-X table
184 * entry would have its own descriptor.
185 * @reserved: Empty space
186 * @cpu_mask: All the target virtual processors.
197 * struct hv_msi_desc2 - 1.2 version of hv_msi_desc
199 * @delivery_mode: As defined in Intel's Programmer's
200 * Reference Manual, Volume 3, Chapter 8.
201 * @vector_count: Number of contiguous entries in the
202 * Interrupt Descriptor Table that are
203 * occupied by this Message-Signaled
204 * Interrupt. For "MSI", as first defined
205 * in PCI 2.2, this can be between 1 and
206 * 32. For "MSI-X," as first defined in PCI
207 * 3.0, this must be 1, as each MSI-X table
208 * entry would have its own descriptor.
209 * @processor_count: number of bits enabled in array.
210 * @processor_array: All the target virtual processors.
212 struct hv_msi_desc2 {
217 u16 processor_array[32];
221 * struct tran_int_desc
222 * @reserved: unused, padding
223 * @vector_count: same as in hv_msi_desc
224 * @data: This is the "data payload" value that is
225 * written by the device when it generates
226 * a message-signaled interrupt, either MSI
228 * @address: This is the address to which the data
229 * payload is written on interrupt
232 struct tran_int_desc {
240 * A generic message format for virtual PCI.
241 * Specific message formats are defined later in the file.
248 struct pci_child_message {
249 struct pci_message message_type;
250 union win_slot_encoding wslot;
253 struct pci_incoming_message {
254 struct vmpacket_descriptor hdr;
255 struct pci_message message_type;
258 struct pci_response {
259 struct vmpacket_descriptor hdr;
260 s32 status; /* negative values are failures */
264 void (*completion_func)(void *context, struct pci_response *resp,
265 int resp_packet_size);
268 struct pci_message message[0];
272 * Specific message types supporting the PCI protocol.
276 * Version negotiation message. Sent from the guest to the host.
277 * The guest is free to try different versions until the host
278 * accepts the version.
280 * pci_version: The protocol version requested.
281 * is_last_attempt: If TRUE, this is the last version guest will request.
282 * reservedz: Reserved field, set to zero.
285 struct pci_version_request {
286 struct pci_message message_type;
287 u32 protocol_version;
291 * Bus D0 Entry. This is sent from the guest to the host when the virtual
292 * bus (PCI Express port) is ready for action.
295 struct pci_bus_d0_entry {
296 struct pci_message message_type;
301 struct pci_bus_relations {
302 struct pci_incoming_message incoming;
304 struct pci_function_description func[0];
307 struct pci_q_res_req_response {
308 struct vmpacket_descriptor hdr;
309 s32 status; /* negative values are failures */
313 struct pci_set_power {
314 struct pci_message message_type;
315 union win_slot_encoding wslot;
316 u32 power_state; /* In Windows terms */
320 struct pci_set_power_response {
321 struct vmpacket_descriptor hdr;
322 s32 status; /* negative values are failures */
323 union win_slot_encoding wslot;
324 u32 resultant_state; /* In Windows terms */
328 struct pci_resources_assigned {
329 struct pci_message message_type;
330 union win_slot_encoding wslot;
331 u8 memory_range[0x14][6]; /* not used here */
336 struct pci_resources_assigned2 {
337 struct pci_message message_type;
338 union win_slot_encoding wslot;
339 u8 memory_range[0x14][6]; /* not used here */
340 u32 msi_descriptor_count;
344 struct pci_create_interrupt {
345 struct pci_message message_type;
346 union win_slot_encoding wslot;
347 struct hv_msi_desc int_desc;
350 struct pci_create_int_response {
351 struct pci_response response;
353 struct tran_int_desc int_desc;
356 struct pci_create_interrupt2 {
357 struct pci_message message_type;
358 union win_slot_encoding wslot;
359 struct hv_msi_desc2 int_desc;
362 struct pci_delete_interrupt {
363 struct pci_message message_type;
364 union win_slot_encoding wslot;
365 struct tran_int_desc int_desc;
369 * Note: the VM must pass a valid block id, wslot and bytes_requested.
371 struct pci_read_block {
372 struct pci_message message_type;
374 union win_slot_encoding wslot;
378 struct pci_read_block_response {
379 struct vmpacket_descriptor hdr;
381 u8 bytes[HV_CONFIG_BLOCK_SIZE_MAX];
385 * Note: the VM must pass a valid block id, wslot and byte_count.
387 struct pci_write_block {
388 struct pci_message message_type;
390 union win_slot_encoding wslot;
392 u8 bytes[HV_CONFIG_BLOCK_SIZE_MAX];
395 struct pci_dev_inval_block {
396 struct pci_incoming_message incoming;
397 union win_slot_encoding wslot;
401 struct pci_dev_incoming {
402 struct pci_incoming_message incoming;
403 union win_slot_encoding wslot;
406 struct pci_eject_response {
407 struct pci_message message_type;
408 union win_slot_encoding wslot;
412 static int pci_ring_size = (4 * PAGE_SIZE);
415 * Definitions or interrupt steering hypercall.
417 #define HV_PARTITION_ID_SELF ((u64)-1)
418 #define HVCALL_RETARGET_INTERRUPT 0x7e
420 struct hv_interrupt_entry {
421 u32 source; /* 1 for MSI(-X) */
428 * flags for hv_device_interrupt_target.flags
430 #define HV_DEVICE_INTERRUPT_TARGET_MULTICAST 1
431 #define HV_DEVICE_INTERRUPT_TARGET_PROCESSOR_SET 2
433 struct hv_device_interrupt_target {
438 struct hv_vpset vp_set;
442 struct retarget_msi_interrupt {
443 u64 partition_id; /* use "self" */
445 struct hv_interrupt_entry int_entry;
447 struct hv_device_interrupt_target int_target;
448 } __packed __aligned(8);
451 * Driver specific state.
454 enum hv_pcibus_state {
462 struct hv_pcibus_device {
463 struct pci_sysdata sysdata;
464 enum hv_pcibus_state state;
465 refcount_t remove_lock;
466 struct hv_device *hdev;
467 resource_size_t low_mmio_space;
468 resource_size_t high_mmio_space;
469 struct resource *mem_config;
470 struct resource *low_mmio_res;
471 struct resource *high_mmio_res;
472 struct completion *survey_event;
473 struct completion remove_event;
474 struct pci_bus *pci_bus;
475 spinlock_t config_lock; /* Avoid two threads writing index page */
476 spinlock_t device_list_lock; /* Protect lists below */
477 void __iomem *cfg_addr;
479 struct list_head resources_for_children;
481 struct list_head children;
482 struct list_head dr_list;
484 struct msi_domain_info msi_info;
485 struct msi_controller msi_chip;
486 struct irq_domain *irq_domain;
488 spinlock_t retarget_msi_interrupt_lock;
490 struct workqueue_struct *wq;
492 /* hypercall arg, must not cross page boundary */
493 struct retarget_msi_interrupt retarget_msi_interrupt_params;
496 * Don't put anything here: retarget_msi_interrupt_params must be last
501 * Tracks "Device Relations" messages from the host, which must be both
502 * processed in order and deferred so that they don't run in the context
503 * of the incoming packet callback.
506 struct work_struct wrk;
507 struct hv_pcibus_device *bus;
511 struct list_head list_entry;
513 struct pci_function_description func[0];
516 enum hv_pcichild_state {
517 hv_pcichild_init = 0,
518 hv_pcichild_requirements,
519 hv_pcichild_resourced,
520 hv_pcichild_ejecting,
525 /* List protected by pci_rescan_remove_lock */
526 struct list_head list_entry;
528 enum hv_pcichild_state state;
529 struct pci_slot *pci_slot;
530 struct pci_function_description desc;
531 bool reported_missing;
532 struct hv_pcibus_device *hbus;
533 struct work_struct wrk;
535 void (*block_invalidate)(void *context, u64 block_mask);
536 void *invalidate_context;
539 * What would be observed if one wrote 0xFFFFFFFF to a BAR and then
540 * read it back, for each of the BAR offsets within config space.
545 struct hv_pci_compl {
546 struct completion host_event;
547 s32 completion_status;
550 static void hv_pci_onchannelcallback(void *context);
553 * hv_pci_generic_compl() - Invoked for a completion packet
554 * @context: Set up by the sender of the packet.
555 * @resp: The response packet
556 * @resp_packet_size: Size in bytes of the packet
558 * This function is used to trigger an event and report status
559 * for any message for which the completion packet contains a
560 * status and nothing else.
562 static void hv_pci_generic_compl(void *context, struct pci_response *resp,
563 int resp_packet_size)
565 struct hv_pci_compl *comp_pkt = context;
567 if (resp_packet_size >= offsetofend(struct pci_response, status))
568 comp_pkt->completion_status = resp->status;
570 comp_pkt->completion_status = -1;
572 complete(&comp_pkt->host_event);
575 static struct hv_pci_dev *get_pcichild_wslot(struct hv_pcibus_device *hbus,
578 static void get_pcichild(struct hv_pci_dev *hpdev)
580 refcount_inc(&hpdev->refs);
583 static void put_pcichild(struct hv_pci_dev *hpdev)
585 if (refcount_dec_and_test(&hpdev->refs))
589 static void get_hvpcibus(struct hv_pcibus_device *hv_pcibus);
590 static void put_hvpcibus(struct hv_pcibus_device *hv_pcibus);
593 * There is no good way to get notified from vmbus_onoffer_rescind(),
594 * so let's use polling here, since this is not a hot path.
596 static int wait_for_response(struct hv_device *hdev,
597 struct completion *comp)
600 if (hdev->channel->rescind) {
601 dev_warn_once(&hdev->device, "The device is gone.\n");
605 if (wait_for_completion_timeout(comp, HZ / 10))
613 * devfn_to_wslot() - Convert from Linux PCI slot to Windows
614 * @devfn: The Linux representation of PCI slot
616 * Windows uses a slightly different representation of PCI slot.
618 * Return: The Windows representation
620 static u32 devfn_to_wslot(int devfn)
622 union win_slot_encoding wslot;
625 wslot.bits.dev = PCI_SLOT(devfn);
626 wslot.bits.func = PCI_FUNC(devfn);
632 * wslot_to_devfn() - Convert from Windows PCI slot to Linux
633 * @wslot: The Windows representation of PCI slot
635 * Windows uses a slightly different representation of PCI slot.
637 * Return: The Linux representation
639 static int wslot_to_devfn(u32 wslot)
641 union win_slot_encoding slot_no;
643 slot_no.slot = wslot;
644 return PCI_DEVFN(slot_no.bits.dev, slot_no.bits.func);
648 * PCI Configuration Space for these root PCI buses is implemented as a pair
649 * of pages in memory-mapped I/O space. Writing to the first page chooses
650 * the PCI function being written or read. Once the first page has been
651 * written to, the following page maps in the entire configuration space of
656 * _hv_pcifront_read_config() - Internal PCI config read
657 * @hpdev: The PCI driver's representation of the device
658 * @where: Offset within config space
659 * @size: Size of the transfer
660 * @val: Pointer to the buffer receiving the data
662 static void _hv_pcifront_read_config(struct hv_pci_dev *hpdev, int where,
666 void __iomem *addr = hpdev->hbus->cfg_addr + CFG_PAGE_OFFSET + where;
669 * If the attempt is to read the IDs or the ROM BAR, simulate that.
671 if (where + size <= PCI_COMMAND) {
672 memcpy(val, ((u8 *)&hpdev->desc.v_id) + where, size);
673 } else if (where >= PCI_CLASS_REVISION && where + size <=
674 PCI_CACHE_LINE_SIZE) {
675 memcpy(val, ((u8 *)&hpdev->desc.rev) + where -
676 PCI_CLASS_REVISION, size);
677 } else if (where >= PCI_SUBSYSTEM_VENDOR_ID && where + size <=
679 memcpy(val, (u8 *)&hpdev->desc.subsystem_id + where -
680 PCI_SUBSYSTEM_VENDOR_ID, size);
681 } else if (where >= PCI_ROM_ADDRESS && where + size <=
682 PCI_CAPABILITY_LIST) {
683 /* ROM BARs are unimplemented */
685 } else if (where >= PCI_INTERRUPT_LINE && where + size <=
688 * Interrupt Line and Interrupt PIN are hard-wired to zero
689 * because this front-end only supports message-signaled
693 } else if (where + size <= CFG_PAGE_SIZE) {
694 spin_lock_irqsave(&hpdev->hbus->config_lock, flags);
695 /* Choose the function to be read. (See comment above) */
696 writel(hpdev->desc.win_slot.slot, hpdev->hbus->cfg_addr);
697 /* Make sure the function was chosen before we start reading. */
699 /* Read from that function's config space. */
712 * Make sure the read was done before we release the spinlock
713 * allowing consecutive reads/writes.
716 spin_unlock_irqrestore(&hpdev->hbus->config_lock, flags);
718 dev_err(&hpdev->hbus->hdev->device,
719 "Attempt to read beyond a function's config space.\n");
723 static u16 hv_pcifront_get_vendor_id(struct hv_pci_dev *hpdev)
727 void __iomem *addr = hpdev->hbus->cfg_addr + CFG_PAGE_OFFSET +
730 spin_lock_irqsave(&hpdev->hbus->config_lock, flags);
732 /* Choose the function to be read. (See comment above) */
733 writel(hpdev->desc.win_slot.slot, hpdev->hbus->cfg_addr);
734 /* Make sure the function was chosen before we start reading. */
736 /* Read from that function's config space. */
739 * mb() is not required here, because the spin_unlock_irqrestore()
743 spin_unlock_irqrestore(&hpdev->hbus->config_lock, flags);
749 * _hv_pcifront_write_config() - Internal PCI config write
750 * @hpdev: The PCI driver's representation of the device
751 * @where: Offset within config space
752 * @size: Size of the transfer
753 * @val: The data being transferred
755 static void _hv_pcifront_write_config(struct hv_pci_dev *hpdev, int where,
759 void __iomem *addr = hpdev->hbus->cfg_addr + CFG_PAGE_OFFSET + where;
761 if (where >= PCI_SUBSYSTEM_VENDOR_ID &&
762 where + size <= PCI_CAPABILITY_LIST) {
763 /* SSIDs and ROM BARs are read-only */
764 } else if (where >= PCI_COMMAND && where + size <= CFG_PAGE_SIZE) {
765 spin_lock_irqsave(&hpdev->hbus->config_lock, flags);
766 /* Choose the function to be written. (See comment above) */
767 writel(hpdev->desc.win_slot.slot, hpdev->hbus->cfg_addr);
768 /* Make sure the function was chosen before we start writing. */
770 /* Write to that function's config space. */
783 * Make sure the write was done before we release the spinlock
784 * allowing consecutive reads/writes.
787 spin_unlock_irqrestore(&hpdev->hbus->config_lock, flags);
789 dev_err(&hpdev->hbus->hdev->device,
790 "Attempt to write beyond a function's config space.\n");
795 * hv_pcifront_read_config() - Read configuration space
796 * @bus: PCI Bus structure
797 * @devfn: Device/function
798 * @where: Offset from base
799 * @size: Byte/word/dword
800 * @val: Value to be read
802 * Return: PCIBIOS_SUCCESSFUL on success
803 * PCIBIOS_DEVICE_NOT_FOUND on failure
805 static int hv_pcifront_read_config(struct pci_bus *bus, unsigned int devfn,
806 int where, int size, u32 *val)
808 struct hv_pcibus_device *hbus =
809 container_of(bus->sysdata, struct hv_pcibus_device, sysdata);
810 struct hv_pci_dev *hpdev;
812 hpdev = get_pcichild_wslot(hbus, devfn_to_wslot(devfn));
814 return PCIBIOS_DEVICE_NOT_FOUND;
816 _hv_pcifront_read_config(hpdev, where, size, val);
819 return PCIBIOS_SUCCESSFUL;
823 * hv_pcifront_write_config() - Write configuration space
824 * @bus: PCI Bus structure
825 * @devfn: Device/function
826 * @where: Offset from base
827 * @size: Byte/word/dword
828 * @val: Value to be written to device
830 * Return: PCIBIOS_SUCCESSFUL on success
831 * PCIBIOS_DEVICE_NOT_FOUND on failure
833 static int hv_pcifront_write_config(struct pci_bus *bus, unsigned int devfn,
834 int where, int size, u32 val)
836 struct hv_pcibus_device *hbus =
837 container_of(bus->sysdata, struct hv_pcibus_device, sysdata);
838 struct hv_pci_dev *hpdev;
840 hpdev = get_pcichild_wslot(hbus, devfn_to_wslot(devfn));
842 return PCIBIOS_DEVICE_NOT_FOUND;
844 _hv_pcifront_write_config(hpdev, where, size, val);
847 return PCIBIOS_SUCCESSFUL;
850 /* PCIe operations */
851 static struct pci_ops hv_pcifront_ops = {
852 .read = hv_pcifront_read_config,
853 .write = hv_pcifront_write_config,
857 * Paravirtual backchannel
859 * Hyper-V SR-IOV provides a backchannel mechanism in software for
860 * communication between a VF driver and a PF driver. These
861 * "configuration blocks" are similar in concept to PCI configuration space,
862 * but instead of doing reads and writes in 32-bit chunks through a very slow
863 * path, packets of up to 128 bytes can be sent or received asynchronously.
865 * Nearly every SR-IOV device contains just such a communications channel in
866 * hardware, so using this one in software is usually optional. Using the
867 * software channel, however, allows driver implementers to leverage software
868 * tools that fuzz the communications channel looking for vulnerabilities.
870 * The usage model for these packets puts the responsibility for reading or
871 * writing on the VF driver. The VF driver sends a read or a write packet,
872 * indicating which "block" is being referred to by number.
874 * If the PF driver wishes to initiate communication, it can "invalidate" one or
875 * more of the first 64 blocks. This invalidation is delivered via a callback
876 * supplied by the VF driver by this driver.
878 * No protocol is implied, except that supplied by the PF and VF drivers.
881 struct hv_read_config_compl {
882 struct hv_pci_compl comp_pkt;
885 unsigned int bytes_returned;
889 * hv_pci_read_config_compl() - Invoked when a response packet
890 * for a read config block operation arrives.
891 * @context: Identifies the read config operation
892 * @resp: The response packet itself
893 * @resp_packet_size: Size in bytes of the response packet
895 static void hv_pci_read_config_compl(void *context, struct pci_response *resp,
896 int resp_packet_size)
898 struct hv_read_config_compl *comp = context;
899 struct pci_read_block_response *read_resp =
900 (struct pci_read_block_response *)resp;
901 unsigned int data_len, hdr_len;
903 hdr_len = offsetof(struct pci_read_block_response, bytes);
904 if (resp_packet_size < hdr_len) {
905 comp->comp_pkt.completion_status = -1;
909 data_len = resp_packet_size - hdr_len;
910 if (data_len > 0 && read_resp->status == 0) {
911 comp->bytes_returned = min(comp->len, data_len);
912 memcpy(comp->buf, read_resp->bytes, comp->bytes_returned);
914 comp->bytes_returned = 0;
917 comp->comp_pkt.completion_status = read_resp->status;
919 complete(&comp->comp_pkt.host_event);
923 * hv_read_config_block() - Sends a read config block request to
924 * the back-end driver running in the Hyper-V parent partition.
925 * @pdev: The PCI driver's representation for this device.
926 * @buf: Buffer into which the config block will be copied.
927 * @len: Size in bytes of buf.
928 * @block_id: Identifies the config block which has been requested.
929 * @bytes_returned: Size which came back from the back-end driver.
931 * Return: 0 on success, -errno on failure
933 int hv_read_config_block(struct pci_dev *pdev, void *buf, unsigned int len,
934 unsigned int block_id, unsigned int *bytes_returned)
936 struct hv_pcibus_device *hbus =
937 container_of(pdev->bus->sysdata, struct hv_pcibus_device,
940 struct pci_packet pkt;
941 char buf[sizeof(struct pci_read_block)];
943 struct hv_read_config_compl comp_pkt;
944 struct pci_read_block *read_blk;
947 if (len == 0 || len > HV_CONFIG_BLOCK_SIZE_MAX)
950 init_completion(&comp_pkt.comp_pkt.host_event);
954 memset(&pkt, 0, sizeof(pkt));
955 pkt.pkt.completion_func = hv_pci_read_config_compl;
956 pkt.pkt.compl_ctxt = &comp_pkt;
957 read_blk = (struct pci_read_block *)&pkt.pkt.message;
958 read_blk->message_type.type = PCI_READ_BLOCK;
959 read_blk->wslot.slot = devfn_to_wslot(pdev->devfn);
960 read_blk->block_id = block_id;
961 read_blk->bytes_requested = len;
963 ret = vmbus_sendpacket(hbus->hdev->channel, read_blk,
964 sizeof(*read_blk), (unsigned long)&pkt.pkt,
966 VMBUS_DATA_PACKET_FLAG_COMPLETION_REQUESTED);
970 ret = wait_for_response(hbus->hdev, &comp_pkt.comp_pkt.host_event);
974 if (comp_pkt.comp_pkt.completion_status != 0 ||
975 comp_pkt.bytes_returned == 0) {
976 dev_err(&hbus->hdev->device,
977 "Read Config Block failed: 0x%x, bytes_returned=%d\n",
978 comp_pkt.comp_pkt.completion_status,
979 comp_pkt.bytes_returned);
983 *bytes_returned = comp_pkt.bytes_returned;
988 * hv_pci_write_config_compl() - Invoked when a response packet for a write
989 * config block operation arrives.
990 * @context: Identifies the write config operation
991 * @resp: The response packet itself
992 * @resp_packet_size: Size in bytes of the response packet
994 static void hv_pci_write_config_compl(void *context, struct pci_response *resp,
995 int resp_packet_size)
997 struct hv_pci_compl *comp_pkt = context;
999 comp_pkt->completion_status = resp->status;
1000 complete(&comp_pkt->host_event);
1004 * hv_write_config_block() - Sends a write config block request to the
1005 * back-end driver running in the Hyper-V parent partition.
1006 * @pdev: The PCI driver's representation for this device.
1007 * @buf: Buffer from which the config block will be copied.
1008 * @len: Size in bytes of buf.
1009 * @block_id: Identifies the config block which is being written.
1011 * Return: 0 on success, -errno on failure
1013 int hv_write_config_block(struct pci_dev *pdev, void *buf, unsigned int len,
1014 unsigned int block_id)
1016 struct hv_pcibus_device *hbus =
1017 container_of(pdev->bus->sysdata, struct hv_pcibus_device,
1020 struct pci_packet pkt;
1021 char buf[sizeof(struct pci_write_block)];
1024 struct hv_pci_compl comp_pkt;
1025 struct pci_write_block *write_blk;
1029 if (len == 0 || len > HV_CONFIG_BLOCK_SIZE_MAX)
1032 init_completion(&comp_pkt.host_event);
1034 memset(&pkt, 0, sizeof(pkt));
1035 pkt.pkt.completion_func = hv_pci_write_config_compl;
1036 pkt.pkt.compl_ctxt = &comp_pkt;
1037 write_blk = (struct pci_write_block *)&pkt.pkt.message;
1038 write_blk->message_type.type = PCI_WRITE_BLOCK;
1039 write_blk->wslot.slot = devfn_to_wslot(pdev->devfn);
1040 write_blk->block_id = block_id;
1041 write_blk->byte_count = len;
1042 memcpy(write_blk->bytes, buf, len);
1043 pkt_size = offsetof(struct pci_write_block, bytes) + len;
1045 * This quirk is required on some hosts shipped around 2018, because
1046 * these hosts don't check the pkt_size correctly (new hosts have been
1047 * fixed since early 2019). The quirk is also safe on very old hosts
1048 * and new hosts, because, on them, what really matters is the length
1049 * specified in write_blk->byte_count.
1051 pkt_size += sizeof(pkt.reserved);
1053 ret = vmbus_sendpacket(hbus->hdev->channel, write_blk, pkt_size,
1054 (unsigned long)&pkt.pkt, VM_PKT_DATA_INBAND,
1055 VMBUS_DATA_PACKET_FLAG_COMPLETION_REQUESTED);
1059 ret = wait_for_response(hbus->hdev, &comp_pkt.host_event);
1063 if (comp_pkt.completion_status != 0) {
1064 dev_err(&hbus->hdev->device,
1065 "Write Config Block failed: 0x%x\n",
1066 comp_pkt.completion_status);
1074 * hv_register_block_invalidate() - Invoked when a config block invalidation
1075 * arrives from the back-end driver.
1076 * @pdev: The PCI driver's representation for this device.
1077 * @context: Identifies the device.
1078 * @block_invalidate: Identifies all of the blocks being invalidated.
1080 * Return: 0 on success, -errno on failure
1082 int hv_register_block_invalidate(struct pci_dev *pdev, void *context,
1083 void (*block_invalidate)(void *context,
1086 struct hv_pcibus_device *hbus =
1087 container_of(pdev->bus->sysdata, struct hv_pcibus_device,
1089 struct hv_pci_dev *hpdev;
1091 hpdev = get_pcichild_wslot(hbus, devfn_to_wslot(pdev->devfn));
1095 hpdev->block_invalidate = block_invalidate;
1096 hpdev->invalidate_context = context;
1098 put_pcichild(hpdev);
1103 /* Interrupt management hooks */
1104 static void hv_int_desc_free(struct hv_pci_dev *hpdev,
1105 struct tran_int_desc *int_desc)
1107 struct pci_delete_interrupt *int_pkt;
1109 struct pci_packet pkt;
1110 u8 buffer[sizeof(struct pci_delete_interrupt)];
1113 memset(&ctxt, 0, sizeof(ctxt));
1114 int_pkt = (struct pci_delete_interrupt *)&ctxt.pkt.message;
1115 int_pkt->message_type.type =
1116 PCI_DELETE_INTERRUPT_MESSAGE;
1117 int_pkt->wslot.slot = hpdev->desc.win_slot.slot;
1118 int_pkt->int_desc = *int_desc;
1119 vmbus_sendpacket(hpdev->hbus->hdev->channel, int_pkt, sizeof(*int_pkt),
1120 (unsigned long)&ctxt.pkt, VM_PKT_DATA_INBAND, 0);
1125 * hv_msi_free() - Free the MSI.
1126 * @domain: The interrupt domain pointer
1127 * @info: Extra MSI-related context
1128 * @irq: Identifies the IRQ.
1130 * The Hyper-V parent partition and hypervisor are tracking the
1131 * messages that are in use, keeping the interrupt redirection
1132 * table up to date. This callback sends a message that frees
1133 * the IRT entry and related tracking nonsense.
1135 static void hv_msi_free(struct irq_domain *domain, struct msi_domain_info *info,
1138 struct hv_pcibus_device *hbus;
1139 struct hv_pci_dev *hpdev;
1140 struct pci_dev *pdev;
1141 struct tran_int_desc *int_desc;
1142 struct irq_data *irq_data = irq_domain_get_irq_data(domain, irq);
1143 struct msi_desc *msi = irq_data_get_msi_desc(irq_data);
1145 pdev = msi_desc_to_pci_dev(msi);
1147 int_desc = irq_data_get_irq_chip_data(irq_data);
1151 irq_data->chip_data = NULL;
1152 hpdev = get_pcichild_wslot(hbus, devfn_to_wslot(pdev->devfn));
1158 hv_int_desc_free(hpdev, int_desc);
1159 put_pcichild(hpdev);
1162 static int hv_set_affinity(struct irq_data *data, const struct cpumask *dest,
1165 struct irq_data *parent = data->parent_data;
1167 return parent->chip->irq_set_affinity(parent, dest, force);
1170 static void hv_irq_mask(struct irq_data *data)
1172 pci_msi_mask_irq(data);
1176 * hv_irq_unmask() - "Unmask" the IRQ by setting its current
1178 * @data: Describes the IRQ
1180 * Build new a destination for the MSI and make a hypercall to
1181 * update the Interrupt Redirection Table. "Device Logical ID"
1182 * is built out of this PCI bus's instance GUID and the function
1183 * number of the device.
1185 static void hv_irq_unmask(struct irq_data *data)
1187 struct msi_desc *msi_desc = irq_data_get_msi_desc(data);
1188 struct irq_cfg *cfg = irqd_cfg(data);
1189 struct retarget_msi_interrupt *params;
1190 struct hv_pcibus_device *hbus;
1191 struct cpumask *dest;
1193 struct pci_bus *pbus;
1194 struct pci_dev *pdev;
1195 unsigned long flags;
1200 dest = irq_data_get_effective_affinity_mask(data);
1201 pdev = msi_desc_to_pci_dev(msi_desc);
1203 hbus = container_of(pbus->sysdata, struct hv_pcibus_device, sysdata);
1205 spin_lock_irqsave(&hbus->retarget_msi_interrupt_lock, flags);
1207 params = &hbus->retarget_msi_interrupt_params;
1208 memset(params, 0, sizeof(*params));
1209 params->partition_id = HV_PARTITION_ID_SELF;
1210 params->int_entry.source = 1; /* MSI(-X) */
1211 params->int_entry.address = msi_desc->msg.address_lo;
1212 params->int_entry.data = msi_desc->msg.data;
1213 params->device_id = (hbus->hdev->dev_instance.b[5] << 24) |
1214 (hbus->hdev->dev_instance.b[4] << 16) |
1215 (hbus->hdev->dev_instance.b[7] << 8) |
1216 (hbus->hdev->dev_instance.b[6] & 0xf8) |
1217 PCI_FUNC(pdev->devfn);
1218 params->int_target.vector = cfg->vector;
1221 * Honoring apic->irq_delivery_mode set to dest_Fixed by
1222 * setting the HV_DEVICE_INTERRUPT_TARGET_MULTICAST flag results in a
1223 * spurious interrupt storm. Not doing so does not seem to have a
1224 * negative effect (yet?).
1227 if (pci_protocol_version >= PCI_PROTOCOL_VERSION_1_2) {
1229 * PCI_PROTOCOL_VERSION_1_2 supports the VP_SET version of the
1230 * HVCALL_RETARGET_INTERRUPT hypercall, which also coincides
1231 * with >64 VP support.
1232 * ms_hyperv.hints & HV_X64_EX_PROCESSOR_MASKS_RECOMMENDED
1233 * is not sufficient for this hypercall.
1235 params->int_target.flags |=
1236 HV_DEVICE_INTERRUPT_TARGET_PROCESSOR_SET;
1238 if (!alloc_cpumask_var(&tmp, GFP_ATOMIC)) {
1243 cpumask_and(tmp, dest, cpu_online_mask);
1244 nr_bank = cpumask_to_vpset(¶ms->int_target.vp_set, tmp);
1245 free_cpumask_var(tmp);
1253 * var-sized hypercall, var-size starts after vp_mask (thus
1254 * vp_set.format does not count, but vp_set.valid_bank_mask
1257 var_size = 1 + nr_bank;
1259 for_each_cpu_and(cpu, dest, cpu_online_mask) {
1260 params->int_target.vp_mask |=
1261 (1ULL << hv_cpu_number_to_vp_number(cpu));
1265 res = hv_do_hypercall(HVCALL_RETARGET_INTERRUPT | (var_size << 17),
1269 spin_unlock_irqrestore(&hbus->retarget_msi_interrupt_lock, flags);
1272 dev_err(&hbus->hdev->device,
1273 "%s() failed: %#llx", __func__, res);
1277 pci_msi_unmask_irq(data);
1280 struct compose_comp_ctxt {
1281 struct hv_pci_compl comp_pkt;
1282 struct tran_int_desc int_desc;
1285 static void hv_pci_compose_compl(void *context, struct pci_response *resp,
1286 int resp_packet_size)
1288 struct compose_comp_ctxt *comp_pkt = context;
1289 struct pci_create_int_response *int_resp =
1290 (struct pci_create_int_response *)resp;
1292 comp_pkt->comp_pkt.completion_status = resp->status;
1293 comp_pkt->int_desc = int_resp->int_desc;
1294 complete(&comp_pkt->comp_pkt.host_event);
1297 static u32 hv_compose_msi_req_v1(
1298 struct pci_create_interrupt *int_pkt, struct cpumask *affinity,
1299 u32 slot, u8 vector)
1301 int_pkt->message_type.type = PCI_CREATE_INTERRUPT_MESSAGE;
1302 int_pkt->wslot.slot = slot;
1303 int_pkt->int_desc.vector = vector;
1304 int_pkt->int_desc.vector_count = 1;
1305 int_pkt->int_desc.delivery_mode = dest_Fixed;
1308 * Create MSI w/ dummy vCPU set, overwritten by subsequent retarget in
1311 int_pkt->int_desc.cpu_mask = CPU_AFFINITY_ALL;
1313 return sizeof(*int_pkt);
1316 static u32 hv_compose_msi_req_v2(
1317 struct pci_create_interrupt2 *int_pkt, struct cpumask *affinity,
1318 u32 slot, u8 vector)
1322 int_pkt->message_type.type = PCI_CREATE_INTERRUPT_MESSAGE2;
1323 int_pkt->wslot.slot = slot;
1324 int_pkt->int_desc.vector = vector;
1325 int_pkt->int_desc.vector_count = 1;
1326 int_pkt->int_desc.delivery_mode = dest_Fixed;
1329 * Create MSI w/ dummy vCPU set targeting just one vCPU, overwritten
1330 * by subsequent retarget in hv_irq_unmask().
1332 cpu = cpumask_first_and(affinity, cpu_online_mask);
1333 int_pkt->int_desc.processor_array[0] =
1334 hv_cpu_number_to_vp_number(cpu);
1335 int_pkt->int_desc.processor_count = 1;
1337 return sizeof(*int_pkt);
1341 * hv_compose_msi_msg() - Supplies a valid MSI address/data
1342 * @data: Everything about this MSI
1343 * @msg: Buffer that is filled in by this function
1345 * This function unpacks the IRQ looking for target CPU set, IDT
1346 * vector and mode and sends a message to the parent partition
1347 * asking for a mapping for that tuple in this partition. The
1348 * response supplies a data value and address to which that data
1349 * should be written to trigger that interrupt.
1351 static void hv_compose_msi_msg(struct irq_data *data, struct msi_msg *msg)
1353 struct irq_cfg *cfg = irqd_cfg(data);
1354 struct hv_pcibus_device *hbus;
1355 struct hv_pci_dev *hpdev;
1356 struct pci_bus *pbus;
1357 struct pci_dev *pdev;
1358 struct cpumask *dest;
1359 unsigned long flags;
1360 struct compose_comp_ctxt comp;
1361 struct tran_int_desc *int_desc;
1363 struct pci_packet pci_pkt;
1365 struct pci_create_interrupt v1;
1366 struct pci_create_interrupt2 v2;
1373 pdev = msi_desc_to_pci_dev(irq_data_get_msi_desc(data));
1374 dest = irq_data_get_effective_affinity_mask(data);
1376 hbus = container_of(pbus->sysdata, struct hv_pcibus_device, sysdata);
1377 hpdev = get_pcichild_wslot(hbus, devfn_to_wslot(pdev->devfn));
1379 goto return_null_message;
1381 /* Free any previous message that might have already been composed. */
1382 if (data->chip_data) {
1383 int_desc = data->chip_data;
1384 data->chip_data = NULL;
1385 hv_int_desc_free(hpdev, int_desc);
1388 int_desc = kzalloc(sizeof(*int_desc), GFP_ATOMIC);
1390 goto drop_reference;
1392 memset(&ctxt, 0, sizeof(ctxt));
1393 init_completion(&comp.comp_pkt.host_event);
1394 ctxt.pci_pkt.completion_func = hv_pci_compose_compl;
1395 ctxt.pci_pkt.compl_ctxt = ∁
1397 switch (pci_protocol_version) {
1398 case PCI_PROTOCOL_VERSION_1_1:
1399 size = hv_compose_msi_req_v1(&ctxt.int_pkts.v1,
1401 hpdev->desc.win_slot.slot,
1405 case PCI_PROTOCOL_VERSION_1_2:
1406 size = hv_compose_msi_req_v2(&ctxt.int_pkts.v2,
1408 hpdev->desc.win_slot.slot,
1413 /* As we only negotiate protocol versions known to this driver,
1414 * this path should never hit. However, this is it not a hot
1415 * path so we print a message to aid future updates.
1417 dev_err(&hbus->hdev->device,
1418 "Unexpected vPCI protocol, update driver.");
1422 ret = vmbus_sendpacket(hpdev->hbus->hdev->channel, &ctxt.int_pkts,
1423 size, (unsigned long)&ctxt.pci_pkt,
1425 VMBUS_DATA_PACKET_FLAG_COMPLETION_REQUESTED);
1427 dev_err(&hbus->hdev->device,
1428 "Sending request for interrupt failed: 0x%x",
1429 comp.comp_pkt.completion_status);
1434 * Since this function is called with IRQ locks held, can't
1435 * do normal wait for completion; instead poll.
1437 while (!try_wait_for_completion(&comp.comp_pkt.host_event)) {
1438 /* 0xFFFF means an invalid PCI VENDOR ID. */
1439 if (hv_pcifront_get_vendor_id(hpdev) == 0xFFFF) {
1440 dev_err_once(&hbus->hdev->device,
1441 "the device has gone\n");
1446 * When the higher level interrupt code calls us with
1447 * interrupt disabled, we must poll the channel by calling
1448 * the channel callback directly when channel->target_cpu is
1449 * the current CPU. When the higher level interrupt code
1450 * calls us with interrupt enabled, let's add the
1451 * local_irq_save()/restore() to avoid race:
1452 * hv_pci_onchannelcallback() can also run in tasklet.
1454 local_irq_save(flags);
1456 if (hbus->hdev->channel->target_cpu == smp_processor_id())
1457 hv_pci_onchannelcallback(hbus);
1459 local_irq_restore(flags);
1461 if (hpdev->state == hv_pcichild_ejecting) {
1462 dev_err_once(&hbus->hdev->device,
1463 "the device is being ejected\n");
1470 if (comp.comp_pkt.completion_status < 0) {
1471 dev_err(&hbus->hdev->device,
1472 "Request for interrupt failed: 0x%x",
1473 comp.comp_pkt.completion_status);
1478 * Record the assignment so that this can be unwound later. Using
1479 * irq_set_chip_data() here would be appropriate, but the lock it takes
1482 *int_desc = comp.int_desc;
1483 data->chip_data = int_desc;
1485 /* Pass up the result. */
1486 msg->address_hi = comp.int_desc.address >> 32;
1487 msg->address_lo = comp.int_desc.address & 0xffffffff;
1488 msg->data = comp.int_desc.data;
1490 put_pcichild(hpdev);
1496 put_pcichild(hpdev);
1497 return_null_message:
1498 msg->address_hi = 0;
1499 msg->address_lo = 0;
1503 /* HW Interrupt Chip Descriptor */
1504 static struct irq_chip hv_msi_irq_chip = {
1505 .name = "Hyper-V PCIe MSI",
1506 .irq_compose_msi_msg = hv_compose_msi_msg,
1507 .irq_set_affinity = hv_set_affinity,
1508 .irq_ack = irq_chip_ack_parent,
1509 .irq_mask = hv_irq_mask,
1510 .irq_unmask = hv_irq_unmask,
1513 static irq_hw_number_t hv_msi_domain_ops_get_hwirq(struct msi_domain_info *info,
1514 msi_alloc_info_t *arg)
1516 return arg->msi_hwirq;
1519 static struct msi_domain_ops hv_msi_ops = {
1520 .get_hwirq = hv_msi_domain_ops_get_hwirq,
1521 .msi_prepare = pci_msi_prepare,
1522 .set_desc = pci_msi_set_desc,
1523 .msi_free = hv_msi_free,
1527 * hv_pcie_init_irq_domain() - Initialize IRQ domain
1528 * @hbus: The root PCI bus
1530 * This function creates an IRQ domain which will be used for
1531 * interrupts from devices that have been passed through. These
1532 * devices only support MSI and MSI-X, not line-based interrupts
1533 * or simulations of line-based interrupts through PCIe's
1534 * fabric-layer messages. Because interrupts are remapped, we
1535 * can support multi-message MSI here.
1537 * Return: '0' on success and error value on failure
1539 static int hv_pcie_init_irq_domain(struct hv_pcibus_device *hbus)
1541 hbus->msi_info.chip = &hv_msi_irq_chip;
1542 hbus->msi_info.ops = &hv_msi_ops;
1543 hbus->msi_info.flags = (MSI_FLAG_USE_DEF_DOM_OPS |
1544 MSI_FLAG_USE_DEF_CHIP_OPS | MSI_FLAG_MULTI_PCI_MSI |
1546 hbus->msi_info.handler = handle_edge_irq;
1547 hbus->msi_info.handler_name = "edge";
1548 hbus->msi_info.data = hbus;
1549 hbus->irq_domain = pci_msi_create_irq_domain(hbus->sysdata.fwnode,
1552 if (!hbus->irq_domain) {
1553 dev_err(&hbus->hdev->device,
1554 "Failed to build an MSI IRQ domain\n");
1562 * get_bar_size() - Get the address space consumed by a BAR
1563 * @bar_val: Value that a BAR returned after -1 was written
1566 * This function returns the size of the BAR, rounded up to 1
1567 * page. It has to be rounded up because the hypervisor's page
1568 * table entry that maps the BAR into the VM can't specify an
1569 * offset within a page. The invariant is that the hypervisor
1570 * must place any BARs of smaller than page length at the
1571 * beginning of a page.
1573 * Return: Size in bytes of the consumed MMIO space.
1575 static u64 get_bar_size(u64 bar_val)
1577 return round_up((1 + ~(bar_val & PCI_BASE_ADDRESS_MEM_MASK)),
1582 * survey_child_resources() - Total all MMIO requirements
1583 * @hbus: Root PCI bus, as understood by this driver
1585 static void survey_child_resources(struct hv_pcibus_device *hbus)
1587 struct hv_pci_dev *hpdev;
1588 resource_size_t bar_size = 0;
1589 unsigned long flags;
1590 struct completion *event;
1594 /* If nobody is waiting on the answer, don't compute it. */
1595 event = xchg(&hbus->survey_event, NULL);
1599 /* If the answer has already been computed, go with it. */
1600 if (hbus->low_mmio_space || hbus->high_mmio_space) {
1605 spin_lock_irqsave(&hbus->device_list_lock, flags);
1608 * Due to an interesting quirk of the PCI spec, all memory regions
1609 * for a child device are a power of 2 in size and aligned in memory,
1610 * so it's sufficient to just add them up without tracking alignment.
1612 list_for_each_entry(hpdev, &hbus->children, list_entry) {
1613 for (i = 0; i < 6; i++) {
1614 if (hpdev->probed_bar[i] & PCI_BASE_ADDRESS_SPACE_IO)
1615 dev_err(&hbus->hdev->device,
1616 "There's an I/O BAR in this list!\n");
1618 if (hpdev->probed_bar[i] != 0) {
1620 * A probed BAR has all the upper bits set that
1624 bar_val = hpdev->probed_bar[i];
1625 if (bar_val & PCI_BASE_ADDRESS_MEM_TYPE_64)
1627 ((u64)hpdev->probed_bar[++i] << 32);
1629 bar_val |= 0xffffffff00000000ULL;
1631 bar_size = get_bar_size(bar_val);
1633 if (bar_val & PCI_BASE_ADDRESS_MEM_TYPE_64)
1634 hbus->high_mmio_space += bar_size;
1636 hbus->low_mmio_space += bar_size;
1641 spin_unlock_irqrestore(&hbus->device_list_lock, flags);
1646 * prepopulate_bars() - Fill in BARs with defaults
1647 * @hbus: Root PCI bus, as understood by this driver
1649 * The core PCI driver code seems much, much happier if the BARs
1650 * for a device have values upon first scan. So fill them in.
1651 * The algorithm below works down from large sizes to small,
1652 * attempting to pack the assignments optimally. The assumption,
1653 * enforced in other parts of the code, is that the beginning of
1654 * the memory-mapped I/O space will be aligned on the largest
1657 static void prepopulate_bars(struct hv_pcibus_device *hbus)
1659 resource_size_t high_size = 0;
1660 resource_size_t low_size = 0;
1661 resource_size_t high_base = 0;
1662 resource_size_t low_base = 0;
1663 resource_size_t bar_size;
1664 struct hv_pci_dev *hpdev;
1665 unsigned long flags;
1671 if (hbus->low_mmio_space) {
1672 low_size = 1ULL << (63 - __builtin_clzll(hbus->low_mmio_space));
1673 low_base = hbus->low_mmio_res->start;
1676 if (hbus->high_mmio_space) {
1678 (63 - __builtin_clzll(hbus->high_mmio_space));
1679 high_base = hbus->high_mmio_res->start;
1682 spin_lock_irqsave(&hbus->device_list_lock, flags);
1684 /* Pick addresses for the BARs. */
1686 list_for_each_entry(hpdev, &hbus->children, list_entry) {
1687 for (i = 0; i < 6; i++) {
1688 bar_val = hpdev->probed_bar[i];
1691 high = bar_val & PCI_BASE_ADDRESS_MEM_TYPE_64;
1694 ((u64)hpdev->probed_bar[i + 1]
1697 bar_val |= 0xffffffffULL << 32;
1699 bar_size = get_bar_size(bar_val);
1701 if (high_size != bar_size) {
1705 _hv_pcifront_write_config(hpdev,
1706 PCI_BASE_ADDRESS_0 + (4 * i),
1708 (u32)(high_base & 0xffffff00));
1710 _hv_pcifront_write_config(hpdev,
1711 PCI_BASE_ADDRESS_0 + (4 * i),
1712 4, (u32)(high_base >> 32));
1713 high_base += bar_size;
1715 if (low_size != bar_size)
1717 _hv_pcifront_write_config(hpdev,
1718 PCI_BASE_ADDRESS_0 + (4 * i),
1720 (u32)(low_base & 0xffffff00));
1721 low_base += bar_size;
1724 if (high_size <= 1 && low_size <= 1) {
1725 /* Set the memory enable bit. */
1726 _hv_pcifront_read_config(hpdev, PCI_COMMAND, 2,
1728 command |= PCI_COMMAND_MEMORY;
1729 _hv_pcifront_write_config(hpdev, PCI_COMMAND, 2,
1737 } while (high_size || low_size);
1739 spin_unlock_irqrestore(&hbus->device_list_lock, flags);
1743 * Assign entries in sysfs pci slot directory.
1745 * Note that this function does not need to lock the children list
1746 * because it is called from pci_devices_present_work which
1747 * is serialized with hv_eject_device_work because they are on the
1748 * same ordered workqueue. Therefore hbus->children list will not change
1749 * even when pci_create_slot sleeps.
1751 static void hv_pci_assign_slots(struct hv_pcibus_device *hbus)
1753 struct hv_pci_dev *hpdev;
1754 char name[SLOT_NAME_SIZE];
1757 list_for_each_entry(hpdev, &hbus->children, list_entry) {
1758 if (hpdev->pci_slot)
1761 slot_nr = PCI_SLOT(wslot_to_devfn(hpdev->desc.win_slot.slot));
1762 snprintf(name, SLOT_NAME_SIZE, "%u", hpdev->desc.ser);
1763 hpdev->pci_slot = pci_create_slot(hbus->pci_bus, slot_nr,
1765 if (IS_ERR(hpdev->pci_slot)) {
1766 pr_warn("pci_create slot %s failed\n", name);
1767 hpdev->pci_slot = NULL;
1773 * Remove entries in sysfs pci slot directory.
1775 static void hv_pci_remove_slots(struct hv_pcibus_device *hbus)
1777 struct hv_pci_dev *hpdev;
1779 list_for_each_entry(hpdev, &hbus->children, list_entry) {
1780 if (!hpdev->pci_slot)
1782 pci_destroy_slot(hpdev->pci_slot);
1783 hpdev->pci_slot = NULL;
1788 * create_root_hv_pci_bus() - Expose a new root PCI bus
1789 * @hbus: Root PCI bus, as understood by this driver
1791 * Return: 0 on success, -errno on failure
1793 static int create_root_hv_pci_bus(struct hv_pcibus_device *hbus)
1795 /* Register the device */
1796 hbus->pci_bus = pci_create_root_bus(&hbus->hdev->device,
1797 0, /* bus number is always zero */
1800 &hbus->resources_for_children);
1804 hbus->pci_bus->msi = &hbus->msi_chip;
1805 hbus->pci_bus->msi->dev = &hbus->hdev->device;
1807 pci_lock_rescan_remove();
1808 pci_scan_child_bus(hbus->pci_bus);
1809 pci_bus_assign_resources(hbus->pci_bus);
1810 hv_pci_assign_slots(hbus);
1811 pci_bus_add_devices(hbus->pci_bus);
1812 pci_unlock_rescan_remove();
1813 hbus->state = hv_pcibus_installed;
1817 struct q_res_req_compl {
1818 struct completion host_event;
1819 struct hv_pci_dev *hpdev;
1823 * q_resource_requirements() - Query Resource Requirements
1824 * @context: The completion context.
1825 * @resp: The response that came from the host.
1826 * @resp_packet_size: The size in bytes of resp.
1828 * This function is invoked on completion of a Query Resource
1829 * Requirements packet.
1831 static void q_resource_requirements(void *context, struct pci_response *resp,
1832 int resp_packet_size)
1834 struct q_res_req_compl *completion = context;
1835 struct pci_q_res_req_response *q_res_req =
1836 (struct pci_q_res_req_response *)resp;
1839 if (resp->status < 0) {
1840 dev_err(&completion->hpdev->hbus->hdev->device,
1841 "query resource requirements failed: %x\n",
1844 for (i = 0; i < 6; i++) {
1845 completion->hpdev->probed_bar[i] =
1846 q_res_req->probed_bar[i];
1850 complete(&completion->host_event);
1854 * new_pcichild_device() - Create a new child device
1855 * @hbus: The internal struct tracking this root PCI bus.
1856 * @desc: The information supplied so far from the host
1859 * This function creates the tracking structure for a new child
1860 * device and kicks off the process of figuring out what it is.
1862 * Return: Pointer to the new tracking struct
1864 static struct hv_pci_dev *new_pcichild_device(struct hv_pcibus_device *hbus,
1865 struct pci_function_description *desc)
1867 struct hv_pci_dev *hpdev;
1868 struct pci_child_message *res_req;
1869 struct q_res_req_compl comp_pkt;
1871 struct pci_packet init_packet;
1872 u8 buffer[sizeof(struct pci_child_message)];
1874 unsigned long flags;
1877 hpdev = kzalloc(sizeof(*hpdev), GFP_KERNEL);
1883 memset(&pkt, 0, sizeof(pkt));
1884 init_completion(&comp_pkt.host_event);
1885 comp_pkt.hpdev = hpdev;
1886 pkt.init_packet.compl_ctxt = &comp_pkt;
1887 pkt.init_packet.completion_func = q_resource_requirements;
1888 res_req = (struct pci_child_message *)&pkt.init_packet.message;
1889 res_req->message_type.type = PCI_QUERY_RESOURCE_REQUIREMENTS;
1890 res_req->wslot.slot = desc->win_slot.slot;
1892 ret = vmbus_sendpacket(hbus->hdev->channel, res_req,
1893 sizeof(struct pci_child_message),
1894 (unsigned long)&pkt.init_packet,
1896 VMBUS_DATA_PACKET_FLAG_COMPLETION_REQUESTED);
1900 if (wait_for_response(hbus->hdev, &comp_pkt.host_event))
1903 hpdev->desc = *desc;
1904 refcount_set(&hpdev->refs, 1);
1905 get_pcichild(hpdev);
1906 spin_lock_irqsave(&hbus->device_list_lock, flags);
1908 list_add_tail(&hpdev->list_entry, &hbus->children);
1909 spin_unlock_irqrestore(&hbus->device_list_lock, flags);
1918 * get_pcichild_wslot() - Find device from slot
1919 * @hbus: Root PCI bus, as understood by this driver
1920 * @wslot: Location on the bus
1922 * This function looks up a PCI device and returns the internal
1923 * representation of it. It acquires a reference on it, so that
1924 * the device won't be deleted while somebody is using it. The
1925 * caller is responsible for calling put_pcichild() to release
1928 * Return: Internal representation of a PCI device
1930 static struct hv_pci_dev *get_pcichild_wslot(struct hv_pcibus_device *hbus,
1933 unsigned long flags;
1934 struct hv_pci_dev *iter, *hpdev = NULL;
1936 spin_lock_irqsave(&hbus->device_list_lock, flags);
1937 list_for_each_entry(iter, &hbus->children, list_entry) {
1938 if (iter->desc.win_slot.slot == wslot) {
1940 get_pcichild(hpdev);
1944 spin_unlock_irqrestore(&hbus->device_list_lock, flags);
1950 * pci_devices_present_work() - Handle new list of child devices
1951 * @work: Work struct embedded in struct hv_dr_work
1953 * "Bus Relations" is the Windows term for "children of this
1954 * bus." The terminology is preserved here for people trying to
1955 * debug the interaction between Hyper-V and Linux. This
1956 * function is called when the parent partition reports a list
1957 * of functions that should be observed under this PCI Express
1960 * This function updates the list, and must tolerate being
1961 * called multiple times with the same information. The typical
1962 * number of child devices is one, with very atypical cases
1963 * involving three or four, so the algorithms used here can be
1964 * simple and inefficient.
1966 * It must also treat the omission of a previously observed device as
1967 * notification that the device no longer exists.
1969 * Note that this function is serialized with hv_eject_device_work(),
1970 * because both are pushed to the ordered workqueue hbus->wq.
1972 static void pci_devices_present_work(struct work_struct *work)
1976 struct pci_function_description *new_desc;
1977 struct hv_pci_dev *hpdev;
1978 struct hv_pcibus_device *hbus;
1979 struct list_head removed;
1980 struct hv_dr_work *dr_wrk;
1981 struct hv_dr_state *dr = NULL;
1982 unsigned long flags;
1984 dr_wrk = container_of(work, struct hv_dr_work, wrk);
1988 INIT_LIST_HEAD(&removed);
1990 /* Pull this off the queue and process it if it was the last one. */
1991 spin_lock_irqsave(&hbus->device_list_lock, flags);
1992 while (!list_empty(&hbus->dr_list)) {
1993 dr = list_first_entry(&hbus->dr_list, struct hv_dr_state,
1995 list_del(&dr->list_entry);
1997 /* Throw this away if the list still has stuff in it. */
1998 if (!list_empty(&hbus->dr_list)) {
2003 spin_unlock_irqrestore(&hbus->device_list_lock, flags);
2010 /* First, mark all existing children as reported missing. */
2011 spin_lock_irqsave(&hbus->device_list_lock, flags);
2012 list_for_each_entry(hpdev, &hbus->children, list_entry) {
2013 hpdev->reported_missing = true;
2015 spin_unlock_irqrestore(&hbus->device_list_lock, flags);
2017 /* Next, add back any reported devices. */
2018 for (child_no = 0; child_no < dr->device_count; child_no++) {
2020 new_desc = &dr->func[child_no];
2022 spin_lock_irqsave(&hbus->device_list_lock, flags);
2023 list_for_each_entry(hpdev, &hbus->children, list_entry) {
2024 if ((hpdev->desc.win_slot.slot == new_desc->win_slot.slot) &&
2025 (hpdev->desc.v_id == new_desc->v_id) &&
2026 (hpdev->desc.d_id == new_desc->d_id) &&
2027 (hpdev->desc.ser == new_desc->ser)) {
2028 hpdev->reported_missing = false;
2032 spin_unlock_irqrestore(&hbus->device_list_lock, flags);
2035 hpdev = new_pcichild_device(hbus, new_desc);
2037 dev_err(&hbus->hdev->device,
2038 "couldn't record a child device.\n");
2042 /* Move missing children to a list on the stack. */
2043 spin_lock_irqsave(&hbus->device_list_lock, flags);
2046 list_for_each_entry(hpdev, &hbus->children, list_entry) {
2047 if (hpdev->reported_missing) {
2049 put_pcichild(hpdev);
2050 list_move_tail(&hpdev->list_entry, &removed);
2055 spin_unlock_irqrestore(&hbus->device_list_lock, flags);
2057 /* Delete everything that should no longer exist. */
2058 while (!list_empty(&removed)) {
2059 hpdev = list_first_entry(&removed, struct hv_pci_dev,
2061 list_del(&hpdev->list_entry);
2063 if (hpdev->pci_slot)
2064 pci_destroy_slot(hpdev->pci_slot);
2066 put_pcichild(hpdev);
2069 switch (hbus->state) {
2070 case hv_pcibus_installed:
2072 * Tell the core to rescan bus
2073 * because there may have been changes.
2075 pci_lock_rescan_remove();
2076 pci_scan_child_bus(hbus->pci_bus);
2077 hv_pci_assign_slots(hbus);
2078 pci_unlock_rescan_remove();
2081 case hv_pcibus_init:
2082 case hv_pcibus_probed:
2083 survey_child_resources(hbus);
2095 * hv_pci_devices_present() - Handles list of new children
2096 * @hbus: Root PCI bus, as understood by this driver
2097 * @relations: Packet from host listing children
2099 * This function is invoked whenever a new list of devices for
2102 static void hv_pci_devices_present(struct hv_pcibus_device *hbus,
2103 struct pci_bus_relations *relations)
2105 struct hv_dr_state *dr;
2106 struct hv_dr_work *dr_wrk;
2107 unsigned long flags;
2110 dr_wrk = kzalloc(sizeof(*dr_wrk), GFP_NOWAIT);
2114 dr = kzalloc(offsetof(struct hv_dr_state, func) +
2115 (sizeof(struct pci_function_description) *
2116 (relations->device_count)), GFP_NOWAIT);
2122 INIT_WORK(&dr_wrk->wrk, pci_devices_present_work);
2124 dr->device_count = relations->device_count;
2125 if (dr->device_count != 0) {
2126 memcpy(dr->func, relations->func,
2127 sizeof(struct pci_function_description) *
2131 spin_lock_irqsave(&hbus->device_list_lock, flags);
2133 * If pending_dr is true, we have already queued a work,
2134 * which will see the new dr. Otherwise, we need to
2137 pending_dr = !list_empty(&hbus->dr_list);
2138 list_add_tail(&dr->list_entry, &hbus->dr_list);
2139 spin_unlock_irqrestore(&hbus->device_list_lock, flags);
2145 queue_work(hbus->wq, &dr_wrk->wrk);
2150 * hv_eject_device_work() - Asynchronously handles ejection
2151 * @work: Work struct embedded in internal device struct
2153 * This function handles ejecting a device. Windows will
2154 * attempt to gracefully eject a device, waiting 60 seconds to
2155 * hear back from the guest OS that this completed successfully.
2156 * If this timer expires, the device will be forcibly removed.
2158 static void hv_eject_device_work(struct work_struct *work)
2160 struct pci_eject_response *ejct_pkt;
2161 struct hv_pcibus_device *hbus;
2162 struct hv_pci_dev *hpdev;
2163 struct pci_dev *pdev;
2164 unsigned long flags;
2167 struct pci_packet pkt;
2168 u8 buffer[sizeof(struct pci_eject_response)];
2171 hpdev = container_of(work, struct hv_pci_dev, wrk);
2174 WARN_ON(hpdev->state != hv_pcichild_ejecting);
2177 * Ejection can come before or after the PCI bus has been set up, so
2178 * attempt to find it and tear down the bus state, if it exists. This
2179 * must be done without constructs like pci_domain_nr(hbus->pci_bus)
2180 * because hbus->pci_bus may not exist yet.
2182 wslot = wslot_to_devfn(hpdev->desc.win_slot.slot);
2183 pdev = pci_get_domain_bus_and_slot(hbus->sysdata.domain, 0, wslot);
2185 pci_lock_rescan_remove();
2186 pci_stop_and_remove_bus_device(pdev);
2188 pci_unlock_rescan_remove();
2191 spin_lock_irqsave(&hbus->device_list_lock, flags);
2192 list_del(&hpdev->list_entry);
2193 spin_unlock_irqrestore(&hbus->device_list_lock, flags);
2195 if (hpdev->pci_slot)
2196 pci_destroy_slot(hpdev->pci_slot);
2198 memset(&ctxt, 0, sizeof(ctxt));
2199 ejct_pkt = (struct pci_eject_response *)&ctxt.pkt.message;
2200 ejct_pkt->message_type.type = PCI_EJECTION_COMPLETE;
2201 ejct_pkt->wslot.slot = hpdev->desc.win_slot.slot;
2202 vmbus_sendpacket(hbus->hdev->channel, ejct_pkt,
2203 sizeof(*ejct_pkt), (unsigned long)&ctxt.pkt,
2204 VM_PKT_DATA_INBAND, 0);
2206 /* For the get_pcichild() in hv_pci_eject_device() */
2207 put_pcichild(hpdev);
2208 /* For the two refs got in new_pcichild_device() */
2209 put_pcichild(hpdev);
2210 put_pcichild(hpdev);
2211 /* hpdev has been freed. Do not use it any more. */
2217 * hv_pci_eject_device() - Handles device ejection
2218 * @hpdev: Internal device tracking struct
2220 * This function is invoked when an ejection packet arrives. It
2221 * just schedules work so that we don't re-enter the packet
2222 * delivery code handling the ejection.
2224 static void hv_pci_eject_device(struct hv_pci_dev *hpdev)
2226 hpdev->state = hv_pcichild_ejecting;
2227 get_pcichild(hpdev);
2228 INIT_WORK(&hpdev->wrk, hv_eject_device_work);
2229 get_hvpcibus(hpdev->hbus);
2230 queue_work(hpdev->hbus->wq, &hpdev->wrk);
2234 * hv_pci_onchannelcallback() - Handles incoming packets
2235 * @context: Internal bus tracking struct
2237 * This function is invoked whenever the host sends a packet to
2238 * this channel (which is private to this root PCI bus).
2240 static void hv_pci_onchannelcallback(void *context)
2242 const int packet_size = 0x100;
2244 struct hv_pcibus_device *hbus = context;
2247 struct vmpacket_descriptor *desc;
2248 unsigned char *buffer;
2249 int bufferlen = packet_size;
2250 struct pci_packet *comp_packet;
2251 struct pci_response *response;
2252 struct pci_incoming_message *new_message;
2253 struct pci_bus_relations *bus_rel;
2254 struct pci_dev_inval_block *inval;
2255 struct pci_dev_incoming *dev_message;
2256 struct hv_pci_dev *hpdev;
2258 buffer = kmalloc(bufferlen, GFP_ATOMIC);
2263 ret = vmbus_recvpacket_raw(hbus->hdev->channel, buffer,
2264 bufferlen, &bytes_recvd, &req_id);
2266 if (ret == -ENOBUFS) {
2268 /* Handle large packet */
2269 bufferlen = bytes_recvd;
2270 buffer = kmalloc(bytes_recvd, GFP_ATOMIC);
2276 /* Zero length indicates there are no more packets. */
2277 if (ret || !bytes_recvd)
2281 * All incoming packets must be at least as large as a
2284 if (bytes_recvd <= sizeof(struct pci_response))
2286 desc = (struct vmpacket_descriptor *)buffer;
2288 switch (desc->type) {
2292 * The host is trusted, and thus it's safe to interpret
2293 * this transaction ID as a pointer.
2295 comp_packet = (struct pci_packet *)req_id;
2296 response = (struct pci_response *)buffer;
2297 comp_packet->completion_func(comp_packet->compl_ctxt,
2302 case VM_PKT_DATA_INBAND:
2304 new_message = (struct pci_incoming_message *)buffer;
2305 switch (new_message->message_type.type) {
2306 case PCI_BUS_RELATIONS:
2308 bus_rel = (struct pci_bus_relations *)buffer;
2310 offsetof(struct pci_bus_relations, func) +
2311 (sizeof(struct pci_function_description) *
2312 (bus_rel->device_count))) {
2313 dev_err(&hbus->hdev->device,
2314 "bus relations too small\n");
2318 hv_pci_devices_present(hbus, bus_rel);
2323 dev_message = (struct pci_dev_incoming *)buffer;
2324 hpdev = get_pcichild_wslot(hbus,
2325 dev_message->wslot.slot);
2327 hv_pci_eject_device(hpdev);
2328 put_pcichild(hpdev);
2332 case PCI_INVALIDATE_BLOCK:
2334 inval = (struct pci_dev_inval_block *)buffer;
2335 hpdev = get_pcichild_wslot(hbus,
2338 if (hpdev->block_invalidate) {
2339 hpdev->block_invalidate(
2340 hpdev->invalidate_context,
2343 put_pcichild(hpdev);
2348 dev_warn(&hbus->hdev->device,
2349 "Unimplemented protocol message %x\n",
2350 new_message->message_type.type);
2356 dev_err(&hbus->hdev->device,
2357 "unhandled packet type %d, tid %llx len %d\n",
2358 desc->type, req_id, bytes_recvd);
2367 * hv_pci_protocol_negotiation() - Set up protocol
2368 * @hdev: VMBus's tracking struct for this root PCI bus
2370 * This driver is intended to support running on Windows 10
2371 * (server) and later versions. It will not run on earlier
2372 * versions, as they assume that many of the operations which
2373 * Linux needs accomplished with a spinlock held were done via
2374 * asynchronous messaging via VMBus. Windows 10 increases the
2375 * surface area of PCI emulation so that these actions can take
2376 * place by suspending a virtual processor for their duration.
2378 * This function negotiates the channel protocol version,
2379 * failing if the host doesn't support the necessary protocol
2382 static int hv_pci_protocol_negotiation(struct hv_device *hdev)
2384 struct pci_version_request *version_req;
2385 struct hv_pci_compl comp_pkt;
2386 struct pci_packet *pkt;
2391 * Initiate the handshake with the host and negotiate
2392 * a version that the host can support. We start with the
2393 * highest version number and go down if the host cannot
2396 pkt = kzalloc(sizeof(*pkt) + sizeof(*version_req), GFP_KERNEL);
2400 init_completion(&comp_pkt.host_event);
2401 pkt->completion_func = hv_pci_generic_compl;
2402 pkt->compl_ctxt = &comp_pkt;
2403 version_req = (struct pci_version_request *)&pkt->message;
2404 version_req->message_type.type = PCI_QUERY_PROTOCOL_VERSION;
2406 for (i = 0; i < ARRAY_SIZE(pci_protocol_versions); i++) {
2407 version_req->protocol_version = pci_protocol_versions[i];
2408 ret = vmbus_sendpacket(hdev->channel, version_req,
2409 sizeof(struct pci_version_request),
2410 (unsigned long)pkt, VM_PKT_DATA_INBAND,
2411 VMBUS_DATA_PACKET_FLAG_COMPLETION_REQUESTED);
2413 ret = wait_for_response(hdev, &comp_pkt.host_event);
2416 dev_err(&hdev->device,
2417 "PCI Pass-through VSP failed to request version: %d",
2422 if (comp_pkt.completion_status >= 0) {
2423 pci_protocol_version = pci_protocol_versions[i];
2424 dev_info(&hdev->device,
2425 "PCI VMBus probing: Using version %#x\n",
2426 pci_protocol_version);
2430 if (comp_pkt.completion_status != STATUS_REVISION_MISMATCH) {
2431 dev_err(&hdev->device,
2432 "PCI Pass-through VSP failed version request: %#x",
2433 comp_pkt.completion_status);
2438 reinit_completion(&comp_pkt.host_event);
2441 dev_err(&hdev->device,
2442 "PCI pass-through VSP failed to find supported version");
2451 * hv_pci_free_bridge_windows() - Release memory regions for the
2453 * @hbus: Root PCI bus, as understood by this driver
2455 static void hv_pci_free_bridge_windows(struct hv_pcibus_device *hbus)
2458 * Set the resources back to the way they looked when they
2459 * were allocated by setting IORESOURCE_BUSY again.
2462 if (hbus->low_mmio_space && hbus->low_mmio_res) {
2463 hbus->low_mmio_res->flags |= IORESOURCE_BUSY;
2464 vmbus_free_mmio(hbus->low_mmio_res->start,
2465 resource_size(hbus->low_mmio_res));
2468 if (hbus->high_mmio_space && hbus->high_mmio_res) {
2469 hbus->high_mmio_res->flags |= IORESOURCE_BUSY;
2470 vmbus_free_mmio(hbus->high_mmio_res->start,
2471 resource_size(hbus->high_mmio_res));
2476 * hv_pci_allocate_bridge_windows() - Allocate memory regions
2478 * @hbus: Root PCI bus, as understood by this driver
2480 * This function calls vmbus_allocate_mmio(), which is itself a
2481 * bit of a compromise. Ideally, we might change the pnp layer
2482 * in the kernel such that it comprehends either PCI devices
2483 * which are "grandchildren of ACPI," with some intermediate bus
2484 * node (in this case, VMBus) or change it such that it
2485 * understands VMBus. The pnp layer, however, has been declared
2486 * deprecated, and not subject to change.
2488 * The workaround, implemented here, is to ask VMBus to allocate
2489 * MMIO space for this bus. VMBus itself knows which ranges are
2490 * appropriate by looking at its own ACPI objects. Then, after
2491 * these ranges are claimed, they're modified to look like they
2492 * would have looked if the ACPI and pnp code had allocated
2493 * bridge windows. These descriptors have to exist in this form
2494 * in order to satisfy the code which will get invoked when the
2495 * endpoint PCI function driver calls request_mem_region() or
2496 * request_mem_region_exclusive().
2498 * Return: 0 on success, -errno on failure
2500 static int hv_pci_allocate_bridge_windows(struct hv_pcibus_device *hbus)
2502 resource_size_t align;
2505 if (hbus->low_mmio_space) {
2506 align = 1ULL << (63 - __builtin_clzll(hbus->low_mmio_space));
2507 ret = vmbus_allocate_mmio(&hbus->low_mmio_res, hbus->hdev, 0,
2508 (u64)(u32)0xffffffff,
2509 hbus->low_mmio_space,
2512 dev_err(&hbus->hdev->device,
2513 "Need %#llx of low MMIO space. Consider reconfiguring the VM.\n",
2514 hbus->low_mmio_space);
2518 /* Modify this resource to become a bridge window. */
2519 hbus->low_mmio_res->flags |= IORESOURCE_WINDOW;
2520 hbus->low_mmio_res->flags &= ~IORESOURCE_BUSY;
2521 pci_add_resource(&hbus->resources_for_children,
2522 hbus->low_mmio_res);
2525 if (hbus->high_mmio_space) {
2526 align = 1ULL << (63 - __builtin_clzll(hbus->high_mmio_space));
2527 ret = vmbus_allocate_mmio(&hbus->high_mmio_res, hbus->hdev,
2529 hbus->high_mmio_space, align,
2532 dev_err(&hbus->hdev->device,
2533 "Need %#llx of high MMIO space. Consider reconfiguring the VM.\n",
2534 hbus->high_mmio_space);
2535 goto release_low_mmio;
2538 /* Modify this resource to become a bridge window. */
2539 hbus->high_mmio_res->flags |= IORESOURCE_WINDOW;
2540 hbus->high_mmio_res->flags &= ~IORESOURCE_BUSY;
2541 pci_add_resource(&hbus->resources_for_children,
2542 hbus->high_mmio_res);
2548 if (hbus->low_mmio_res) {
2549 vmbus_free_mmio(hbus->low_mmio_res->start,
2550 resource_size(hbus->low_mmio_res));
2557 * hv_allocate_config_window() - Find MMIO space for PCI Config
2558 * @hbus: Root PCI bus, as understood by this driver
2560 * This function claims memory-mapped I/O space for accessing
2561 * configuration space for the functions on this bus.
2563 * Return: 0 on success, -errno on failure
2565 static int hv_allocate_config_window(struct hv_pcibus_device *hbus)
2570 * Set up a region of MMIO space to use for accessing configuration
2573 ret = vmbus_allocate_mmio(&hbus->mem_config, hbus->hdev, 0, -1,
2574 PCI_CONFIG_MMIO_LENGTH, 0x1000, false);
2579 * vmbus_allocate_mmio() gets used for allocating both device endpoint
2580 * resource claims (those which cannot be overlapped) and the ranges
2581 * which are valid for the children of this bus, which are intended
2582 * to be overlapped by those children. Set the flag on this claim
2583 * meaning that this region can't be overlapped.
2586 hbus->mem_config->flags |= IORESOURCE_BUSY;
2591 static void hv_free_config_window(struct hv_pcibus_device *hbus)
2593 vmbus_free_mmio(hbus->mem_config->start, PCI_CONFIG_MMIO_LENGTH);
2597 * hv_pci_enter_d0() - Bring the "bus" into the D0 power state
2598 * @hdev: VMBus's tracking struct for this root PCI bus
2600 * Return: 0 on success, -errno on failure
2602 static int hv_pci_enter_d0(struct hv_device *hdev)
2604 struct hv_pcibus_device *hbus = hv_get_drvdata(hdev);
2605 struct pci_bus_d0_entry *d0_entry;
2606 struct hv_pci_compl comp_pkt;
2607 struct pci_packet *pkt;
2611 * Tell the host that the bus is ready to use, and moved into the
2612 * powered-on state. This includes telling the host which region
2613 * of memory-mapped I/O space has been chosen for configuration space
2616 pkt = kzalloc(sizeof(*pkt) + sizeof(*d0_entry), GFP_KERNEL);
2620 init_completion(&comp_pkt.host_event);
2621 pkt->completion_func = hv_pci_generic_compl;
2622 pkt->compl_ctxt = &comp_pkt;
2623 d0_entry = (struct pci_bus_d0_entry *)&pkt->message;
2624 d0_entry->message_type.type = PCI_BUS_D0ENTRY;
2625 d0_entry->mmio_base = hbus->mem_config->start;
2627 ret = vmbus_sendpacket(hdev->channel, d0_entry, sizeof(*d0_entry),
2628 (unsigned long)pkt, VM_PKT_DATA_INBAND,
2629 VMBUS_DATA_PACKET_FLAG_COMPLETION_REQUESTED);
2631 ret = wait_for_response(hdev, &comp_pkt.host_event);
2636 if (comp_pkt.completion_status < 0) {
2637 dev_err(&hdev->device,
2638 "PCI Pass-through VSP failed D0 Entry with status %x\n",
2639 comp_pkt.completion_status);
2652 * hv_pci_query_relations() - Ask host to send list of child
2654 * @hdev: VMBus's tracking struct for this root PCI bus
2656 * Return: 0 on success, -errno on failure
2658 static int hv_pci_query_relations(struct hv_device *hdev)
2660 struct hv_pcibus_device *hbus = hv_get_drvdata(hdev);
2661 struct pci_message message;
2662 struct completion comp;
2665 /* Ask the host to send along the list of child devices */
2666 init_completion(&comp);
2667 if (cmpxchg(&hbus->survey_event, NULL, &comp))
2670 memset(&message, 0, sizeof(message));
2671 message.type = PCI_QUERY_BUS_RELATIONS;
2673 ret = vmbus_sendpacket(hdev->channel, &message, sizeof(message),
2674 0, VM_PKT_DATA_INBAND, 0);
2676 ret = wait_for_response(hdev, &comp);
2682 * hv_send_resources_allocated() - Report local resource choices
2683 * @hdev: VMBus's tracking struct for this root PCI bus
2685 * The host OS is expecting to be sent a request as a message
2686 * which contains all the resources that the device will use.
2687 * The response contains those same resources, "translated"
2688 * which is to say, the values which should be used by the
2689 * hardware, when it delivers an interrupt. (MMIO resources are
2690 * used in local terms.) This is nice for Windows, and lines up
2691 * with the FDO/PDO split, which doesn't exist in Linux. Linux
2692 * is deeply expecting to scan an emulated PCI configuration
2693 * space. So this message is sent here only to drive the state
2694 * machine on the host forward.
2696 * Return: 0 on success, -errno on failure
2698 static int hv_send_resources_allocated(struct hv_device *hdev)
2700 struct hv_pcibus_device *hbus = hv_get_drvdata(hdev);
2701 struct pci_resources_assigned *res_assigned;
2702 struct pci_resources_assigned2 *res_assigned2;
2703 struct hv_pci_compl comp_pkt;
2704 struct hv_pci_dev *hpdev;
2705 struct pci_packet *pkt;
2710 size_res = (pci_protocol_version < PCI_PROTOCOL_VERSION_1_2)
2711 ? sizeof(*res_assigned) : sizeof(*res_assigned2);
2713 pkt = kmalloc(sizeof(*pkt) + size_res, GFP_KERNEL);
2719 for (wslot = 0; wslot < 256; wslot++) {
2720 hpdev = get_pcichild_wslot(hbus, wslot);
2724 memset(pkt, 0, sizeof(*pkt) + size_res);
2725 init_completion(&comp_pkt.host_event);
2726 pkt->completion_func = hv_pci_generic_compl;
2727 pkt->compl_ctxt = &comp_pkt;
2729 if (pci_protocol_version < PCI_PROTOCOL_VERSION_1_2) {
2731 (struct pci_resources_assigned *)&pkt->message;
2732 res_assigned->message_type.type =
2733 PCI_RESOURCES_ASSIGNED;
2734 res_assigned->wslot.slot = hpdev->desc.win_slot.slot;
2737 (struct pci_resources_assigned2 *)&pkt->message;
2738 res_assigned2->message_type.type =
2739 PCI_RESOURCES_ASSIGNED2;
2740 res_assigned2->wslot.slot = hpdev->desc.win_slot.slot;
2742 put_pcichild(hpdev);
2744 ret = vmbus_sendpacket(hdev->channel, &pkt->message,
2745 size_res, (unsigned long)pkt,
2747 VMBUS_DATA_PACKET_FLAG_COMPLETION_REQUESTED);
2749 ret = wait_for_response(hdev, &comp_pkt.host_event);
2753 if (comp_pkt.completion_status < 0) {
2755 dev_err(&hdev->device,
2756 "resource allocated returned 0x%x",
2757 comp_pkt.completion_status);
2767 * hv_send_resources_released() - Report local resources
2769 * @hdev: VMBus's tracking struct for this root PCI bus
2771 * Return: 0 on success, -errno on failure
2773 static int hv_send_resources_released(struct hv_device *hdev)
2775 struct hv_pcibus_device *hbus = hv_get_drvdata(hdev);
2776 struct pci_child_message pkt;
2777 struct hv_pci_dev *hpdev;
2781 for (wslot = 0; wslot < 256; wslot++) {
2782 hpdev = get_pcichild_wslot(hbus, wslot);
2786 memset(&pkt, 0, sizeof(pkt));
2787 pkt.message_type.type = PCI_RESOURCES_RELEASED;
2788 pkt.wslot.slot = hpdev->desc.win_slot.slot;
2790 put_pcichild(hpdev);
2792 ret = vmbus_sendpacket(hdev->channel, &pkt, sizeof(pkt), 0,
2793 VM_PKT_DATA_INBAND, 0);
2801 static void get_hvpcibus(struct hv_pcibus_device *hbus)
2803 refcount_inc(&hbus->remove_lock);
2806 static void put_hvpcibus(struct hv_pcibus_device *hbus)
2808 if (refcount_dec_and_test(&hbus->remove_lock))
2809 complete(&hbus->remove_event);
2812 #define HVPCI_DOM_MAP_SIZE (64 * 1024)
2813 static DECLARE_BITMAP(hvpci_dom_map, HVPCI_DOM_MAP_SIZE);
2816 * PCI domain number 0 is used by emulated devices on Gen1 VMs, so define 0
2817 * as invalid for passthrough PCI devices of this driver.
2819 #define HVPCI_DOM_INVALID 0
2822 * hv_get_dom_num() - Get a valid PCI domain number
2823 * Check if the PCI domain number is in use, and return another number if
2826 * @dom: Requested domain number
2828 * return: domain number on success, HVPCI_DOM_INVALID on failure
2830 static u16 hv_get_dom_num(u16 dom)
2834 if (test_and_set_bit(dom, hvpci_dom_map) == 0)
2837 for_each_clear_bit(i, hvpci_dom_map, HVPCI_DOM_MAP_SIZE) {
2838 if (test_and_set_bit(i, hvpci_dom_map) == 0)
2842 return HVPCI_DOM_INVALID;
2846 * hv_put_dom_num() - Mark the PCI domain number as free
2847 * @dom: Domain number to be freed
2849 static void hv_put_dom_num(u16 dom)
2851 clear_bit(dom, hvpci_dom_map);
2855 * hv_pci_probe() - New VMBus channel probe, for a root PCI bus
2856 * @hdev: VMBus's tracking struct for this root PCI bus
2857 * @dev_id: Identifies the device itself
2859 * Return: 0 on success, -errno on failure
2861 static int hv_pci_probe(struct hv_device *hdev,
2862 const struct hv_vmbus_device_id *dev_id)
2864 struct hv_pcibus_device *hbus;
2870 * hv_pcibus_device contains the hypercall arguments for retargeting in
2871 * hv_irq_unmask(). Those must not cross a page boundary.
2873 BUILD_BUG_ON(sizeof(*hbus) > PAGE_SIZE);
2875 hbus = (struct hv_pcibus_device *)get_zeroed_page(GFP_KERNEL);
2878 hbus->state = hv_pcibus_init;
2881 * The PCI bus "domain" is what is called "segment" in ACPI and other
2882 * specs. Pull it from the instance ID, to get something usually
2883 * unique. In rare cases of collision, we will find out another number
2886 * Note that, since this code only runs in a Hyper-V VM, Hyper-V
2887 * together with this guest driver can guarantee that (1) The only
2888 * domain used by Gen1 VMs for something that looks like a physical
2889 * PCI bus (which is actually emulated by the hypervisor) is domain 0.
2890 * (2) There will be no overlap between domains (after fixing possible
2891 * collisions) in the same VM.
2893 dom_req = hdev->dev_instance.b[5] << 8 | hdev->dev_instance.b[4];
2894 dom = hv_get_dom_num(dom_req);
2896 if (dom == HVPCI_DOM_INVALID) {
2897 dev_err(&hdev->device,
2898 "Unable to use dom# 0x%hx or other numbers", dom_req);
2904 dev_info(&hdev->device,
2905 "PCI dom# 0x%hx has collision, using 0x%hx",
2908 hbus->sysdata.domain = dom;
2911 refcount_set(&hbus->remove_lock, 1);
2912 INIT_LIST_HEAD(&hbus->children);
2913 INIT_LIST_HEAD(&hbus->dr_list);
2914 INIT_LIST_HEAD(&hbus->resources_for_children);
2915 spin_lock_init(&hbus->config_lock);
2916 spin_lock_init(&hbus->device_list_lock);
2917 spin_lock_init(&hbus->retarget_msi_interrupt_lock);
2918 init_completion(&hbus->remove_event);
2919 hbus->wq = alloc_ordered_workqueue("hv_pci_%x", 0,
2920 hbus->sysdata.domain);
2926 ret = vmbus_open(hdev->channel, pci_ring_size, pci_ring_size, NULL, 0,
2927 hv_pci_onchannelcallback, hbus);
2931 hv_set_drvdata(hdev, hbus);
2933 ret = hv_pci_protocol_negotiation(hdev);
2937 ret = hv_allocate_config_window(hbus);
2941 hbus->cfg_addr = ioremap(hbus->mem_config->start,
2942 PCI_CONFIG_MMIO_LENGTH);
2943 if (!hbus->cfg_addr) {
2944 dev_err(&hdev->device,
2945 "Unable to map a virtual address for config space\n");
2950 name = kasprintf(GFP_KERNEL, "%pUL", &hdev->dev_instance);
2956 hbus->sysdata.fwnode = irq_domain_alloc_named_fwnode(name);
2958 if (!hbus->sysdata.fwnode) {
2963 ret = hv_pcie_init_irq_domain(hbus);
2967 ret = hv_pci_query_relations(hdev);
2969 goto free_irq_domain;
2971 ret = hv_pci_enter_d0(hdev);
2973 goto free_irq_domain;
2975 ret = hv_pci_allocate_bridge_windows(hbus);
2977 goto free_irq_domain;
2979 ret = hv_send_resources_allocated(hdev);
2983 prepopulate_bars(hbus);
2985 hbus->state = hv_pcibus_probed;
2987 ret = create_root_hv_pci_bus(hbus);
2994 hv_pci_free_bridge_windows(hbus);
2996 irq_domain_remove(hbus->irq_domain);
2998 irq_domain_free_fwnode(hbus->sysdata.fwnode);
3000 iounmap(hbus->cfg_addr);
3002 hv_free_config_window(hbus);
3004 vmbus_close(hdev->channel);
3006 destroy_workqueue(hbus->wq);
3008 hv_put_dom_num(hbus->sysdata.domain);
3010 free_page((unsigned long)hbus);
3014 static void hv_pci_bus_exit(struct hv_device *hdev)
3016 struct hv_pcibus_device *hbus = hv_get_drvdata(hdev);
3018 struct pci_packet teardown_packet;
3019 u8 buffer[sizeof(struct pci_message)];
3021 struct pci_bus_relations relations;
3022 struct hv_pci_compl comp_pkt;
3026 * After the host sends the RESCIND_CHANNEL message, it doesn't
3027 * access the per-channel ringbuffer any longer.
3029 if (hdev->channel->rescind)
3032 /* Delete any children which might still exist. */
3033 memset(&relations, 0, sizeof(relations));
3034 hv_pci_devices_present(hbus, &relations);
3036 ret = hv_send_resources_released(hdev);
3038 dev_err(&hdev->device,
3039 "Couldn't send resources released packet(s)\n");
3041 memset(&pkt.teardown_packet, 0, sizeof(pkt.teardown_packet));
3042 init_completion(&comp_pkt.host_event);
3043 pkt.teardown_packet.completion_func = hv_pci_generic_compl;
3044 pkt.teardown_packet.compl_ctxt = &comp_pkt;
3045 pkt.teardown_packet.message[0].type = PCI_BUS_D0EXIT;
3047 ret = vmbus_sendpacket(hdev->channel, &pkt.teardown_packet.message,
3048 sizeof(struct pci_message),
3049 (unsigned long)&pkt.teardown_packet,
3051 VMBUS_DATA_PACKET_FLAG_COMPLETION_REQUESTED);
3053 wait_for_completion_timeout(&comp_pkt.host_event, 10 * HZ);
3057 * hv_pci_remove() - Remove routine for this VMBus channel
3058 * @hdev: VMBus's tracking struct for this root PCI bus
3060 * Return: 0 on success, -errno on failure
3062 static int hv_pci_remove(struct hv_device *hdev)
3064 struct hv_pcibus_device *hbus;
3066 hbus = hv_get_drvdata(hdev);
3067 if (hbus->state == hv_pcibus_installed) {
3068 /* Remove the bus from PCI's point of view. */
3069 pci_lock_rescan_remove();
3070 pci_stop_root_bus(hbus->pci_bus);
3071 hv_pci_remove_slots(hbus);
3072 pci_remove_root_bus(hbus->pci_bus);
3073 pci_unlock_rescan_remove();
3074 hbus->state = hv_pcibus_removed;
3077 hv_pci_bus_exit(hdev);
3079 vmbus_close(hdev->channel);
3081 iounmap(hbus->cfg_addr);
3082 hv_free_config_window(hbus);
3083 pci_free_resource_list(&hbus->resources_for_children);
3084 hv_pci_free_bridge_windows(hbus);
3085 irq_domain_remove(hbus->irq_domain);
3086 irq_domain_free_fwnode(hbus->sysdata.fwnode);
3088 wait_for_completion(&hbus->remove_event);
3089 destroy_workqueue(hbus->wq);
3091 hv_put_dom_num(hbus->sysdata.domain);
3093 free_page((unsigned long)hbus);
3097 static const struct hv_vmbus_device_id hv_pci_id_table[] = {
3098 /* PCI Pass-through Class ID */
3099 /* 44C4F61D-4444-4400-9D52-802E27EDE19F */
3104 MODULE_DEVICE_TABLE(vmbus, hv_pci_id_table);
3106 static struct hv_driver hv_pci_drv = {
3108 .id_table = hv_pci_id_table,
3109 .probe = hv_pci_probe,
3110 .remove = hv_pci_remove,
3113 static void __exit exit_hv_pci_drv(void)
3115 vmbus_driver_unregister(&hv_pci_drv);
3117 hvpci_block_ops.read_block = NULL;
3118 hvpci_block_ops.write_block = NULL;
3119 hvpci_block_ops.reg_blk_invalidate = NULL;
3122 static int __init init_hv_pci_drv(void)
3124 /* Set the invalid domain number's bit, so it will not be used */
3125 set_bit(HVPCI_DOM_INVALID, hvpci_dom_map);
3127 /* Initialize PCI block r/w interface */
3128 hvpci_block_ops.read_block = hv_read_config_block;
3129 hvpci_block_ops.write_block = hv_write_config_block;
3130 hvpci_block_ops.reg_blk_invalidate = hv_register_block_invalidate;
3132 return vmbus_driver_register(&hv_pci_drv);
3135 module_init(init_hv_pci_drv);
3136 module_exit(exit_hv_pci_drv);
3138 MODULE_DESCRIPTION("Hyper-V PCI");
3139 MODULE_LICENSE("GPL v2");