1 // SPDX-License-Identifier: GPL-2.0+
3 * drivers/net/phy/marvell.c
5 * Driver for Marvell PHYs
9 * Copyright (c) 2004 Freescale Semiconductor, Inc.
13 #include <linux/kernel.h>
14 #include <linux/string.h>
15 #include <linux/ctype.h>
16 #include <linux/errno.h>
17 #include <linux/unistd.h>
18 #include <linux/hwmon.h>
19 #include <linux/interrupt.h>
20 #include <linux/init.h>
21 #include <linux/delay.h>
22 #include <linux/netdevice.h>
23 #include <linux/etherdevice.h>
24 #include <linux/skbuff.h>
25 #include <linux/spinlock.h>
27 #include <linux/module.h>
28 #include <linux/mii.h>
29 #include <linux/ethtool.h>
30 #include <linux/ethtool_netlink.h>
31 #include <linux/phy.h>
32 #include <linux/marvell_phy.h>
33 #include <linux/bitfield.h>
38 #include <linux/uaccess.h>
40 #define MII_MARVELL_PHY_PAGE 22
41 #define MII_MARVELL_COPPER_PAGE 0x00
42 #define MII_MARVELL_FIBER_PAGE 0x01
43 #define MII_MARVELL_MSCR_PAGE 0x02
44 #define MII_MARVELL_LED_PAGE 0x03
45 #define MII_MARVELL_VCT5_PAGE 0x05
46 #define MII_MARVELL_MISC_TEST_PAGE 0x06
47 #define MII_MARVELL_VCT7_PAGE 0x07
48 #define MII_MARVELL_WOL_PAGE 0x11
50 #define MII_M1011_IEVENT 0x13
51 #define MII_M1011_IEVENT_CLEAR 0x0000
53 #define MII_M1011_IMASK 0x12
54 #define MII_M1011_IMASK_INIT 0x6400
55 #define MII_M1011_IMASK_CLEAR 0x0000
57 #define MII_M1011_PHY_SCR 0x10
58 #define MII_M1011_PHY_SCR_DOWNSHIFT_EN BIT(11)
59 #define MII_M1011_PHY_SCR_DOWNSHIFT_MASK GENMASK(14, 12)
60 #define MII_M1011_PHY_SCR_DOWNSHIFT_MAX 8
61 #define MII_M1011_PHY_SCR_MDI (0x0 << 5)
62 #define MII_M1011_PHY_SCR_MDI_X (0x1 << 5)
63 #define MII_M1011_PHY_SCR_AUTO_CROSS (0x3 << 5)
65 #define MII_M1011_PHY_SSR 0x11
66 #define MII_M1011_PHY_SSR_DOWNSHIFT BIT(5)
68 #define MII_M1111_PHY_LED_CONTROL 0x18
69 #define MII_M1111_PHY_LED_DIRECT 0x4100
70 #define MII_M1111_PHY_LED_COMBINE 0x411c
71 #define MII_M1111_PHY_EXT_CR 0x14
72 #define MII_M1111_PHY_EXT_CR_DOWNSHIFT_MASK GENMASK(11, 9)
73 #define MII_M1111_PHY_EXT_CR_DOWNSHIFT_MAX 8
74 #define MII_M1111_PHY_EXT_CR_DOWNSHIFT_EN BIT(8)
75 #define MII_M1111_RGMII_RX_DELAY BIT(7)
76 #define MII_M1111_RGMII_TX_DELAY BIT(1)
77 #define MII_M1111_PHY_EXT_SR 0x1b
79 #define MII_M1111_HWCFG_MODE_MASK 0xf
80 #define MII_M1111_HWCFG_MODE_FIBER_RGMII 0x3
81 #define MII_M1111_HWCFG_MODE_SGMII_NO_CLK 0x4
82 #define MII_M1111_HWCFG_MODE_RTBI 0x7
83 #define MII_M1111_HWCFG_MODE_COPPER_1000X_AN 0x8
84 #define MII_M1111_HWCFG_MODE_COPPER_RTBI 0x9
85 #define MII_M1111_HWCFG_MODE_COPPER_RGMII 0xb
86 #define MII_M1111_HWCFG_MODE_COPPER_1000X_NOAN 0xc
87 #define MII_M1111_HWCFG_SERIAL_AN_BYPASS BIT(12)
88 #define MII_M1111_HWCFG_FIBER_COPPER_RES BIT(13)
89 #define MII_M1111_HWCFG_FIBER_COPPER_AUTO BIT(15)
91 #define MII_88E1121_PHY_MSCR_REG 21
92 #define MII_88E1121_PHY_MSCR_RX_DELAY BIT(5)
93 #define MII_88E1121_PHY_MSCR_TX_DELAY BIT(4)
94 #define MII_88E1121_PHY_MSCR_DELAY_MASK (BIT(5) | BIT(4))
96 #define MII_88E1121_MISC_TEST 0x1a
97 #define MII_88E1510_MISC_TEST_TEMP_THRESHOLD_MASK 0x1f00
98 #define MII_88E1510_MISC_TEST_TEMP_THRESHOLD_SHIFT 8
99 #define MII_88E1510_MISC_TEST_TEMP_IRQ_EN BIT(7)
100 #define MII_88E1510_MISC_TEST_TEMP_IRQ BIT(6)
101 #define MII_88E1121_MISC_TEST_TEMP_SENSOR_EN BIT(5)
102 #define MII_88E1121_MISC_TEST_TEMP_MASK 0x1f
104 #define MII_88E1510_TEMP_SENSOR 0x1b
105 #define MII_88E1510_TEMP_SENSOR_MASK 0xff
107 #define MII_88E1540_COPPER_CTRL3 0x1a
108 #define MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_MASK GENMASK(11, 10)
109 #define MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_00MS 0
110 #define MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_10MS 1
111 #define MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_20MS 2
112 #define MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_40MS 3
113 #define MII_88E1540_COPPER_CTRL3_FAST_LINK_DOWN BIT(9)
115 #define MII_88E6390_MISC_TEST 0x1b
116 #define MII_88E6390_MISC_TEST_TEMP_SENSOR_ENABLE_SAMPLE_1S (0x0 << 14)
117 #define MII_88E6390_MISC_TEST_TEMP_SENSOR_ENABLE (0x1 << 14)
118 #define MII_88E6390_MISC_TEST_TEMP_SENSOR_ENABLE_ONESHOT (0x2 << 14)
119 #define MII_88E6390_MISC_TEST_TEMP_SENSOR_DISABLE (0x3 << 14)
120 #define MII_88E6390_MISC_TEST_TEMP_SENSOR_MASK (0x3 << 14)
121 #define MII_88E6393_MISC_TEST_SAMPLES_2048 (0x0 << 11)
122 #define MII_88E6393_MISC_TEST_SAMPLES_4096 (0x1 << 11)
123 #define MII_88E6393_MISC_TEST_SAMPLES_8192 (0x2 << 11)
124 #define MII_88E6393_MISC_TEST_SAMPLES_16384 (0x3 << 11)
125 #define MII_88E6393_MISC_TEST_SAMPLES_MASK (0x3 << 11)
126 #define MII_88E6393_MISC_TEST_RATE_2_3MS (0x5 << 8)
127 #define MII_88E6393_MISC_TEST_RATE_6_4MS (0x6 << 8)
128 #define MII_88E6393_MISC_TEST_RATE_11_9MS (0x7 << 8)
129 #define MII_88E6393_MISC_TEST_RATE_MASK (0x7 << 8)
131 #define MII_88E6390_TEMP_SENSOR 0x1c
132 #define MII_88E6393_TEMP_SENSOR_THRESHOLD_MASK 0xff00
133 #define MII_88E6393_TEMP_SENSOR_THRESHOLD_SHIFT 8
134 #define MII_88E6390_TEMP_SENSOR_MASK 0xff
135 #define MII_88E6390_TEMP_SENSOR_SAMPLES 10
137 #define MII_88E1318S_PHY_MSCR1_REG 16
138 #define MII_88E1318S_PHY_MSCR1_PAD_ODD BIT(6)
140 /* Copper Specific Interrupt Enable Register */
141 #define MII_88E1318S_PHY_CSIER 0x12
142 /* WOL Event Interrupt Enable */
143 #define MII_88E1318S_PHY_CSIER_WOL_EIE BIT(7)
145 /* LED Timer Control Register */
146 #define MII_88E1318S_PHY_LED_TCR 0x12
147 #define MII_88E1318S_PHY_LED_TCR_FORCE_INT BIT(15)
148 #define MII_88E1318S_PHY_LED_TCR_INTn_ENABLE BIT(7)
149 #define MII_88E1318S_PHY_LED_TCR_INT_ACTIVE_LOW BIT(11)
151 /* Magic Packet MAC address registers */
152 #define MII_88E1318S_PHY_MAGIC_PACKET_WORD2 0x17
153 #define MII_88E1318S_PHY_MAGIC_PACKET_WORD1 0x18
154 #define MII_88E1318S_PHY_MAGIC_PACKET_WORD0 0x19
156 #define MII_88E1318S_PHY_WOL_CTRL 0x10
157 #define MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS BIT(12)
158 #define MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE BIT(14)
160 #define MII_PHY_LED_CTRL 16
161 #define MII_88E1121_PHY_LED_DEF 0x0030
162 #define MII_88E1510_PHY_LED_DEF 0x1177
163 #define MII_88E1510_PHY_LED0_LINK_LED1_ACTIVE 0x1040
165 #define MII_M1011_PHY_STATUS 0x11
166 #define MII_M1011_PHY_STATUS_1000 0x8000
167 #define MII_M1011_PHY_STATUS_100 0x4000
168 #define MII_M1011_PHY_STATUS_SPD_MASK 0xc000
169 #define MII_M1011_PHY_STATUS_FULLDUPLEX 0x2000
170 #define MII_M1011_PHY_STATUS_RESOLVED 0x0800
171 #define MII_M1011_PHY_STATUS_LINK 0x0400
173 #define MII_88E3016_PHY_SPEC_CTRL 0x10
174 #define MII_88E3016_DISABLE_SCRAMBLER 0x0200
175 #define MII_88E3016_AUTO_MDIX_CROSSOVER 0x0030
177 #define MII_88E1510_GEN_CTRL_REG_1 0x14
178 #define MII_88E1510_GEN_CTRL_REG_1_MODE_MASK 0x7
179 #define MII_88E1510_GEN_CTRL_REG_1_MODE_SGMII 0x1 /* SGMII to copper */
180 #define MII_88E1510_GEN_CTRL_REG_1_RESET 0x8000 /* Soft reset */
182 #define MII_VCT5_TX_RX_MDI0_COUPLING 0x10
183 #define MII_VCT5_TX_RX_MDI1_COUPLING 0x11
184 #define MII_VCT5_TX_RX_MDI2_COUPLING 0x12
185 #define MII_VCT5_TX_RX_MDI3_COUPLING 0x13
186 #define MII_VCT5_TX_RX_AMPLITUDE_MASK 0x7f00
187 #define MII_VCT5_TX_RX_AMPLITUDE_SHIFT 8
188 #define MII_VCT5_TX_RX_COUPLING_POSITIVE_REFLECTION BIT(15)
190 #define MII_VCT5_CTRL 0x17
191 #define MII_VCT5_CTRL_ENABLE BIT(15)
192 #define MII_VCT5_CTRL_COMPLETE BIT(14)
193 #define MII_VCT5_CTRL_TX_SAME_CHANNEL (0x0 << 11)
194 #define MII_VCT5_CTRL_TX0_CHANNEL (0x4 << 11)
195 #define MII_VCT5_CTRL_TX1_CHANNEL (0x5 << 11)
196 #define MII_VCT5_CTRL_TX2_CHANNEL (0x6 << 11)
197 #define MII_VCT5_CTRL_TX3_CHANNEL (0x7 << 11)
198 #define MII_VCT5_CTRL_SAMPLES_2 (0x0 << 8)
199 #define MII_VCT5_CTRL_SAMPLES_4 (0x1 << 8)
200 #define MII_VCT5_CTRL_SAMPLES_8 (0x2 << 8)
201 #define MII_VCT5_CTRL_SAMPLES_16 (0x3 << 8)
202 #define MII_VCT5_CTRL_SAMPLES_32 (0x4 << 8)
203 #define MII_VCT5_CTRL_SAMPLES_64 (0x5 << 8)
204 #define MII_VCT5_CTRL_SAMPLES_128 (0x6 << 8)
205 #define MII_VCT5_CTRL_SAMPLES_DEFAULT (0x6 << 8)
206 #define MII_VCT5_CTRL_SAMPLES_256 (0x7 << 8)
207 #define MII_VCT5_CTRL_SAMPLES_SHIFT 8
208 #define MII_VCT5_CTRL_MODE_MAXIMUM_PEEK (0x0 << 6)
209 #define MII_VCT5_CTRL_MODE_FIRST_LAST_PEEK (0x1 << 6)
210 #define MII_VCT5_CTRL_MODE_OFFSET (0x2 << 6)
211 #define MII_VCT5_CTRL_SAMPLE_POINT (0x3 << 6)
212 #define MII_VCT5_CTRL_PEEK_HYST_DEFAULT 3
214 #define MII_VCT5_SAMPLE_POINT_DISTANCE 0x18
215 #define MII_VCT5_SAMPLE_POINT_DISTANCE_MAX 511
216 #define MII_VCT5_TX_PULSE_CTRL 0x1c
217 #define MII_VCT5_TX_PULSE_CTRL_DONT_WAIT_LINK_DOWN BIT(12)
218 #define MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_128nS (0x0 << 10)
219 #define MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_96nS (0x1 << 10)
220 #define MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_64nS (0x2 << 10)
221 #define MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_32nS (0x3 << 10)
222 #define MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_SHIFT 10
223 #define MII_VCT5_TX_PULSE_CTRL_PULSE_AMPLITUDE_1000mV (0x0 << 8)
224 #define MII_VCT5_TX_PULSE_CTRL_PULSE_AMPLITUDE_750mV (0x1 << 8)
225 #define MII_VCT5_TX_PULSE_CTRL_PULSE_AMPLITUDE_500mV (0x2 << 8)
226 #define MII_VCT5_TX_PULSE_CTRL_PULSE_AMPLITUDE_250mV (0x3 << 8)
227 #define MII_VCT5_TX_PULSE_CTRL_PULSE_AMPLITUDE_SHIFT 8
228 #define MII_VCT5_TX_PULSE_CTRL_MAX_AMP BIT(7)
229 #define MII_VCT5_TX_PULSE_CTRL_GT_140m_46_86mV (0x6 << 0)
231 /* For TDR measurements less than 11 meters, a short pulse should be
234 #define TDR_SHORT_CABLE_LENGTH 11
236 #define MII_VCT7_PAIR_0_DISTANCE 0x10
237 #define MII_VCT7_PAIR_1_DISTANCE 0x11
238 #define MII_VCT7_PAIR_2_DISTANCE 0x12
239 #define MII_VCT7_PAIR_3_DISTANCE 0x13
241 #define MII_VCT7_RESULTS 0x14
242 #define MII_VCT7_RESULTS_PAIR3_MASK 0xf000
243 #define MII_VCT7_RESULTS_PAIR2_MASK 0x0f00
244 #define MII_VCT7_RESULTS_PAIR1_MASK 0x00f0
245 #define MII_VCT7_RESULTS_PAIR0_MASK 0x000f
246 #define MII_VCT7_RESULTS_PAIR3_SHIFT 12
247 #define MII_VCT7_RESULTS_PAIR2_SHIFT 8
248 #define MII_VCT7_RESULTS_PAIR1_SHIFT 4
249 #define MII_VCT7_RESULTS_PAIR0_SHIFT 0
250 #define MII_VCT7_RESULTS_INVALID 0
251 #define MII_VCT7_RESULTS_OK 1
252 #define MII_VCT7_RESULTS_OPEN 2
253 #define MII_VCT7_RESULTS_SAME_SHORT 3
254 #define MII_VCT7_RESULTS_CROSS_SHORT 4
255 #define MII_VCT7_RESULTS_BUSY 9
257 #define MII_VCT7_CTRL 0x15
258 #define MII_VCT7_CTRL_RUN_NOW BIT(15)
259 #define MII_VCT7_CTRL_RUN_ANEG BIT(14)
260 #define MII_VCT7_CTRL_DISABLE_CROSS BIT(13)
261 #define MII_VCT7_CTRL_RUN_AFTER_BREAK_LINK BIT(12)
262 #define MII_VCT7_CTRL_IN_PROGRESS BIT(11)
263 #define MII_VCT7_CTRL_METERS BIT(10)
264 #define MII_VCT7_CTRL_CENTIMETERS 0
266 #define LPA_PAUSE_FIBER 0x180
267 #define LPA_PAUSE_ASYM_FIBER 0x100
269 #define NB_FIBER_STATS 1
271 MODULE_DESCRIPTION("Marvell PHY driver");
272 MODULE_AUTHOR("Andy Fleming");
273 MODULE_LICENSE("GPL");
275 struct marvell_hw_stat {
282 static struct marvell_hw_stat marvell_hw_stats[] = {
283 { "phy_receive_errors_copper", 0, 21, 16},
284 { "phy_idle_errors", 0, 10, 8 },
285 { "phy_receive_errors_fiber", 1, 21, 16},
288 struct marvell_priv {
289 u64 stats[ARRAY_SIZE(marvell_hw_stats)];
291 struct device *hwmon_dev;
299 static int marvell_read_page(struct phy_device *phydev)
301 return __phy_read(phydev, MII_MARVELL_PHY_PAGE);
304 static int marvell_write_page(struct phy_device *phydev, int page)
306 return __phy_write(phydev, MII_MARVELL_PHY_PAGE, page);
309 static int marvell_set_page(struct phy_device *phydev, int page)
311 return phy_write(phydev, MII_MARVELL_PHY_PAGE, page);
314 static int marvell_ack_interrupt(struct phy_device *phydev)
318 /* Clear the interrupts by reading the reg */
319 err = phy_read(phydev, MII_M1011_IEVENT);
327 static int marvell_config_intr(struct phy_device *phydev)
331 if (phydev->interrupts == PHY_INTERRUPT_ENABLED) {
332 err = marvell_ack_interrupt(phydev);
336 err = phy_write(phydev, MII_M1011_IMASK,
337 MII_M1011_IMASK_INIT);
339 err = phy_write(phydev, MII_M1011_IMASK,
340 MII_M1011_IMASK_CLEAR);
344 err = marvell_ack_interrupt(phydev);
350 static irqreturn_t marvell_handle_interrupt(struct phy_device *phydev)
354 irq_status = phy_read(phydev, MII_M1011_IEVENT);
355 if (irq_status < 0) {
360 if (!(irq_status & MII_M1011_IMASK_INIT))
363 phy_trigger_machine(phydev);
368 static int marvell_set_polarity(struct phy_device *phydev, int polarity)
374 val = MII_M1011_PHY_SCR_MDI;
377 val = MII_M1011_PHY_SCR_MDI_X;
379 case ETH_TP_MDI_AUTO:
380 case ETH_TP_MDI_INVALID:
382 val = MII_M1011_PHY_SCR_AUTO_CROSS;
386 return phy_modify_changed(phydev, MII_M1011_PHY_SCR,
387 MII_M1011_PHY_SCR_AUTO_CROSS, val);
390 static int marvell_config_aneg(struct phy_device *phydev)
395 err = marvell_set_polarity(phydev, phydev->mdix_ctrl);
401 err = phy_write(phydev, MII_M1111_PHY_LED_CONTROL,
402 MII_M1111_PHY_LED_DIRECT);
406 err = genphy_config_aneg(phydev);
410 if (phydev->autoneg != AUTONEG_ENABLE || changed) {
411 /* A write to speed/duplex bits (that is performed by
412 * genphy_config_aneg() call above) must be followed by
413 * a software reset. Otherwise, the write has no effect.
415 err = genphy_soft_reset(phydev);
423 static int m88e1101_config_aneg(struct phy_device *phydev)
427 /* This Marvell PHY has an errata which requires
428 * that certain registers get written in order
429 * to restart autonegotiation
431 err = genphy_soft_reset(phydev);
435 err = phy_write(phydev, 0x1d, 0x1f);
439 err = phy_write(phydev, 0x1e, 0x200c);
443 err = phy_write(phydev, 0x1d, 0x5);
447 err = phy_write(phydev, 0x1e, 0);
451 err = phy_write(phydev, 0x1e, 0x100);
455 return marvell_config_aneg(phydev);
458 #if IS_ENABLED(CONFIG_OF_MDIO)
459 /* Set and/or override some configuration registers based on the
460 * marvell,reg-init property stored in the of_node for the phydev.
462 * marvell,reg-init = <reg-page reg mask value>,...;
464 * There may be one or more sets of <reg-page reg mask value>:
466 * reg-page: which register bank to use.
468 * mask: if non-zero, ANDed with existing register value.
469 * value: ORed with the masked value and written to the regiser.
472 static int marvell_of_reg_init(struct phy_device *phydev)
475 int len, i, saved_page, current_page, ret = 0;
477 if (!phydev->mdio.dev.of_node)
480 paddr = of_get_property(phydev->mdio.dev.of_node,
481 "marvell,reg-init", &len);
482 if (!paddr || len < (4 * sizeof(*paddr)))
485 saved_page = phy_save_page(phydev);
488 current_page = saved_page;
490 len /= sizeof(*paddr);
491 for (i = 0; i < len - 3; i += 4) {
492 u16 page = be32_to_cpup(paddr + i);
493 u16 reg = be32_to_cpup(paddr + i + 1);
494 u16 mask = be32_to_cpup(paddr + i + 2);
495 u16 val_bits = be32_to_cpup(paddr + i + 3);
498 if (page != current_page) {
500 ret = marvell_write_page(phydev, page);
507 val = __phy_read(phydev, reg);
516 ret = __phy_write(phydev, reg, val);
521 return phy_restore_page(phydev, saved_page, ret);
524 static int marvell_of_reg_init(struct phy_device *phydev)
528 #endif /* CONFIG_OF_MDIO */
530 static int m88e1121_config_aneg_rgmii_delays(struct phy_device *phydev)
534 if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID)
535 mscr = MII_88E1121_PHY_MSCR_RX_DELAY |
536 MII_88E1121_PHY_MSCR_TX_DELAY;
537 else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID)
538 mscr = MII_88E1121_PHY_MSCR_RX_DELAY;
539 else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID)
540 mscr = MII_88E1121_PHY_MSCR_TX_DELAY;
544 return phy_modify_paged(phydev, MII_MARVELL_MSCR_PAGE,
545 MII_88E1121_PHY_MSCR_REG,
546 MII_88E1121_PHY_MSCR_DELAY_MASK, mscr);
549 static int m88e1121_config_aneg(struct phy_device *phydev)
554 if (phy_interface_is_rgmii(phydev)) {
555 err = m88e1121_config_aneg_rgmii_delays(phydev);
560 err = marvell_set_polarity(phydev, phydev->mdix_ctrl);
566 err = genphy_config_aneg(phydev);
570 if (phydev->autoneg != AUTONEG_ENABLE || changed) {
571 /* A software reset is used to ensure a "commit" of the
574 err = genphy_soft_reset(phydev);
582 static int m88e1318_config_aneg(struct phy_device *phydev)
586 err = phy_modify_paged(phydev, MII_MARVELL_MSCR_PAGE,
587 MII_88E1318S_PHY_MSCR1_REG,
588 0, MII_88E1318S_PHY_MSCR1_PAD_ODD);
592 return m88e1121_config_aneg(phydev);
596 * linkmode_adv_to_fiber_adv_t
597 * @advertise: the linkmode advertisement settings
599 * A small helper function that translates linkmode advertisement
600 * settings to phy autonegotiation advertisements for the MII_ADV
601 * register for fiber link.
603 static inline u32 linkmode_adv_to_fiber_adv_t(unsigned long *advertise)
607 if (linkmode_test_bit(ETHTOOL_LINK_MODE_1000baseT_Half_BIT, advertise))
608 result |= ADVERTISE_1000XHALF;
609 if (linkmode_test_bit(ETHTOOL_LINK_MODE_1000baseT_Full_BIT, advertise))
610 result |= ADVERTISE_1000XFULL;
612 if (linkmode_test_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, advertise) &&
613 linkmode_test_bit(ETHTOOL_LINK_MODE_Pause_BIT, advertise))
614 result |= ADVERTISE_1000XPSE_ASYM;
615 else if (linkmode_test_bit(ETHTOOL_LINK_MODE_Pause_BIT, advertise))
616 result |= ADVERTISE_1000XPAUSE;
622 * marvell_config_aneg_fiber - restart auto-negotiation or write BMCR
623 * @phydev: target phy_device struct
625 * Description: If auto-negotiation is enabled, we configure the
626 * advertising, and then restart auto-negotiation. If it is not
627 * enabled, then we write the BMCR. Adapted for fiber link in
628 * some Marvell's devices.
630 static int marvell_config_aneg_fiber(struct phy_device *phydev)
636 if (phydev->autoneg != AUTONEG_ENABLE)
637 return genphy_setup_forced(phydev);
639 /* Only allow advertising what this PHY supports */
640 linkmode_and(phydev->advertising, phydev->advertising,
643 adv = linkmode_adv_to_fiber_adv_t(phydev->advertising);
645 /* Setup fiber advertisement */
646 err = phy_modify_changed(phydev, MII_ADVERTISE,
647 ADVERTISE_1000XHALF | ADVERTISE_1000XFULL |
648 ADVERTISE_1000XPAUSE | ADVERTISE_1000XPSE_ASYM,
655 return genphy_check_and_restart_aneg(phydev, changed);
658 static int m88e1111_config_aneg(struct phy_device *phydev)
660 int extsr = phy_read(phydev, MII_M1111_PHY_EXT_SR);
666 /* If not using SGMII or copper 1000BaseX modes, use normal process.
667 * Steps below are only required for these modes.
669 if (phydev->interface != PHY_INTERFACE_MODE_SGMII &&
670 (extsr & MII_M1111_HWCFG_MODE_MASK) !=
671 MII_M1111_HWCFG_MODE_COPPER_1000X_AN)
672 return marvell_config_aneg(phydev);
674 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
678 /* Configure the copper link first */
679 err = marvell_config_aneg(phydev);
683 /* Then the fiber link */
684 err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE);
688 if (phydev->interface == PHY_INTERFACE_MODE_SGMII)
689 /* Do not touch the fiber advertisement if we're in copper->sgmii mode.
690 * Just ensure that SGMII-side autonegotiation is enabled.
691 * If we switched from some other mode to SGMII it may not be.
693 err = genphy_check_and_restart_aneg(phydev, false);
695 err = marvell_config_aneg_fiber(phydev);
699 return marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
702 marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
706 static int m88e1510_config_aneg(struct phy_device *phydev)
710 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
714 /* Configure the copper link first */
715 err = m88e1318_config_aneg(phydev);
719 /* Do not touch the fiber page if we're in copper->sgmii mode */
720 if (phydev->interface == PHY_INTERFACE_MODE_SGMII)
723 /* Then the fiber link */
724 err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE);
728 err = marvell_config_aneg_fiber(phydev);
732 return marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
735 marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
739 static void marvell_config_led(struct phy_device *phydev)
744 switch (MARVELL_PHY_FAMILY_ID(phydev->phy_id)) {
745 /* Default PHY LED config: LED[0] .. Link, LED[1] .. Activity */
746 case MARVELL_PHY_FAMILY_ID(MARVELL_PHY_ID_88E1121R):
747 case MARVELL_PHY_FAMILY_ID(MARVELL_PHY_ID_88E1318S):
748 def_config = MII_88E1121_PHY_LED_DEF;
750 /* Default PHY LED config:
751 * LED[0] .. 1000Mbps Link
752 * LED[1] .. 100Mbps Link
753 * LED[2] .. Blink, Activity
755 case MARVELL_PHY_FAMILY_ID(MARVELL_PHY_ID_88E1510):
756 if (phydev->dev_flags & MARVELL_PHY_LED0_LINK_LED1_ACTIVE)
757 def_config = MII_88E1510_PHY_LED0_LINK_LED1_ACTIVE;
759 def_config = MII_88E1510_PHY_LED_DEF;
765 err = phy_write_paged(phydev, MII_MARVELL_LED_PAGE, MII_PHY_LED_CTRL,
768 phydev_warn(phydev, "Fail to config marvell phy LED.\n");
771 static int marvell_config_init(struct phy_device *phydev)
773 /* Set default LED */
774 marvell_config_led(phydev);
776 /* Set registers from marvell,reg-init DT property */
777 return marvell_of_reg_init(phydev);
780 static int m88e3016_config_init(struct phy_device *phydev)
784 /* Enable Scrambler and Auto-Crossover */
785 ret = phy_modify(phydev, MII_88E3016_PHY_SPEC_CTRL,
786 MII_88E3016_DISABLE_SCRAMBLER,
787 MII_88E3016_AUTO_MDIX_CROSSOVER);
791 return marvell_config_init(phydev);
794 static int m88e1111_config_init_hwcfg_mode(struct phy_device *phydev,
796 int fibre_copper_auto)
798 if (fibre_copper_auto)
799 mode |= MII_M1111_HWCFG_FIBER_COPPER_AUTO;
801 return phy_modify(phydev, MII_M1111_PHY_EXT_SR,
802 MII_M1111_HWCFG_MODE_MASK |
803 MII_M1111_HWCFG_FIBER_COPPER_AUTO |
804 MII_M1111_HWCFG_FIBER_COPPER_RES,
808 static int m88e1111_config_init_rgmii_delays(struct phy_device *phydev)
812 switch (phydev->interface) {
813 case PHY_INTERFACE_MODE_RGMII_ID:
814 delay = MII_M1111_RGMII_RX_DELAY | MII_M1111_RGMII_TX_DELAY;
816 case PHY_INTERFACE_MODE_RGMII_RXID:
817 delay = MII_M1111_RGMII_RX_DELAY;
819 case PHY_INTERFACE_MODE_RGMII_TXID:
820 delay = MII_M1111_RGMII_TX_DELAY;
827 return phy_modify(phydev, MII_M1111_PHY_EXT_CR,
828 MII_M1111_RGMII_RX_DELAY | MII_M1111_RGMII_TX_DELAY,
832 static int m88e1111_config_init_rgmii(struct phy_device *phydev)
837 err = m88e1111_config_init_rgmii_delays(phydev);
841 temp = phy_read(phydev, MII_M1111_PHY_EXT_SR);
845 temp &= ~(MII_M1111_HWCFG_MODE_MASK);
847 if (temp & MII_M1111_HWCFG_FIBER_COPPER_RES)
848 temp |= MII_M1111_HWCFG_MODE_FIBER_RGMII;
850 temp |= MII_M1111_HWCFG_MODE_COPPER_RGMII;
852 return phy_write(phydev, MII_M1111_PHY_EXT_SR, temp);
855 static int m88e1111_config_init_sgmii(struct phy_device *phydev)
859 err = m88e1111_config_init_hwcfg_mode(
861 MII_M1111_HWCFG_MODE_SGMII_NO_CLK,
862 MII_M1111_HWCFG_FIBER_COPPER_AUTO);
866 /* make sure copper is selected */
867 return marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
870 static int m88e1111_config_init_rtbi(struct phy_device *phydev)
874 err = m88e1111_config_init_rgmii_delays(phydev);
878 err = m88e1111_config_init_hwcfg_mode(
880 MII_M1111_HWCFG_MODE_RTBI,
881 MII_M1111_HWCFG_FIBER_COPPER_AUTO);
886 err = genphy_soft_reset(phydev);
890 return m88e1111_config_init_hwcfg_mode(
892 MII_M1111_HWCFG_MODE_RTBI,
893 MII_M1111_HWCFG_FIBER_COPPER_AUTO);
896 static int m88e1111_config_init_1000basex(struct phy_device *phydev)
898 int extsr = phy_read(phydev, MII_M1111_PHY_EXT_SR);
904 /* If using copper mode, ensure 1000BaseX auto-negotiation is enabled */
905 mode = extsr & MII_M1111_HWCFG_MODE_MASK;
906 if (mode == MII_M1111_HWCFG_MODE_COPPER_1000X_NOAN) {
907 err = phy_modify(phydev, MII_M1111_PHY_EXT_SR,
908 MII_M1111_HWCFG_MODE_MASK |
909 MII_M1111_HWCFG_SERIAL_AN_BYPASS,
910 MII_M1111_HWCFG_MODE_COPPER_1000X_AN |
911 MII_M1111_HWCFG_SERIAL_AN_BYPASS);
918 static int m88e1111_config_init(struct phy_device *phydev)
922 if (phy_interface_is_rgmii(phydev)) {
923 err = m88e1111_config_init_rgmii(phydev);
928 if (phydev->interface == PHY_INTERFACE_MODE_SGMII) {
929 err = m88e1111_config_init_sgmii(phydev);
934 if (phydev->interface == PHY_INTERFACE_MODE_RTBI) {
935 err = m88e1111_config_init_rtbi(phydev);
940 if (phydev->interface == PHY_INTERFACE_MODE_1000BASEX) {
941 err = m88e1111_config_init_1000basex(phydev);
946 err = marvell_of_reg_init(phydev);
950 return genphy_soft_reset(phydev);
953 static int m88e1111_get_downshift(struct phy_device *phydev, u8 *data)
955 int val, cnt, enable;
957 val = phy_read(phydev, MII_M1111_PHY_EXT_CR);
961 enable = FIELD_GET(MII_M1111_PHY_EXT_CR_DOWNSHIFT_EN, val);
962 cnt = FIELD_GET(MII_M1111_PHY_EXT_CR_DOWNSHIFT_MASK, val) + 1;
964 *data = enable ? cnt : DOWNSHIFT_DEV_DISABLE;
969 static int m88e1111_set_downshift(struct phy_device *phydev, u8 cnt)
973 if (cnt > MII_M1111_PHY_EXT_CR_DOWNSHIFT_MAX)
977 err = phy_clear_bits(phydev, MII_M1111_PHY_EXT_CR,
978 MII_M1111_PHY_EXT_CR_DOWNSHIFT_EN);
980 val = MII_M1111_PHY_EXT_CR_DOWNSHIFT_EN;
981 val |= FIELD_PREP(MII_M1111_PHY_EXT_CR_DOWNSHIFT_MASK, cnt - 1);
983 err = phy_modify(phydev, MII_M1111_PHY_EXT_CR,
984 MII_M1111_PHY_EXT_CR_DOWNSHIFT_EN |
985 MII_M1111_PHY_EXT_CR_DOWNSHIFT_MASK,
992 return genphy_soft_reset(phydev);
995 static int m88e1111_get_tunable(struct phy_device *phydev,
996 struct ethtool_tunable *tuna, void *data)
999 case ETHTOOL_PHY_DOWNSHIFT:
1000 return m88e1111_get_downshift(phydev, data);
1006 static int m88e1111_set_tunable(struct phy_device *phydev,
1007 struct ethtool_tunable *tuna, const void *data)
1010 case ETHTOOL_PHY_DOWNSHIFT:
1011 return m88e1111_set_downshift(phydev, *(const u8 *)data);
1017 static int m88e1011_get_downshift(struct phy_device *phydev, u8 *data)
1019 int val, cnt, enable;
1021 val = phy_read(phydev, MII_M1011_PHY_SCR);
1025 enable = FIELD_GET(MII_M1011_PHY_SCR_DOWNSHIFT_EN, val);
1026 cnt = FIELD_GET(MII_M1011_PHY_SCR_DOWNSHIFT_MASK, val) + 1;
1028 *data = enable ? cnt : DOWNSHIFT_DEV_DISABLE;
1033 static int m88e1011_set_downshift(struct phy_device *phydev, u8 cnt)
1037 if (cnt > MII_M1011_PHY_SCR_DOWNSHIFT_MAX)
1041 err = phy_clear_bits(phydev, MII_M1011_PHY_SCR,
1042 MII_M1011_PHY_SCR_DOWNSHIFT_EN);
1044 val = MII_M1011_PHY_SCR_DOWNSHIFT_EN;
1045 val |= FIELD_PREP(MII_M1011_PHY_SCR_DOWNSHIFT_MASK, cnt - 1);
1047 err = phy_modify(phydev, MII_M1011_PHY_SCR,
1048 MII_M1011_PHY_SCR_DOWNSHIFT_EN |
1049 MII_M1011_PHY_SCR_DOWNSHIFT_MASK,
1056 return genphy_soft_reset(phydev);
1059 static int m88e1011_get_tunable(struct phy_device *phydev,
1060 struct ethtool_tunable *tuna, void *data)
1063 case ETHTOOL_PHY_DOWNSHIFT:
1064 return m88e1011_get_downshift(phydev, data);
1070 static int m88e1011_set_tunable(struct phy_device *phydev,
1071 struct ethtool_tunable *tuna, const void *data)
1074 case ETHTOOL_PHY_DOWNSHIFT:
1075 return m88e1011_set_downshift(phydev, *(const u8 *)data);
1081 static int m88e1112_config_init(struct phy_device *phydev)
1085 err = m88e1011_set_downshift(phydev, 3);
1089 return m88e1111_config_init(phydev);
1092 static int m88e1111gbe_config_init(struct phy_device *phydev)
1096 err = m88e1111_set_downshift(phydev, 3);
1100 return m88e1111_config_init(phydev);
1103 static int marvell_1011gbe_config_init(struct phy_device *phydev)
1107 err = m88e1011_set_downshift(phydev, 3);
1111 return marvell_config_init(phydev);
1113 static int m88e1116r_config_init(struct phy_device *phydev)
1117 err = genphy_soft_reset(phydev);
1123 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1127 err = marvell_set_polarity(phydev, phydev->mdix_ctrl);
1131 err = m88e1011_set_downshift(phydev, 8);
1135 if (phy_interface_is_rgmii(phydev)) {
1136 err = m88e1121_config_aneg_rgmii_delays(phydev);
1141 err = genphy_soft_reset(phydev);
1145 return marvell_config_init(phydev);
1148 static int m88e1318_config_init(struct phy_device *phydev)
1150 if (phy_interrupt_is_valid(phydev)) {
1151 int err = phy_modify_paged(
1152 phydev, MII_MARVELL_LED_PAGE,
1153 MII_88E1318S_PHY_LED_TCR,
1154 MII_88E1318S_PHY_LED_TCR_FORCE_INT,
1155 MII_88E1318S_PHY_LED_TCR_INTn_ENABLE |
1156 MII_88E1318S_PHY_LED_TCR_INT_ACTIVE_LOW);
1161 return marvell_config_init(phydev);
1164 static int m88e1510_config_init(struct phy_device *phydev)
1168 /* SGMII-to-Copper mode initialization */
1169 if (phydev->interface == PHY_INTERFACE_MODE_SGMII) {
1170 /* Select page 18 */
1171 err = marvell_set_page(phydev, 18);
1175 /* In reg 20, write MODE[2:0] = 0x1 (SGMII to Copper) */
1176 err = phy_modify(phydev, MII_88E1510_GEN_CTRL_REG_1,
1177 MII_88E1510_GEN_CTRL_REG_1_MODE_MASK,
1178 MII_88E1510_GEN_CTRL_REG_1_MODE_SGMII);
1182 /* PHY reset is necessary after changing MODE[2:0] */
1183 err = phy_set_bits(phydev, MII_88E1510_GEN_CTRL_REG_1,
1184 MII_88E1510_GEN_CTRL_REG_1_RESET);
1188 /* Reset page selection */
1189 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1193 err = m88e1011_set_downshift(phydev, 3);
1197 return m88e1318_config_init(phydev);
1200 static int m88e1118_config_aneg(struct phy_device *phydev)
1204 err = genphy_soft_reset(phydev);
1208 err = marvell_set_polarity(phydev, phydev->mdix_ctrl);
1212 err = genphy_config_aneg(phydev);
1216 static int m88e1118_config_init(struct phy_device *phydev)
1220 /* Change address */
1221 err = marvell_set_page(phydev, MII_MARVELL_MSCR_PAGE);
1225 /* Enable 1000 Mbit */
1226 err = phy_write(phydev, 0x15, 0x1070);
1230 /* Change address */
1231 err = marvell_set_page(phydev, MII_MARVELL_LED_PAGE);
1235 /* Adjust LED Control */
1236 if (phydev->dev_flags & MARVELL_PHY_M1118_DNS323_LEDS)
1237 err = phy_write(phydev, 0x10, 0x1100);
1239 err = phy_write(phydev, 0x10, 0x021e);
1243 err = marvell_of_reg_init(phydev);
1248 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1252 return genphy_soft_reset(phydev);
1255 static int m88e1149_config_init(struct phy_device *phydev)
1259 /* Change address */
1260 err = marvell_set_page(phydev, MII_MARVELL_MSCR_PAGE);
1264 /* Enable 1000 Mbit */
1265 err = phy_write(phydev, 0x15, 0x1048);
1269 err = marvell_of_reg_init(phydev);
1274 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1278 return genphy_soft_reset(phydev);
1281 static int m88e1145_config_init_rgmii(struct phy_device *phydev)
1285 err = m88e1111_config_init_rgmii_delays(phydev);
1289 if (phydev->dev_flags & MARVELL_PHY_M1145_FLAGS_RESISTANCE) {
1290 err = phy_write(phydev, 0x1d, 0x0012);
1294 err = phy_modify(phydev, 0x1e, 0x0fc0,
1295 2 << 9 | /* 36 ohm */
1296 2 << 6); /* 39 ohm */
1300 err = phy_write(phydev, 0x1d, 0x3);
1304 err = phy_write(phydev, 0x1e, 0x8000);
1309 static int m88e1145_config_init_sgmii(struct phy_device *phydev)
1311 return m88e1111_config_init_hwcfg_mode(
1312 phydev, MII_M1111_HWCFG_MODE_SGMII_NO_CLK,
1313 MII_M1111_HWCFG_FIBER_COPPER_AUTO);
1316 static int m88e1145_config_init(struct phy_device *phydev)
1320 /* Take care of errata E0 & E1 */
1321 err = phy_write(phydev, 0x1d, 0x001b);
1325 err = phy_write(phydev, 0x1e, 0x418f);
1329 err = phy_write(phydev, 0x1d, 0x0016);
1333 err = phy_write(phydev, 0x1e, 0xa2da);
1337 if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) {
1338 err = m88e1145_config_init_rgmii(phydev);
1343 if (phydev->interface == PHY_INTERFACE_MODE_SGMII) {
1344 err = m88e1145_config_init_sgmii(phydev);
1348 err = m88e1111_set_downshift(phydev, 3);
1352 err = marvell_of_reg_init(phydev);
1359 static int m88e1540_get_fld(struct phy_device *phydev, u8 *msecs)
1363 val = phy_read(phydev, MII_88E1540_COPPER_CTRL3);
1367 if (!(val & MII_88E1540_COPPER_CTRL3_FAST_LINK_DOWN)) {
1368 *msecs = ETHTOOL_PHY_FAST_LINK_DOWN_OFF;
1372 val = FIELD_GET(MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_MASK, val);
1375 case MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_00MS:
1378 case MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_10MS:
1381 case MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_20MS:
1384 case MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_40MS:
1394 static int m88e1540_set_fld(struct phy_device *phydev, const u8 *msecs)
1396 struct ethtool_eee eee;
1399 if (*msecs == ETHTOOL_PHY_FAST_LINK_DOWN_OFF)
1400 return phy_clear_bits(phydev, MII_88E1540_COPPER_CTRL3,
1401 MII_88E1540_COPPER_CTRL3_FAST_LINK_DOWN);
1403 /* According to the Marvell data sheet EEE must be disabled for
1404 * Fast Link Down detection to work properly
1406 ret = phy_ethtool_get_eee(phydev, &eee);
1407 if (!ret && eee.eee_enabled) {
1408 phydev_warn(phydev, "Fast Link Down detection requires EEE to be disabled!\n");
1413 val = MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_00MS;
1414 else if (*msecs <= 15)
1415 val = MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_10MS;
1416 else if (*msecs <= 30)
1417 val = MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_20MS;
1419 val = MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_40MS;
1421 val = FIELD_PREP(MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_MASK, val);
1423 ret = phy_modify(phydev, MII_88E1540_COPPER_CTRL3,
1424 MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_MASK, val);
1428 return phy_set_bits(phydev, MII_88E1540_COPPER_CTRL3,
1429 MII_88E1540_COPPER_CTRL3_FAST_LINK_DOWN);
1432 static int m88e1540_get_tunable(struct phy_device *phydev,
1433 struct ethtool_tunable *tuna, void *data)
1436 case ETHTOOL_PHY_FAST_LINK_DOWN:
1437 return m88e1540_get_fld(phydev, data);
1438 case ETHTOOL_PHY_DOWNSHIFT:
1439 return m88e1011_get_downshift(phydev, data);
1445 static int m88e1540_set_tunable(struct phy_device *phydev,
1446 struct ethtool_tunable *tuna, const void *data)
1449 case ETHTOOL_PHY_FAST_LINK_DOWN:
1450 return m88e1540_set_fld(phydev, data);
1451 case ETHTOOL_PHY_DOWNSHIFT:
1452 return m88e1011_set_downshift(phydev, *(const u8 *)data);
1458 /* The VOD can be out of specification on link up. Poke an
1459 * undocumented register, in an undocumented page, with a magic value
1462 static int m88e6390_errata(struct phy_device *phydev)
1466 err = phy_write(phydev, MII_BMCR,
1467 BMCR_ANENABLE | BMCR_SPEED1000 | BMCR_FULLDPLX);
1471 usleep_range(300, 400);
1473 err = phy_write_paged(phydev, 0xf8, 0x08, 0x36);
1477 return genphy_soft_reset(phydev);
1480 static int m88e6390_config_aneg(struct phy_device *phydev)
1484 err = m88e6390_errata(phydev);
1488 return m88e1510_config_aneg(phydev);
1492 * fiber_lpa_mod_linkmode_lpa_t
1493 * @advertising: the linkmode advertisement settings
1494 * @lpa: value of the MII_LPA register for fiber link
1496 * A small helper function that translates MII_LPA bits to linkmode LP
1497 * advertisement settings. Other bits in advertising are left
1500 static void fiber_lpa_mod_linkmode_lpa_t(unsigned long *advertising, u32 lpa)
1502 linkmode_mod_bit(ETHTOOL_LINK_MODE_1000baseT_Half_BIT,
1503 advertising, lpa & LPA_1000XHALF);
1505 linkmode_mod_bit(ETHTOOL_LINK_MODE_1000baseT_Full_BIT,
1506 advertising, lpa & LPA_1000XFULL);
1509 static int marvell_read_status_page_an(struct phy_device *phydev,
1510 int fiber, int status)
1515 if (!(status & MII_M1011_PHY_STATUS_RESOLVED)) {
1520 if (status & MII_M1011_PHY_STATUS_FULLDUPLEX)
1521 phydev->duplex = DUPLEX_FULL;
1523 phydev->duplex = DUPLEX_HALF;
1525 switch (status & MII_M1011_PHY_STATUS_SPD_MASK) {
1526 case MII_M1011_PHY_STATUS_1000:
1527 phydev->speed = SPEED_1000;
1530 case MII_M1011_PHY_STATUS_100:
1531 phydev->speed = SPEED_100;
1535 phydev->speed = SPEED_10;
1540 err = genphy_read_lpa(phydev);
1544 phy_resolve_aneg_pause(phydev);
1546 lpa = phy_read(phydev, MII_LPA);
1550 /* The fiber link is only 1000M capable */
1551 fiber_lpa_mod_linkmode_lpa_t(phydev->lp_advertising, lpa);
1553 if (phydev->duplex == DUPLEX_FULL) {
1554 if (!(lpa & LPA_PAUSE_FIBER)) {
1556 phydev->asym_pause = 0;
1557 } else if ((lpa & LPA_PAUSE_ASYM_FIBER)) {
1559 phydev->asym_pause = 1;
1562 phydev->asym_pause = 0;
1570 /* marvell_read_status_page
1573 * Check the link, then figure out the current state
1574 * by comparing what we advertise with what the link partner
1575 * advertises. Start by checking the gigabit possibilities,
1576 * then move on to 10/100.
1578 static int marvell_read_status_page(struct phy_device *phydev, int page)
1584 status = phy_read(phydev, MII_M1011_PHY_STATUS);
1588 /* Use the generic register for copper link status,
1589 * and the PHY status register for fiber link status.
1591 if (page == MII_MARVELL_FIBER_PAGE) {
1592 phydev->link = !!(status & MII_M1011_PHY_STATUS_LINK);
1594 err = genphy_update_link(phydev);
1599 if (page == MII_MARVELL_FIBER_PAGE)
1604 linkmode_zero(phydev->lp_advertising);
1606 phydev->asym_pause = 0;
1607 phydev->speed = SPEED_UNKNOWN;
1608 phydev->duplex = DUPLEX_UNKNOWN;
1609 phydev->port = fiber ? PORT_FIBRE : PORT_TP;
1611 if (phydev->autoneg == AUTONEG_ENABLE)
1612 err = marvell_read_status_page_an(phydev, fiber, status);
1614 err = genphy_read_status_fixed(phydev);
1619 /* marvell_read_status
1621 * Some Marvell's phys have two modes: fiber and copper.
1622 * Both need status checked.
1624 * First, check the fiber link and status.
1625 * If the fiber link is down, check the copper link and status which
1626 * will be the default value if both link are down.
1628 static int marvell_read_status(struct phy_device *phydev)
1632 /* Check the fiber mode first */
1633 if (linkmode_test_bit(ETHTOOL_LINK_MODE_FIBRE_BIT,
1634 phydev->supported) &&
1635 phydev->interface != PHY_INTERFACE_MODE_SGMII) {
1636 err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE);
1640 err = marvell_read_status_page(phydev, MII_MARVELL_FIBER_PAGE);
1644 /* If the fiber link is up, it is the selected and
1645 * used link. In this case, we need to stay in the
1646 * fiber page. Please to be careful about that, avoid
1647 * to restore Copper page in other functions which
1648 * could break the behaviour for some fiber phy like
1654 /* If fiber link is down, check and save copper mode state */
1655 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1660 return marvell_read_status_page(phydev, MII_MARVELL_COPPER_PAGE);
1663 marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1669 * Some Marvell's phys have two modes: fiber and copper.
1670 * Both need to be suspended
1672 static int marvell_suspend(struct phy_device *phydev)
1676 /* Suspend the fiber mode first */
1677 if (!linkmode_test_bit(ETHTOOL_LINK_MODE_FIBRE_BIT,
1678 phydev->supported)) {
1679 err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE);
1683 /* With the page set, use the generic suspend */
1684 err = genphy_suspend(phydev);
1688 /* Then, the copper link */
1689 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1694 /* With the page set, use the generic suspend */
1695 return genphy_suspend(phydev);
1698 marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1704 * Some Marvell's phys have two modes: fiber and copper.
1705 * Both need to be resumed
1707 static int marvell_resume(struct phy_device *phydev)
1711 /* Resume the fiber mode first */
1712 if (!linkmode_test_bit(ETHTOOL_LINK_MODE_FIBRE_BIT,
1713 phydev->supported)) {
1714 err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE);
1718 /* With the page set, use the generic resume */
1719 err = genphy_resume(phydev);
1723 /* Then, the copper link */
1724 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1729 /* With the page set, use the generic resume */
1730 return genphy_resume(phydev);
1733 marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1737 static int marvell_aneg_done(struct phy_device *phydev)
1739 int retval = phy_read(phydev, MII_M1011_PHY_STATUS);
1741 return (retval < 0) ? retval : (retval & MII_M1011_PHY_STATUS_RESOLVED);
1744 static void m88e1318_get_wol(struct phy_device *phydev,
1745 struct ethtool_wolinfo *wol)
1749 wol->supported = WAKE_MAGIC;
1752 ret = phy_read_paged(phydev, MII_MARVELL_WOL_PAGE,
1753 MII_88E1318S_PHY_WOL_CTRL);
1754 if (ret >= 0 && ret & MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE)
1755 wol->wolopts |= WAKE_MAGIC;
1758 static int m88e1318_set_wol(struct phy_device *phydev,
1759 struct ethtool_wolinfo *wol)
1761 int err = 0, oldpage;
1763 oldpage = phy_save_page(phydev);
1767 if (wol->wolopts & WAKE_MAGIC) {
1768 /* Explicitly switch to page 0x00, just to be sure */
1769 err = marvell_write_page(phydev, MII_MARVELL_COPPER_PAGE);
1773 /* If WOL event happened once, the LED[2] interrupt pin
1774 * will not be cleared unless we reading the interrupt status
1775 * register. If interrupts are in use, the normal interrupt
1776 * handling will clear the WOL event. Clear the WOL event
1777 * before enabling it if !phy_interrupt_is_valid()
1779 if (!phy_interrupt_is_valid(phydev))
1780 __phy_read(phydev, MII_M1011_IEVENT);
1782 /* Enable the WOL interrupt */
1783 err = __phy_set_bits(phydev, MII_88E1318S_PHY_CSIER,
1784 MII_88E1318S_PHY_CSIER_WOL_EIE);
1788 err = marvell_write_page(phydev, MII_MARVELL_LED_PAGE);
1792 /* Setup LED[2] as interrupt pin (active low) */
1793 err = __phy_modify(phydev, MII_88E1318S_PHY_LED_TCR,
1794 MII_88E1318S_PHY_LED_TCR_FORCE_INT,
1795 MII_88E1318S_PHY_LED_TCR_INTn_ENABLE |
1796 MII_88E1318S_PHY_LED_TCR_INT_ACTIVE_LOW);
1800 err = marvell_write_page(phydev, MII_MARVELL_WOL_PAGE);
1804 /* Store the device address for the magic packet */
1805 err = __phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD2,
1806 ((phydev->attached_dev->dev_addr[5] << 8) |
1807 phydev->attached_dev->dev_addr[4]));
1810 err = __phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD1,
1811 ((phydev->attached_dev->dev_addr[3] << 8) |
1812 phydev->attached_dev->dev_addr[2]));
1815 err = __phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD0,
1816 ((phydev->attached_dev->dev_addr[1] << 8) |
1817 phydev->attached_dev->dev_addr[0]));
1821 /* Clear WOL status and enable magic packet matching */
1822 err = __phy_set_bits(phydev, MII_88E1318S_PHY_WOL_CTRL,
1823 MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS |
1824 MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE);
1828 err = marvell_write_page(phydev, MII_MARVELL_WOL_PAGE);
1832 /* Clear WOL status and disable magic packet matching */
1833 err = __phy_modify(phydev, MII_88E1318S_PHY_WOL_CTRL,
1834 MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE,
1835 MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS);
1841 return phy_restore_page(phydev, oldpage, err);
1844 static int marvell_get_sset_count(struct phy_device *phydev)
1846 if (linkmode_test_bit(ETHTOOL_LINK_MODE_FIBRE_BIT,
1848 return ARRAY_SIZE(marvell_hw_stats);
1850 return ARRAY_SIZE(marvell_hw_stats) - NB_FIBER_STATS;
1853 static void marvell_get_strings(struct phy_device *phydev, u8 *data)
1855 int count = marvell_get_sset_count(phydev);
1858 for (i = 0; i < count; i++) {
1859 strlcpy(data + i * ETH_GSTRING_LEN,
1860 marvell_hw_stats[i].string, ETH_GSTRING_LEN);
1864 static u64 marvell_get_stat(struct phy_device *phydev, int i)
1866 struct marvell_hw_stat stat = marvell_hw_stats[i];
1867 struct marvell_priv *priv = phydev->priv;
1871 val = phy_read_paged(phydev, stat.page, stat.reg);
1875 val = val & ((1 << stat.bits) - 1);
1876 priv->stats[i] += val;
1877 ret = priv->stats[i];
1883 static void marvell_get_stats(struct phy_device *phydev,
1884 struct ethtool_stats *stats, u64 *data)
1886 int count = marvell_get_sset_count(phydev);
1889 for (i = 0; i < count; i++)
1890 data[i] = marvell_get_stat(phydev, i);
1893 static int marvell_vct5_wait_complete(struct phy_device *phydev)
1898 for (i = 0; i < 32; i++) {
1899 val = __phy_read(phydev, MII_VCT5_CTRL);
1903 if (val & MII_VCT5_CTRL_COMPLETE)
1907 phydev_err(phydev, "Timeout while waiting for cable test to finish\n");
1911 static int marvell_vct5_amplitude(struct phy_device *phydev, int pair)
1917 reg = MII_VCT5_TX_RX_MDI0_COUPLING + pair;
1918 val = __phy_read(phydev, reg);
1923 amplitude = (val & MII_VCT5_TX_RX_AMPLITUDE_MASK) >>
1924 MII_VCT5_TX_RX_AMPLITUDE_SHIFT;
1926 if (!(val & MII_VCT5_TX_RX_COUPLING_POSITIVE_REFLECTION))
1927 amplitude = -amplitude;
1929 return 1000 * amplitude / 128;
1932 static u32 marvell_vct5_distance2cm(int distance)
1934 return distance * 805 / 10;
1937 static u32 marvell_vct5_cm2distance(int cm)
1939 return cm * 10 / 805;
1942 static int marvell_vct5_amplitude_distance(struct phy_device *phydev,
1943 int distance, int pair)
1950 err = __phy_write(phydev, MII_VCT5_SAMPLE_POINT_DISTANCE,
1955 reg = MII_VCT5_CTRL_ENABLE |
1956 MII_VCT5_CTRL_TX_SAME_CHANNEL |
1957 MII_VCT5_CTRL_SAMPLES_DEFAULT |
1958 MII_VCT5_CTRL_SAMPLE_POINT |
1959 MII_VCT5_CTRL_PEEK_HYST_DEFAULT;
1960 err = __phy_write(phydev, MII_VCT5_CTRL, reg);
1964 err = marvell_vct5_wait_complete(phydev);
1968 for (i = 0; i < 4; i++) {
1969 if (pair != PHY_PAIR_ALL && i != pair)
1972 mV = marvell_vct5_amplitude(phydev, i);
1973 ethnl_cable_test_amplitude(phydev, i, mV);
1979 static int marvell_vct5_amplitude_graph(struct phy_device *phydev)
1981 struct marvell_priv *priv = phydev->priv;
1988 if (priv->first <= TDR_SHORT_CABLE_LENGTH)
1989 width = MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_32nS;
1991 width = MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_128nS;
1993 reg = MII_VCT5_TX_PULSE_CTRL_GT_140m_46_86mV |
1994 MII_VCT5_TX_PULSE_CTRL_DONT_WAIT_LINK_DOWN |
1995 MII_VCT5_TX_PULSE_CTRL_MAX_AMP | width;
1997 err = phy_write_paged(phydev, MII_MARVELL_VCT5_PAGE,
1998 MII_VCT5_TX_PULSE_CTRL, reg);
2002 /* Reading the TDR data is very MDIO heavy. We need to optimize
2003 * access to keep the time to a minimum. So lock the bus once,
2004 * and don't release it until complete. We can then avoid having
2005 * to change the page for every access, greatly speeding things
2008 page = phy_select_page(phydev, MII_MARVELL_VCT5_PAGE);
2012 for (distance = priv->first;
2013 distance <= priv->last;
2014 distance += priv->step) {
2015 err = marvell_vct5_amplitude_distance(phydev, distance,
2020 if (distance > TDR_SHORT_CABLE_LENGTH &&
2021 width == MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_32nS) {
2022 width = MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_128nS;
2023 reg = MII_VCT5_TX_PULSE_CTRL_GT_140m_46_86mV |
2024 MII_VCT5_TX_PULSE_CTRL_DONT_WAIT_LINK_DOWN |
2025 MII_VCT5_TX_PULSE_CTRL_MAX_AMP | width;
2026 err = __phy_write(phydev, MII_VCT5_TX_PULSE_CTRL, reg);
2033 return phy_restore_page(phydev, page, err);
2036 static int marvell_cable_test_start_common(struct phy_device *phydev)
2038 int bmcr, bmsr, ret;
2040 /* If auto-negotiation is enabled, but not complete, the cable
2041 * test never completes. So disable auto-neg.
2043 bmcr = phy_read(phydev, MII_BMCR);
2047 bmsr = phy_read(phydev, MII_BMSR);
2052 if (bmcr & BMCR_ANENABLE) {
2053 ret = phy_clear_bits(phydev, MII_BMCR, BMCR_ANENABLE);
2056 ret = genphy_soft_reset(phydev);
2061 /* If the link is up, allow it some time to go down */
2062 if (bmsr & BMSR_LSTATUS)
2068 static int marvell_vct7_cable_test_start(struct phy_device *phydev)
2070 struct marvell_priv *priv = phydev->priv;
2073 ret = marvell_cable_test_start_common(phydev);
2077 priv->cable_test_tdr = false;
2079 /* Reset the VCT5 API control to defaults, otherwise
2080 * VCT7 does not work correctly.
2082 ret = phy_write_paged(phydev, MII_MARVELL_VCT5_PAGE,
2084 MII_VCT5_CTRL_TX_SAME_CHANNEL |
2085 MII_VCT5_CTRL_SAMPLES_DEFAULT |
2086 MII_VCT5_CTRL_MODE_MAXIMUM_PEEK |
2087 MII_VCT5_CTRL_PEEK_HYST_DEFAULT);
2091 ret = phy_write_paged(phydev, MII_MARVELL_VCT5_PAGE,
2092 MII_VCT5_SAMPLE_POINT_DISTANCE, 0);
2096 return phy_write_paged(phydev, MII_MARVELL_VCT7_PAGE,
2098 MII_VCT7_CTRL_RUN_NOW |
2099 MII_VCT7_CTRL_CENTIMETERS);
2102 static int marvell_vct5_cable_test_tdr_start(struct phy_device *phydev,
2103 const struct phy_tdr_config *cfg)
2105 struct marvell_priv *priv = phydev->priv;
2108 priv->cable_test_tdr = true;
2109 priv->first = marvell_vct5_cm2distance(cfg->first);
2110 priv->last = marvell_vct5_cm2distance(cfg->last);
2111 priv->step = marvell_vct5_cm2distance(cfg->step);
2112 priv->pair = cfg->pair;
2114 if (priv->first > MII_VCT5_SAMPLE_POINT_DISTANCE_MAX)
2117 if (priv->last > MII_VCT5_SAMPLE_POINT_DISTANCE_MAX)
2121 ret = phy_write_paged(phydev, MII_MARVELL_VCT7_PAGE,
2126 ret = marvell_cable_test_start_common(phydev);
2130 ret = ethnl_cable_test_pulse(phydev, 1000);
2134 return ethnl_cable_test_step(phydev,
2135 marvell_vct5_distance2cm(priv->first),
2136 marvell_vct5_distance2cm(priv->last),
2137 marvell_vct5_distance2cm(priv->step));
2140 static int marvell_vct7_distance_to_length(int distance, bool meter)
2148 static bool marvell_vct7_distance_valid(int result)
2151 case MII_VCT7_RESULTS_OPEN:
2152 case MII_VCT7_RESULTS_SAME_SHORT:
2153 case MII_VCT7_RESULTS_CROSS_SHORT:
2159 static int marvell_vct7_report_length(struct phy_device *phydev,
2160 int pair, bool meter)
2165 ret = phy_read_paged(phydev, MII_MARVELL_VCT7_PAGE,
2166 MII_VCT7_PAIR_0_DISTANCE + pair);
2170 length = marvell_vct7_distance_to_length(ret, meter);
2172 ethnl_cable_test_fault_length(phydev, pair, length);
2177 static int marvell_vct7_cable_test_report_trans(int result)
2180 case MII_VCT7_RESULTS_OK:
2181 return ETHTOOL_A_CABLE_RESULT_CODE_OK;
2182 case MII_VCT7_RESULTS_OPEN:
2183 return ETHTOOL_A_CABLE_RESULT_CODE_OPEN;
2184 case MII_VCT7_RESULTS_SAME_SHORT:
2185 return ETHTOOL_A_CABLE_RESULT_CODE_SAME_SHORT;
2186 case MII_VCT7_RESULTS_CROSS_SHORT:
2187 return ETHTOOL_A_CABLE_RESULT_CODE_CROSS_SHORT;
2189 return ETHTOOL_A_CABLE_RESULT_CODE_UNSPEC;
2193 static int marvell_vct7_cable_test_report(struct phy_device *phydev)
2195 int pair0, pair1, pair2, pair3;
2199 ret = phy_read_paged(phydev, MII_MARVELL_VCT7_PAGE,
2204 pair3 = (ret & MII_VCT7_RESULTS_PAIR3_MASK) >>
2205 MII_VCT7_RESULTS_PAIR3_SHIFT;
2206 pair2 = (ret & MII_VCT7_RESULTS_PAIR2_MASK) >>
2207 MII_VCT7_RESULTS_PAIR2_SHIFT;
2208 pair1 = (ret & MII_VCT7_RESULTS_PAIR1_MASK) >>
2209 MII_VCT7_RESULTS_PAIR1_SHIFT;
2210 pair0 = (ret & MII_VCT7_RESULTS_PAIR0_MASK) >>
2211 MII_VCT7_RESULTS_PAIR0_SHIFT;
2213 ethnl_cable_test_result(phydev, ETHTOOL_A_CABLE_PAIR_A,
2214 marvell_vct7_cable_test_report_trans(pair0));
2215 ethnl_cable_test_result(phydev, ETHTOOL_A_CABLE_PAIR_B,
2216 marvell_vct7_cable_test_report_trans(pair1));
2217 ethnl_cable_test_result(phydev, ETHTOOL_A_CABLE_PAIR_C,
2218 marvell_vct7_cable_test_report_trans(pair2));
2219 ethnl_cable_test_result(phydev, ETHTOOL_A_CABLE_PAIR_D,
2220 marvell_vct7_cable_test_report_trans(pair3));
2222 ret = phy_read_paged(phydev, MII_MARVELL_VCT7_PAGE, MII_VCT7_CTRL);
2226 meter = ret & MII_VCT7_CTRL_METERS;
2228 if (marvell_vct7_distance_valid(pair0))
2229 marvell_vct7_report_length(phydev, 0, meter);
2230 if (marvell_vct7_distance_valid(pair1))
2231 marvell_vct7_report_length(phydev, 1, meter);
2232 if (marvell_vct7_distance_valid(pair2))
2233 marvell_vct7_report_length(phydev, 2, meter);
2234 if (marvell_vct7_distance_valid(pair3))
2235 marvell_vct7_report_length(phydev, 3, meter);
2240 static int marvell_vct7_cable_test_get_status(struct phy_device *phydev,
2243 struct marvell_priv *priv = phydev->priv;
2246 if (priv->cable_test_tdr) {
2247 ret = marvell_vct5_amplitude_graph(phydev);
2254 ret = phy_read_paged(phydev, MII_MARVELL_VCT7_PAGE,
2260 if (!(ret & MII_VCT7_CTRL_IN_PROGRESS)) {
2263 return marvell_vct7_cable_test_report(phydev);
2270 struct marvell_hwmon_ops {
2271 int (*config)(struct phy_device *phydev);
2272 int (*get_temp)(struct phy_device *phydev, long *temp);
2273 int (*get_temp_critical)(struct phy_device *phydev, long *temp);
2274 int (*set_temp_critical)(struct phy_device *phydev, long temp);
2275 int (*get_temp_alarm)(struct phy_device *phydev, long *alarm);
2278 static const struct marvell_hwmon_ops *
2279 to_marvell_hwmon_ops(const struct phy_device *phydev)
2281 return phydev->drv->driver_data;
2284 static int m88e1121_get_temp(struct phy_device *phydev, long *temp)
2292 oldpage = phy_select_page(phydev, MII_MARVELL_MISC_TEST_PAGE);
2296 /* Enable temperature sensor */
2297 ret = __phy_read(phydev, MII_88E1121_MISC_TEST);
2301 ret = __phy_write(phydev, MII_88E1121_MISC_TEST,
2302 ret | MII_88E1121_MISC_TEST_TEMP_SENSOR_EN);
2306 /* Wait for temperature to stabilize */
2307 usleep_range(10000, 12000);
2309 val = __phy_read(phydev, MII_88E1121_MISC_TEST);
2315 /* Disable temperature sensor */
2316 ret = __phy_write(phydev, MII_88E1121_MISC_TEST,
2317 ret & ~MII_88E1121_MISC_TEST_TEMP_SENSOR_EN);
2321 *temp = ((val & MII_88E1121_MISC_TEST_TEMP_MASK) - 5) * 5000;
2324 return phy_restore_page(phydev, oldpage, ret);
2327 static int m88e1510_get_temp(struct phy_device *phydev, long *temp)
2333 ret = phy_read_paged(phydev, MII_MARVELL_MISC_TEST_PAGE,
2334 MII_88E1510_TEMP_SENSOR);
2338 *temp = ((ret & MII_88E1510_TEMP_SENSOR_MASK) - 25) * 1000;
2343 static int m88e1510_get_temp_critical(struct phy_device *phydev, long *temp)
2349 ret = phy_read_paged(phydev, MII_MARVELL_MISC_TEST_PAGE,
2350 MII_88E1121_MISC_TEST);
2354 *temp = (((ret & MII_88E1510_MISC_TEST_TEMP_THRESHOLD_MASK) >>
2355 MII_88E1510_MISC_TEST_TEMP_THRESHOLD_SHIFT) * 5) - 25;
2362 static int m88e1510_set_temp_critical(struct phy_device *phydev, long temp)
2365 temp = clamp_val(DIV_ROUND_CLOSEST(temp, 5) + 5, 0, 0x1f);
2367 return phy_modify_paged(phydev, MII_MARVELL_MISC_TEST_PAGE,
2368 MII_88E1121_MISC_TEST,
2369 MII_88E1510_MISC_TEST_TEMP_THRESHOLD_MASK,
2370 temp << MII_88E1510_MISC_TEST_TEMP_THRESHOLD_SHIFT);
2373 static int m88e1510_get_temp_alarm(struct phy_device *phydev, long *alarm)
2379 ret = phy_read_paged(phydev, MII_MARVELL_MISC_TEST_PAGE,
2380 MII_88E1121_MISC_TEST);
2384 *alarm = !!(ret & MII_88E1510_MISC_TEST_TEMP_IRQ);
2389 static int m88e6390_get_temp(struct phy_device *phydev, long *temp)
2398 oldpage = phy_select_page(phydev, MII_MARVELL_MISC_TEST_PAGE);
2402 /* Enable temperature sensor */
2403 ret = __phy_read(phydev, MII_88E6390_MISC_TEST);
2407 ret &= ~MII_88E6390_MISC_TEST_TEMP_SENSOR_MASK;
2408 ret |= MII_88E6390_MISC_TEST_TEMP_SENSOR_ENABLE_SAMPLE_1S;
2410 ret = __phy_write(phydev, MII_88E6390_MISC_TEST, ret);
2414 /* Wait for temperature to stabilize */
2415 usleep_range(10000, 12000);
2417 /* Reading the temperature sense has an errata. You need to read
2418 * a number of times and take an average.
2420 for (i = 0; i < MII_88E6390_TEMP_SENSOR_SAMPLES; i++) {
2421 ret = __phy_read(phydev, MII_88E6390_TEMP_SENSOR);
2424 sum += ret & MII_88E6390_TEMP_SENSOR_MASK;
2427 sum /= MII_88E6390_TEMP_SENSOR_SAMPLES;
2428 *temp = (sum - 75) * 1000;
2430 /* Disable temperature sensor */
2431 ret = __phy_read(phydev, MII_88E6390_MISC_TEST);
2435 ret = ret & ~MII_88E6390_MISC_TEST_TEMP_SENSOR_MASK;
2436 ret |= MII_88E6390_MISC_TEST_TEMP_SENSOR_DISABLE;
2438 ret = __phy_write(phydev, MII_88E6390_MISC_TEST, ret);
2441 phy_restore_page(phydev, oldpage, ret);
2446 static int m88e6393_get_temp(struct phy_device *phydev, long *temp)
2450 err = m88e1510_get_temp(phydev, temp);
2452 /* 88E1510 measures T + 25, while the PHY on 88E6393X switch
2453 * T + 75, so we have to subtract another 50
2460 static int m88e6393_get_temp_critical(struct phy_device *phydev, long *temp)
2466 ret = phy_read_paged(phydev, MII_MARVELL_MISC_TEST_PAGE,
2467 MII_88E6390_TEMP_SENSOR);
2471 *temp = (((ret & MII_88E6393_TEMP_SENSOR_THRESHOLD_MASK) >>
2472 MII_88E6393_TEMP_SENSOR_THRESHOLD_SHIFT) - 75) * 1000;
2477 static int m88e6393_set_temp_critical(struct phy_device *phydev, long temp)
2479 temp = (temp / 1000) + 75;
2481 return phy_modify_paged(phydev, MII_MARVELL_MISC_TEST_PAGE,
2482 MII_88E6390_TEMP_SENSOR,
2483 MII_88E6393_TEMP_SENSOR_THRESHOLD_MASK,
2484 temp << MII_88E6393_TEMP_SENSOR_THRESHOLD_SHIFT);
2487 static int m88e6393_hwmon_config(struct phy_device *phydev)
2491 err = m88e6393_set_temp_critical(phydev, 100000);
2495 return phy_modify_paged(phydev, MII_MARVELL_MISC_TEST_PAGE,
2496 MII_88E6390_MISC_TEST,
2497 MII_88E6390_MISC_TEST_TEMP_SENSOR_MASK |
2498 MII_88E6393_MISC_TEST_SAMPLES_MASK |
2499 MII_88E6393_MISC_TEST_RATE_MASK,
2500 MII_88E6390_MISC_TEST_TEMP_SENSOR_ENABLE |
2501 MII_88E6393_MISC_TEST_SAMPLES_2048 |
2502 MII_88E6393_MISC_TEST_RATE_2_3MS);
2505 static int marvell_hwmon_read(struct device *dev, enum hwmon_sensor_types type,
2506 u32 attr, int channel, long *temp)
2508 struct phy_device *phydev = dev_get_drvdata(dev);
2509 const struct marvell_hwmon_ops *ops = to_marvell_hwmon_ops(phydev);
2510 int err = -EOPNOTSUPP;
2513 case hwmon_temp_input:
2515 err = ops->get_temp(phydev, temp);
2517 case hwmon_temp_crit:
2518 if (ops->get_temp_critical)
2519 err = ops->get_temp_critical(phydev, temp);
2521 case hwmon_temp_max_alarm:
2522 if (ops->get_temp_alarm)
2523 err = ops->get_temp_alarm(phydev, temp);
2530 static int marvell_hwmon_write(struct device *dev, enum hwmon_sensor_types type,
2531 u32 attr, int channel, long temp)
2533 struct phy_device *phydev = dev_get_drvdata(dev);
2534 const struct marvell_hwmon_ops *ops = to_marvell_hwmon_ops(phydev);
2535 int err = -EOPNOTSUPP;
2538 case hwmon_temp_crit:
2539 if (ops->set_temp_critical)
2540 err = ops->set_temp_critical(phydev, temp);
2547 static umode_t marvell_hwmon_is_visible(const void *data,
2548 enum hwmon_sensor_types type,
2549 u32 attr, int channel)
2551 const struct phy_device *phydev = data;
2552 const struct marvell_hwmon_ops *ops = to_marvell_hwmon_ops(phydev);
2554 if (type != hwmon_temp)
2558 case hwmon_temp_input:
2559 return ops->get_temp ? 0444 : 0;
2560 case hwmon_temp_max_alarm:
2561 return ops->get_temp_alarm ? 0444 : 0;
2562 case hwmon_temp_crit:
2563 return (ops->get_temp_critical ? 0444 : 0) |
2564 (ops->set_temp_critical ? 0200 : 0);
2570 static u32 marvell_hwmon_chip_config[] = {
2571 HWMON_C_REGISTER_TZ,
2575 static const struct hwmon_channel_info marvell_hwmon_chip = {
2577 .config = marvell_hwmon_chip_config,
2580 /* we can define HWMON_T_CRIT and HWMON_T_MAX_ALARM even though these are not
2581 * defined for all PHYs, because the hwmon code checks whether the attributes
2582 * exists via the .is_visible method
2584 static u32 marvell_hwmon_temp_config[] = {
2585 HWMON_T_INPUT | HWMON_T_CRIT | HWMON_T_MAX_ALARM,
2589 static const struct hwmon_channel_info marvell_hwmon_temp = {
2591 .config = marvell_hwmon_temp_config,
2594 static const struct hwmon_channel_info *marvell_hwmon_info[] = {
2595 &marvell_hwmon_chip,
2596 &marvell_hwmon_temp,
2600 static const struct hwmon_ops marvell_hwmon_hwmon_ops = {
2601 .is_visible = marvell_hwmon_is_visible,
2602 .read = marvell_hwmon_read,
2603 .write = marvell_hwmon_write,
2606 static const struct hwmon_chip_info marvell_hwmon_chip_info = {
2607 .ops = &marvell_hwmon_hwmon_ops,
2608 .info = marvell_hwmon_info,
2611 static int marvell_hwmon_name(struct phy_device *phydev)
2613 struct marvell_priv *priv = phydev->priv;
2614 struct device *dev = &phydev->mdio.dev;
2615 const char *devname = dev_name(dev);
2616 size_t len = strlen(devname);
2619 priv->hwmon_name = devm_kzalloc(dev, len, GFP_KERNEL);
2620 if (!priv->hwmon_name)
2623 for (i = j = 0; i < len && devname[i]; i++) {
2624 if (isalnum(devname[i]))
2625 priv->hwmon_name[j++] = devname[i];
2631 static int marvell_hwmon_probe(struct phy_device *phydev)
2633 const struct marvell_hwmon_ops *ops = to_marvell_hwmon_ops(phydev);
2634 struct marvell_priv *priv = phydev->priv;
2635 struct device *dev = &phydev->mdio.dev;
2641 err = marvell_hwmon_name(phydev);
2645 priv->hwmon_dev = devm_hwmon_device_register_with_info(
2646 dev, priv->hwmon_name, phydev, &marvell_hwmon_chip_info, NULL);
2647 if (IS_ERR(priv->hwmon_dev))
2648 return PTR_ERR(priv->hwmon_dev);
2651 err = ops->config(phydev);
2656 static const struct marvell_hwmon_ops m88e1121_hwmon_ops = {
2657 .get_temp = m88e1121_get_temp,
2660 static const struct marvell_hwmon_ops m88e1510_hwmon_ops = {
2661 .get_temp = m88e1510_get_temp,
2662 .get_temp_critical = m88e1510_get_temp_critical,
2663 .set_temp_critical = m88e1510_set_temp_critical,
2664 .get_temp_alarm = m88e1510_get_temp_alarm,
2667 static const struct marvell_hwmon_ops m88e6390_hwmon_ops = {
2668 .get_temp = m88e6390_get_temp,
2671 static const struct marvell_hwmon_ops m88e6393_hwmon_ops = {
2672 .config = m88e6393_hwmon_config,
2673 .get_temp = m88e6393_get_temp,
2674 .get_temp_critical = m88e6393_get_temp_critical,
2675 .set_temp_critical = m88e6393_set_temp_critical,
2676 .get_temp_alarm = m88e1510_get_temp_alarm,
2679 #define DEF_MARVELL_HWMON_OPS(s) (&(s))
2683 #define DEF_MARVELL_HWMON_OPS(s) NULL
2685 static int marvell_hwmon_probe(struct phy_device *phydev)
2691 static int marvell_probe(struct phy_device *phydev)
2693 struct marvell_priv *priv;
2695 priv = devm_kzalloc(&phydev->mdio.dev, sizeof(*priv), GFP_KERNEL);
2699 phydev->priv = priv;
2701 return marvell_hwmon_probe(phydev);
2704 static struct phy_driver marvell_drivers[] = {
2706 .phy_id = MARVELL_PHY_ID_88E1101,
2707 .phy_id_mask = MARVELL_PHY_ID_MASK,
2708 .name = "Marvell 88E1101",
2709 /* PHY_GBIT_FEATURES */
2710 .probe = marvell_probe,
2711 .config_init = marvell_config_init,
2712 .config_aneg = m88e1101_config_aneg,
2713 .config_intr = marvell_config_intr,
2714 .handle_interrupt = marvell_handle_interrupt,
2715 .resume = genphy_resume,
2716 .suspend = genphy_suspend,
2717 .read_page = marvell_read_page,
2718 .write_page = marvell_write_page,
2719 .get_sset_count = marvell_get_sset_count,
2720 .get_strings = marvell_get_strings,
2721 .get_stats = marvell_get_stats,
2724 .phy_id = MARVELL_PHY_ID_88E1112,
2725 .phy_id_mask = MARVELL_PHY_ID_MASK,
2726 .name = "Marvell 88E1112",
2727 /* PHY_GBIT_FEATURES */
2728 .probe = marvell_probe,
2729 .config_init = m88e1112_config_init,
2730 .config_aneg = marvell_config_aneg,
2731 .config_intr = marvell_config_intr,
2732 .handle_interrupt = marvell_handle_interrupt,
2733 .resume = genphy_resume,
2734 .suspend = genphy_suspend,
2735 .read_page = marvell_read_page,
2736 .write_page = marvell_write_page,
2737 .get_sset_count = marvell_get_sset_count,
2738 .get_strings = marvell_get_strings,
2739 .get_stats = marvell_get_stats,
2740 .get_tunable = m88e1011_get_tunable,
2741 .set_tunable = m88e1011_set_tunable,
2744 .phy_id = MARVELL_PHY_ID_88E1111,
2745 .phy_id_mask = MARVELL_PHY_ID_MASK,
2746 .name = "Marvell 88E1111",
2747 /* PHY_GBIT_FEATURES */
2748 .probe = marvell_probe,
2749 .config_init = m88e1111gbe_config_init,
2750 .config_aneg = m88e1111_config_aneg,
2751 .read_status = marvell_read_status,
2752 .config_intr = marvell_config_intr,
2753 .handle_interrupt = marvell_handle_interrupt,
2754 .resume = genphy_resume,
2755 .suspend = genphy_suspend,
2756 .read_page = marvell_read_page,
2757 .write_page = marvell_write_page,
2758 .get_sset_count = marvell_get_sset_count,
2759 .get_strings = marvell_get_strings,
2760 .get_stats = marvell_get_stats,
2761 .get_tunable = m88e1111_get_tunable,
2762 .set_tunable = m88e1111_set_tunable,
2765 .phy_id = MARVELL_PHY_ID_88E1111_FINISAR,
2766 .phy_id_mask = MARVELL_PHY_ID_MASK,
2767 .name = "Marvell 88E1111 (Finisar)",
2768 /* PHY_GBIT_FEATURES */
2769 .probe = marvell_probe,
2770 .config_init = m88e1111gbe_config_init,
2771 .config_aneg = m88e1111_config_aneg,
2772 .read_status = marvell_read_status,
2773 .config_intr = marvell_config_intr,
2774 .handle_interrupt = marvell_handle_interrupt,
2775 .resume = genphy_resume,
2776 .suspend = genphy_suspend,
2777 .read_page = marvell_read_page,
2778 .write_page = marvell_write_page,
2779 .get_sset_count = marvell_get_sset_count,
2780 .get_strings = marvell_get_strings,
2781 .get_stats = marvell_get_stats,
2782 .get_tunable = m88e1111_get_tunable,
2783 .set_tunable = m88e1111_set_tunable,
2786 .phy_id = MARVELL_PHY_ID_88E1118,
2787 .phy_id_mask = MARVELL_PHY_ID_MASK,
2788 .name = "Marvell 88E1118",
2789 /* PHY_GBIT_FEATURES */
2790 .probe = marvell_probe,
2791 .config_init = m88e1118_config_init,
2792 .config_aneg = m88e1118_config_aneg,
2793 .config_intr = marvell_config_intr,
2794 .handle_interrupt = marvell_handle_interrupt,
2795 .resume = genphy_resume,
2796 .suspend = genphy_suspend,
2797 .read_page = marvell_read_page,
2798 .write_page = marvell_write_page,
2799 .get_sset_count = marvell_get_sset_count,
2800 .get_strings = marvell_get_strings,
2801 .get_stats = marvell_get_stats,
2804 .phy_id = MARVELL_PHY_ID_88E1121R,
2805 .phy_id_mask = MARVELL_PHY_ID_MASK,
2806 .name = "Marvell 88E1121R",
2807 .driver_data = DEF_MARVELL_HWMON_OPS(m88e1121_hwmon_ops),
2808 /* PHY_GBIT_FEATURES */
2809 .probe = marvell_probe,
2810 .config_init = marvell_1011gbe_config_init,
2811 .config_aneg = m88e1121_config_aneg,
2812 .read_status = marvell_read_status,
2813 .config_intr = marvell_config_intr,
2814 .handle_interrupt = marvell_handle_interrupt,
2815 .resume = genphy_resume,
2816 .suspend = genphy_suspend,
2817 .read_page = marvell_read_page,
2818 .write_page = marvell_write_page,
2819 .get_sset_count = marvell_get_sset_count,
2820 .get_strings = marvell_get_strings,
2821 .get_stats = marvell_get_stats,
2822 .get_tunable = m88e1011_get_tunable,
2823 .set_tunable = m88e1011_set_tunable,
2826 .phy_id = MARVELL_PHY_ID_88E1318S,
2827 .phy_id_mask = MARVELL_PHY_ID_MASK,
2828 .name = "Marvell 88E1318S",
2829 /* PHY_GBIT_FEATURES */
2830 .probe = marvell_probe,
2831 .config_init = m88e1318_config_init,
2832 .config_aneg = m88e1318_config_aneg,
2833 .read_status = marvell_read_status,
2834 .config_intr = marvell_config_intr,
2835 .handle_interrupt = marvell_handle_interrupt,
2836 .get_wol = m88e1318_get_wol,
2837 .set_wol = m88e1318_set_wol,
2838 .resume = genphy_resume,
2839 .suspend = genphy_suspend,
2840 .read_page = marvell_read_page,
2841 .write_page = marvell_write_page,
2842 .get_sset_count = marvell_get_sset_count,
2843 .get_strings = marvell_get_strings,
2844 .get_stats = marvell_get_stats,
2847 .phy_id = MARVELL_PHY_ID_88E1145,
2848 .phy_id_mask = MARVELL_PHY_ID_MASK,
2849 .name = "Marvell 88E1145",
2850 /* PHY_GBIT_FEATURES */
2851 .probe = marvell_probe,
2852 .config_init = m88e1145_config_init,
2853 .config_aneg = m88e1101_config_aneg,
2854 .config_intr = marvell_config_intr,
2855 .handle_interrupt = marvell_handle_interrupt,
2856 .resume = genphy_resume,
2857 .suspend = genphy_suspend,
2858 .read_page = marvell_read_page,
2859 .write_page = marvell_write_page,
2860 .get_sset_count = marvell_get_sset_count,
2861 .get_strings = marvell_get_strings,
2862 .get_stats = marvell_get_stats,
2863 .get_tunable = m88e1111_get_tunable,
2864 .set_tunable = m88e1111_set_tunable,
2867 .phy_id = MARVELL_PHY_ID_88E1149R,
2868 .phy_id_mask = MARVELL_PHY_ID_MASK,
2869 .name = "Marvell 88E1149R",
2870 /* PHY_GBIT_FEATURES */
2871 .probe = marvell_probe,
2872 .config_init = m88e1149_config_init,
2873 .config_aneg = m88e1118_config_aneg,
2874 .config_intr = marvell_config_intr,
2875 .handle_interrupt = marvell_handle_interrupt,
2876 .resume = genphy_resume,
2877 .suspend = genphy_suspend,
2878 .read_page = marvell_read_page,
2879 .write_page = marvell_write_page,
2880 .get_sset_count = marvell_get_sset_count,
2881 .get_strings = marvell_get_strings,
2882 .get_stats = marvell_get_stats,
2885 .phy_id = MARVELL_PHY_ID_88E1240,
2886 .phy_id_mask = MARVELL_PHY_ID_MASK,
2887 .name = "Marvell 88E1240",
2888 /* PHY_GBIT_FEATURES */
2889 .probe = marvell_probe,
2890 .config_init = m88e1112_config_init,
2891 .config_aneg = marvell_config_aneg,
2892 .config_intr = marvell_config_intr,
2893 .handle_interrupt = marvell_handle_interrupt,
2894 .resume = genphy_resume,
2895 .suspend = genphy_suspend,
2896 .read_page = marvell_read_page,
2897 .write_page = marvell_write_page,
2898 .get_sset_count = marvell_get_sset_count,
2899 .get_strings = marvell_get_strings,
2900 .get_stats = marvell_get_stats,
2901 .get_tunable = m88e1011_get_tunable,
2902 .set_tunable = m88e1011_set_tunable,
2905 .phy_id = MARVELL_PHY_ID_88E1116R,
2906 .phy_id_mask = MARVELL_PHY_ID_MASK,
2907 .name = "Marvell 88E1116R",
2908 /* PHY_GBIT_FEATURES */
2909 .probe = marvell_probe,
2910 .config_init = m88e1116r_config_init,
2911 .config_intr = marvell_config_intr,
2912 .handle_interrupt = marvell_handle_interrupt,
2913 .resume = genphy_resume,
2914 .suspend = genphy_suspend,
2915 .read_page = marvell_read_page,
2916 .write_page = marvell_write_page,
2917 .get_sset_count = marvell_get_sset_count,
2918 .get_strings = marvell_get_strings,
2919 .get_stats = marvell_get_stats,
2920 .get_tunable = m88e1011_get_tunable,
2921 .set_tunable = m88e1011_set_tunable,
2924 .phy_id = MARVELL_PHY_ID_88E1510,
2925 .phy_id_mask = MARVELL_PHY_ID_MASK,
2926 .name = "Marvell 88E1510",
2927 .driver_data = DEF_MARVELL_HWMON_OPS(m88e1510_hwmon_ops),
2928 .features = PHY_GBIT_FIBRE_FEATURES,
2929 .flags = PHY_POLL_CABLE_TEST,
2930 .probe = marvell_probe,
2931 .config_init = m88e1510_config_init,
2932 .config_aneg = m88e1510_config_aneg,
2933 .read_status = marvell_read_status,
2934 .config_intr = marvell_config_intr,
2935 .handle_interrupt = marvell_handle_interrupt,
2936 .get_wol = m88e1318_get_wol,
2937 .set_wol = m88e1318_set_wol,
2938 .resume = marvell_resume,
2939 .suspend = marvell_suspend,
2940 .read_page = marvell_read_page,
2941 .write_page = marvell_write_page,
2942 .get_sset_count = marvell_get_sset_count,
2943 .get_strings = marvell_get_strings,
2944 .get_stats = marvell_get_stats,
2945 .set_loopback = genphy_loopback,
2946 .get_tunable = m88e1011_get_tunable,
2947 .set_tunable = m88e1011_set_tunable,
2948 .cable_test_start = marvell_vct7_cable_test_start,
2949 .cable_test_tdr_start = marvell_vct5_cable_test_tdr_start,
2950 .cable_test_get_status = marvell_vct7_cable_test_get_status,
2953 .phy_id = MARVELL_PHY_ID_88E1540,
2954 .phy_id_mask = MARVELL_PHY_ID_MASK,
2955 .name = "Marvell 88E1540",
2956 .driver_data = DEF_MARVELL_HWMON_OPS(m88e1510_hwmon_ops),
2957 /* PHY_GBIT_FEATURES */
2958 .flags = PHY_POLL_CABLE_TEST,
2959 .probe = marvell_probe,
2960 .config_init = marvell_1011gbe_config_init,
2961 .config_aneg = m88e1510_config_aneg,
2962 .read_status = marvell_read_status,
2963 .config_intr = marvell_config_intr,
2964 .handle_interrupt = marvell_handle_interrupt,
2965 .resume = genphy_resume,
2966 .suspend = genphy_suspend,
2967 .read_page = marvell_read_page,
2968 .write_page = marvell_write_page,
2969 .get_sset_count = marvell_get_sset_count,
2970 .get_strings = marvell_get_strings,
2971 .get_stats = marvell_get_stats,
2972 .get_tunable = m88e1540_get_tunable,
2973 .set_tunable = m88e1540_set_tunable,
2974 .cable_test_start = marvell_vct7_cable_test_start,
2975 .cable_test_tdr_start = marvell_vct5_cable_test_tdr_start,
2976 .cable_test_get_status = marvell_vct7_cable_test_get_status,
2979 .phy_id = MARVELL_PHY_ID_88E1545,
2980 .phy_id_mask = MARVELL_PHY_ID_MASK,
2981 .name = "Marvell 88E1545",
2982 .driver_data = DEF_MARVELL_HWMON_OPS(m88e1510_hwmon_ops),
2983 .probe = marvell_probe,
2984 /* PHY_GBIT_FEATURES */
2985 .flags = PHY_POLL_CABLE_TEST,
2986 .config_init = marvell_1011gbe_config_init,
2987 .config_aneg = m88e1510_config_aneg,
2988 .read_status = marvell_read_status,
2989 .config_intr = marvell_config_intr,
2990 .handle_interrupt = marvell_handle_interrupt,
2991 .resume = genphy_resume,
2992 .suspend = genphy_suspend,
2993 .read_page = marvell_read_page,
2994 .write_page = marvell_write_page,
2995 .get_sset_count = marvell_get_sset_count,
2996 .get_strings = marvell_get_strings,
2997 .get_stats = marvell_get_stats,
2998 .get_tunable = m88e1540_get_tunable,
2999 .set_tunable = m88e1540_set_tunable,
3000 .cable_test_start = marvell_vct7_cable_test_start,
3001 .cable_test_tdr_start = marvell_vct5_cable_test_tdr_start,
3002 .cable_test_get_status = marvell_vct7_cable_test_get_status,
3005 .phy_id = MARVELL_PHY_ID_88E3016,
3006 .phy_id_mask = MARVELL_PHY_ID_MASK,
3007 .name = "Marvell 88E3016",
3008 /* PHY_BASIC_FEATURES */
3009 .probe = marvell_probe,
3010 .config_init = m88e3016_config_init,
3011 .aneg_done = marvell_aneg_done,
3012 .read_status = marvell_read_status,
3013 .config_intr = marvell_config_intr,
3014 .handle_interrupt = marvell_handle_interrupt,
3015 .resume = genphy_resume,
3016 .suspend = genphy_suspend,
3017 .read_page = marvell_read_page,
3018 .write_page = marvell_write_page,
3019 .get_sset_count = marvell_get_sset_count,
3020 .get_strings = marvell_get_strings,
3021 .get_stats = marvell_get_stats,
3024 .phy_id = MARVELL_PHY_ID_88E6341_FAMILY,
3025 .phy_id_mask = MARVELL_PHY_ID_MASK,
3026 .name = "Marvell 88E6341 Family",
3027 .driver_data = DEF_MARVELL_HWMON_OPS(m88e1510_hwmon_ops),
3028 /* PHY_GBIT_FEATURES */
3029 .flags = PHY_POLL_CABLE_TEST,
3030 .probe = marvell_probe,
3031 .config_init = marvell_1011gbe_config_init,
3032 .config_aneg = m88e6390_config_aneg,
3033 .read_status = marvell_read_status,
3034 .config_intr = marvell_config_intr,
3035 .handle_interrupt = marvell_handle_interrupt,
3036 .resume = genphy_resume,
3037 .suspend = genphy_suspend,
3038 .read_page = marvell_read_page,
3039 .write_page = marvell_write_page,
3040 .get_sset_count = marvell_get_sset_count,
3041 .get_strings = marvell_get_strings,
3042 .get_stats = marvell_get_stats,
3043 .get_tunable = m88e1540_get_tunable,
3044 .set_tunable = m88e1540_set_tunable,
3045 .cable_test_start = marvell_vct7_cable_test_start,
3046 .cable_test_tdr_start = marvell_vct5_cable_test_tdr_start,
3047 .cable_test_get_status = marvell_vct7_cable_test_get_status,
3050 .phy_id = MARVELL_PHY_ID_88E6390_FAMILY,
3051 .phy_id_mask = MARVELL_PHY_ID_MASK,
3052 .name = "Marvell 88E6390 Family",
3053 .driver_data = DEF_MARVELL_HWMON_OPS(m88e6390_hwmon_ops),
3054 /* PHY_GBIT_FEATURES */
3055 .flags = PHY_POLL_CABLE_TEST,
3056 .probe = marvell_probe,
3057 .config_init = marvell_1011gbe_config_init,
3058 .config_aneg = m88e6390_config_aneg,
3059 .read_status = marvell_read_status,
3060 .config_intr = marvell_config_intr,
3061 .handle_interrupt = marvell_handle_interrupt,
3062 .resume = genphy_resume,
3063 .suspend = genphy_suspend,
3064 .read_page = marvell_read_page,
3065 .write_page = marvell_write_page,
3066 .get_sset_count = marvell_get_sset_count,
3067 .get_strings = marvell_get_strings,
3068 .get_stats = marvell_get_stats,
3069 .get_tunable = m88e1540_get_tunable,
3070 .set_tunable = m88e1540_set_tunable,
3071 .cable_test_start = marvell_vct7_cable_test_start,
3072 .cable_test_tdr_start = marvell_vct5_cable_test_tdr_start,
3073 .cable_test_get_status = marvell_vct7_cable_test_get_status,
3076 .phy_id = MARVELL_PHY_ID_88E6393_FAMILY,
3077 .phy_id_mask = MARVELL_PHY_ID_MASK,
3078 .name = "Marvell 88E6393 Family",
3079 .driver_data = DEF_MARVELL_HWMON_OPS(m88e6393_hwmon_ops),
3080 /* PHY_GBIT_FEATURES */
3081 .flags = PHY_POLL_CABLE_TEST,
3082 .probe = marvell_probe,
3083 .config_init = marvell_1011gbe_config_init,
3084 .config_aneg = m88e1510_config_aneg,
3085 .read_status = marvell_read_status,
3086 .config_intr = marvell_config_intr,
3087 .handle_interrupt = marvell_handle_interrupt,
3088 .resume = genphy_resume,
3089 .suspend = genphy_suspend,
3090 .read_page = marvell_read_page,
3091 .write_page = marvell_write_page,
3092 .get_sset_count = marvell_get_sset_count,
3093 .get_strings = marvell_get_strings,
3094 .get_stats = marvell_get_stats,
3095 .get_tunable = m88e1540_get_tunable,
3096 .set_tunable = m88e1540_set_tunable,
3097 .cable_test_start = marvell_vct7_cable_test_start,
3098 .cable_test_tdr_start = marvell_vct5_cable_test_tdr_start,
3099 .cable_test_get_status = marvell_vct7_cable_test_get_status,
3102 .phy_id = MARVELL_PHY_ID_88E1340S,
3103 .phy_id_mask = MARVELL_PHY_ID_MASK,
3104 .name = "Marvell 88E1340S",
3105 .driver_data = DEF_MARVELL_HWMON_OPS(m88e1510_hwmon_ops),
3106 .probe = marvell_probe,
3107 /* PHY_GBIT_FEATURES */
3108 .config_init = marvell_1011gbe_config_init,
3109 .config_aneg = m88e1510_config_aneg,
3110 .read_status = marvell_read_status,
3111 .config_intr = marvell_config_intr,
3112 .handle_interrupt = marvell_handle_interrupt,
3113 .resume = genphy_resume,
3114 .suspend = genphy_suspend,
3115 .read_page = marvell_read_page,
3116 .write_page = marvell_write_page,
3117 .get_sset_count = marvell_get_sset_count,
3118 .get_strings = marvell_get_strings,
3119 .get_stats = marvell_get_stats,
3120 .get_tunable = m88e1540_get_tunable,
3121 .set_tunable = m88e1540_set_tunable,
3124 .phy_id = MARVELL_PHY_ID_88E1548P,
3125 .phy_id_mask = MARVELL_PHY_ID_MASK,
3126 .name = "Marvell 88E1548P",
3127 .driver_data = DEF_MARVELL_HWMON_OPS(m88e1510_hwmon_ops),
3128 .probe = marvell_probe,
3129 .features = PHY_GBIT_FIBRE_FEATURES,
3130 .config_init = marvell_1011gbe_config_init,
3131 .config_aneg = m88e1510_config_aneg,
3132 .read_status = marvell_read_status,
3133 .config_intr = marvell_config_intr,
3134 .handle_interrupt = marvell_handle_interrupt,
3135 .resume = genphy_resume,
3136 .suspend = genphy_suspend,
3137 .read_page = marvell_read_page,
3138 .write_page = marvell_write_page,
3139 .get_sset_count = marvell_get_sset_count,
3140 .get_strings = marvell_get_strings,
3141 .get_stats = marvell_get_stats,
3142 .get_tunable = m88e1540_get_tunable,
3143 .set_tunable = m88e1540_set_tunable,
3147 module_phy_driver(marvell_drivers);
3149 static struct mdio_device_id __maybe_unused marvell_tbl[] = {
3150 { MARVELL_PHY_ID_88E1101, MARVELL_PHY_ID_MASK },
3151 { MARVELL_PHY_ID_88E1112, MARVELL_PHY_ID_MASK },
3152 { MARVELL_PHY_ID_88E1111, MARVELL_PHY_ID_MASK },
3153 { MARVELL_PHY_ID_88E1111_FINISAR, MARVELL_PHY_ID_MASK },
3154 { MARVELL_PHY_ID_88E1118, MARVELL_PHY_ID_MASK },
3155 { MARVELL_PHY_ID_88E1121R, MARVELL_PHY_ID_MASK },
3156 { MARVELL_PHY_ID_88E1145, MARVELL_PHY_ID_MASK },
3157 { MARVELL_PHY_ID_88E1149R, MARVELL_PHY_ID_MASK },
3158 { MARVELL_PHY_ID_88E1240, MARVELL_PHY_ID_MASK },
3159 { MARVELL_PHY_ID_88E1318S, MARVELL_PHY_ID_MASK },
3160 { MARVELL_PHY_ID_88E1116R, MARVELL_PHY_ID_MASK },
3161 { MARVELL_PHY_ID_88E1510, MARVELL_PHY_ID_MASK },
3162 { MARVELL_PHY_ID_88E1540, MARVELL_PHY_ID_MASK },
3163 { MARVELL_PHY_ID_88E1545, MARVELL_PHY_ID_MASK },
3164 { MARVELL_PHY_ID_88E3016, MARVELL_PHY_ID_MASK },
3165 { MARVELL_PHY_ID_88E6341_FAMILY, MARVELL_PHY_ID_MASK },
3166 { MARVELL_PHY_ID_88E6390_FAMILY, MARVELL_PHY_ID_MASK },
3167 { MARVELL_PHY_ID_88E6393_FAMILY, MARVELL_PHY_ID_MASK },
3168 { MARVELL_PHY_ID_88E1340S, MARVELL_PHY_ID_MASK },
3169 { MARVELL_PHY_ID_88E1548P, MARVELL_PHY_ID_MASK },
3173 MODULE_DEVICE_TABLE(mdio, marvell_tbl);