drivers/gpu/drm/imx/imx-ldb.c

   1 // SPDX-License-Identifier: GPL-2.0+
   2 /*
   3  * i.MX drm driver - LVDS display bridge
   4  *
   5  * Copyright (C) 2012 Sascha Hauer, Pengutronix
   6  */
   7
   8 #include <linux/clk.h>
   9 #include <linux/component.h>
  10 #include <linux/mfd/syscon.h>
  11 #include <linux/mfd/syscon/imx6q-iomuxc-gpr.h>
  12 #include <linux/module.h>
  13 #include <linux/of_device.h>
  14 #include <linux/of_graph.h>
  15 #include <linux/regmap.h>
  16 #include <linux/videodev2.h>
  17
  18 #include <video/of_display_timing.h>
  19 #include <video/of_videomode.h>
  20
  21 #include <drm/drm_atomic.h>
  22 #include <drm/drm_atomic_helper.h>
  23 #include <drm/drm_bridge.h>
  24 #include <drm/drm_fb_helper.h>
  25 #include <drm/drm_managed.h>
  26 #include <drm/drm_of.h>
  27 #include <drm/drm_panel.h>
  28 #include <drm/drm_print.h>
  29 #include <drm/drm_probe_helper.h>
  30 #include <drm/drm_simple_kms_helper.h>
  31
  32 #include "imx-drm.h"
  33
  34 #define DRIVER_NAME "imx-ldb"
  35
  36 #define LDB_CH0_MODE_EN_TO_DI0          (1 << 0)
  37 #define LDB_CH0_MODE_EN_TO_DI1          (3 << 0)
  38 #define LDB_CH0_MODE_EN_MASK            (3 << 0)
  39 #define LDB_CH1_MODE_EN_TO_DI0          (1 << 2)
  40 #define LDB_CH1_MODE_EN_TO_DI1          (3 << 2)
  41 #define LDB_CH1_MODE_EN_MASK            (3 << 2)
  42 #define LDB_SPLIT_MODE_EN               (1 << 4)
  43 #define LDB_DATA_WIDTH_CH0_24           (1 << 5)
  44 #define LDB_BIT_MAP_CH0_JEIDA           (1 << 6)
  45 #define LDB_DATA_WIDTH_CH1_24           (1 << 7)
  46 #define LDB_BIT_MAP_CH1_JEIDA           (1 << 8)
  47 #define LDB_DI0_VS_POL_ACT_LOW          (1 << 9)
  48 #define LDB_DI1_VS_POL_ACT_LOW          (1 << 10)
  49 #define LDB_BGREF_RMODE_INT             (1 << 15)
  50
  51 struct imx_ldb_channel;
  52
  53 struct imx_ldb_encoder {
  54         struct drm_connector connector;
  55         struct drm_encoder encoder;
  56         struct imx_ldb_channel *channel;
  57 };
  58
  59 struct imx_ldb;
  60
  61 struct imx_ldb_channel {
  62         struct imx_ldb *ldb;
  63
  64         /* Defines what is connected to the ldb, only one at a time */
  65         struct drm_panel *panel;
  66         struct drm_bridge *bridge;
  67
  68         struct device_node *child;
  69         struct i2c_adapter *ddc;
  70         int chno;
  71         void *edid;
  72         struct drm_display_mode mode;
  73         int mode_valid;
  74         u32 bus_format;
  75         u32 bus_flags;
  76 };
  77
  78 static inline struct imx_ldb_channel *con_to_imx_ldb_ch(struct drm_connector *c)
  79 {
  80         return container_of(c, struct imx_ldb_encoder, connector)->channel;
  81 }
  82
  83 static inline struct imx_ldb_channel *enc_to_imx_ldb_ch(struct drm_encoder *e)
  84 {
  85         return container_of(e, struct imx_ldb_encoder, encoder)->channel;
  86 }
  87
  88 struct bus_mux {
  89         int reg;
  90         int shift;
  91         int mask;
  92 };
  93
  94 struct imx_ldb {
  95         struct regmap *regmap;
  96         struct device *dev;
  97         struct imx_ldb_channel channel[2];
  98         struct clk *clk[2]; /* our own clock */
  99         struct clk *clk_sel[4]; /* parent of display clock */
 100         struct clk *clk_parent[4]; /* original parent of clk_sel */
 101         struct clk *clk_pll[2]; /* upstream clock we can adjust */
 102         u32 ldb_ctrl;
 103         const struct bus_mux *lvds_mux;
 104 };
 105
 106 static void imx_ldb_ch_set_bus_format(struct imx_ldb_channel *imx_ldb_ch,
 107                                       u32 bus_format)
 108 {
 109         struct imx_ldb *ldb = imx_ldb_ch->ldb;
 110         int dual = ldb->ldb_ctrl & LDB_SPLIT_MODE_EN;
 111
 112         switch (bus_format) {
 113         case MEDIA_BUS_FMT_RGB666_1X7X3_SPWG:
 114                 break;
 115         case MEDIA_BUS_FMT_RGB888_1X7X4_SPWG:
 116                 if (imx_ldb_ch->chno == 0 || dual)
 117                         ldb->ldb_ctrl |= LDB_DATA_WIDTH_CH0_24;
 118                 if (imx_ldb_ch->chno == 1 || dual)
 119                         ldb->ldb_ctrl |= LDB_DATA_WIDTH_CH1_24;
 120                 break;
 121         case MEDIA_BUS_FMT_RGB888_1X7X4_JEIDA:
 122                 if (imx_ldb_ch->chno == 0 || dual)
 123                         ldb->ldb_ctrl |= LDB_DATA_WIDTH_CH0_24 |
 124                                          LDB_BIT_MAP_CH0_JEIDA;
 125                 if (imx_ldb_ch->chno == 1 || dual)
 126                         ldb->ldb_ctrl |= LDB_DATA_WIDTH_CH1_24 |
 127                                          LDB_BIT_MAP_CH1_JEIDA;
 128                 break;
 129         }
 130 }
 131
 132 static int imx_ldb_connector_get_modes(struct drm_connector *connector)
 133 {
 134         struct imx_ldb_channel *imx_ldb_ch = con_to_imx_ldb_ch(connector);
 135         int num_modes;
 136
 137         num_modes = drm_panel_get_modes(imx_ldb_ch->panel, connector);
 138         if (num_modes > 0)
 139                 return num_modes;
 140
 141         if (!imx_ldb_ch->edid && imx_ldb_ch->ddc)
 142                 imx_ldb_ch->edid = drm_get_edid(connector, imx_ldb_ch->ddc);
 143
 144         if (imx_ldb_ch->edid) {
 145                 drm_connector_update_edid_property(connector,
 146                                                         imx_ldb_ch->edid);
 147                 num_modes = drm_add_edid_modes(connector, imx_ldb_ch->edid);
 148         }
 149
 150         if (imx_ldb_ch->mode_valid) {
 151                 struct drm_display_mode *mode;
 152
 153                 mode = drm_mode_duplicate(connector->dev, &imx_ldb_ch->mode);
 154                 if (!mode)
 155                         return -EINVAL;
 156                 mode->type |= DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED;
 157                 drm_mode_probed_add(connector, mode);
 158                 num_modes++;
 159         }
 160
 161         return num_modes;
 162 }
 163
 164 static void imx_ldb_set_clock(struct imx_ldb *ldb, int mux, int chno,
 165                 unsigned long serial_clk, unsigned long di_clk)
 166 {
 167         int ret;
 168
 169         dev_dbg(ldb->dev, "%s: now: %ld want: %ld\n", __func__,
 170                         clk_get_rate(ldb->clk_pll[chno]), serial_clk);
 171         clk_set_rate(ldb->clk_pll[chno], serial_clk);
 172
 173         dev_dbg(ldb->dev, "%s after: %ld\n", __func__,
 174                         clk_get_rate(ldb->clk_pll[chno]));
 175
 176         dev_dbg(ldb->dev, "%s: now: %ld want: %ld\n", __func__,
 177                         clk_get_rate(ldb->clk[chno]),
 178                         (long int)di_clk);
 179         clk_set_rate(ldb->clk[chno], di_clk);
 180
 181         dev_dbg(ldb->dev, "%s after: %ld\n", __func__,
 182                         clk_get_rate(ldb->clk[chno]));
 183
 184         /* set display clock mux to LDB input clock */
 185         ret = clk_set_parent(ldb->clk_sel[mux], ldb->clk[chno]);
 186         if (ret)
 187                 dev_err(ldb->dev,
 188                         "unable to set di%d parent clock to ldb_di%d\n", mux,
 189                         chno);
 190 }
 191
 192 static void imx_ldb_encoder_enable(struct drm_encoder *encoder)
 193 {
 194         struct imx_ldb_channel *imx_ldb_ch = enc_to_imx_ldb_ch(encoder);
 195         struct imx_ldb *ldb = imx_ldb_ch->ldb;
 196         int dual = ldb->ldb_ctrl & LDB_SPLIT_MODE_EN;
 197         int mux = drm_of_encoder_active_port_id(imx_ldb_ch->child, encoder);
 198
 199         if (mux < 0 || mux >= ARRAY_SIZE(ldb->clk_sel)) {
 200                 dev_warn(ldb->dev, "%s: invalid mux %d\n", __func__, mux);
 201                 return;
 202         }
 203
 204         drm_panel_prepare(imx_ldb_ch->panel);
 205
 206         if (dual) {
 207                 clk_set_parent(ldb->clk_sel[mux], ldb->clk[0]);
 208                 clk_set_parent(ldb->clk_sel[mux], ldb->clk[1]);
 209
 210                 clk_prepare_enable(ldb->clk[0]);
 211                 clk_prepare_enable(ldb->clk[1]);
 212         } else {
 213                 clk_set_parent(ldb->clk_sel[mux], ldb->clk[imx_ldb_ch->chno]);
 214         }
 215
 216         if (imx_ldb_ch == &ldb->channel[0] || dual) {
 217                 ldb->ldb_ctrl &= ~LDB_CH0_MODE_EN_MASK;
 218                 if (mux == 0 || ldb->lvds_mux)
 219                         ldb->ldb_ctrl |= LDB_CH0_MODE_EN_TO_DI0;
 220                 else if (mux == 1)
 221                         ldb->ldb_ctrl |= LDB_CH0_MODE_EN_TO_DI1;
 222         }
 223         if (imx_ldb_ch == &ldb->channel[1] || dual) {
 224                 ldb->ldb_ctrl &= ~LDB_CH1_MODE_EN_MASK;
 225                 if (mux == 1 || ldb->lvds_mux)
 226                         ldb->ldb_ctrl |= LDB_CH1_MODE_EN_TO_DI1;
 227                 else if (mux == 0)
 228                         ldb->ldb_ctrl |= LDB_CH1_MODE_EN_TO_DI0;
 229         }
 230
 231         if (ldb->lvds_mux) {
 232                 const struct bus_mux *lvds_mux = NULL;
 233
 234                 if (imx_ldb_ch == &ldb->channel[0])
 235                         lvds_mux = &ldb->lvds_mux[0];
 236                 else if (imx_ldb_ch == &ldb->channel[1])
 237                         lvds_mux = &ldb->lvds_mux[1];
 238
 239                 regmap_update_bits(ldb->regmap, lvds_mux->reg, lvds_mux->mask,
 240                                    mux << lvds_mux->shift);
 241         }
 242
 243         regmap_write(ldb->regmap, IOMUXC_GPR2, ldb->ldb_ctrl);
 244
 245         drm_panel_enable(imx_ldb_ch->panel);
 246 }
 247
 248 static void
 249 imx_ldb_encoder_atomic_mode_set(struct drm_encoder *encoder,
 250                                 struct drm_crtc_state *crtc_state,
 251                                 struct drm_connector_state *connector_state)
 252 {
 253         struct imx_ldb_channel *imx_ldb_ch = enc_to_imx_ldb_ch(encoder);
 254         struct drm_display_mode *mode = &crtc_state->adjusted_mode;
 255         struct imx_ldb *ldb = imx_ldb_ch->ldb;
 256         int dual = ldb->ldb_ctrl & LDB_SPLIT_MODE_EN;
 257         unsigned long serial_clk;
 258         unsigned long di_clk = mode->clock * 1000;
 259         int mux = drm_of_encoder_active_port_id(imx_ldb_ch->child, encoder);
 260         u32 bus_format = imx_ldb_ch->bus_format;
 261
 262         if (mux < 0 || mux >= ARRAY_SIZE(ldb->clk_sel)) {
 263                 dev_warn(ldb->dev, "%s: invalid mux %d\n", __func__, mux);
 264                 return;
 265         }
 266
 267         if (mode->clock > 170000) {
 268                 dev_warn(ldb->dev,
 269                          "%s: mode exceeds 170 MHz pixel clock\n", __func__);
 270         }
 271         if (mode->clock > 85000 && !dual) {
 272                 dev_warn(ldb->dev,
 273                          "%s: mode exceeds 85 MHz pixel clock\n", __func__);
 274         }
 275
 276         if (!IS_ALIGNED(mode->hdisplay, 8)) {
 277                 dev_warn(ldb->dev,
 278                          "%s: hdisplay does not align to 8 byte\n", __func__);
 279         }
 280
 281         if (dual) {
 282                 serial_clk = 3500UL * mode->clock;
 283                 imx_ldb_set_clock(ldb, mux, 0, serial_clk, di_clk);
 284                 imx_ldb_set_clock(ldb, mux, 1, serial_clk, di_clk);
 285         } else {
 286                 serial_clk = 7000UL * mode->clock;
 287                 imx_ldb_set_clock(ldb, mux, imx_ldb_ch->chno, serial_clk,
 288                                   di_clk);
 289         }
 290
 291         /* FIXME - assumes straight connections DI0 --> CH0, DI1 --> CH1 */
 292         if (imx_ldb_ch == &ldb->channel[0] || dual) {
 293                 if (mode->flags & DRM_MODE_FLAG_NVSYNC)
 294                         ldb->ldb_ctrl |= LDB_DI0_VS_POL_ACT_LOW;
 295                 else if (mode->flags & DRM_MODE_FLAG_PVSYNC)
 296                         ldb->ldb_ctrl &= ~LDB_DI0_VS_POL_ACT_LOW;
 297         }
 298         if (imx_ldb_ch == &ldb->channel[1] || dual) {
 299                 if (mode->flags & DRM_MODE_FLAG_NVSYNC)
 300                         ldb->ldb_ctrl |= LDB_DI1_VS_POL_ACT_LOW;
 301                 else if (mode->flags & DRM_MODE_FLAG_PVSYNC)
 302                         ldb->ldb_ctrl &= ~LDB_DI1_VS_POL_ACT_LOW;
 303         }
 304
 305         if (!bus_format) {
 306                 struct drm_connector *connector = connector_state->connector;
 307                 struct drm_display_info *di = &connector->display_info;
 308
 309                 if (di->num_bus_formats)
 310                         bus_format = di->bus_formats[0];
 311         }
 312         imx_ldb_ch_set_bus_format(imx_ldb_ch, bus_format);
 313 }
 314
 315 static void imx_ldb_encoder_disable(struct drm_encoder *encoder)
 316 {
 317         struct imx_ldb_channel *imx_ldb_ch = enc_to_imx_ldb_ch(encoder);
 318         struct imx_ldb *ldb = imx_ldb_ch->ldb;
 319         int dual = ldb->ldb_ctrl & LDB_SPLIT_MODE_EN;
 320         int mux, ret;
 321
 322         drm_panel_disable(imx_ldb_ch->panel);
 323
 324         if (imx_ldb_ch == &ldb->channel[0] || dual)
 325                 ldb->ldb_ctrl &= ~LDB_CH0_MODE_EN_MASK;
 326         if (imx_ldb_ch == &ldb->channel[1] || dual)
 327                 ldb->ldb_ctrl &= ~LDB_CH1_MODE_EN_MASK;
 328
 329         regmap_write(ldb->regmap, IOMUXC_GPR2, ldb->ldb_ctrl);
 330
 331         if (dual) {
 332                 clk_disable_unprepare(ldb->clk[0]);
 333                 clk_disable_unprepare(ldb->clk[1]);
 334         }
 335
 336         if (ldb->lvds_mux) {
 337                 const struct bus_mux *lvds_mux = NULL;
 338
 339                 if (imx_ldb_ch == &ldb->channel[0])
 340                         lvds_mux = &ldb->lvds_mux[0];
 341                 else if (imx_ldb_ch == &ldb->channel[1])
 342                         lvds_mux = &ldb->lvds_mux[1];
 343
 344                 regmap_read(ldb->regmap, lvds_mux->reg, &mux);
 345                 mux &= lvds_mux->mask;
 346                 mux >>= lvds_mux->shift;
 347         } else {
 348                 mux = (imx_ldb_ch == &ldb->channel[0]) ? 0 : 1;
 349         }
 350
 351         /* set display clock mux back to original input clock */
 352         ret = clk_set_parent(ldb->clk_sel[mux], ldb->clk_parent[mux]);
 353         if (ret)
 354                 dev_err(ldb->dev,
 355                         "unable to set di%d parent clock to original parent\n",
 356                         mux);
 357
 358         drm_panel_unprepare(imx_ldb_ch->panel);
 359 }
 360
 361 static int imx_ldb_encoder_atomic_check(struct drm_encoder *encoder,
 362                                         struct drm_crtc_state *crtc_state,
 363                                         struct drm_connector_state *conn_state)
 364 {
 365         struct imx_crtc_state *imx_crtc_state = to_imx_crtc_state(crtc_state);
 366         struct imx_ldb_channel *imx_ldb_ch = enc_to_imx_ldb_ch(encoder);
 367         struct drm_display_info *di = &conn_state->connector->display_info;
 368         u32 bus_format = imx_ldb_ch->bus_format;
 369
 370         /* Bus format description in DT overrides connector display info. */
 371         if (!bus_format && di->num_bus_formats) {
 372                 bus_format = di->bus_formats[0];
 373                 imx_crtc_state->bus_flags = di->bus_flags;
 374         } else {
 375                 bus_format = imx_ldb_ch->bus_format;
 376                 imx_crtc_state->bus_flags = imx_ldb_ch->bus_flags;
 377         }
 378         switch (bus_format) {
 379         case MEDIA_BUS_FMT_RGB666_1X7X3_SPWG:
 380                 imx_crtc_state->bus_format = MEDIA_BUS_FMT_RGB666_1X18;
 381                 break;
 382         case MEDIA_BUS_FMT_RGB888_1X7X4_SPWG:
 383         case MEDIA_BUS_FMT_RGB888_1X7X4_JEIDA:
 384                 imx_crtc_state->bus_format = MEDIA_BUS_FMT_RGB888_1X24;
 385                 break;
 386         default:
 387                 return -EINVAL;
 388         }
 389
 390         imx_crtc_state->di_hsync_pin = 2;
 391         imx_crtc_state->di_vsync_pin = 3;
 392
 393         return 0;
 394 }
 395
 396
 397 static const struct drm_connector_funcs imx_ldb_connector_funcs = {
 398         .fill_modes = drm_helper_probe_single_connector_modes,
 399         .destroy = imx_drm_connector_destroy,
 400         .reset = drm_atomic_helper_connector_reset,
 401         .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
 402         .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
 403 };
 404
 405 static const struct drm_connector_helper_funcs imx_ldb_connector_helper_funcs = {
 406         .get_modes = imx_ldb_connector_get_modes,
 407 };
 408
 409 static const struct drm_encoder_helper_funcs imx_ldb_encoder_helper_funcs = {
 410         .atomic_mode_set = imx_ldb_encoder_atomic_mode_set,
 411         .enable = imx_ldb_encoder_enable,
 412         .disable = imx_ldb_encoder_disable,
 413         .atomic_check = imx_ldb_encoder_atomic_check,
 414 };
 415
 416 static int imx_ldb_get_clk(struct imx_ldb *ldb, int chno)
 417 {
 418         char clkname[16];
 419
 420         snprintf(clkname, sizeof(clkname), "di%d", chno);
 421         ldb->clk[chno] = devm_clk_get(ldb->dev, clkname);
 422         if (IS_ERR(ldb->clk[chno]))
 423                 return PTR_ERR(ldb->clk[chno]);
 424
 425         snprintf(clkname, sizeof(clkname), "di%d_pll", chno);
 426         ldb->clk_pll[chno] = devm_clk_get(ldb->dev, clkname);
 427
 428         return PTR_ERR_OR_ZERO(ldb->clk_pll[chno]);
 429 }
 430
 431 static int imx_ldb_register(struct drm_device *drm,
 432         struct imx_ldb_channel *imx_ldb_ch)
 433 {
 434         struct imx_ldb *ldb = imx_ldb_ch->ldb;
 435         struct imx_ldb_encoder *ldb_encoder;
 436         struct drm_connector *connector;
 437         struct drm_encoder *encoder;
 438         int ret;
 439
 440         ldb_encoder = drmm_simple_encoder_alloc(drm, struct imx_ldb_encoder,
 441                                                 encoder, DRM_MODE_ENCODER_LVDS);
 442         if (IS_ERR(ldb_encoder))
 443                 return PTR_ERR(ldb_encoder);
 444
 445         ldb_encoder->channel = imx_ldb_ch;
 446         connector = &ldb_encoder->connector;
 447         encoder = &ldb_encoder->encoder;
 448
 449         ret = imx_drm_encoder_parse_of(drm, encoder, imx_ldb_ch->child);
 450         if (ret)
 451                 return ret;
 452
 453         ret = imx_ldb_get_clk(ldb, imx_ldb_ch->chno);
 454         if (ret)
 455                 return ret;
 456
 457         if (ldb->ldb_ctrl & LDB_SPLIT_MODE_EN) {
 458                 ret = imx_ldb_get_clk(ldb, 1);
 459                 if (ret)
 460                         return ret;
 461         }
 462
 463         drm_encoder_helper_add(encoder, &imx_ldb_encoder_helper_funcs);
 464
 465         if (imx_ldb_ch->bridge) {
 466                 ret = drm_bridge_attach(encoder, imx_ldb_ch->bridge, NULL, 0);
 467                 if (ret)
 468                         return ret;
 469         } else {
 470                 /*
 471                  * We want to add the connector whenever there is no bridge
 472                  * that brings its own, not only when there is a panel. For
 473                  * historical reasons, the ldb driver can also work without
 474                  * a panel.
 475                  */
 476                 drm_connector_helper_add(connector,
 477                                          &imx_ldb_connector_helper_funcs);
 478                 drm_connector_init_with_ddc(drm, connector,
 479                                             &imx_ldb_connector_funcs,
 480                                             DRM_MODE_CONNECTOR_LVDS,
 481                                             imx_ldb_ch->ddc);
 482                 drm_connector_attach_encoder(connector, encoder);
 483         }
 484
 485         return 0;
 486 }
 487
 488 struct imx_ldb_bit_mapping {
 489         u32 bus_format;
 490         u32 datawidth;
 491         const char * const mapping;
 492 };
 493
 494 static const struct imx_ldb_bit_mapping imx_ldb_bit_mappings[] = {
 495         { MEDIA_BUS_FMT_RGB666_1X7X3_SPWG,  18, "spwg" },
 496         { MEDIA_BUS_FMT_RGB888_1X7X4_SPWG,  24, "spwg" },
 497         { MEDIA_BUS_FMT_RGB888_1X7X4_JEIDA, 24, "jeida" },
 498 };
 499
 500 static u32 of_get_bus_format(struct device *dev, struct device_node *np)
 501 {
 502         const char *bm;
 503         u32 datawidth = 0;
 504         int ret, i;
 505
 506         ret = of_property_read_string(np, "fsl,data-mapping", &bm);
 507         if (ret < 0)
 508                 return ret;
 509
 510         of_property_read_u32(np, "fsl,data-width", &datawidth);
 511
 512         for (i = 0; i < ARRAY_SIZE(imx_ldb_bit_mappings); i++) {
 513                 if (!strcasecmp(bm, imx_ldb_bit_mappings[i].mapping) &&
 514                     datawidth == imx_ldb_bit_mappings[i].datawidth)
 515                         return imx_ldb_bit_mappings[i].bus_format;
 516         }
 517
 518         dev_err(dev, "invalid data mapping: %d-bit \"%s\"\n", datawidth, bm);
 519
 520         return -ENOENT;
 521 }
 522
 523 static struct bus_mux imx6q_lvds_mux[2] = {
 524         {
 525                 .reg = IOMUXC_GPR3,
 526                 .shift = 6,
 527                 .mask = IMX6Q_GPR3_LVDS0_MUX_CTL_MASK,
 528         }, {
 529                 .reg = IOMUXC_GPR3,
 530                 .shift = 8,
 531                 .mask = IMX6Q_GPR3_LVDS1_MUX_CTL_MASK,
 532         }
 533 };
 534
 535 /*
 536  * For a device declaring compatible = "fsl,imx6q-ldb", "fsl,imx53-ldb",
 537  * of_match_device will walk through this list and take the first entry
 538  * matching any of its compatible values. Therefore, the more generic
 539  * entries (in this case fsl,imx53-ldb) need to be ordered last.
 540  */
 541 static const struct of_device_id imx_ldb_dt_ids[] = {
 542         { .compatible = "fsl,imx6q-ldb", .data = imx6q_lvds_mux, },
 543         { .compatible = "fsl,imx53-ldb", .data = NULL, },
 544         { }
 545 };
 546 MODULE_DEVICE_TABLE(of, imx_ldb_dt_ids);
 547
 548 static int imx_ldb_panel_ddc(struct device *dev,
 549                 struct imx_ldb_channel *channel, struct device_node *child)
 550 {
 551         struct device_node *ddc_node;
 552         const u8 *edidp;
 553         int ret;
 554
 555         ddc_node = of_parse_phandle(child, "ddc-i2c-bus", 0);
 556         if (ddc_node) {
 557                 channel->ddc = of_find_i2c_adapter_by_node(ddc_node);
 558                 of_node_put(ddc_node);
 559                 if (!channel->ddc) {
 560                         dev_warn(dev, "failed to get ddc i2c adapter\n");
 561                         return -EPROBE_DEFER;
 562                 }
 563         }
 564
 565         if (!channel->ddc) {
 566                 int edid_len;
 567
 568                 /* if no DDC available, fallback to hardcoded EDID */
 569                 dev_dbg(dev, "no ddc available\n");
 570
 571                 edidp = of_get_property(child, "edid", &edid_len);
 572                 if (edidp) {
 573                         channel->edid = kmemdup(edidp, edid_len, GFP_KERNEL);
 574                         if (!channel->edid)
 575                                 return -ENOMEM;
 576                 } else if (!channel->panel) {
 577                         /* fallback to display-timings node */
 578                         ret = of_get_drm_display_mode(child,
 579                                                       &channel->mode,
 580                                                       &channel->bus_flags,
 581                                                       OF_USE_NATIVE_MODE);
 582                         if (!ret)
 583                                 channel->mode_valid = 1;
 584                 }
 585         }
 586         return 0;
 587 }
 588
 589 static int imx_ldb_bind(struct device *dev, struct device *master, void *data)
 590 {
 591         struct drm_device *drm = data;
 592         struct imx_ldb *imx_ldb = dev_get_drvdata(dev);
 593         int ret;
 594         int i;
 595
 596         for (i = 0; i < 2; i++) {
 597                 struct imx_ldb_channel *channel = &imx_ldb->channel[i];
 598
 599                 if (!channel->ldb)
 600                         continue;
 601
 602                 ret = imx_ldb_register(drm, channel);
 603                 if (ret)
 604                         return ret;
 605         }
 606
 607         return 0;
 608 }
 609
 610 static const struct component_ops imx_ldb_ops = {
 611         .bind   = imx_ldb_bind,
 612 };
 613
 614 static int imx_ldb_probe(struct platform_device *pdev)
 615 {
 616         struct device *dev = &pdev->dev;
 617         struct device_node *np = dev->of_node;
 618         const struct of_device_id *of_id = of_match_device(imx_ldb_dt_ids, dev);
 619         struct device_node *child;
 620         struct imx_ldb *imx_ldb;
 621         int dual;
 622         int ret;
 623         int i;
 624
 625         imx_ldb = devm_kzalloc(dev, sizeof(*imx_ldb), GFP_KERNEL);
 626         if (!imx_ldb)
 627                 return -ENOMEM;
 628
 629         imx_ldb->regmap = syscon_regmap_lookup_by_phandle(np, "gpr");
 630         if (IS_ERR(imx_ldb->regmap)) {
 631                 dev_err(dev, "failed to get parent regmap\n");
 632                 return PTR_ERR(imx_ldb->regmap);
 633         }
 634
 635         /* disable LDB by resetting the control register to POR default */
 636         regmap_write(imx_ldb->regmap, IOMUXC_GPR2, 0);
 637
 638         imx_ldb->dev = dev;
 639
 640         if (of_id)
 641                 imx_ldb->lvds_mux = of_id->data;
 642
 643         dual = of_property_read_bool(np, "fsl,dual-channel");
 644         if (dual)
 645                 imx_ldb->ldb_ctrl |= LDB_SPLIT_MODE_EN;
 646
 647         /*
 648          * There are three different possible clock mux configurations:
 649          * i.MX53:  ipu1_di0_sel, ipu1_di1_sel
 650          * i.MX6q:  ipu1_di0_sel, ipu1_di1_sel, ipu2_di0_sel, ipu2_di1_sel
 651          * i.MX6dl: ipu1_di0_sel, ipu1_di1_sel, lcdif_sel
 652          * Map them all to di0_sel...di3_sel.
 653          */
 654         for (i = 0; i < 4; i++) {
 655                 char clkname[16];
 656
 657                 sprintf(clkname, "di%d_sel", i);
 658                 imx_ldb->clk_sel[i] = devm_clk_get(imx_ldb->dev, clkname);
 659                 if (IS_ERR(imx_ldb->clk_sel[i])) {
 660                         ret = PTR_ERR(imx_ldb->clk_sel[i]);
 661                         imx_ldb->clk_sel[i] = NULL;
 662                         break;
 663                 }
 664
 665                 imx_ldb->clk_parent[i] = clk_get_parent(imx_ldb->clk_sel[i]);
 666         }
 667         if (i == 0)
 668                 return ret;
 669
 670         for_each_child_of_node(np, child) {
 671                 struct imx_ldb_channel *channel;
 672                 int bus_format;
 673
 674                 ret = of_property_read_u32(child, "reg", &i);
 675                 if (ret || i < 0 || i > 1) {
 676                         ret = -EINVAL;
 677                         goto free_child;
 678                 }
 679
 680                 if (!of_device_is_available(child))
 681                         continue;
 682
 683                 if (dual && i > 0) {
 684                         dev_warn(dev, "dual-channel mode, ignoring second output\n");
 685                         continue;
 686                 }
 687
 688                 channel = &imx_ldb->channel[i];
 689                 channel->ldb = imx_ldb;
 690                 channel->chno = i;
 691
 692                 /*
 693                  * The output port is port@4 with an external 4-port mux or
 694                  * port@2 with the internal 2-port mux.
 695                  */
 696                 ret = drm_of_find_panel_or_bridge(child,
 697                                                   imx_ldb->lvds_mux ? 4 : 2, 0,
 698                                                   &channel->panel, &channel->bridge);
 699                 if (ret && ret != -ENODEV)
 700                         goto free_child;
 701
 702                 /* panel ddc only if there is no bridge */
 703                 if (!channel->bridge) {
 704                         ret = imx_ldb_panel_ddc(dev, channel, child);
 705                         if (ret)
 706                                 goto free_child;
 707                 }
 708
 709                 bus_format = of_get_bus_format(dev, child);
 710                 if (bus_format == -EINVAL) {
 711                         /*
 712                          * If no bus format was specified in the device tree,
 713                          * we can still get it from the connected panel later.
 714                          */
 715                         if (channel->panel && channel->panel->funcs &&
 716                             channel->panel->funcs->get_modes)
 717                                 bus_format = 0;
 718                 }
 719                 if (bus_format < 0) {
 720                         dev_err(dev, "could not determine data mapping: %d\n",
 721                                 bus_format);
 722                         ret = bus_format;
 723                         goto free_child;
 724                 }
 725                 channel->bus_format = bus_format;
 726                 channel->child = child;
 727         }
 728
 729         platform_set_drvdata(pdev, imx_ldb);
 730
 731         return component_add(&pdev->dev, &imx_ldb_ops);
 732
 733 free_child:
 734         of_node_put(child);
 735         return ret;
 736 }
 737
 738 static int imx_ldb_remove(struct platform_device *pdev)
 739 {
 740         struct imx_ldb *imx_ldb = platform_get_drvdata(pdev);
 741         int i;
 742
 743         for (i = 0; i < 2; i++) {
 744                 struct imx_ldb_channel *channel = &imx_ldb->channel[i];
 745
 746                 kfree(channel->edid);
 747                 i2c_put_adapter(channel->ddc);
 748         }
 749
 750         component_del(&pdev->dev, &imx_ldb_ops);
 751         return 0;
 752 }
 753
 754 static struct platform_driver imx_ldb_driver = {
 755         .probe          = imx_ldb_probe,
 756         .remove         = imx_ldb_remove,
 757         .driver         = {
 758                 .of_match_table = imx_ldb_dt_ids,
 759                 .name   = DRIVER_NAME,
 760         },
 761 };
 762
 763 module_platform_driver(imx_ldb_driver);
 764
 765 MODULE_DESCRIPTION("i.MX LVDS driver");
 766 MODULE_AUTHOR("Sascha Hauer, Pengutronix");
 767 MODULE_LICENSE("GPL");
 768 MODULE_ALIAS("platform:" DRIVER_NAME);