1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2015 Infineon Technologies AG
4 * Copyright (C) 2016 STMicroelectronics SAS
12 * Device driver for TCG/TCPA TPM (trusted platform module).
13 * Specifications at www.trustedcomputinggroup.org
15 * This device driver implements the TPM interface as defined in
16 * the TCG TPM Interface Spec version 1.3, revision 27 via _raw/native
19 * It is based on the original tpm_tis device driver from Leendert van
20 * Dorn and Kyleen Hall and Jarko Sakkinnen.
23 #include <linux/acpi.h>
24 #include <linux/completion.h>
25 #include <linux/init.h>
26 #include <linux/interrupt.h>
27 #include <linux/kernel.h>
28 #include <linux/module.h>
29 #include <linux/slab.h>
32 #include <linux/spi/spi.h>
33 #include <linux/tpm.h>
36 #include "tpm_tis_core.h"
37 #include "tpm_tis_spi.h"
39 #define MAX_SPI_FRAMESIZE 64
43 * TCG SPI flow control is documented in section 6.4 of the spec[1]. In short,
44 * keep trying to read from the device until MISO goes high indicating the
45 * wait state has ended.
47 * [1] https://trustedcomputinggroup.org/resource/pc-client-platform-tpm-profile-ptp-specification/
49 static int tpm_tis_spi_flow_control(struct tpm_tis_spi_phy *phy,
50 struct spi_transfer *spi_xfer)
55 if ((phy->iobuf[3] & 0x01) == 0) {
56 // handle SPI wait states
57 for (i = 0; i < TPM_RETRY; i++) {
60 spi_message_add_tail(spi_xfer, &m);
61 ret = spi_sync_locked(phy->spi_device, &m);
64 if (phy->iobuf[0] & 0x01)
76 * Half duplex controller with support for TPM wait state detection like
77 * Tegra QSPI need CMD, ADDR & DATA sent in single message to manage HW flow
78 * control. Each phase sent in different transfer for controller to idenity
81 static int tpm_tis_spi_transfer_half(struct tpm_tis_data *data, u32 addr,
82 u16 len, u8 *in, const u8 *out)
84 struct tpm_tis_spi_phy *phy = to_tpm_tis_spi_phy(data);
85 struct spi_transfer spi_xfer[3];
91 transfer_len = min_t(u16, len, MAX_SPI_FRAMESIZE);
94 phy->iobuf[0] = (in ? 0x80 : 0) | (transfer_len - 1);
96 phy->iobuf[2] = addr >> 8;
99 memset(&spi_xfer, 0, sizeof(spi_xfer));
101 spi_xfer[0].tx_buf = phy->iobuf;
103 spi_message_add_tail(&spi_xfer[0], &m);
105 spi_xfer[1].tx_buf = phy->iobuf + 1;
107 spi_message_add_tail(&spi_xfer[1], &m);
110 spi_xfer[2].tx_buf = &phy->iobuf[4];
111 spi_xfer[2].rx_buf = NULL;
112 memcpy(&phy->iobuf[4], out, transfer_len);
117 spi_xfer[2].tx_buf = NULL;
118 spi_xfer[2].rx_buf = &phy->iobuf[4];
121 spi_xfer[2].len = transfer_len;
122 spi_message_add_tail(&spi_xfer[2], &m);
124 reinit_completion(&phy->ready);
126 ret = spi_sync(phy->spi_device, &m);
131 memcpy(in, &phy->iobuf[4], transfer_len);
141 static int tpm_tis_spi_transfer_full(struct tpm_tis_data *data, u32 addr,
142 u16 len, u8 *in, const u8 *out)
144 struct tpm_tis_spi_phy *phy = to_tpm_tis_spi_phy(data);
146 struct spi_message m;
147 struct spi_transfer spi_xfer;
150 spi_bus_lock(phy->spi_device->controller);
153 transfer_len = min_t(u16, len, MAX_SPI_FRAMESIZE);
155 phy->iobuf[0] = (in ? 0x80 : 0) | (transfer_len - 1);
156 phy->iobuf[1] = 0xd4;
157 phy->iobuf[2] = addr >> 8;
158 phy->iobuf[3] = addr;
160 memset(&spi_xfer, 0, sizeof(spi_xfer));
161 spi_xfer.tx_buf = phy->iobuf;
162 spi_xfer.rx_buf = phy->iobuf;
164 spi_xfer.cs_change = 1;
166 spi_message_init(&m);
167 spi_message_add_tail(&spi_xfer, &m);
168 ret = spi_sync_locked(phy->spi_device, &m);
172 /* Flow control transfers are receive only */
173 spi_xfer.tx_buf = NULL;
174 ret = phy->flow_control(phy, &spi_xfer);
178 spi_xfer.cs_change = 0;
179 spi_xfer.len = transfer_len;
180 spi_xfer.delay.value = 5;
181 spi_xfer.delay.unit = SPI_DELAY_UNIT_USECS;
184 spi_xfer.tx_buf = phy->iobuf;
185 spi_xfer.rx_buf = NULL;
186 memcpy(phy->iobuf, out, transfer_len);
190 spi_message_init(&m);
191 spi_message_add_tail(&spi_xfer, &m);
192 reinit_completion(&phy->ready);
193 ret = spi_sync_locked(phy->spi_device, &m);
198 memcpy(in, phy->iobuf, transfer_len);
207 /* Deactivate chip select */
208 memset(&spi_xfer, 0, sizeof(spi_xfer));
209 spi_message_init(&m);
210 spi_message_add_tail(&spi_xfer, &m);
211 spi_sync_locked(phy->spi_device, &m);
214 spi_bus_unlock(phy->spi_device->controller);
218 int tpm_tis_spi_transfer(struct tpm_tis_data *data, u32 addr, u16 len,
219 u8 *in, const u8 *out)
221 struct tpm_tis_spi_phy *phy = to_tpm_tis_spi_phy(data);
222 struct spi_controller *ctlr = phy->spi_device->controller;
225 * TPM flow control over SPI requires full duplex support.
226 * Send entire message to a half duplex controller to handle
227 * wait polling in controller.
228 * Set TPM HW flow control flag..
230 if (ctlr->flags & SPI_CONTROLLER_HALF_DUPLEX)
231 return tpm_tis_spi_transfer_half(data, addr, len, in, out);
233 return tpm_tis_spi_transfer_full(data, addr, len, in, out);
236 static int tpm_tis_spi_read_bytes(struct tpm_tis_data *data, u32 addr,
237 u16 len, u8 *result, enum tpm_tis_io_mode io_mode)
239 return tpm_tis_spi_transfer(data, addr, len, result, NULL);
242 static int tpm_tis_spi_write_bytes(struct tpm_tis_data *data, u32 addr,
243 u16 len, const u8 *value, enum tpm_tis_io_mode io_mode)
245 return tpm_tis_spi_transfer(data, addr, len, NULL, value);
248 int tpm_tis_spi_init(struct spi_device *spi, struct tpm_tis_spi_phy *phy,
249 int irq, const struct tpm_tis_phy_ops *phy_ops)
251 phy->iobuf = devm_kmalloc(&spi->dev, SPI_HDRSIZE + MAX_SPI_FRAMESIZE, GFP_KERNEL);
255 phy->spi_device = spi;
257 return tpm_tis_core_init(&spi->dev, &phy->priv, irq, phy_ops, NULL);
260 static const struct tpm_tis_phy_ops tpm_spi_phy_ops = {
261 .read_bytes = tpm_tis_spi_read_bytes,
262 .write_bytes = tpm_tis_spi_write_bytes,
265 static int tpm_tis_spi_probe(struct spi_device *dev)
267 struct tpm_tis_spi_phy *phy;
270 phy = devm_kzalloc(&dev->dev, sizeof(struct tpm_tis_spi_phy),
275 phy->flow_control = tpm_tis_spi_flow_control;
277 if (dev->controller->flags & SPI_CONTROLLER_HALF_DUPLEX)
278 dev->mode |= SPI_TPM_HW_FLOW;
280 /* If the SPI device has an IRQ then use that */
286 init_completion(&phy->ready);
287 return tpm_tis_spi_init(dev, phy, irq, &tpm_spi_phy_ops);
290 typedef int (*tpm_tis_spi_probe_func)(struct spi_device *);
292 static int tpm_tis_spi_driver_probe(struct spi_device *spi)
294 const struct spi_device_id *spi_dev_id = spi_get_device_id(spi);
295 tpm_tis_spi_probe_func probe_func;
297 probe_func = of_device_get_match_data(&spi->dev);
300 probe_func = (tpm_tis_spi_probe_func)spi_dev_id->driver_data;
304 probe_func = tpm_tis_spi_probe;
307 return probe_func(spi);
310 static SIMPLE_DEV_PM_OPS(tpm_tis_pm, tpm_pm_suspend, tpm_tis_spi_resume);
312 static void tpm_tis_spi_remove(struct spi_device *dev)
314 struct tpm_chip *chip = spi_get_drvdata(dev);
316 tpm_chip_unregister(chip);
317 tpm_tis_remove(chip);
320 static const struct spi_device_id tpm_tis_spi_id[] = {
321 { "attpm20p", (unsigned long)tpm_tis_spi_probe },
322 { "st33htpm-spi", (unsigned long)tpm_tis_spi_probe },
323 { "slb9670", (unsigned long)tpm_tis_spi_probe },
324 { "tpm_tis_spi", (unsigned long)tpm_tis_spi_probe },
325 { "tpm_tis-spi", (unsigned long)tpm_tis_spi_probe },
326 { "cr50", (unsigned long)cr50_spi_probe },
329 MODULE_DEVICE_TABLE(spi, tpm_tis_spi_id);
331 static const struct of_device_id of_tis_spi_match[] __maybe_unused = {
332 { .compatible = "atmel,attpm20p", .data = tpm_tis_spi_probe },
333 { .compatible = "st,st33htpm-spi", .data = tpm_tis_spi_probe },
334 { .compatible = "infineon,slb9670", .data = tpm_tis_spi_probe },
335 { .compatible = "tcg,tpm_tis-spi", .data = tpm_tis_spi_probe },
336 { .compatible = "google,cr50", .data = cr50_spi_probe },
339 MODULE_DEVICE_TABLE(of, of_tis_spi_match);
341 static const struct acpi_device_id acpi_tis_spi_match[] __maybe_unused = {
345 MODULE_DEVICE_TABLE(acpi, acpi_tis_spi_match);
347 static struct spi_driver tpm_tis_spi_driver = {
349 .name = "tpm_tis_spi",
351 .of_match_table = of_match_ptr(of_tis_spi_match),
352 .acpi_match_table = ACPI_PTR(acpi_tis_spi_match),
353 .probe_type = PROBE_PREFER_ASYNCHRONOUS,
355 .probe = tpm_tis_spi_driver_probe,
356 .remove = tpm_tis_spi_remove,
357 .id_table = tpm_tis_spi_id,
359 module_spi_driver(tpm_tis_spi_driver);
361 MODULE_DESCRIPTION("TPM Driver for native SPI access");
362 MODULE_LICENSE("GPL");