2 * Low-Level PCI Support for PC
7 #include <linux/sched.h>
9 #include <linux/pci-acpi.h>
10 #include <linux/ioport.h>
11 #include <linux/init.h>
12 #include <linux/dmi.h>
13 #include <linux/slab.h>
15 #include <asm-generic/pci-bridge.h>
17 #include <asm/segment.h>
20 #include <asm/pci_x86.h>
21 #include <asm/setup.h>
23 unsigned int pci_probe = PCI_PROBE_BIOS | PCI_PROBE_CONF1 | PCI_PROBE_CONF2 |
26 unsigned int pci_early_dump_regs;
27 static int pci_bf_sort;
28 static int smbios_type_b1_flag;
31 #ifdef CONFIG_X86_REROUTE_FOR_BROKEN_BOOT_IRQS
32 int noioapicreroute = 0;
34 int noioapicreroute = 1;
36 int pcibios_last_bus = -1;
37 unsigned long pirq_table_addr;
38 const struct pci_raw_ops *__read_mostly raw_pci_ops;
39 const struct pci_raw_ops *__read_mostly raw_pci_ext_ops;
41 int raw_pci_read(unsigned int domain, unsigned int bus, unsigned int devfn,
42 int reg, int len, u32 *val)
44 if (domain == 0 && reg < 256 && raw_pci_ops)
45 return raw_pci_ops->read(domain, bus, devfn, reg, len, val);
47 return raw_pci_ext_ops->read(domain, bus, devfn, reg, len, val);
51 int raw_pci_write(unsigned int domain, unsigned int bus, unsigned int devfn,
52 int reg, int len, u32 val)
54 if (domain == 0 && reg < 256 && raw_pci_ops)
55 return raw_pci_ops->write(domain, bus, devfn, reg, len, val);
57 return raw_pci_ext_ops->write(domain, bus, devfn, reg, len, val);
61 static int pci_read(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 *value)
63 return raw_pci_read(pci_domain_nr(bus), bus->number,
64 devfn, where, size, value);
67 static int pci_write(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 value)
69 return raw_pci_write(pci_domain_nr(bus), bus->number,
70 devfn, where, size, value);
73 struct pci_ops pci_root_ops = {
79 * This interrupt-safe spinlock protects all accesses to PCI
80 * configuration space.
82 DEFINE_RAW_SPINLOCK(pci_config_lock);
84 static int __init can_skip_ioresource_align(const struct dmi_system_id *d)
86 pci_probe |= PCI_CAN_SKIP_ISA_ALIGN;
87 printk(KERN_INFO "PCI: %s detected, can skip ISA alignment\n", d->ident);
91 static const struct dmi_system_id can_skip_pciprobe_dmi_table[] __initconst = {
93 * Systems where PCI IO resource ISA alignment can be skipped
94 * when the ISA enable bit in the bridge control is not set
97 .callback = can_skip_ioresource_align,
98 .ident = "IBM System x3800",
100 DMI_MATCH(DMI_SYS_VENDOR, "IBM"),
101 DMI_MATCH(DMI_PRODUCT_NAME, "x3800"),
105 .callback = can_skip_ioresource_align,
106 .ident = "IBM System x3850",
108 DMI_MATCH(DMI_SYS_VENDOR, "IBM"),
109 DMI_MATCH(DMI_PRODUCT_NAME, "x3850"),
113 .callback = can_skip_ioresource_align,
114 .ident = "IBM System x3950",
116 DMI_MATCH(DMI_SYS_VENDOR, "IBM"),
117 DMI_MATCH(DMI_PRODUCT_NAME, "x3950"),
123 void __init dmi_check_skip_isa_align(void)
125 dmi_check_system(can_skip_pciprobe_dmi_table);
128 static void pcibios_fixup_device_resources(struct pci_dev *dev)
130 struct resource *rom_r = &dev->resource[PCI_ROM_RESOURCE];
131 struct resource *bar_r;
134 if (pci_probe & PCI_NOASSIGN_BARS) {
136 * If the BIOS did not assign the BAR, zero out the
137 * resource so the kernel doesn't attmept to assign
138 * it later on in pci_assign_unassigned_resources
140 for (bar = 0; bar <= PCI_STD_RESOURCE_END; bar++) {
141 bar_r = &dev->resource[bar];
142 if (bar_r->start == 0 && bar_r->end != 0) {
149 if (pci_probe & PCI_NOASSIGN_ROMS) {
153 /* we deal with BIOS assigned ROM later */
156 rom_r->start = rom_r->end = rom_r->flags = 0;
161 * Called after each bus is probed, but before its children
165 void pcibios_fixup_bus(struct pci_bus *b)
169 pci_read_bridge_bases(b);
170 list_for_each_entry(dev, &b->devices, bus_list)
171 pcibios_fixup_device_resources(dev);
174 void pcibios_add_bus(struct pci_bus *bus)
176 acpi_pci_add_bus(bus);
179 void pcibios_remove_bus(struct pci_bus *bus)
181 acpi_pci_remove_bus(bus);
185 * Only use DMI information to set this if nothing was passed
186 * on the kernel command line (which was parsed earlier).
189 static int __init set_bf_sort(const struct dmi_system_id *d)
191 if (pci_bf_sort == pci_bf_sort_default) {
192 pci_bf_sort = pci_dmi_bf;
193 printk(KERN_INFO "PCI: %s detected, enabling pci=bfsort.\n", d->ident);
198 static void __init read_dmi_type_b1(const struct dmi_header *dm,
201 u8 *d = (u8 *)dm + 4;
203 if (dm->type != 0xB1)
205 switch (((*(u32 *)d) >> 9) & 0x03) {
207 printk(KERN_INFO "dmi type 0xB1 record - unknown flag\n");
209 case 0x01: /* set pci=bfsort */
210 smbios_type_b1_flag = 1;
212 case 0x02: /* do not set pci=bfsort */
213 smbios_type_b1_flag = 2;
220 static int __init find_sort_method(const struct dmi_system_id *d)
222 dmi_walk(read_dmi_type_b1, NULL);
224 if (smbios_type_b1_flag == 1) {
232 * Enable renumbering of PCI bus# ranges to reach all PCI busses (Cardbus)
235 static int __init assign_all_busses(const struct dmi_system_id *d)
237 pci_probe |= PCI_ASSIGN_ALL_BUSSES;
238 printk(KERN_INFO "%s detected: enabling PCI bus# renumbering"
239 " (pci=assign-busses)\n", d->ident);
244 static int __init set_scan_all(const struct dmi_system_id *d)
246 printk(KERN_INFO "PCI: %s detected, enabling pci=pcie_scan_all\n",
248 pci_add_flags(PCI_SCAN_ALL_PCIE_DEVS);
252 static const struct dmi_system_id pciprobe_dmi_table[] __initconst = {
255 * Laptops which need pci=assign-busses to see Cardbus cards
258 .callback = assign_all_busses,
259 .ident = "Samsung X20 Laptop",
261 DMI_MATCH(DMI_SYS_VENDOR, "Samsung Electronics"),
262 DMI_MATCH(DMI_PRODUCT_NAME, "SX20S"),
265 #endif /* __i386__ */
267 .callback = set_bf_sort,
268 .ident = "Dell PowerEdge 1950",
270 DMI_MATCH(DMI_SYS_VENDOR, "Dell"),
271 DMI_MATCH(DMI_PRODUCT_NAME, "PowerEdge 1950"),
275 .callback = set_bf_sort,
276 .ident = "Dell PowerEdge 1955",
278 DMI_MATCH(DMI_SYS_VENDOR, "Dell"),
279 DMI_MATCH(DMI_PRODUCT_NAME, "PowerEdge 1955"),
283 .callback = set_bf_sort,
284 .ident = "Dell PowerEdge 2900",
286 DMI_MATCH(DMI_SYS_VENDOR, "Dell"),
287 DMI_MATCH(DMI_PRODUCT_NAME, "PowerEdge 2900"),
291 .callback = set_bf_sort,
292 .ident = "Dell PowerEdge 2950",
294 DMI_MATCH(DMI_SYS_VENDOR, "Dell"),
295 DMI_MATCH(DMI_PRODUCT_NAME, "PowerEdge 2950"),
299 .callback = set_bf_sort,
300 .ident = "Dell PowerEdge R900",
302 DMI_MATCH(DMI_SYS_VENDOR, "Dell"),
303 DMI_MATCH(DMI_PRODUCT_NAME, "PowerEdge R900"),
307 .callback = find_sort_method,
308 .ident = "Dell System",
310 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc"),
314 .callback = set_bf_sort,
315 .ident = "HP ProLiant BL20p G3",
317 DMI_MATCH(DMI_SYS_VENDOR, "HP"),
318 DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL20p G3"),
322 .callback = set_bf_sort,
323 .ident = "HP ProLiant BL20p G4",
325 DMI_MATCH(DMI_SYS_VENDOR, "HP"),
326 DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL20p G4"),
330 .callback = set_bf_sort,
331 .ident = "HP ProLiant BL30p G1",
333 DMI_MATCH(DMI_SYS_VENDOR, "HP"),
334 DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL30p G1"),
338 .callback = set_bf_sort,
339 .ident = "HP ProLiant BL25p G1",
341 DMI_MATCH(DMI_SYS_VENDOR, "HP"),
342 DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL25p G1"),
346 .callback = set_bf_sort,
347 .ident = "HP ProLiant BL35p G1",
349 DMI_MATCH(DMI_SYS_VENDOR, "HP"),
350 DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL35p G1"),
354 .callback = set_bf_sort,
355 .ident = "HP ProLiant BL45p G1",
357 DMI_MATCH(DMI_SYS_VENDOR, "HP"),
358 DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL45p G1"),
362 .callback = set_bf_sort,
363 .ident = "HP ProLiant BL45p G2",
365 DMI_MATCH(DMI_SYS_VENDOR, "HP"),
366 DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL45p G2"),
370 .callback = set_bf_sort,
371 .ident = "HP ProLiant BL460c G1",
373 DMI_MATCH(DMI_SYS_VENDOR, "HP"),
374 DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL460c G1"),
378 .callback = set_bf_sort,
379 .ident = "HP ProLiant BL465c G1",
381 DMI_MATCH(DMI_SYS_VENDOR, "HP"),
382 DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL465c G1"),
386 .callback = set_bf_sort,
387 .ident = "HP ProLiant BL480c G1",
389 DMI_MATCH(DMI_SYS_VENDOR, "HP"),
390 DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL480c G1"),
394 .callback = set_bf_sort,
395 .ident = "HP ProLiant BL685c G1",
397 DMI_MATCH(DMI_SYS_VENDOR, "HP"),
398 DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL685c G1"),
402 .callback = set_bf_sort,
403 .ident = "HP ProLiant DL360",
405 DMI_MATCH(DMI_SYS_VENDOR, "HP"),
406 DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant DL360"),
410 .callback = set_bf_sort,
411 .ident = "HP ProLiant DL380",
413 DMI_MATCH(DMI_SYS_VENDOR, "HP"),
414 DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant DL380"),
419 .callback = assign_all_busses,
420 .ident = "Compaq EVO N800c",
422 DMI_MATCH(DMI_SYS_VENDOR, "Compaq"),
423 DMI_MATCH(DMI_PRODUCT_NAME, "EVO N800c"),
428 .callback = set_bf_sort,
429 .ident = "HP ProLiant DL385 G2",
431 DMI_MATCH(DMI_SYS_VENDOR, "HP"),
432 DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant DL385 G2"),
436 .callback = set_bf_sort,
437 .ident = "HP ProLiant DL585 G2",
439 DMI_MATCH(DMI_SYS_VENDOR, "HP"),
440 DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant DL585 G2"),
444 .callback = set_scan_all,
445 .ident = "Stratus/NEC ftServer",
447 DMI_MATCH(DMI_SYS_VENDOR, "Stratus"),
448 DMI_MATCH(DMI_PRODUCT_NAME, "ftServer"),
454 void __init dmi_check_pciprobe(void)
456 dmi_check_system(pciprobe_dmi_table);
459 void pcibios_scan_root(int busnum)
462 struct pci_sysdata *sd;
463 LIST_HEAD(resources);
465 sd = kzalloc(sizeof(*sd), GFP_KERNEL);
467 printk(KERN_ERR "PCI: OOM, skipping PCI bus %02x\n", busnum);
470 sd->node = x86_pci_root_bus_node(busnum);
471 x86_pci_root_bus_resources(busnum, &resources);
472 printk(KERN_DEBUG "PCI: Probing PCI hardware (bus %02x)\n", busnum);
473 bus = pci_scan_root_bus(NULL, busnum, &pci_root_ops, sd, &resources);
475 pci_free_resource_list(&resources);
480 void __init pcibios_set_cache_line_size(void)
482 struct cpuinfo_x86 *c = &boot_cpu_data;
485 * Set PCI cacheline size to that of the CPU if the CPU has reported it.
486 * (For older CPUs that don't support cpuid, we se it to 32 bytes
487 * It's also good for 386/486s (which actually have 16)
488 * as quite a few PCI devices do not support smaller values.
490 if (c->x86_clflush_size > 0) {
491 pci_dfl_cache_line_size = c->x86_clflush_size >> 2;
492 printk(KERN_DEBUG "PCI: pci_cache_line_size set to %d bytes\n",
493 pci_dfl_cache_line_size << 2);
495 pci_dfl_cache_line_size = 32 >> 2;
496 printk(KERN_DEBUG "PCI: Unknown cacheline size. Setting to 32 bytes\n");
500 int __init pcibios_init(void)
503 printk(KERN_WARNING "PCI: System does not support PCI\n");
507 pcibios_set_cache_line_size();
508 pcibios_resource_survey();
510 if (pci_bf_sort >= pci_force_bf)
511 pci_sort_breadthfirst();
515 char *__init pcibios_setup(char *str)
517 if (!strcmp(str, "off")) {
520 } else if (!strcmp(str, "bfsort")) {
521 pci_bf_sort = pci_force_bf;
523 } else if (!strcmp(str, "nobfsort")) {
524 pci_bf_sort = pci_force_nobf;
527 #ifdef CONFIG_PCI_BIOS
528 else if (!strcmp(str, "bios")) {
529 pci_probe = PCI_PROBE_BIOS;
531 } else if (!strcmp(str, "nobios")) {
532 pci_probe &= ~PCI_PROBE_BIOS;
534 } else if (!strcmp(str, "biosirq")) {
535 pci_probe |= PCI_BIOS_IRQ_SCAN;
537 } else if (!strncmp(str, "pirqaddr=", 9)) {
538 pirq_table_addr = simple_strtoul(str+9, NULL, 0);
542 #ifdef CONFIG_PCI_DIRECT
543 else if (!strcmp(str, "conf1")) {
544 pci_probe = PCI_PROBE_CONF1 | PCI_NO_CHECKS;
547 else if (!strcmp(str, "conf2")) {
548 pci_probe = PCI_PROBE_CONF2 | PCI_NO_CHECKS;
552 #ifdef CONFIG_PCI_MMCONFIG
553 else if (!strcmp(str, "nommconf")) {
554 pci_probe &= ~PCI_PROBE_MMCONF;
557 else if (!strcmp(str, "check_enable_amd_mmconf")) {
558 pci_probe |= PCI_CHECK_ENABLE_AMD_MMCONF;
562 else if (!strcmp(str, "noacpi")) {
566 else if (!strcmp(str, "noearly")) {
567 pci_probe |= PCI_PROBE_NOEARLY;
570 else if (!strcmp(str, "usepirqmask")) {
571 pci_probe |= PCI_USE_PIRQ_MASK;
573 } else if (!strncmp(str, "irqmask=", 8)) {
574 pcibios_irq_mask = simple_strtol(str+8, NULL, 0);
576 } else if (!strncmp(str, "lastbus=", 8)) {
577 pcibios_last_bus = simple_strtol(str+8, NULL, 0);
579 } else if (!strcmp(str, "rom")) {
580 pci_probe |= PCI_ASSIGN_ROMS;
582 } else if (!strcmp(str, "norom")) {
583 pci_probe |= PCI_NOASSIGN_ROMS;
585 } else if (!strcmp(str, "nobar")) {
586 pci_probe |= PCI_NOASSIGN_BARS;
588 } else if (!strcmp(str, "assign-busses")) {
589 pci_probe |= PCI_ASSIGN_ALL_BUSSES;
591 } else if (!strcmp(str, "use_crs")) {
592 pci_probe |= PCI_USE__CRS;
594 } else if (!strcmp(str, "nocrs")) {
595 pci_probe |= PCI_ROOT_NO_CRS;
597 } else if (!strcmp(str, "earlydump")) {
598 pci_early_dump_regs = 1;
600 } else if (!strcmp(str, "routeirq")) {
603 } else if (!strcmp(str, "skip_isa_align")) {
604 pci_probe |= PCI_CAN_SKIP_ISA_ALIGN;
606 } else if (!strcmp(str, "noioapicquirk")) {
609 } else if (!strcmp(str, "ioapicreroute")) {
610 if (noioapicreroute != -1)
613 } else if (!strcmp(str, "noioapicreroute")) {
614 if (noioapicreroute != -1)
621 unsigned int pcibios_assign_all_busses(void)
623 return (pci_probe & PCI_ASSIGN_ALL_BUSSES) ? 1 : 0;
626 int pcibios_add_device(struct pci_dev *dev)
628 struct setup_data *data;
629 struct pci_setup_rom *rom;
632 pa_data = boot_params.hdr.setup_data;
634 data = ioremap(pa_data, sizeof(*rom));
638 if (data->type == SETUP_PCI) {
639 rom = (struct pci_setup_rom *)data;
641 if ((pci_domain_nr(dev->bus) == rom->segment) &&
642 (dev->bus->number == rom->bus) &&
643 (PCI_SLOT(dev->devfn) == rom->device) &&
644 (PCI_FUNC(dev->devfn) == rom->function) &&
645 (dev->vendor == rom->vendor) &&
646 (dev->device == rom->devid)) {
648 offsetof(struct pci_setup_rom, romdata);
649 dev->romlen = rom->pcilen;
652 pa_data = data->next;
658 int pcibios_enable_device(struct pci_dev *dev, int mask)
662 if ((err = pci_enable_resources(dev, mask)) < 0)
665 if (!pci_dev_msi_enabled(dev))
666 return pcibios_enable_irq(dev);
670 void pcibios_disable_device (struct pci_dev *dev)
672 if (!pci_dev_msi_enabled(dev) && pcibios_disable_irq)
673 pcibios_disable_irq(dev);
676 int pci_ext_cfg_avail(void)