1 /******************************************************************************
3 * Copyright(c) 2009-2012 Realtek Corporation.
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of version 2 of the GNU General Public License as
7 * published by the Free Software Foundation.
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * You should have received a copy of the GNU General Public License along with
15 * this program; if not, write to the Free Software Foundation, Inc.,
16 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
18 * The full GNU General Public License is included in this distribution in the
19 * file called LICENSE.
21 * Contact Information:
23 * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
24 * Hsinchu 300, Taiwan.
28 *****************************************************************************/
30 #ifndef __REALTEK_RTL_PCI_PS_H__
31 #define __REALTEK_RTL_PCI_PS_H__
33 #define MAX_SW_LPS_SLEEP_INTV 5
35 /*---------------------------------------------
36 * 3 The value of cmd: 4 bits
37 *---------------------------------------------
39 #define PWR_CMD_READ 0x00
40 #define PWR_CMD_WRITE 0x01
41 #define PWR_CMD_POLLING 0x02
42 #define PWR_CMD_DELAY 0x03
43 #define PWR_CMD_END 0x04
45 /* define the base address of each block */
46 #define PWR_BASEADDR_MAC 0x00
47 #define PWR_BASEADDR_USB 0x01
48 #define PWR_BASEADDR_PCIE 0x02
49 #define PWR_BASEADDR_SDIO 0x03
51 #define PWR_FAB_ALL_MSK (BIT(0)|BIT(1)|BIT(2)|BIT(3))
52 #define PWR_CUT_TESTCHIP_MSK BIT(0)
53 #define PWR_CUT_A_MSK BIT(1)
54 #define PWR_CUT_B_MSK BIT(2)
55 #define PWR_CUT_C_MSK BIT(3)
56 #define PWR_CUT_D_MSK BIT(4)
57 #define PWR_CUT_E_MSK BIT(5)
58 #define PWR_CUT_F_MSK BIT(6)
59 #define PWR_CUT_G_MSK BIT(7)
60 #define PWR_CUT_ALL_MSK 0xFF
61 #define PWR_INTF_SDIO_MSK BIT(0)
62 #define PWR_INTF_USB_MSK BIT(1)
63 #define PWR_INTF_PCI_MSK BIT(2)
64 #define PWR_INTF_ALL_MSK (BIT(0)|BIT(1)|BIT(2)|BIT(3))
66 enum pwrseq_delay_unit {
82 #define GET_PWR_CFG_OFFSET(__PWR_CMD) (__PWR_CMD.offset)
83 #define GET_PWR_CFG_CUT_MASK(__PWR_CMD) (__PWR_CMD.cut_msk)
84 #define GET_PWR_CFG_FAB_MASK(__PWR_CMD) (__PWR_CMD.fab_msk)
85 #define GET_PWR_CFG_INTF_MASK(__PWR_CMD) (__PWR_CMD.interface_msk)
86 #define GET_PWR_CFG_BASE(__PWR_CMD) (__PWR_CMD.base)
87 #define GET_PWR_CFG_CMD(__PWR_CMD) (__PWR_CMD.cmd)
88 #define GET_PWR_CFG_MASK(__PWR_CMD) (__PWR_CMD.msk)
89 #define GET_PWR_CFG_VALUE(__PWR_CMD) (__PWR_CMD.value)
91 bool rtl_hal_pwrseqcmdparsing(struct rtl_priv *rtlpriv, u8 cut_version,
92 u8 fab_version, u8 interface_type,
93 struct wlan_pwr_cfg pwrcfgcmd[]);
95 bool rtl_ps_set_rf_state(struct ieee80211_hw *hw,
96 enum rf_pwrstate state_toset, u32 changesource);
97 bool rtl_ps_enable_nic(struct ieee80211_hw *hw);
98 bool rtl_ps_disable_nic(struct ieee80211_hw *hw);
99 void rtl_ips_nic_off(struct ieee80211_hw *hw);
100 void rtl_ips_nic_on(struct ieee80211_hw *hw);
101 void rtl_ips_nic_off_wq_callback(void *data);
102 void rtl_lps_enter(struct ieee80211_hw *hw);
103 void rtl_lps_leave(struct ieee80211_hw *hw);
105 void rtl_swlps_beacon(struct ieee80211_hw *hw, void *data, unsigned int len);
106 void rtl_swlps_wq_callback(void *data);
107 void rtl_swlps_rfon_wq_callback(void *data);
108 void rtl_swlps_rf_awake(struct ieee80211_hw *hw);
109 void rtl_swlps_rf_sleep(struct ieee80211_hw *hw);
110 void rtl_p2p_ps_cmd(struct ieee80211_hw *hw, u8 p2p_ps_state);
111 void rtl_p2p_info(struct ieee80211_hw *hw, void *data, unsigned int len);
112 void rtl_lps_change_work_callback(struct work_struct *work);