drivers/net/ieee802154/at86rf230.c

   1 /*
   2  * AT86RF230/RF231 driver
   3  *
   4  * Copyright (C) 2009-2012 Siemens AG
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License version 2
   8  * as published by the Free Software Foundation.
   9  *
  10  * This program is distributed in the hope that it will be useful,
  11  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  13  * GNU General Public License for more details.
  14  *
  15  * You should have received a copy of the GNU General Public License along
  16  * with this program; if not, write to the Free Software Foundation, Inc.,
  17  * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
  18  *
  19  * Written by:
  20  * Dmitry Eremin-Solenikov <[email protected]>
  21  * Alexander Smirnov <[email protected]>
  22  */
  23 #include <linux/kernel.h>
  24 #include <linux/module.h>
  25 #include <linux/interrupt.h>
  26 #include <linux/gpio.h>
  27 #include <linux/delay.h>
  28 #include <linux/mutex.h>
  29 #include <linux/workqueue.h>
  30 #include <linux/spinlock.h>
  31 #include <linux/spi/spi.h>
  32 #include <linux/spi/at86rf230.h>
  33 #include <linux/skbuff.h>
  34 #include <linux/of_gpio.h>
  35
  36 #include <net/mac802154.h>
  37 #include <net/wpan-phy.h>
  38
  39 struct at86rf230_local {
  40         struct spi_device *spi;
  41
  42         u8 part;
  43         u8 vers;
  44
  45         u8 buf[2];
  46         struct mutex bmux;
  47
  48         struct work_struct irqwork;
  49         struct completion tx_complete;
  50
  51         struct ieee802154_dev *dev;
  52
  53         spinlock_t lock;
  54         bool irq_busy;
  55         bool is_tx;
  56         bool tx_aret;
  57
  58         int rssi_base_val;
  59 };
  60
  61 static bool is_rf212(struct at86rf230_local *local)
  62 {
  63         return local->part == 7;
  64 }
  65
  66 #define RG_TRX_STATUS   (0x01)
  67 #define SR_TRX_STATUS           0x01, 0x1f, 0
  68 #define SR_RESERVED_01_3        0x01, 0x20, 5
  69 #define SR_CCA_STATUS           0x01, 0x40, 6
  70 #define SR_CCA_DONE             0x01, 0x80, 7
  71 #define RG_TRX_STATE    (0x02)
  72 #define SR_TRX_CMD              0x02, 0x1f, 0
  73 #define SR_TRAC_STATUS          0x02, 0xe0, 5
  74 #define RG_TRX_CTRL_0   (0x03)
  75 #define SR_CLKM_CTRL            0x03, 0x07, 0
  76 #define SR_CLKM_SHA_SEL         0x03, 0x08, 3
  77 #define SR_PAD_IO_CLKM          0x03, 0x30, 4
  78 #define SR_PAD_IO               0x03, 0xc0, 6
  79 #define RG_TRX_CTRL_1   (0x04)
  80 #define SR_IRQ_POLARITY         0x04, 0x01, 0
  81 #define SR_IRQ_MASK_MODE        0x04, 0x02, 1
  82 #define SR_SPI_CMD_MODE         0x04, 0x0c, 2
  83 #define SR_RX_BL_CTRL           0x04, 0x10, 4
  84 #define SR_TX_AUTO_CRC_ON       0x04, 0x20, 5
  85 #define SR_IRQ_2_EXT_EN         0x04, 0x40, 6
  86 #define SR_PA_EXT_EN            0x04, 0x80, 7
  87 #define RG_PHY_TX_PWR   (0x05)
  88 #define SR_TX_PWR               0x05, 0x0f, 0
  89 #define SR_PA_LT                0x05, 0x30, 4
  90 #define SR_PA_BUF_LT            0x05, 0xc0, 6
  91 #define RG_PHY_RSSI     (0x06)
  92 #define SR_RSSI                 0x06, 0x1f, 0
  93 #define SR_RND_VALUE            0x06, 0x60, 5
  94 #define SR_RX_CRC_VALID         0x06, 0x80, 7
  95 #define RG_PHY_ED_LEVEL (0x07)
  96 #define SR_ED_LEVEL             0x07, 0xff, 0
  97 #define RG_PHY_CC_CCA   (0x08)
  98 #define SR_CHANNEL              0x08, 0x1f, 0
  99 #define SR_CCA_MODE             0x08, 0x60, 5
 100 #define SR_CCA_REQUEST          0x08, 0x80, 7
 101 #define RG_CCA_THRES    (0x09)
 102 #define SR_CCA_ED_THRES         0x09, 0x0f, 0
 103 #define SR_RESERVED_09_1        0x09, 0xf0, 4
 104 #define RG_RX_CTRL      (0x0a)
 105 #define SR_PDT_THRES            0x0a, 0x0f, 0
 106 #define SR_RESERVED_0a_1        0x0a, 0xf0, 4
 107 #define RG_SFD_VALUE    (0x0b)
 108 #define SR_SFD_VALUE            0x0b, 0xff, 0
 109 #define RG_TRX_CTRL_2   (0x0c)
 110 #define SR_OQPSK_DATA_RATE      0x0c, 0x03, 0
 111 #define SR_SUB_MODE             0x0c, 0x04, 2
 112 #define SR_BPSK_QPSK            0x0c, 0x08, 3
 113 #define SR_OQPSK_SUB1_RC_EN     0x0c, 0x10, 4
 114 #define SR_RESERVED_0c_5        0x0c, 0x60, 5
 115 #define SR_RX_SAFE_MODE         0x0c, 0x80, 7
 116 #define RG_ANT_DIV      (0x0d)
 117 #define SR_ANT_CTRL             0x0d, 0x03, 0
 118 #define SR_ANT_EXT_SW_EN        0x0d, 0x04, 2
 119 #define SR_ANT_DIV_EN           0x0d, 0x08, 3
 120 #define SR_RESERVED_0d_2        0x0d, 0x70, 4
 121 #define SR_ANT_SEL              0x0d, 0x80, 7
 122 #define RG_IRQ_MASK     (0x0e)
 123 #define SR_IRQ_MASK             0x0e, 0xff, 0
 124 #define RG_IRQ_STATUS   (0x0f)
 125 #define SR_IRQ_0_PLL_LOCK       0x0f, 0x01, 0
 126 #define SR_IRQ_1_PLL_UNLOCK     0x0f, 0x02, 1
 127 #define SR_IRQ_2_RX_START       0x0f, 0x04, 2
 128 #define SR_IRQ_3_TRX_END        0x0f, 0x08, 3
 129 #define SR_IRQ_4_CCA_ED_DONE    0x0f, 0x10, 4
 130 #define SR_IRQ_5_AMI            0x0f, 0x20, 5
 131 #define SR_IRQ_6_TRX_UR         0x0f, 0x40, 6
 132 #define SR_IRQ_7_BAT_LOW        0x0f, 0x80, 7
 133 #define RG_VREG_CTRL    (0x10)
 134 #define SR_RESERVED_10_6        0x10, 0x03, 0
 135 #define SR_DVDD_OK              0x10, 0x04, 2
 136 #define SR_DVREG_EXT            0x10, 0x08, 3
 137 #define SR_RESERVED_10_3        0x10, 0x30, 4
 138 #define SR_AVDD_OK              0x10, 0x40, 6
 139 #define SR_AVREG_EXT            0x10, 0x80, 7
 140 #define RG_BATMON       (0x11)
 141 #define SR_BATMON_VTH           0x11, 0x0f, 0
 142 #define SR_BATMON_HR            0x11, 0x10, 4
 143 #define SR_BATMON_OK            0x11, 0x20, 5
 144 #define SR_RESERVED_11_1        0x11, 0xc0, 6
 145 #define RG_XOSC_CTRL    (0x12)
 146 #define SR_XTAL_TRIM            0x12, 0x0f, 0
 147 #define SR_XTAL_MODE            0x12, 0xf0, 4
 148 #define RG_RX_SYN       (0x15)
 149 #define SR_RX_PDT_LEVEL         0x15, 0x0f, 0
 150 #define SR_RESERVED_15_2        0x15, 0x70, 4
 151 #define SR_RX_PDT_DIS           0x15, 0x80, 7
 152 #define RG_XAH_CTRL_1   (0x17)
 153 #define SR_RESERVED_17_8        0x17, 0x01, 0
 154 #define SR_AACK_PROM_MODE       0x17, 0x02, 1
 155 #define SR_AACK_ACK_TIME        0x17, 0x04, 2
 156 #define SR_RESERVED_17_5        0x17, 0x08, 3
 157 #define SR_AACK_UPLD_RES_FT     0x17, 0x10, 4
 158 #define SR_AACK_FLTR_RES_FT     0x17, 0x20, 5
 159 #define SR_CSMA_LBT_MODE        0x17, 0x40, 6
 160 #define SR_RESERVED_17_1        0x17, 0x80, 7
 161 #define RG_FTN_CTRL     (0x18)
 162 #define SR_RESERVED_18_2        0x18, 0x7f, 0
 163 #define SR_FTN_START            0x18, 0x80, 7
 164 #define RG_PLL_CF       (0x1a)
 165 #define SR_RESERVED_1a_2        0x1a, 0x7f, 0
 166 #define SR_PLL_CF_START         0x1a, 0x80, 7
 167 #define RG_PLL_DCU      (0x1b)
 168 #define SR_RESERVED_1b_3        0x1b, 0x3f, 0
 169 #define SR_RESERVED_1b_2        0x1b, 0x40, 6
 170 #define SR_PLL_DCU_START        0x1b, 0x80, 7
 171 #define RG_PART_NUM     (0x1c)
 172 #define SR_PART_NUM             0x1c, 0xff, 0
 173 #define RG_VERSION_NUM  (0x1d)
 174 #define SR_VERSION_NUM          0x1d, 0xff, 0
 175 #define RG_MAN_ID_0     (0x1e)
 176 #define SR_MAN_ID_0             0x1e, 0xff, 0
 177 #define RG_MAN_ID_1     (0x1f)
 178 #define SR_MAN_ID_1             0x1f, 0xff, 0
 179 #define RG_SHORT_ADDR_0 (0x20)
 180 #define SR_SHORT_ADDR_0         0x20, 0xff, 0
 181 #define RG_SHORT_ADDR_1 (0x21)
 182 #define SR_SHORT_ADDR_1         0x21, 0xff, 0
 183 #define RG_PAN_ID_0     (0x22)
 184 #define SR_PAN_ID_0             0x22, 0xff, 0
 185 #define RG_PAN_ID_1     (0x23)
 186 #define SR_PAN_ID_1             0x23, 0xff, 0
 187 #define RG_IEEE_ADDR_0  (0x24)
 188 #define SR_IEEE_ADDR_0          0x24, 0xff, 0
 189 #define RG_IEEE_ADDR_1  (0x25)
 190 #define SR_IEEE_ADDR_1          0x25, 0xff, 0
 191 #define RG_IEEE_ADDR_2  (0x26)
 192 #define SR_IEEE_ADDR_2          0x26, 0xff, 0
 193 #define RG_IEEE_ADDR_3  (0x27)
 194 #define SR_IEEE_ADDR_3          0x27, 0xff, 0
 195 #define RG_IEEE_ADDR_4  (0x28)
 196 #define SR_IEEE_ADDR_4          0x28, 0xff, 0
 197 #define RG_IEEE_ADDR_5  (0x29)
 198 #define SR_IEEE_ADDR_5          0x29, 0xff, 0
 199 #define RG_IEEE_ADDR_6  (0x2a)
 200 #define SR_IEEE_ADDR_6          0x2a, 0xff, 0
 201 #define RG_IEEE_ADDR_7  (0x2b)
 202 #define SR_IEEE_ADDR_7          0x2b, 0xff, 0
 203 #define RG_XAH_CTRL_0   (0x2c)
 204 #define SR_SLOTTED_OPERATION    0x2c, 0x01, 0
 205 #define SR_MAX_CSMA_RETRIES     0x2c, 0x0e, 1
 206 #define SR_MAX_FRAME_RETRIES    0x2c, 0xf0, 4
 207 #define RG_CSMA_SEED_0  (0x2d)
 208 #define SR_CSMA_SEED_0          0x2d, 0xff, 0
 209 #define RG_CSMA_SEED_1  (0x2e)
 210 #define SR_CSMA_SEED_1          0x2e, 0x07, 0
 211 #define SR_AACK_I_AM_COORD      0x2e, 0x08, 3
 212 #define SR_AACK_DIS_ACK         0x2e, 0x10, 4
 213 #define SR_AACK_SET_PD          0x2e, 0x20, 5
 214 #define SR_AACK_FVN_MODE        0x2e, 0xc0, 6
 215 #define RG_CSMA_BE      (0x2f)
 216 #define SR_MIN_BE               0x2f, 0x0f, 0
 217 #define SR_MAX_BE               0x2f, 0xf0, 4
 218
 219 #define CMD_REG         0x80
 220 #define CMD_REG_MASK    0x3f
 221 #define CMD_WRITE       0x40
 222 #define CMD_FB          0x20
 223
 224 #define IRQ_BAT_LOW     (1 << 7)
 225 #define IRQ_TRX_UR      (1 << 6)
 226 #define IRQ_AMI         (1 << 5)
 227 #define IRQ_CCA_ED      (1 << 4)
 228 #define IRQ_TRX_END     (1 << 3)
 229 #define IRQ_RX_START    (1 << 2)
 230 #define IRQ_PLL_UNL     (1 << 1)
 231 #define IRQ_PLL_LOCK    (1 << 0)
 232
 233 #define IRQ_ACTIVE_HIGH 0
 234 #define IRQ_ACTIVE_LOW  1
 235
 236 #define STATE_P_ON              0x00    /* BUSY */
 237 #define STATE_BUSY_RX           0x01
 238 #define STATE_BUSY_TX           0x02
 239 #define STATE_FORCE_TRX_OFF     0x03
 240 #define STATE_FORCE_TX_ON       0x04    /* IDLE */
 241 /* 0x05 */                              /* INVALID_PARAMETER */
 242 #define STATE_RX_ON             0x06
 243 /* 0x07 */                              /* SUCCESS */
 244 #define STATE_TRX_OFF           0x08
 245 #define STATE_TX_ON             0x09
 246 /* 0x0a - 0x0e */                       /* 0x0a - UNSUPPORTED_ATTRIBUTE */
 247 #define STATE_SLEEP             0x0F
 248 #define STATE_PREP_DEEP_SLEEP   0x10
 249 #define STATE_BUSY_RX_AACK      0x11
 250 #define STATE_BUSY_TX_ARET      0x12
 251 #define STATE_RX_AACK_ON        0x16
 252 #define STATE_TX_ARET_ON        0x19
 253 #define STATE_RX_ON_NOCLK       0x1C
 254 #define STATE_RX_AACK_ON_NOCLK  0x1D
 255 #define STATE_BUSY_RX_AACK_NOCLK 0x1E
 256 #define STATE_TRANSITION_IN_PROGRESS 0x1F
 257
 258 static int
 259 __at86rf230_detect_device(struct spi_device *spi, u16 *man_id, u8 *part,
 260                 u8 *version)
 261 {
 262         u8 data[4];
 263         u8 *buf = kmalloc(2, GFP_KERNEL);
 264         int status;
 265         struct spi_message msg;
 266         struct spi_transfer xfer = {
 267                 .len    = 2,
 268                 .tx_buf = buf,
 269                 .rx_buf = buf,
 270         };
 271         u8 reg;
 272
 273         if (!buf)
 274                 return -ENOMEM;
 275
 276         for (reg = RG_PART_NUM; reg <= RG_MAN_ID_1; reg++) {
 277                 buf[0] = (reg & CMD_REG_MASK) | CMD_REG;
 278                 buf[1] = 0xff;
 279                 dev_vdbg(&spi->dev, "buf[0] = %02x\n", buf[0]);
 280                 spi_message_init(&msg);
 281                 spi_message_add_tail(&xfer, &msg);
 282
 283                 status = spi_sync(spi, &msg);
 284                 dev_vdbg(&spi->dev, "status = %d\n", status);
 285                 if (msg.status)
 286                         status = msg.status;
 287
 288                 dev_vdbg(&spi->dev, "status = %d\n", status);
 289                 dev_vdbg(&spi->dev, "buf[0] = %02x\n", buf[0]);
 290                 dev_vdbg(&spi->dev, "buf[1] = %02x\n", buf[1]);
 291
 292                 if (status == 0)
 293                         data[reg - RG_PART_NUM] = buf[1];
 294                 else
 295                         break;
 296         }
 297
 298         if (status == 0) {
 299                 *part = data[0];
 300                 *version = data[1];
 301                 *man_id = (data[3] << 8) | data[2];
 302         }
 303
 304         kfree(buf);
 305
 306         return status;
 307 }
 308
 309 static int
 310 __at86rf230_write(struct at86rf230_local *lp, u8 addr, u8 data)
 311 {
 312         u8 *buf = lp->buf;
 313         int status;
 314         struct spi_message msg;
 315         struct spi_transfer xfer = {
 316                 .len    = 2,
 317                 .tx_buf = buf,
 318         };
 319
 320         buf[0] = (addr & CMD_REG_MASK) | CMD_REG | CMD_WRITE;
 321         buf[1] = data;
 322         dev_vdbg(&lp->spi->dev, "buf[0] = %02x\n", buf[0]);
 323         dev_vdbg(&lp->spi->dev, "buf[1] = %02x\n", buf[1]);
 324         spi_message_init(&msg);
 325         spi_message_add_tail(&xfer, &msg);
 326
 327         status = spi_sync(lp->spi, &msg);
 328         dev_vdbg(&lp->spi->dev, "status = %d\n", status);
 329         if (msg.status)
 330                 status = msg.status;
 331
 332         dev_vdbg(&lp->spi->dev, "status = %d\n", status);
 333         dev_vdbg(&lp->spi->dev, "buf[0] = %02x\n", buf[0]);
 334         dev_vdbg(&lp->spi->dev, "buf[1] = %02x\n", buf[1]);
 335
 336         return status;
 337 }
 338
 339 static int
 340 __at86rf230_read_subreg(struct at86rf230_local *lp,
 341                         u8 addr, u8 mask, int shift, u8 *data)
 342 {
 343         u8 *buf = lp->buf;
 344         int status;
 345         struct spi_message msg;
 346         struct spi_transfer xfer = {
 347                 .len    = 2,
 348                 .tx_buf = buf,
 349                 .rx_buf = buf,
 350         };
 351
 352         buf[0] = (addr & CMD_REG_MASK) | CMD_REG;
 353         buf[1] = 0xff;
 354         dev_vdbg(&lp->spi->dev, "buf[0] = %02x\n", buf[0]);
 355         spi_message_init(&msg);
 356         spi_message_add_tail(&xfer, &msg);
 357
 358         status = spi_sync(lp->spi, &msg);
 359         dev_vdbg(&lp->spi->dev, "status = %d\n", status);
 360         if (msg.status)
 361                 status = msg.status;
 362
 363         dev_vdbg(&lp->spi->dev, "status = %d\n", status);
 364         dev_vdbg(&lp->spi->dev, "buf[0] = %02x\n", buf[0]);
 365         dev_vdbg(&lp->spi->dev, "buf[1] = %02x\n", buf[1]);
 366
 367         if (status == 0)
 368                 *data = (buf[1] & mask) >> shift;
 369
 370         return status;
 371 }
 372
 373 static int
 374 at86rf230_read_subreg(struct at86rf230_local *lp,
 375                       u8 addr, u8 mask, int shift, u8 *data)
 376 {
 377         int status;
 378
 379         mutex_lock(&lp->bmux);
 380         status = __at86rf230_read_subreg(lp, addr, mask, shift, data);
 381         mutex_unlock(&lp->bmux);
 382
 383         return status;
 384 }
 385
 386 static int
 387 at86rf230_write_subreg(struct at86rf230_local *lp,
 388                        u8 addr, u8 mask, int shift, u8 data)
 389 {
 390         int status;
 391         u8 val;
 392
 393         mutex_lock(&lp->bmux);
 394         status = __at86rf230_read_subreg(lp, addr, 0xff, 0, &val);
 395         if (status)
 396                 goto out;
 397
 398         val &= ~mask;
 399         val |= (data << shift) & mask;
 400
 401         status = __at86rf230_write(lp, addr, val);
 402 out:
 403         mutex_unlock(&lp->bmux);
 404
 405         return status;
 406 }
 407
 408 static int
 409 at86rf230_write_fbuf(struct at86rf230_local *lp, u8 *data, u8 len)
 410 {
 411         u8 *buf = lp->buf;
 412         int status;
 413         struct spi_message msg;
 414         struct spi_transfer xfer_head = {
 415                 .len            = 2,
 416                 .tx_buf         = buf,
 417
 418         };
 419         struct spi_transfer xfer_buf = {
 420                 .len            = len,
 421                 .tx_buf         = data,
 422         };
 423
 424         mutex_lock(&lp->bmux);
 425         buf[0] = CMD_WRITE | CMD_FB;
 426         buf[1] = len + 2; /* 2 bytes for CRC that isn't written */
 427
 428         dev_vdbg(&lp->spi->dev, "buf[0] = %02x\n", buf[0]);
 429         dev_vdbg(&lp->spi->dev, "buf[1] = %02x\n", buf[1]);
 430
 431         spi_message_init(&msg);
 432         spi_message_add_tail(&xfer_head, &msg);
 433         spi_message_add_tail(&xfer_buf, &msg);
 434
 435         status = spi_sync(lp->spi, &msg);
 436         dev_vdbg(&lp->spi->dev, "status = %d\n", status);
 437         if (msg.status)
 438                 status = msg.status;
 439
 440         dev_vdbg(&lp->spi->dev, "status = %d\n", status);
 441         dev_vdbg(&lp->spi->dev, "buf[0] = %02x\n", buf[0]);
 442         dev_vdbg(&lp->spi->dev, "buf[1] = %02x\n", buf[1]);
 443
 444         mutex_unlock(&lp->bmux);
 445         return status;
 446 }
 447
 448 static int
 449 at86rf230_read_fbuf(struct at86rf230_local *lp, u8 *data, u8 *len, u8 *lqi)
 450 {
 451         u8 *buf = lp->buf;
 452         int status;
 453         struct spi_message msg;
 454         struct spi_transfer xfer_head = {
 455                 .len            = 2,
 456                 .tx_buf         = buf,
 457                 .rx_buf         = buf,
 458         };
 459         struct spi_transfer xfer_head1 = {
 460                 .len            = 2,
 461                 .tx_buf         = buf,
 462                 .rx_buf         = buf,
 463         };
 464         struct spi_transfer xfer_buf = {
 465                 .len            = 0,
 466                 .rx_buf         = data,
 467         };
 468
 469         mutex_lock(&lp->bmux);
 470
 471         buf[0] = CMD_FB;
 472         buf[1] = 0x00;
 473
 474         spi_message_init(&msg);
 475         spi_message_add_tail(&xfer_head, &msg);
 476
 477         status = spi_sync(lp->spi, &msg);
 478         dev_vdbg(&lp->spi->dev, "status = %d\n", status);
 479
 480         xfer_buf.len = *(buf + 1) + 1;
 481         *len = buf[1];
 482
 483         buf[0] = CMD_FB;
 484         buf[1] = 0x00;
 485
 486         spi_message_init(&msg);
 487         spi_message_add_tail(&xfer_head1, &msg);
 488         spi_message_add_tail(&xfer_buf, &msg);
 489
 490         status = spi_sync(lp->spi, &msg);
 491
 492         if (msg.status)
 493                 status = msg.status;
 494
 495         dev_vdbg(&lp->spi->dev, "status = %d\n", status);
 496         dev_vdbg(&lp->spi->dev, "buf[0] = %02x\n", buf[0]);
 497         dev_vdbg(&lp->spi->dev, "buf[1] = %02x\n", buf[1]);
 498
 499         if (status) {
 500                 if (lqi && (*len > lp->buf[1]))
 501                         *lqi = data[lp->buf[1]];
 502         }
 503         mutex_unlock(&lp->bmux);
 504
 505         return status;
 506 }
 507
 508 static int
 509 at86rf230_ed(struct ieee802154_dev *dev, u8 *level)
 510 {
 511         might_sleep();
 512         BUG_ON(!level);
 513         *level = 0xbe;
 514         return 0;
 515 }
 516
 517 static int
 518 at86rf230_state(struct ieee802154_dev *dev, int state)
 519 {
 520         struct at86rf230_local *lp = dev->priv;
 521         int rc;
 522         u8 val;
 523         u8 desired_status;
 524
 525         might_sleep();
 526
 527         if (state == STATE_FORCE_TX_ON)
 528                 desired_status = STATE_TX_ON;
 529         else if (state == STATE_FORCE_TRX_OFF)
 530                 desired_status = STATE_TRX_OFF;
 531         else
 532                 desired_status = state;
 533
 534         do {
 535                 rc = at86rf230_read_subreg(lp, SR_TRX_STATUS, &val);
 536                 if (rc)
 537                         goto err;
 538         } while (val == STATE_TRANSITION_IN_PROGRESS);
 539
 540         if (val == desired_status)
 541                 return 0;
 542
 543         /* state is equal to phy states */
 544         rc = at86rf230_write_subreg(lp, SR_TRX_CMD, state);
 545         if (rc)
 546                 goto err;
 547
 548         do {
 549                 rc = at86rf230_read_subreg(lp, SR_TRX_STATUS, &val);
 550                 if (rc)
 551                         goto err;
 552         } while (val == STATE_TRANSITION_IN_PROGRESS);
 553
 554
 555         if (val == desired_status ||
 556             (desired_status == STATE_RX_ON && val == STATE_BUSY_RX) ||
 557             (desired_status == STATE_RX_AACK_ON && val == STATE_BUSY_RX_AACK))
 558                 return 0;
 559
 560         pr_err("unexpected state change: %d, asked for %d\n", val, state);
 561         return -EBUSY;
 562
 563 err:
 564         pr_err("error: %d\n", rc);
 565         return rc;
 566 }
 567
 568 static int
 569 at86rf230_start(struct ieee802154_dev *dev)
 570 {
 571         struct at86rf230_local *lp = dev->priv;
 572         u8 rc;
 573
 574         rc = at86rf230_write_subreg(lp, SR_RX_SAFE_MODE, 1);
 575         if (rc)
 576                 return rc;
 577
 578         rc = at86rf230_state(dev, STATE_TX_ON);
 579         if (rc)
 580                 return rc;
 581
 582         return at86rf230_state(dev, STATE_RX_AACK_ON);
 583 }
 584
 585 static void
 586 at86rf230_stop(struct ieee802154_dev *dev)
 587 {
 588         at86rf230_state(dev, STATE_FORCE_TRX_OFF);
 589 }
 590
 591 static int
 592 at86rf230_set_channel(struct at86rf230_local *lp, int page, int channel)
 593 {
 594         lp->rssi_base_val = -91;
 595
 596         return at86rf230_write_subreg(lp, SR_CHANNEL, channel);
 597 }
 598
 599 static int
 600 at86rf212_set_channel(struct at86rf230_local *lp, int page, int channel)
 601 {
 602         int rc;
 603
 604         if (channel == 0)
 605                 rc = at86rf230_write_subreg(lp, SR_SUB_MODE, 0);
 606         else
 607                 rc = at86rf230_write_subreg(lp, SR_SUB_MODE, 1);
 608         if (rc < 0)
 609                 return rc;
 610
 611         if (page == 0) {
 612                 rc = at86rf230_write_subreg(lp, SR_BPSK_QPSK, 0);
 613                 lp->rssi_base_val = -100;
 614         } else {
 615                 rc = at86rf230_write_subreg(lp, SR_BPSK_QPSK, 1);
 616                 lp->rssi_base_val = -98;
 617         }
 618         if (rc < 0)
 619                 return rc;
 620
 621         return at86rf230_write_subreg(lp, SR_CHANNEL, channel);
 622 }
 623
 624 static int
 625 at86rf230_channel(struct ieee802154_dev *dev, int page, int channel)
 626 {
 627         struct at86rf230_local *lp = dev->priv;
 628         int rc;
 629
 630         might_sleep();
 631
 632         if (page < 0 || page > 31 ||
 633             !(lp->dev->phy->channels_supported[page] & BIT(channel))) {
 634                 WARN_ON(1);
 635                 return -EINVAL;
 636         }
 637
 638         if (is_rf212(lp))
 639                 rc = at86rf212_set_channel(lp, page, channel);
 640         else
 641                 rc = at86rf230_set_channel(lp, page, channel);
 642         if (rc < 0)
 643                 return rc;
 644
 645         msleep(1); /* Wait for PLL */
 646         dev->phy->current_channel = channel;
 647         dev->phy->current_page = page;
 648
 649         return 0;
 650 }
 651
 652 static int
 653 at86rf230_xmit(struct ieee802154_dev *dev, struct sk_buff *skb)
 654 {
 655         struct at86rf230_local *lp = dev->priv;
 656         int rc;
 657         unsigned long flags;
 658
 659         spin_lock_irqsave(&lp->lock, flags);
 660         if  (lp->irq_busy) {
 661                 spin_unlock_irqrestore(&lp->lock, flags);
 662                 return -EBUSY;
 663         }
 664         spin_unlock_irqrestore(&lp->lock, flags);
 665
 666         might_sleep();
 667
 668         rc = at86rf230_state(dev, STATE_FORCE_TX_ON);
 669         if (rc)
 670                 goto err;
 671
 672         spin_lock_irqsave(&lp->lock, flags);
 673         lp->is_tx = 1;
 674         reinit_completion(&lp->tx_complete);
 675         spin_unlock_irqrestore(&lp->lock, flags);
 676
 677         rc = at86rf230_write_fbuf(lp, skb->data, skb->len);
 678         if (rc)
 679                 goto err_rx;
 680
 681         if (lp->tx_aret) {
 682                 rc = at86rf230_write_subreg(lp, SR_TRX_CMD, STATE_TX_ARET_ON);
 683                 if (rc)
 684                         goto err_rx;
 685         }
 686
 687         rc = at86rf230_write_subreg(lp, SR_TRX_CMD, STATE_BUSY_TX);
 688         if (rc)
 689                 goto err_rx;
 690
 691         rc = wait_for_completion_interruptible(&lp->tx_complete);
 692         if (rc < 0)
 693                 goto err_rx;
 694
 695         rc = at86rf230_start(dev);
 696
 697         return rc;
 698
 699 err_rx:
 700         at86rf230_start(dev);
 701 err:
 702         pr_err("error: %d\n", rc);
 703
 704         spin_lock_irqsave(&lp->lock, flags);
 705         lp->is_tx = 0;
 706         spin_unlock_irqrestore(&lp->lock, flags);
 707
 708         return rc;
 709 }
 710
 711 static int at86rf230_rx(struct at86rf230_local *lp)
 712 {
 713         u8 len = 128, lqi = 0;
 714         struct sk_buff *skb;
 715
 716         skb = alloc_skb(len, GFP_KERNEL);
 717
 718         if (!skb)
 719                 return -ENOMEM;
 720
 721         if (at86rf230_read_fbuf(lp, skb_put(skb, len), &len, &lqi))
 722                 goto err;
 723
 724         if (len < 2)
 725                 goto err;
 726
 727         skb_trim(skb, len - 2); /* We do not put CRC into the frame */
 728
 729         ieee802154_rx_irqsafe(lp->dev, skb, lqi);
 730
 731         dev_dbg(&lp->spi->dev, "READ_FBUF: %d %x\n", len, lqi);
 732
 733         return 0;
 734 err:
 735         pr_debug("received frame is too small\n");
 736
 737         kfree_skb(skb);
 738         return -EINVAL;
 739 }
 740
 741 static int
 742 at86rf230_set_hw_addr_filt(struct ieee802154_dev *dev,
 743                            struct ieee802154_hw_addr_filt *filt,
 744                            unsigned long changed)
 745 {
 746         struct at86rf230_local *lp = dev->priv;
 747
 748         if (changed & IEEE802515_AFILT_SADDR_CHANGED) {
 749                 u16 addr = le16_to_cpu(filt->short_addr);
 750
 751                 dev_vdbg(&lp->spi->dev,
 752                         "at86rf230_set_hw_addr_filt called for saddr\n");
 753                 __at86rf230_write(lp, RG_SHORT_ADDR_0, addr);
 754                 __at86rf230_write(lp, RG_SHORT_ADDR_1, addr >> 8);
 755         }
 756
 757         if (changed & IEEE802515_AFILT_PANID_CHANGED) {
 758                 u16 pan = le16_to_cpu(filt->pan_id);
 759
 760                 dev_vdbg(&lp->spi->dev,
 761                         "at86rf230_set_hw_addr_filt called for pan id\n");
 762                 __at86rf230_write(lp, RG_PAN_ID_0, pan);
 763                 __at86rf230_write(lp, RG_PAN_ID_1, pan >> 8);
 764         }
 765
 766         if (changed & IEEE802515_AFILT_IEEEADDR_CHANGED) {
 767                 u8 i, addr[8];
 768
 769                 memcpy(addr, &filt->ieee_addr, 8);
 770                 dev_vdbg(&lp->spi->dev,
 771                         "at86rf230_set_hw_addr_filt called for IEEE addr\n");
 772                 for (i = 0; i < 8; i++)
 773                         __at86rf230_write(lp, RG_IEEE_ADDR_0 + i, addr[i]);
 774         }
 775
 776         if (changed & IEEE802515_AFILT_PANC_CHANGED) {
 777                 dev_vdbg(&lp->spi->dev,
 778                         "at86rf230_set_hw_addr_filt called for panc change\n");
 779                 if (filt->pan_coord)
 780                         at86rf230_write_subreg(lp, SR_AACK_I_AM_COORD, 1);
 781                 else
 782                         at86rf230_write_subreg(lp, SR_AACK_I_AM_COORD, 0);
 783         }
 784
 785         return 0;
 786 }
 787
 788 static int
 789 at86rf212_set_txpower(struct ieee802154_dev *dev, int db)
 790 {
 791         struct at86rf230_local *lp = dev->priv;
 792
 793         /* typical maximum output is 5dBm with RG_PHY_TX_PWR 0x60, lower five
 794          * bits decrease power in 1dB steps. 0x60 represents extra PA gain of
 795          * 0dB.
 796          * thus, supported values for db range from -26 to 5, for 31dB of
 797          * reduction to 0dB of reduction.
 798          */
 799         if (db > 5 || db < -26)
 800                 return -EINVAL;
 801
 802         db = -(db - 5);
 803
 804         return __at86rf230_write(lp, RG_PHY_TX_PWR, 0x60 | db);
 805 }
 806
 807 static int
 808 at86rf212_set_lbt(struct ieee802154_dev *dev, bool on)
 809 {
 810         struct at86rf230_local *lp = dev->priv;
 811
 812         return at86rf230_write_subreg(lp, SR_CSMA_LBT_MODE, on);
 813 }
 814
 815 static int
 816 at86rf212_set_cca_mode(struct ieee802154_dev *dev, u8 mode)
 817 {
 818         struct at86rf230_local *lp = dev->priv;
 819
 820         return at86rf230_write_subreg(lp, SR_CCA_MODE, mode);
 821 }
 822
 823 static int
 824 at86rf212_set_cca_ed_level(struct ieee802154_dev *dev, s32 level)
 825 {
 826         struct at86rf230_local *lp = dev->priv;
 827         int desens_steps;
 828
 829         if (level < lp->rssi_base_val || level > 30)
 830                 return -EINVAL;
 831
 832         desens_steps = (level - lp->rssi_base_val) * 100 / 207;
 833
 834         return at86rf230_write_subreg(lp, SR_CCA_ED_THRES, desens_steps);
 835 }
 836
 837 static int
 838 at86rf212_set_csma_params(struct ieee802154_dev *dev, u8 min_be, u8 max_be,
 839                           u8 retries)
 840 {
 841         struct at86rf230_local *lp = dev->priv;
 842         int rc;
 843
 844         if (min_be > max_be || max_be > 8 || retries > 5)
 845                 return -EINVAL;
 846
 847         rc = at86rf230_write_subreg(lp, SR_MIN_BE, min_be);
 848         if (rc)
 849                 return rc;
 850
 851         rc = at86rf230_write_subreg(lp, SR_MAX_BE, max_be);
 852         if (rc)
 853                 return rc;
 854
 855         return at86rf230_write_subreg(lp, SR_MAX_CSMA_RETRIES, retries);
 856 }
 857
 858 static int
 859 at86rf212_set_frame_retries(struct ieee802154_dev *dev, s8 retries)
 860 {
 861         struct at86rf230_local *lp = dev->priv;
 862         int rc = 0;
 863
 864         if (retries < -1 || retries > 15)
 865                 return -EINVAL;
 866
 867         lp->tx_aret = retries >= 0;
 868
 869         if (retries >= 0)
 870                 rc = at86rf230_write_subreg(lp, SR_MAX_FRAME_RETRIES, retries);
 871
 872         return rc;
 873 }
 874
 875 static struct ieee802154_ops at86rf230_ops = {
 876         .owner = THIS_MODULE,
 877         .xmit = at86rf230_xmit,
 878         .ed = at86rf230_ed,
 879         .set_channel = at86rf230_channel,
 880         .start = at86rf230_start,
 881         .stop = at86rf230_stop,
 882         .set_hw_addr_filt = at86rf230_set_hw_addr_filt,
 883 };
 884
 885 static struct ieee802154_ops at86rf212_ops = {
 886         .owner = THIS_MODULE,
 887         .xmit = at86rf230_xmit,
 888         .ed = at86rf230_ed,
 889         .set_channel = at86rf230_channel,
 890         .start = at86rf230_start,
 891         .stop = at86rf230_stop,
 892         .set_hw_addr_filt = at86rf230_set_hw_addr_filt,
 893         .set_txpower = at86rf212_set_txpower,
 894         .set_lbt = at86rf212_set_lbt,
 895         .set_cca_mode = at86rf212_set_cca_mode,
 896         .set_cca_ed_level = at86rf212_set_cca_ed_level,
 897         .set_csma_params = at86rf212_set_csma_params,
 898         .set_frame_retries = at86rf212_set_frame_retries,
 899 };
 900
 901 static void at86rf230_irqwork(struct work_struct *work)
 902 {
 903         struct at86rf230_local *lp =
 904                 container_of(work, struct at86rf230_local, irqwork);
 905         u8 status = 0, val;
 906         int rc;
 907         unsigned long flags;
 908
 909         rc = at86rf230_read_subreg(lp, RG_IRQ_STATUS, 0xff, 0, &val);
 910         status |= val;
 911
 912         status &= ~IRQ_PLL_LOCK; /* ignore */
 913         status &= ~IRQ_RX_START; /* ignore */
 914         status &= ~IRQ_AMI; /* ignore */
 915         status &= ~IRQ_TRX_UR; /* FIXME: possibly handle ???*/
 916
 917         if (status & IRQ_TRX_END) {
 918                 status &= ~IRQ_TRX_END;
 919                 spin_lock_irqsave(&lp->lock, flags);
 920                 if (lp->is_tx) {
 921                         lp->is_tx = 0;
 922                         spin_unlock_irqrestore(&lp->lock, flags);
 923                         complete(&lp->tx_complete);
 924                 } else {
 925                         spin_unlock_irqrestore(&lp->lock, flags);
 926                         at86rf230_rx(lp);
 927                 }
 928         }
 929
 930         spin_lock_irqsave(&lp->lock, flags);
 931         lp->irq_busy = 0;
 932         spin_unlock_irqrestore(&lp->lock, flags);
 933 }
 934
 935 static void at86rf230_irqwork_level(struct work_struct *work)
 936 {
 937         struct at86rf230_local *lp =
 938                 container_of(work, struct at86rf230_local, irqwork);
 939
 940         at86rf230_irqwork(work);
 941
 942         enable_irq(lp->spi->irq);
 943 }
 944
 945 static irqreturn_t at86rf230_isr(int irq, void *data)
 946 {
 947         struct at86rf230_local *lp = data;
 948         unsigned long flags;
 949
 950         spin_lock_irqsave(&lp->lock, flags);
 951         lp->irq_busy = 1;
 952         spin_unlock_irqrestore(&lp->lock, flags);
 953
 954         schedule_work(&lp->irqwork);
 955
 956         return IRQ_HANDLED;
 957 }
 958
 959 static irqreturn_t at86rf230_isr_level(int irq, void *data)
 960 {
 961         disable_irq_nosync(irq);
 962
 963         return at86rf230_isr(irq, data);
 964 }
 965
 966 static int at86rf230_irq_polarity(struct at86rf230_local *lp, int pol)
 967 {
 968         return at86rf230_write_subreg(lp, SR_IRQ_POLARITY, pol);
 969 }
 970
 971 static int at86rf230_hw_init(struct at86rf230_local *lp)
 972 {
 973         struct at86rf230_platform_data *pdata = lp->spi->dev.platform_data;
 974         int rc, irq_pol;
 975         u8 status;
 976         u8 csma_seed[2];
 977
 978         rc = at86rf230_read_subreg(lp, SR_TRX_STATUS, &status);
 979         if (rc)
 980                 return rc;
 981
 982         rc = at86rf230_write_subreg(lp, SR_TRX_CMD, STATE_FORCE_TRX_OFF);
 983         if (rc)
 984                 return rc;
 985
 986         /* configure irq polarity, defaults to high active */
 987         if (pdata->irq_type & (IRQF_TRIGGER_FALLING | IRQF_TRIGGER_LOW))
 988                 irq_pol = IRQ_ACTIVE_LOW;
 989         else
 990                 irq_pol = IRQ_ACTIVE_HIGH;
 991
 992         rc = at86rf230_irq_polarity(lp, irq_pol);
 993         if (rc)
 994                 return rc;
 995
 996         rc = at86rf230_write_subreg(lp, SR_IRQ_MASK, IRQ_TRX_END);
 997         if (rc)
 998                 return rc;
 999
1000         get_random_bytes(csma_seed, ARRAY_SIZE(csma_seed));
1001         rc = at86rf230_write_subreg(lp, SR_CSMA_SEED_0, csma_seed[0]);
1002         if (rc)
1003                 return rc;
1004         rc = at86rf230_write_subreg(lp, SR_CSMA_SEED_1, csma_seed[1]);
1005         if (rc)
1006                 return rc;
1007
1008         /* CLKM changes are applied immediately */
1009         rc = at86rf230_write_subreg(lp, SR_CLKM_SHA_SEL, 0x00);
1010         if (rc)
1011                 return rc;
1012
1013         /* Turn CLKM Off */
1014         rc = at86rf230_write_subreg(lp, SR_CLKM_CTRL, 0x00);
1015         if (rc)
1016                 return rc;
1017         /* Wait the next SLEEP cycle */
1018         msleep(100);
1019
1020         rc = at86rf230_read_subreg(lp, SR_DVDD_OK, &status);
1021         if (rc)
1022                 return rc;
1023         if (!status) {
1024                 dev_err(&lp->spi->dev, "DVDD error\n");
1025                 return -EINVAL;
1026         }
1027
1028         return 0;
1029 }
1030
1031 static struct at86rf230_platform_data *
1032 at86rf230_get_pdata(struct spi_device *spi)
1033 {
1034         struct at86rf230_platform_data *pdata;
1035         const char *irq_type;
1036
1037         if (!IS_ENABLED(CONFIG_OF) || !spi->dev.of_node)
1038                 return spi->dev.platform_data;
1039
1040         pdata = devm_kzalloc(&spi->dev, sizeof(*pdata), GFP_KERNEL);
1041         if (!pdata)
1042                 goto done;
1043
1044         pdata->rstn = of_get_named_gpio(spi->dev.of_node, "reset-gpio", 0);
1045         pdata->slp_tr = of_get_named_gpio(spi->dev.of_node, "sleep-gpio", 0);
1046
1047         pdata->irq_type = IRQF_TRIGGER_RISING;
1048         of_property_read_string(spi->dev.of_node, "irq-type", &irq_type);
1049         if (!strcmp(irq_type, "level-high"))
1050                 pdata->irq_type = IRQF_TRIGGER_HIGH;
1051         else if (!strcmp(irq_type, "level-low"))
1052                 pdata->irq_type = IRQF_TRIGGER_LOW;
1053         else if (!strcmp(irq_type, "edge-rising"))
1054                 pdata->irq_type = IRQF_TRIGGER_RISING;
1055         else if (!strcmp(irq_type, "edge-falling"))
1056                 pdata->irq_type = IRQF_TRIGGER_FALLING;
1057         else
1058                 dev_warn(&spi->dev, "wrong irq-type specified using edge-rising\n");
1059
1060         spi->dev.platform_data = pdata;
1061 done:
1062         return pdata;
1063 }
1064
1065 static int at86rf230_probe(struct spi_device *spi)
1066 {
1067         struct at86rf230_platform_data *pdata;
1068         struct ieee802154_dev *dev;
1069         struct at86rf230_local *lp;
1070         u16 man_id = 0;
1071         u8 part = 0, version = 0, status;
1072         irq_handler_t irq_handler;
1073         work_func_t irq_worker;
1074         int rc;
1075         const char *chip;
1076         struct ieee802154_ops *ops = NULL;
1077
1078         if (!spi->irq) {
1079                 dev_err(&spi->dev, "no IRQ specified\n");
1080                 return -EINVAL;
1081         }
1082
1083         pdata = at86rf230_get_pdata(spi);
1084         if (!pdata) {
1085                 dev_err(&spi->dev, "no platform_data\n");
1086                 return -EINVAL;
1087         }
1088
1089         if (gpio_is_valid(pdata->rstn)) {
1090                 rc = gpio_request(pdata->rstn, "rstn");
1091                 if (rc)
1092                         return rc;
1093         }
1094
1095         if (gpio_is_valid(pdata->slp_tr)) {
1096                 rc = gpio_request(pdata->slp_tr, "slp_tr");
1097                 if (rc)
1098                         goto err_slp_tr;
1099         }
1100
1101         if (gpio_is_valid(pdata->rstn)) {
1102                 rc = gpio_direction_output(pdata->rstn, 1);
1103                 if (rc)
1104                         goto err_gpio_dir;
1105         }
1106
1107         if (gpio_is_valid(pdata->slp_tr)) {
1108                 rc = gpio_direction_output(pdata->slp_tr, 0);
1109                 if (rc)
1110                         goto err_gpio_dir;
1111         }
1112
1113         /* Reset */
1114         if (gpio_is_valid(pdata->rstn)) {
1115                 udelay(1);
1116                 gpio_set_value(pdata->rstn, 0);
1117                 udelay(1);
1118                 gpio_set_value(pdata->rstn, 1);
1119                 usleep_range(120, 240);
1120         }
1121
1122         rc = __at86rf230_detect_device(spi, &man_id, &part, &version);
1123         if (rc < 0)
1124                 goto err_gpio_dir;
1125
1126         if (man_id != 0x001f) {
1127                 dev_err(&spi->dev, "Non-Atmel dev found (MAN_ID %02x %02x)\n",
1128                         man_id >> 8, man_id & 0xFF);
1129                 rc = -EINVAL;
1130                 goto err_gpio_dir;
1131         }
1132
1133         switch (part) {
1134         case 2:
1135                 chip = "at86rf230";
1136                 /* FIXME: should be easy to support; */
1137                 break;
1138         case 3:
1139                 chip = "at86rf231";
1140                 ops = &at86rf230_ops;
1141                 break;
1142         case 7:
1143                 chip = "at86rf212";
1144                 if (version == 1)
1145                         ops = &at86rf212_ops;
1146                 break;
1147         case 11:
1148                 chip = "at86rf233";
1149                 ops = &at86rf230_ops;
1150                 break;
1151         default:
1152                 chip = "UNKNOWN";
1153                 break;
1154         }
1155
1156         dev_info(&spi->dev, "Detected %s chip version %d\n", chip, version);
1157         if (!ops) {
1158                 rc = -ENOTSUPP;
1159                 goto err_gpio_dir;
1160         }
1161
1162         dev = ieee802154_alloc_device(sizeof(*lp), ops);
1163         if (!dev) {
1164                 rc = -ENOMEM;
1165                 goto err_gpio_dir;
1166         }
1167
1168         lp = dev->priv;
1169         lp->dev = dev;
1170         lp->part = part;
1171         lp->vers = version;
1172
1173         lp->spi = spi;
1174
1175         dev->parent = &spi->dev;
1176         dev->extra_tx_headroom = 0;
1177         dev->flags = IEEE802154_HW_OMIT_CKSUM | IEEE802154_HW_AACK;
1178
1179         if (pdata->irq_type & (IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING)) {
1180                 irq_worker = at86rf230_irqwork;
1181                 irq_handler = at86rf230_isr;
1182         } else {
1183                 irq_worker = at86rf230_irqwork_level;
1184                 irq_handler = at86rf230_isr_level;
1185         }
1186
1187         mutex_init(&lp->bmux);
1188         INIT_WORK(&lp->irqwork, irq_worker);
1189         spin_lock_init(&lp->lock);
1190         init_completion(&lp->tx_complete);
1191
1192         spi_set_drvdata(spi, lp);
1193
1194         if (is_rf212(lp)) {
1195                 dev->phy->channels_supported[0] = 0x00007FF;
1196                 dev->phy->channels_supported[2] = 0x00007FF;
1197         } else {
1198                 dev->phy->channels_supported[0] = 0x7FFF800;
1199         }
1200
1201         rc = at86rf230_hw_init(lp);
1202         if (rc)
1203                 goto err_hw_init;
1204
1205         rc = request_irq(spi->irq, irq_handler,
1206                          IRQF_SHARED | pdata->irq_type,
1207                          dev_name(&spi->dev), lp);
1208         if (rc)
1209                 goto err_hw_init;
1210
1211         /* Read irq status register to reset irq line */
1212         rc = at86rf230_read_subreg(lp, RG_IRQ_STATUS, 0xff, 0, &status);
1213         if (rc)
1214                 goto err_irq;
1215
1216         rc = ieee802154_register_device(lp->dev);
1217         if (rc)
1218                 goto err_irq;
1219
1220         return rc;
1221
1222 err_irq:
1223         free_irq(spi->irq, lp);
1224 err_hw_init:
1225         flush_work(&lp->irqwork);
1226         spi_set_drvdata(spi, NULL);
1227         mutex_destroy(&lp->bmux);
1228         ieee802154_free_device(lp->dev);
1229
1230 err_gpio_dir:
1231         if (gpio_is_valid(pdata->slp_tr))
1232                 gpio_free(pdata->slp_tr);
1233 err_slp_tr:
1234         if (gpio_is_valid(pdata->rstn))
1235                 gpio_free(pdata->rstn);
1236         return rc;
1237 }
1238
1239 static int at86rf230_remove(struct spi_device *spi)
1240 {
1241         struct at86rf230_local *lp = spi_get_drvdata(spi);
1242         struct at86rf230_platform_data *pdata = spi->dev.platform_data;
1243
1244         /* mask all at86rf230 irq's */
1245         at86rf230_write_subreg(lp, SR_IRQ_MASK, 0);
1246         ieee802154_unregister_device(lp->dev);
1247
1248         free_irq(spi->irq, lp);
1249         flush_work(&lp->irqwork);
1250
1251         if (gpio_is_valid(pdata->slp_tr))
1252                 gpio_free(pdata->slp_tr);
1253         if (gpio_is_valid(pdata->rstn))
1254                 gpio_free(pdata->rstn);
1255
1256         mutex_destroy(&lp->bmux);
1257         ieee802154_free_device(lp->dev);
1258
1259         dev_dbg(&spi->dev, "unregistered at86rf230\n");
1260         return 0;
1261 }
1262
1263 #if IS_ENABLED(CONFIG_OF)
1264 static struct of_device_id at86rf230_of_match[] = {
1265         { .compatible = "atmel,at86rf230", },
1266         { .compatible = "atmel,at86rf231", },
1267         { .compatible = "atmel,at86rf233", },
1268         { .compatible = "atmel,at86rf212", },
1269         { },
1270 };
1271 #endif
1272
1273 static struct spi_driver at86rf230_driver = {
1274         .driver = {
1275                 .of_match_table = of_match_ptr(at86rf230_of_match),
1276                 .name   = "at86rf230",
1277                 .owner  = THIS_MODULE,
1278         },
1279         .probe      = at86rf230_probe,
1280         .remove     = at86rf230_remove,
1281 };
1282
1283 module_spi_driver(at86rf230_driver);
1284
1285 MODULE_DESCRIPTION("AT86RF230 Transceiver Driver");
1286 MODULE_LICENSE("GPL v2");