2 * AD7298 SPI ADC driver
4 * Copyright 2011 Analog Devices Inc.
6 * Licensed under the GPL-2.
9 #include <linux/device.h>
10 #include <linux/kernel.h>
11 #include <linux/slab.h>
12 #include <linux/sysfs.h>
13 #include <linux/spi/spi.h>
14 #include <linux/regulator/consumer.h>
15 #include <linux/err.h>
16 #include <linux/delay.h>
17 #include <linux/module.h>
18 #include <linux/interrupt.h>
20 #include <linux/iio/iio.h>
21 #include <linux/iio/sysfs.h>
22 #include <linux/iio/buffer.h>
23 #include <linux/iio/trigger_consumer.h>
24 #include <linux/iio/triggered_buffer.h>
26 #include <linux/platform_data/ad7298.h>
28 #define AD7298_WRITE (1 << 15) /* write to the control register */
29 #define AD7298_REPEAT (1 << 14) /* repeated conversion enable */
30 #define AD7298_CH(x) (1 << (13 - (x))) /* channel select */
31 #define AD7298_TSENSE (1 << 5) /* temperature conversion enable */
32 #define AD7298_EXTREF (1 << 2) /* external reference enable */
33 #define AD7298_TAVG (1 << 1) /* temperature sensor averaging enable */
34 #define AD7298_PDD (1 << 0) /* partial power down enable */
36 #define AD7298_MAX_CHAN 8
37 #define AD7298_BITS 12
38 #define AD7298_STORAGE_BITS 16
39 #define AD7298_INTREF_mV 2500
41 #define AD7298_CH_TEMP 9
43 #define RES_MASK(bits) ((1 << (bits)) - 1)
46 struct spi_device *spi;
47 struct regulator *reg;
49 struct spi_transfer ring_xfer[10];
50 struct spi_transfer scan_single_xfer[3];
51 struct spi_message ring_msg;
52 struct spi_message scan_single_msg;
54 * DMA (thus cache coherency maintenance) requires the
55 * transfer buffers to live in their own cache lines.
57 __be16 rx_buf[12] ____cacheline_aligned;
61 #define AD7298_V_CHAN(index) \
63 .type = IIO_VOLTAGE, \
66 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
67 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \
69 .scan_index = index, \
74 .endianness = IIO_BE, \
78 static const struct iio_chan_spec ad7298_channels[] = {
83 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
84 BIT(IIO_CHAN_INFO_SCALE) |
85 BIT(IIO_CHAN_INFO_OFFSET),
86 .address = AD7298_CH_TEMP,
102 IIO_CHAN_SOFT_TIMESTAMP(8),
106 * ad7298_update_scan_mode() setup the spi transfer buffer for the new scan mask
108 static int ad7298_update_scan_mode(struct iio_dev *indio_dev,
109 const unsigned long *active_scan_mask)
111 struct ad7298_state *st = iio_priv(indio_dev);
113 unsigned short command;
116 /* Now compute overall size */
117 scan_count = bitmap_weight(active_scan_mask, indio_dev->masklength);
119 command = AD7298_WRITE | st->ext_ref;
121 for (i = 0, m = AD7298_CH(0); i < AD7298_MAX_CHAN; i++, m >>= 1)
122 if (test_bit(i, active_scan_mask))
125 st->tx_buf[0] = cpu_to_be16(command);
127 /* build spi ring message */
128 st->ring_xfer[0].tx_buf = &st->tx_buf[0];
129 st->ring_xfer[0].len = 2;
130 st->ring_xfer[0].cs_change = 1;
131 st->ring_xfer[1].tx_buf = &st->tx_buf[1];
132 st->ring_xfer[1].len = 2;
133 st->ring_xfer[1].cs_change = 1;
135 spi_message_init(&st->ring_msg);
136 spi_message_add_tail(&st->ring_xfer[0], &st->ring_msg);
137 spi_message_add_tail(&st->ring_xfer[1], &st->ring_msg);
139 for (i = 0; i < scan_count; i++) {
140 st->ring_xfer[i + 2].rx_buf = &st->rx_buf[i];
141 st->ring_xfer[i + 2].len = 2;
142 st->ring_xfer[i + 2].cs_change = 1;
143 spi_message_add_tail(&st->ring_xfer[i + 2], &st->ring_msg);
145 /* make sure last transfer cs_change is not set */
146 st->ring_xfer[i + 1].cs_change = 0;
152 * ad7298_trigger_handler() bh of trigger launched polling to ring buffer
154 * Currently there is no option in this driver to disable the saving of
155 * timestamps within the ring.
157 static irqreturn_t ad7298_trigger_handler(int irq, void *p)
159 struct iio_poll_func *pf = p;
160 struct iio_dev *indio_dev = pf->indio_dev;
161 struct ad7298_state *st = iio_priv(indio_dev);
164 b_sent = spi_sync(st->spi, &st->ring_msg);
168 iio_push_to_buffers_with_timestamp(indio_dev, st->rx_buf,
172 iio_trigger_notify_done(indio_dev->trig);
177 static int ad7298_scan_direct(struct ad7298_state *st, unsigned ch)
180 st->tx_buf[0] = cpu_to_be16(AD7298_WRITE | st->ext_ref |
181 (AD7298_CH(0) >> ch));
183 ret = spi_sync(st->spi, &st->scan_single_msg);
187 return be16_to_cpu(st->rx_buf[0]);
190 static int ad7298_scan_temp(struct ad7298_state *st, int *val)
195 buf = cpu_to_be16(AD7298_WRITE | AD7298_TSENSE |
196 AD7298_TAVG | st->ext_ref);
198 ret = spi_write(st->spi, (u8 *)&buf, 2);
202 buf = cpu_to_be16(0);
204 ret = spi_write(st->spi, (u8 *)&buf, 2);
208 usleep_range(101, 1000); /* sleep > 100us */
210 ret = spi_read(st->spi, (u8 *)&buf, 2);
214 *val = sign_extend32(be16_to_cpu(buf), 11);
219 static int ad7298_get_ref_voltage(struct ad7298_state *st)
224 vref = regulator_get_voltage(st->reg);
230 return AD7298_INTREF_mV;
234 static int ad7298_read_raw(struct iio_dev *indio_dev,
235 struct iio_chan_spec const *chan,
241 struct ad7298_state *st = iio_priv(indio_dev);
244 case IIO_CHAN_INFO_RAW:
245 mutex_lock(&indio_dev->mlock);
246 if (indio_dev->currentmode == INDIO_BUFFER_TRIGGERED) {
249 if (chan->address == AD7298_CH_TEMP)
250 ret = ad7298_scan_temp(st, val);
252 ret = ad7298_scan_direct(st, chan->address);
254 mutex_unlock(&indio_dev->mlock);
259 if (chan->address != AD7298_CH_TEMP)
260 *val = ret & RES_MASK(AD7298_BITS);
263 case IIO_CHAN_INFO_SCALE:
264 switch (chan->type) {
266 *val = ad7298_get_ref_voltage(st);
267 *val2 = chan->scan_type.realbits;
268 return IIO_VAL_FRACTIONAL_LOG2;
270 *val = ad7298_get_ref_voltage(st);
272 return IIO_VAL_FRACTIONAL;
276 case IIO_CHAN_INFO_OFFSET:
277 *val = 1093 - 2732500 / ad7298_get_ref_voltage(st);
283 static const struct iio_info ad7298_info = {
284 .read_raw = &ad7298_read_raw,
285 .update_scan_mode = ad7298_update_scan_mode,
286 .driver_module = THIS_MODULE,
289 static int ad7298_probe(struct spi_device *spi)
291 struct ad7298_platform_data *pdata = spi->dev.platform_data;
292 struct ad7298_state *st;
293 struct iio_dev *indio_dev;
296 indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st));
297 if (indio_dev == NULL)
300 st = iio_priv(indio_dev);
302 if (pdata && pdata->ext_ref)
303 st->ext_ref = AD7298_EXTREF;
306 st->reg = devm_regulator_get(&spi->dev, "vref");
308 return PTR_ERR(st->reg);
310 ret = regulator_enable(st->reg);
315 spi_set_drvdata(spi, indio_dev);
319 indio_dev->name = spi_get_device_id(spi)->name;
320 indio_dev->dev.parent = &spi->dev;
321 indio_dev->modes = INDIO_DIRECT_MODE;
322 indio_dev->channels = ad7298_channels;
323 indio_dev->num_channels = ARRAY_SIZE(ad7298_channels);
324 indio_dev->info = &ad7298_info;
326 /* Setup default message */
328 st->scan_single_xfer[0].tx_buf = &st->tx_buf[0];
329 st->scan_single_xfer[0].len = 2;
330 st->scan_single_xfer[0].cs_change = 1;
331 st->scan_single_xfer[1].tx_buf = &st->tx_buf[1];
332 st->scan_single_xfer[1].len = 2;
333 st->scan_single_xfer[1].cs_change = 1;
334 st->scan_single_xfer[2].rx_buf = &st->rx_buf[0];
335 st->scan_single_xfer[2].len = 2;
337 spi_message_init(&st->scan_single_msg);
338 spi_message_add_tail(&st->scan_single_xfer[0], &st->scan_single_msg);
339 spi_message_add_tail(&st->scan_single_xfer[1], &st->scan_single_msg);
340 spi_message_add_tail(&st->scan_single_xfer[2], &st->scan_single_msg);
342 ret = iio_triggered_buffer_setup(indio_dev, NULL,
343 &ad7298_trigger_handler, NULL);
345 goto error_disable_reg;
347 ret = iio_device_register(indio_dev);
349 goto error_cleanup_ring;
354 iio_triggered_buffer_cleanup(indio_dev);
357 regulator_disable(st->reg);
362 static int ad7298_remove(struct spi_device *spi)
364 struct iio_dev *indio_dev = spi_get_drvdata(spi);
365 struct ad7298_state *st = iio_priv(indio_dev);
367 iio_device_unregister(indio_dev);
368 iio_triggered_buffer_cleanup(indio_dev);
370 regulator_disable(st->reg);
375 static const struct spi_device_id ad7298_id[] = {
379 MODULE_DEVICE_TABLE(spi, ad7298_id);
381 static struct spi_driver ad7298_driver = {
384 .owner = THIS_MODULE,
386 .probe = ad7298_probe,
387 .remove = ad7298_remove,
388 .id_table = ad7298_id,
390 module_spi_driver(ad7298_driver);
393 MODULE_DESCRIPTION("Analog Devices AD7298 ADC");
394 MODULE_LICENSE("GPL v2");