drivers/gpu/drm/omapdrm/omap_drv.c

   1 /*
   2  * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
   3  * Author: Rob Clark <[email protected]>
   4  *
   5  * This program is free software; you can redistribute it and/or modify it
   6  * under the terms of the GNU General Public License version 2 as published by
   7  * the Free Software Foundation.
   8  *
   9  * This program is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  12  * more details.
  13  *
  14  * You should have received a copy of the GNU General Public License along with
  15  * this program.  If not, see <http://www.gnu.org/licenses/>.
  16  */
  17
  18 #include <linux/of.h>
  19 #include <linux/sort.h>
  20 #include <linux/sys_soc.h>
  21
  22 #include <drm/drm_atomic.h>
  23 #include <drm/drm_atomic_helper.h>
  24 #include <drm/drm_crtc_helper.h>
  25 #include <drm/drm_fb_helper.h>
  26
  27 #include "omap_dmm_tiler.h"
  28 #include "omap_drv.h"
  29
  30 #define DRIVER_NAME             MODULE_NAME
  31 #define DRIVER_DESC             "OMAP DRM"
  32 #define DRIVER_DATE             "20110917"
  33 #define DRIVER_MAJOR            1
  34 #define DRIVER_MINOR            0
  35 #define DRIVER_PATCHLEVEL       0
  36
  37 /*
  38  * mode config funcs
  39  */
  40
  41 /* Notes about mapping DSS and DRM entities:
  42  *    CRTC:        overlay
  43  *    encoder:     manager.. with some extension to allow one primary CRTC
  44  *                 and zero or more video CRTC's to be mapped to one encoder?
  45  *    connector:   dssdev.. manager can be attached/detached from different
  46  *                 devices
  47  */
  48
  49 static void omap_atomic_wait_for_completion(struct drm_device *dev,
  50                                             struct drm_atomic_state *old_state)
  51 {
  52         struct drm_crtc_state *new_crtc_state;
  53         struct drm_crtc *crtc;
  54         unsigned int i;
  55         int ret;
  56
  57         for_each_new_crtc_in_state(old_state, crtc, new_crtc_state, i) {
  58                 if (!new_crtc_state->active)
  59                         continue;
  60
  61                 ret = omap_crtc_wait_pending(crtc);
  62
  63                 if (!ret)
  64                         dev_warn(dev->dev,
  65                                  "atomic complete timeout (pipe %u)!\n", i);
  66         }
  67 }
  68
  69 static void omap_atomic_commit_tail(struct drm_atomic_state *old_state)
  70 {
  71         struct drm_device *dev = old_state->dev;
  72         struct omap_drm_private *priv = dev->dev_private;
  73
  74         priv->dispc_ops->runtime_get(priv->dispc);
  75
  76         /* Apply the atomic update. */
  77         drm_atomic_helper_commit_modeset_disables(dev, old_state);
  78
  79         if (priv->omaprev != 0x3430) {
  80                 /* With the current dss dispc implementation we have to enable
  81                  * the new modeset before we can commit planes. The dispc ovl
  82                  * configuration relies on the video mode configuration been
  83                  * written into the HW when the ovl configuration is
  84                  * calculated.
  85                  *
  86                  * This approach is not ideal because after a mode change the
  87                  * plane update is executed only after the first vblank
  88                  * interrupt. The dispc implementation should be fixed so that
  89                  * it is able use uncommitted drm state information.
  90                  */
  91                 drm_atomic_helper_commit_modeset_enables(dev, old_state);
  92                 omap_atomic_wait_for_completion(dev, old_state);
  93
  94                 drm_atomic_helper_commit_planes(dev, old_state, 0);
  95
  96                 drm_atomic_helper_commit_hw_done(old_state);
  97         } else {
  98                 /*
  99                  * OMAP3 DSS seems to have issues with the work-around above,
 100                  * resulting in endless sync losts if a crtc is enabled without
 101                  * a plane. For now, skip the WA for OMAP3.
 102                  */
 103                 drm_atomic_helper_commit_planes(dev, old_state, 0);
 104
 105                 drm_atomic_helper_commit_modeset_enables(dev, old_state);
 106
 107                 drm_atomic_helper_commit_hw_done(old_state);
 108         }
 109
 110         /*
 111          * Wait for completion of the page flips to ensure that old buffers
 112          * can't be touched by the hardware anymore before cleaning up planes.
 113          */
 114         omap_atomic_wait_for_completion(dev, old_state);
 115
 116         drm_atomic_helper_cleanup_planes(dev, old_state);
 117
 118         priv->dispc_ops->runtime_put(priv->dispc);
 119 }
 120
 121 static const struct drm_mode_config_helper_funcs omap_mode_config_helper_funcs = {
 122         .atomic_commit_tail = omap_atomic_commit_tail,
 123 };
 124
 125 static const struct drm_mode_config_funcs omap_mode_config_funcs = {
 126         .fb_create = omap_framebuffer_create,
 127         .output_poll_changed = drm_fb_helper_output_poll_changed,
 128         .atomic_check = drm_atomic_helper_check,
 129         .atomic_commit = drm_atomic_helper_commit,
 130 };
 131
 132 static void omap_disconnect_pipelines(struct drm_device *ddev)
 133 {
 134         struct omap_drm_private *priv = ddev->dev_private;
 135         unsigned int i;
 136
 137         for (i = 0; i < priv->num_pipes; i++) {
 138                 struct omap_drm_pipeline *pipe = &priv->pipes[i];
 139
 140                 omapdss_device_disconnect(NULL, pipe->output);
 141
 142                 omapdss_device_put(pipe->output);
 143                 omapdss_device_put(pipe->display);
 144                 pipe->output = NULL;
 145                 pipe->display = NULL;
 146         }
 147
 148         memset(&priv->channels, 0, sizeof(priv->channels));
 149
 150         priv->num_pipes = 0;
 151 }
 152
 153 static int omap_compare_pipes(const void *a, const void *b)
 154 {
 155         const struct omap_drm_pipeline *pipe1 = a;
 156         const struct omap_drm_pipeline *pipe2 = b;
 157
 158         if (pipe1->display->alias_id > pipe2->display->alias_id)
 159                 return 1;
 160         else if (pipe1->display->alias_id < pipe2->display->alias_id)
 161                 return -1;
 162         return 0;
 163 }
 164
 165 static int omap_connect_pipelines(struct drm_device *ddev)
 166 {
 167         struct omap_drm_private *priv = ddev->dev_private;
 168         struct omap_dss_device *output = NULL;
 169         unsigned int i;
 170         int r;
 171
 172         if (!omapdss_stack_is_ready())
 173                 return -EPROBE_DEFER;
 174
 175         for_each_dss_output(output) {
 176                 r = omapdss_device_connect(priv->dss, NULL, output);
 177                 if (r == -EPROBE_DEFER) {
 178                         omapdss_device_put(output);
 179                         goto cleanup;
 180                 } else if (r) {
 181                         dev_warn(output->dev, "could not connect output %s\n",
 182                                  output->name);
 183                 } else {
 184                         struct omap_drm_pipeline *pipe;
 185
 186                         pipe = &priv->pipes[priv->num_pipes++];
 187                         pipe->output = omapdss_device_get(output);
 188                         pipe->display = omapdss_display_get(output);
 189
 190                         if (priv->num_pipes == ARRAY_SIZE(priv->pipes)) {
 191                                 /* To balance the 'for_each_dss_output' loop */
 192                                 omapdss_device_put(output);
 193                                 break;
 194                         }
 195                 }
 196         }
 197
 198         /* Sort the list by DT aliases */
 199         sort(priv->pipes, priv->num_pipes, sizeof(priv->pipes[0]),
 200              omap_compare_pipes, NULL);
 201
 202         /*
 203          * Populate the pipeline lookup table by DISPC channel. Only one display
 204          * is allowed per channel.
 205          */
 206         for (i = 0; i < priv->num_pipes; ++i) {
 207                 struct omap_drm_pipeline *pipe = &priv->pipes[i];
 208                 enum omap_channel channel = pipe->output->dispc_channel;
 209
 210                 if (WARN_ON(priv->channels[channel] != NULL)) {
 211                         r = -EINVAL;
 212                         goto cleanup;
 213                 }
 214
 215                 priv->channels[channel] = pipe;
 216         }
 217
 218         return 0;
 219
 220 cleanup:
 221         /*
 222          * if we are deferring probe, we disconnect the devices we previously
 223          * connected
 224          */
 225         omap_disconnect_pipelines(ddev);
 226
 227         return r;
 228 }
 229
 230 static int omap_modeset_init_properties(struct drm_device *dev)
 231 {
 232         struct omap_drm_private *priv = dev->dev_private;
 233         unsigned int num_planes = priv->dispc_ops->get_num_ovls(priv->dispc);
 234
 235         priv->zorder_prop = drm_property_create_range(dev, 0, "zorder", 0,
 236                                                       num_planes - 1);
 237         if (!priv->zorder_prop)
 238                 return -ENOMEM;
 239
 240         return 0;
 241 }
 242
 243 static int omap_modeset_init(struct drm_device *dev)
 244 {
 245         struct omap_drm_private *priv = dev->dev_private;
 246         int num_ovls = priv->dispc_ops->get_num_ovls(priv->dispc);
 247         int num_mgrs = priv->dispc_ops->get_num_mgrs(priv->dispc);
 248         unsigned int i;
 249         int ret;
 250         u32 plane_crtc_mask;
 251
 252         drm_mode_config_init(dev);
 253
 254         ret = omap_modeset_init_properties(dev);
 255         if (ret < 0)
 256                 return ret;
 257
 258         /*
 259          * This function creates exactly one connector, encoder, crtc,
 260          * and primary plane per each connected dss-device. Each
 261          * connector->encoder->crtc chain is expected to be separate
 262          * and each crtc is connect to a single dss-channel. If the
 263          * configuration does not match the expectations or exceeds
 264          * the available resources, the configuration is rejected.
 265          */
 266         if (priv->num_pipes > num_mgrs || priv->num_pipes > num_ovls) {
 267                 dev_err(dev->dev, "%s(): Too many connected displays\n",
 268                         __func__);
 269                 return -EINVAL;
 270         }
 271
 272         /* Create all planes first. They can all be put to any CRTC. */
 273         plane_crtc_mask = (1 << priv->num_pipes) - 1;
 274
 275         for (i = 0; i < num_ovls; i++) {
 276                 enum drm_plane_type type = i < priv->num_pipes
 277                                          ? DRM_PLANE_TYPE_PRIMARY
 278                                          : DRM_PLANE_TYPE_OVERLAY;
 279                 struct drm_plane *plane;
 280
 281                 if (WARN_ON(priv->num_planes >= ARRAY_SIZE(priv->planes)))
 282                         return -EINVAL;
 283
 284                 plane = omap_plane_init(dev, i, type, plane_crtc_mask);
 285                 if (IS_ERR(plane))
 286                         return PTR_ERR(plane);
 287
 288                 priv->planes[priv->num_planes++] = plane;
 289         }
 290
 291         /* Create the CRTCs, encoders and connectors. */
 292         for (i = 0; i < priv->num_pipes; i++) {
 293                 struct omap_drm_pipeline *pipe = &priv->pipes[i];
 294                 struct omap_dss_device *display = pipe->display;
 295                 struct drm_connector *connector;
 296                 struct drm_encoder *encoder;
 297                 struct drm_crtc *crtc;
 298
 299                 encoder = omap_encoder_init(dev, pipe->output, display);
 300                 if (!encoder)
 301                         return -ENOMEM;
 302
 303                 connector = omap_connector_init(dev, pipe->output, display,
 304                                                 encoder);
 305                 if (!connector)
 306                         return -ENOMEM;
 307
 308                 crtc = omap_crtc_init(dev, pipe, priv->planes[i]);
 309                 if (IS_ERR(crtc))
 310                         return PTR_ERR(crtc);
 311
 312                 drm_connector_attach_encoder(connector, encoder);
 313                 encoder->possible_crtcs = 1 << i;
 314
 315                 pipe->crtc = crtc;
 316                 pipe->encoder = encoder;
 317                 pipe->connector = connector;
 318         }
 319
 320         DBG("registered %u planes, %u crtcs/encoders/connectors\n",
 321             priv->num_planes, priv->num_pipes);
 322
 323         dev->mode_config.min_width = 8;
 324         dev->mode_config.min_height = 2;
 325
 326         /*
 327          * Note: these values are used for multiple independent things:
 328          * connector mode filtering, buffer sizes, crtc sizes...
 329          * Use big enough values here to cover all use cases, and do more
 330          * specific checking in the respective code paths.
 331          */
 332         dev->mode_config.max_width = 8192;
 333         dev->mode_config.max_height = 8192;
 334
 335         /* We want the zpos to be normalized */
 336         dev->mode_config.normalize_zpos = true;
 337
 338         dev->mode_config.funcs = &omap_mode_config_funcs;
 339         dev->mode_config.helper_private = &omap_mode_config_helper_funcs;
 340
 341         drm_mode_config_reset(dev);
 342
 343         omap_drm_irq_install(dev);
 344
 345         return 0;
 346 }
 347
 348 /*
 349  * Enable the HPD in external components if supported
 350  */
 351 static void omap_modeset_enable_external_hpd(struct drm_device *ddev)
 352 {
 353         struct omap_drm_private *priv = ddev->dev_private;
 354         int i;
 355
 356         for (i = 0; i < priv->num_pipes; i++)
 357                 omap_connector_enable_hpd(priv->pipes[i].connector);
 358 }
 359
 360 /*
 361  * Disable the HPD in external components if supported
 362  */
 363 static void omap_modeset_disable_external_hpd(struct drm_device *ddev)
 364 {
 365         struct omap_drm_private *priv = ddev->dev_private;
 366         int i;
 367
 368         for (i = 0; i < priv->num_pipes; i++)
 369                 omap_connector_disable_hpd(priv->pipes[i].connector);
 370 }
 371
 372 /*
 373  * drm ioctl funcs
 374  */
 375
 376
 377 static int ioctl_get_param(struct drm_device *dev, void *data,
 378                 struct drm_file *file_priv)
 379 {
 380         struct omap_drm_private *priv = dev->dev_private;
 381         struct drm_omap_param *args = data;
 382
 383         DBG("%p: param=%llu", dev, args->param);
 384
 385         switch (args->param) {
 386         case OMAP_PARAM_CHIPSET_ID:
 387                 args->value = priv->omaprev;
 388                 break;
 389         default:
 390                 DBG("unknown parameter %lld", args->param);
 391                 return -EINVAL;
 392         }
 393
 394         return 0;
 395 }
 396
 397 static int ioctl_set_param(struct drm_device *dev, void *data,
 398                 struct drm_file *file_priv)
 399 {
 400         struct drm_omap_param *args = data;
 401
 402         switch (args->param) {
 403         default:
 404                 DBG("unknown parameter %lld", args->param);
 405                 return -EINVAL;
 406         }
 407
 408         return 0;
 409 }
 410
 411 #define OMAP_BO_USER_MASK       0x00ffffff      /* flags settable by userspace */
 412
 413 static int ioctl_gem_new(struct drm_device *dev, void *data,
 414                 struct drm_file *file_priv)
 415 {
 416         struct drm_omap_gem_new *args = data;
 417         u32 flags = args->flags & OMAP_BO_USER_MASK;
 418
 419         VERB("%p:%p: size=0x%08x, flags=%08x", dev, file_priv,
 420              args->size.bytes, flags);
 421
 422         return omap_gem_new_handle(dev, file_priv, args->size, flags,
 423                                    &args->handle);
 424 }
 425
 426 static int ioctl_gem_info(struct drm_device *dev, void *data,
 427                 struct drm_file *file_priv)
 428 {
 429         struct drm_omap_gem_info *args = data;
 430         struct drm_gem_object *obj;
 431         int ret = 0;
 432
 433         VERB("%p:%p: handle=%d", dev, file_priv, args->handle);
 434
 435         obj = drm_gem_object_lookup(file_priv, args->handle);
 436         if (!obj)
 437                 return -ENOENT;
 438
 439         args->size = omap_gem_mmap_size(obj);
 440         args->offset = omap_gem_mmap_offset(obj);
 441
 442         drm_gem_object_put_unlocked(obj);
 443
 444         return ret;
 445 }
 446
 447 static const struct drm_ioctl_desc ioctls[DRM_COMMAND_END - DRM_COMMAND_BASE] = {
 448         DRM_IOCTL_DEF_DRV(OMAP_GET_PARAM, ioctl_get_param,
 449                           DRM_AUTH | DRM_RENDER_ALLOW),
 450         DRM_IOCTL_DEF_DRV(OMAP_SET_PARAM, ioctl_set_param,
 451                           DRM_AUTH | DRM_MASTER | DRM_ROOT_ONLY),
 452         DRM_IOCTL_DEF_DRV(OMAP_GEM_NEW, ioctl_gem_new,
 453                           DRM_AUTH | DRM_RENDER_ALLOW),
 454         /* Deprecated, to be removed. */
 455         DRM_IOCTL_DEF_DRV(OMAP_GEM_CPU_PREP, drm_noop,
 456                           DRM_AUTH | DRM_RENDER_ALLOW),
 457         /* Deprecated, to be removed. */
 458         DRM_IOCTL_DEF_DRV(OMAP_GEM_CPU_FINI, drm_noop,
 459                           DRM_AUTH | DRM_RENDER_ALLOW),
 460         DRM_IOCTL_DEF_DRV(OMAP_GEM_INFO, ioctl_gem_info,
 461                           DRM_AUTH | DRM_RENDER_ALLOW),
 462 };
 463
 464 /*
 465  * drm driver funcs
 466  */
 467
 468 static int dev_open(struct drm_device *dev, struct drm_file *file)
 469 {
 470         file->driver_priv = NULL;
 471
 472         DBG("open: dev=%p, file=%p", dev, file);
 473
 474         return 0;
 475 }
 476
 477 static const struct vm_operations_struct omap_gem_vm_ops = {
 478         .fault = omap_gem_fault,
 479         .open = drm_gem_vm_open,
 480         .close = drm_gem_vm_close,
 481 };
 482
 483 static const struct file_operations omapdriver_fops = {
 484         .owner = THIS_MODULE,
 485         .open = drm_open,
 486         .unlocked_ioctl = drm_ioctl,
 487         .compat_ioctl = drm_compat_ioctl,
 488         .release = drm_release,
 489         .mmap = omap_gem_mmap,
 490         .poll = drm_poll,
 491         .read = drm_read,
 492         .llseek = noop_llseek,
 493 };
 494
 495 static struct drm_driver omap_drm_driver = {
 496         .driver_features = DRIVER_MODESET | DRIVER_GEM  | DRIVER_PRIME |
 497                 DRIVER_ATOMIC | DRIVER_RENDER,
 498         .open = dev_open,
 499         .lastclose = drm_fb_helper_lastclose,
 500 #ifdef CONFIG_DEBUG_FS
 501         .debugfs_init = omap_debugfs_init,
 502 #endif
 503         .prime_handle_to_fd = drm_gem_prime_handle_to_fd,
 504         .prime_fd_to_handle = drm_gem_prime_fd_to_handle,
 505         .gem_prime_export = omap_gem_prime_export,
 506         .gem_prime_import = omap_gem_prime_import,
 507         .gem_free_object_unlocked = omap_gem_free_object,
 508         .gem_vm_ops = &omap_gem_vm_ops,
 509         .dumb_create = omap_gem_dumb_create,
 510         .dumb_map_offset = omap_gem_dumb_map_offset,
 511         .ioctls = ioctls,
 512         .num_ioctls = DRM_OMAP_NUM_IOCTLS,
 513         .fops = &omapdriver_fops,
 514         .name = DRIVER_NAME,
 515         .desc = DRIVER_DESC,
 516         .date = DRIVER_DATE,
 517         .major = DRIVER_MAJOR,
 518         .minor = DRIVER_MINOR,
 519         .patchlevel = DRIVER_PATCHLEVEL,
 520 };
 521
 522 static const struct soc_device_attribute omapdrm_soc_devices[] = {
 523         { .family = "OMAP3", .data = (void *)0x3430 },
 524         { .family = "OMAP4", .data = (void *)0x4430 },
 525         { .family = "OMAP5", .data = (void *)0x5430 },
 526         { .family = "DRA7",  .data = (void *)0x0752 },
 527         { /* sentinel */ }
 528 };
 529
 530 static int omapdrm_init(struct omap_drm_private *priv, struct device *dev)
 531 {
 532         const struct soc_device_attribute *soc;
 533         struct drm_device *ddev;
 534         unsigned int i;
 535         int ret;
 536
 537         DBG("%s", dev_name(dev));
 538
 539         /* Allocate and initialize the DRM device. */
 540         ddev = drm_dev_alloc(&omap_drm_driver, dev);
 541         if (IS_ERR(ddev))
 542                 return PTR_ERR(ddev);
 543
 544         priv->ddev = ddev;
 545         ddev->dev_private = priv;
 546
 547         priv->dev = dev;
 548         priv->dss = omapdss_get_dss();
 549         priv->dispc = dispc_get_dispc(priv->dss);
 550         priv->dispc_ops = dispc_get_ops(priv->dss);
 551
 552         omap_crtc_pre_init(priv);
 553
 554         ret = omap_connect_pipelines(ddev);
 555         if (ret)
 556                 goto err_crtc_uninit;
 557
 558         soc = soc_device_match(omapdrm_soc_devices);
 559         priv->omaprev = soc ? (unsigned int)soc->data : 0;
 560         priv->wq = alloc_ordered_workqueue("omapdrm", 0);
 561
 562         mutex_init(&priv->list_lock);
 563         INIT_LIST_HEAD(&priv->obj_list);
 564
 565         /* Get memory bandwidth limits */
 566         if (priv->dispc_ops->get_memory_bandwidth_limit)
 567                 priv->max_bandwidth =
 568                         priv->dispc_ops->get_memory_bandwidth_limit(priv->dispc);
 569
 570         omap_gem_init(ddev);
 571
 572         ret = omap_modeset_init(ddev);
 573         if (ret) {
 574                 dev_err(priv->dev, "omap_modeset_init failed: ret=%d\n", ret);
 575                 goto err_gem_deinit;
 576         }
 577
 578         /* Initialize vblank handling, start with all CRTCs disabled. */
 579         ret = drm_vblank_init(ddev, priv->num_pipes);
 580         if (ret) {
 581                 dev_err(priv->dev, "could not init vblank\n");
 582                 goto err_cleanup_modeset;
 583         }
 584
 585         for (i = 0; i < priv->num_pipes; i++)
 586                 drm_crtc_vblank_off(priv->pipes[i].crtc);
 587
 588         omap_fbdev_init(ddev);
 589
 590         drm_kms_helper_poll_init(ddev);
 591         omap_modeset_enable_external_hpd(ddev);
 592
 593         /*
 594          * Register the DRM device with the core and the connectors with
 595          * sysfs.
 596          */
 597         ret = drm_dev_register(ddev, 0);
 598         if (ret)
 599                 goto err_cleanup_helpers;
 600
 601         return 0;
 602
 603 err_cleanup_helpers:
 604         omap_modeset_disable_external_hpd(ddev);
 605         drm_kms_helper_poll_fini(ddev);
 606
 607         omap_fbdev_fini(ddev);
 608 err_cleanup_modeset:
 609         drm_mode_config_cleanup(ddev);
 610         omap_drm_irq_uninstall(ddev);
 611 err_gem_deinit:
 612         omap_gem_deinit(ddev);
 613         destroy_workqueue(priv->wq);
 614         omap_disconnect_pipelines(ddev);
 615 err_crtc_uninit:
 616         omap_crtc_pre_uninit(priv);
 617         drm_dev_put(ddev);
 618         return ret;
 619 }
 620
 621 static void omapdrm_cleanup(struct omap_drm_private *priv)
 622 {
 623         struct drm_device *ddev = priv->ddev;
 624
 625         DBG("");
 626
 627         drm_dev_unregister(ddev);
 628
 629         omap_modeset_disable_external_hpd(ddev);
 630         drm_kms_helper_poll_fini(ddev);
 631
 632         omap_fbdev_fini(ddev);
 633
 634         drm_atomic_helper_shutdown(ddev);
 635
 636         drm_mode_config_cleanup(ddev);
 637
 638         omap_drm_irq_uninstall(ddev);
 639         omap_gem_deinit(ddev);
 640
 641         destroy_workqueue(priv->wq);
 642
 643         omap_disconnect_pipelines(ddev);
 644         omap_crtc_pre_uninit(priv);
 645
 646         drm_dev_put(ddev);
 647 }
 648
 649 static int pdev_probe(struct platform_device *pdev)
 650 {
 651         struct omap_drm_private *priv;
 652         int ret;
 653
 654         if (omapdss_is_initialized() == false)
 655                 return -EPROBE_DEFER;
 656
 657         ret = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32));
 658         if (ret) {
 659                 dev_err(&pdev->dev, "Failed to set the DMA mask\n");
 660                 return ret;
 661         }
 662
 663         /* Allocate and initialize the driver private structure. */
 664         priv = kzalloc(sizeof(*priv), GFP_KERNEL);
 665         if (!priv)
 666                 return -ENOMEM;
 667
 668         platform_set_drvdata(pdev, priv);
 669
 670         ret = omapdrm_init(priv, &pdev->dev);
 671         if (ret < 0)
 672                 kfree(priv);
 673
 674         return ret;
 675 }
 676
 677 static int pdev_remove(struct platform_device *pdev)
 678 {
 679         struct omap_drm_private *priv = platform_get_drvdata(pdev);
 680
 681         omapdrm_cleanup(priv);
 682         kfree(priv);
 683
 684         return 0;
 685 }
 686
 687 #ifdef CONFIG_PM_SLEEP
 688 static int omap_drm_suspend_all_displays(struct drm_device *ddev)
 689 {
 690         struct omap_drm_private *priv = ddev->dev_private;
 691         int i;
 692
 693         for (i = 0; i < priv->num_pipes; i++) {
 694                 struct omap_dss_device *display = priv->pipes[i].display;
 695
 696                 if (display->state == OMAP_DSS_DISPLAY_ACTIVE) {
 697                         display->ops->disable(display);
 698                         display->activate_after_resume = true;
 699                 } else {
 700                         display->activate_after_resume = false;
 701                 }
 702         }
 703
 704         return 0;
 705 }
 706
 707 static int omap_drm_resume_all_displays(struct drm_device *ddev)
 708 {
 709         struct omap_drm_private *priv = ddev->dev_private;
 710         int i;
 711
 712         for (i = 0; i < priv->num_pipes; i++) {
 713                 struct omap_dss_device *display = priv->pipes[i].display;
 714
 715                 if (display->activate_after_resume) {
 716                         display->ops->enable(display);
 717                         display->activate_after_resume = false;
 718                 }
 719         }
 720
 721         return 0;
 722 }
 723
 724 static int omap_drm_suspend(struct device *dev)
 725 {
 726         struct omap_drm_private *priv = dev_get_drvdata(dev);
 727         struct drm_device *drm_dev = priv->ddev;
 728
 729         drm_kms_helper_poll_disable(drm_dev);
 730
 731         drm_modeset_lock_all(drm_dev);
 732         omap_drm_suspend_all_displays(drm_dev);
 733         drm_modeset_unlock_all(drm_dev);
 734
 735         return 0;
 736 }
 737
 738 static int omap_drm_resume(struct device *dev)
 739 {
 740         struct omap_drm_private *priv = dev_get_drvdata(dev);
 741         struct drm_device *drm_dev = priv->ddev;
 742
 743         drm_modeset_lock_all(drm_dev);
 744         omap_drm_resume_all_displays(drm_dev);
 745         drm_modeset_unlock_all(drm_dev);
 746
 747         drm_kms_helper_poll_enable(drm_dev);
 748
 749         return omap_gem_resume(drm_dev);
 750 }
 751 #endif
 752
 753 static SIMPLE_DEV_PM_OPS(omapdrm_pm_ops, omap_drm_suspend, omap_drm_resume);
 754
 755 static struct platform_driver pdev = {
 756         .driver = {
 757                 .name = "omapdrm",
 758                 .pm = &omapdrm_pm_ops,
 759         },
 760         .probe = pdev_probe,
 761         .remove = pdev_remove,
 762 };
 763
 764 static struct platform_driver * const drivers[] = {
 765         &omap_dmm_driver,
 766         &pdev,
 767 };
 768
 769 static int __init omap_drm_init(void)
 770 {
 771         DBG("init");
 772
 773         return platform_register_drivers(drivers, ARRAY_SIZE(drivers));
 774 }
 775
 776 static void __exit omap_drm_fini(void)
 777 {
 778         DBG("fini");
 779
 780         platform_unregister_drivers(drivers, ARRAY_SIZE(drivers));
 781 }
 782
 783 /* need late_initcall() so we load after dss_driver's are loaded */
 784 late_initcall(omap_drm_init);
 785 module_exit(omap_drm_fini);
 786
 787 MODULE_AUTHOR("Rob Clark <[email protected]>");
 788 MODULE_DESCRIPTION("OMAP DRM Display Driver");
 789 MODULE_ALIAS("platform:" DRIVER_NAME);
 790 MODULE_LICENSE("GPL v2");