drivers/gpu/drm/i915/intel_sdvo.c

   1 /*
   2  * Copyright 2006 Dave Airlie <[email protected]>
   3  * Copyright © 2006-2007 Intel Corporation
   4  *   Jesse Barnes <[email protected]>
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a
   7  * copy of this software and associated documentation files (the "Software"),
   8  * to deal in the Software without restriction, including without limitation
   9  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  10  * and/or sell copies of the Software, and to permit persons to whom the
  11  * Software is furnished to do so, subject to the following conditions:
  12  *
  13  * The above copyright notice and this permission notice (including the next
  14  * paragraph) shall be included in all copies or substantial portions of the
  15  * Software.
  16  *
  17  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  18  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  19  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  20  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  21  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  22  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  23  * DEALINGS IN THE SOFTWARE.
  24  *
  25  * Authors:
  26  *      Eric Anholt <[email protected]>
  27  */
  28 #include <linux/i2c.h>
  29 #include <linux/slab.h>
  30 #include <linux/delay.h>
  31 #include <linux/export.h>
  32 #include <drm/drmP.h>
  33 #include <drm/drm_atomic_helper.h>
  34 #include <drm/drm_crtc.h>
  35 #include <drm/drm_edid.h>
  36 #include "intel_drv.h"
  37 #include <drm/i915_drm.h>
  38 #include "i915_drv.h"
  39 #include "intel_sdvo_regs.h"
  40
  41 #define SDVO_TMDS_MASK (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_TMDS1)
  42 #define SDVO_RGB_MASK  (SDVO_OUTPUT_RGB0 | SDVO_OUTPUT_RGB1)
  43 #define SDVO_LVDS_MASK (SDVO_OUTPUT_LVDS0 | SDVO_OUTPUT_LVDS1)
  44 #define SDVO_TV_MASK   (SDVO_OUTPUT_CVBS0 | SDVO_OUTPUT_SVID0 | SDVO_OUTPUT_YPRPB0)
  45
  46 #define SDVO_OUTPUT_MASK (SDVO_TMDS_MASK | SDVO_RGB_MASK | SDVO_LVDS_MASK |\
  47                         SDVO_TV_MASK)
  48
  49 #define IS_TV(c)        (c->output_flag & SDVO_TV_MASK)
  50 #define IS_TMDS(c)      (c->output_flag & SDVO_TMDS_MASK)
  51 #define IS_LVDS(c)      (c->output_flag & SDVO_LVDS_MASK)
  52 #define IS_TV_OR_LVDS(c) (c->output_flag & (SDVO_TV_MASK | SDVO_LVDS_MASK))
  53 #define IS_DIGITAL(c) (c->output_flag & (SDVO_TMDS_MASK | SDVO_LVDS_MASK))
  54
  55
  56 static const char * const tv_format_names[] = {
  57         "NTSC_M"   , "NTSC_J"  , "NTSC_443",
  58         "PAL_B"    , "PAL_D"   , "PAL_G"   ,
  59         "PAL_H"    , "PAL_I"   , "PAL_M"   ,
  60         "PAL_N"    , "PAL_NC"  , "PAL_60"  ,
  61         "SECAM_B"  , "SECAM_D" , "SECAM_G" ,
  62         "SECAM_K"  , "SECAM_K1", "SECAM_L" ,
  63         "SECAM_60"
  64 };
  65
  66 #define TV_FORMAT_NUM  ARRAY_SIZE(tv_format_names)
  67
  68 struct intel_sdvo {
  69         struct intel_encoder base;
  70
  71         struct i2c_adapter *i2c;
  72         u8 slave_addr;
  73
  74         struct i2c_adapter ddc;
  75
  76         /* Register for the SDVO device: SDVOB or SDVOC */
  77         i915_reg_t sdvo_reg;
  78
  79         /* Active outputs controlled by this SDVO output */
  80         uint16_t controlled_output;
  81
  82         /*
  83          * Capabilities of the SDVO device returned by
  84          * intel_sdvo_get_capabilities()
  85          */
  86         struct intel_sdvo_caps caps;
  87
  88         /* Pixel clock limitations reported by the SDVO device, in kHz */
  89         int pixel_clock_min, pixel_clock_max;
  90
  91         /*
  92         * For multiple function SDVO device,
  93         * this is for current attached outputs.
  94         */
  95         uint16_t attached_output;
  96
  97         /*
  98          * Hotplug activation bits for this device
  99          */
 100         uint16_t hotplug_active;
 101
 102         enum port port;
 103
 104         bool has_hdmi_monitor;
 105         bool has_hdmi_audio;
 106         bool rgb_quant_range_selectable;
 107
 108         /* DDC bus used by this SDVO encoder */
 109         uint8_t ddc_bus;
 110
 111         /*
 112          * the sdvo flag gets lost in round trip: dtd->adjusted_mode->dtd
 113          */
 114         uint8_t dtd_sdvo_flags;
 115 };
 116
 117 struct intel_sdvo_connector {
 118         struct intel_connector base;
 119
 120         /* Mark the type of connector */
 121         uint16_t output_flag;
 122
 123         /* This contains all current supported TV format */
 124         u8 tv_format_supported[TV_FORMAT_NUM];
 125         int   format_supported_num;
 126         struct drm_property *tv_format;
 127
 128         /* add the property for the SDVO-TV */
 129         struct drm_property *left;
 130         struct drm_property *right;
 131         struct drm_property *top;
 132         struct drm_property *bottom;
 133         struct drm_property *hpos;
 134         struct drm_property *vpos;
 135         struct drm_property *contrast;
 136         struct drm_property *saturation;
 137         struct drm_property *hue;
 138         struct drm_property *sharpness;
 139         struct drm_property *flicker_filter;
 140         struct drm_property *flicker_filter_adaptive;
 141         struct drm_property *flicker_filter_2d;
 142         struct drm_property *tv_chroma_filter;
 143         struct drm_property *tv_luma_filter;
 144         struct drm_property *dot_crawl;
 145
 146         /* add the property for the SDVO-TV/LVDS */
 147         struct drm_property *brightness;
 148
 149         /* this is to get the range of margin.*/
 150         u32 max_hscan, max_vscan;
 151
 152         /**
 153          * This is set if we treat the device as HDMI, instead of DVI.
 154          */
 155         bool is_hdmi;
 156 };
 157
 158 struct intel_sdvo_connector_state {
 159         /* base.base: tv.saturation/contrast/hue/brightness */
 160         struct intel_digital_connector_state base;
 161
 162         struct {
 163                 unsigned overscan_h, overscan_v, hpos, vpos, sharpness;
 164                 unsigned flicker_filter, flicker_filter_2d, flicker_filter_adaptive;
 165                 unsigned chroma_filter, luma_filter, dot_crawl;
 166         } tv;
 167 };
 168
 169 static struct intel_sdvo *to_sdvo(struct intel_encoder *encoder)
 170 {
 171         return container_of(encoder, struct intel_sdvo, base);
 172 }
 173
 174 static struct intel_sdvo *intel_attached_sdvo(struct drm_connector *connector)
 175 {
 176         return to_sdvo(intel_attached_encoder(connector));
 177 }
 178
 179 static struct intel_sdvo_connector *
 180 to_intel_sdvo_connector(struct drm_connector *connector)
 181 {
 182         return container_of(connector, struct intel_sdvo_connector, base.base);
 183 }
 184
 185 #define to_intel_sdvo_connector_state(conn_state) \
 186         container_of((conn_state), struct intel_sdvo_connector_state, base.base)
 187
 188 static bool
 189 intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, uint16_t flags);
 190 static bool
 191 intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo,
 192                               struct intel_sdvo_connector *intel_sdvo_connector,
 193                               int type);
 194 static bool
 195 intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo,
 196                                    struct intel_sdvo_connector *intel_sdvo_connector);
 197
 198 /*
 199  * Writes the SDVOB or SDVOC with the given value, but always writes both
 200  * SDVOB and SDVOC to work around apparent hardware issues (according to
 201  * comments in the BIOS).
 202  */
 203 static void intel_sdvo_write_sdvox(struct intel_sdvo *intel_sdvo, u32 val)
 204 {
 205         struct drm_device *dev = intel_sdvo->base.base.dev;
 206         struct drm_i915_private *dev_priv = to_i915(dev);
 207         u32 bval = val, cval = val;
 208         int i;
 209
 210         if (HAS_PCH_SPLIT(dev_priv)) {
 211                 I915_WRITE(intel_sdvo->sdvo_reg, val);
 212                 POSTING_READ(intel_sdvo->sdvo_reg);
 213                 /*
 214                  * HW workaround, need to write this twice for issue
 215                  * that may result in first write getting masked.
 216                  */
 217                 if (HAS_PCH_IBX(dev_priv)) {
 218                         I915_WRITE(intel_sdvo->sdvo_reg, val);
 219                         POSTING_READ(intel_sdvo->sdvo_reg);
 220                 }
 221                 return;
 222         }
 223
 224         if (intel_sdvo->port == PORT_B)
 225                 cval = I915_READ(GEN3_SDVOC);
 226         else
 227                 bval = I915_READ(GEN3_SDVOB);
 228
 229         /*
 230          * Write the registers twice for luck. Sometimes,
 231          * writing them only once doesn't appear to 'stick'.
 232          * The BIOS does this too. Yay, magic
 233          */
 234         for (i = 0; i < 2; i++) {
 235                 I915_WRITE(GEN3_SDVOB, bval);
 236                 POSTING_READ(GEN3_SDVOB);
 237
 238                 I915_WRITE(GEN3_SDVOC, cval);
 239                 POSTING_READ(GEN3_SDVOC);
 240         }
 241 }
 242
 243 static bool intel_sdvo_read_byte(struct intel_sdvo *intel_sdvo, u8 addr, u8 *ch)
 244 {
 245         struct i2c_msg msgs[] = {
 246                 {
 247                         .addr = intel_sdvo->slave_addr,
 248                         .flags = 0,
 249                         .len = 1,
 250                         .buf = &addr,
 251                 },
 252                 {
 253                         .addr = intel_sdvo->slave_addr,
 254                         .flags = I2C_M_RD,
 255                         .len = 1,
 256                         .buf = ch,
 257                 }
 258         };
 259         int ret;
 260
 261         if ((ret = i2c_transfer(intel_sdvo->i2c, msgs, 2)) == 2)
 262                 return true;
 263
 264         DRM_DEBUG_KMS("i2c transfer returned %d\n", ret);
 265         return false;
 266 }
 267
 268 #define SDVO_CMD_NAME_ENTRY(cmd) {cmd, #cmd}
 269 /** Mapping of command numbers to names, for debug output */
 270 static const struct _sdvo_cmd_name {
 271         u8 cmd;
 272         const char *name;
 273 } __attribute__ ((packed)) sdvo_cmd_names[] = {
 274         SDVO_CMD_NAME_ENTRY(SDVO_CMD_RESET),
 275         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DEVICE_CAPS),
 276         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FIRMWARE_REV),
 277         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TRAINED_INPUTS),
 278         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_OUTPUTS),
 279         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_OUTPUTS),
 280         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_IN_OUT_MAP),
 281         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_IN_OUT_MAP),
 282         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ATTACHED_DISPLAYS),
 283         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HOT_PLUG_SUPPORT),
 284         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_HOT_PLUG),
 285         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_HOT_PLUG),
 286         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INTERRUPT_EVENT_SOURCE),
 287         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_INPUT),
 288         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_OUTPUT),
 289         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART1),
 290         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART2),
 291         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1),
 292         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART2),
 293         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1),
 294         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART1),
 295         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART2),
 296         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART1),
 297         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART2),
 298         SDVO_CMD_NAME_ENTRY(SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING),
 299         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1),
 300         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2),
 301         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE),
 302         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_PIXEL_CLOCK_RANGE),
 303         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_CLOCK_RATE_MULTS),
 304         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CLOCK_RATE_MULT),
 305         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CLOCK_RATE_MULT),
 306         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_TV_FORMATS),
 307         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_FORMAT),
 308         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_FORMAT),
 309         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_POWER_STATES),
 310         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_POWER_STATE),
 311         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODER_POWER_STATE),
 312         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DISPLAY_POWER_STATE),
 313         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTROL_BUS_SWITCH),
 314         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT),
 315         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SCALED_HDTV_RESOLUTION_SUPPORT),
 316         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS),
 317
 318         /* Add the op code for SDVO enhancements */
 319         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HPOS),
 320         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HPOS),
 321         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HPOS),
 322         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_VPOS),
 323         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_VPOS),
 324         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_VPOS),
 325         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SATURATION),
 326         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SATURATION),
 327         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SATURATION),
 328         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HUE),
 329         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HUE),
 330         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HUE),
 331         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_CONTRAST),
 332         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CONTRAST),
 333         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTRAST),
 334         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_BRIGHTNESS),
 335         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_BRIGHTNESS),
 336         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_BRIGHTNESS),
 337         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_H),
 338         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_H),
 339         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_H),
 340         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_V),
 341         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_V),
 342         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_V),
 343         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER),
 344         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER),
 345         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER),
 346         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_ADAPTIVE),
 347         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_ADAPTIVE),
 348         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_ADAPTIVE),
 349         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_2D),
 350         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_2D),
 351         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_2D),
 352         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SHARPNESS),
 353         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SHARPNESS),
 354         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SHARPNESS),
 355         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DOT_CRAWL),
 356         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DOT_CRAWL),
 357         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_CHROMA_FILTER),
 358         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_CHROMA_FILTER),
 359         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_CHROMA_FILTER),
 360         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_LUMA_FILTER),
 361         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_LUMA_FILTER),
 362         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_LUMA_FILTER),
 363
 364         /* HDMI op code */
 365         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPP_ENCODE),
 366         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ENCODE),
 367         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODE),
 368         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_PIXEL_REPLI),
 369         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PIXEL_REPLI),
 370         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY_CAP),
 371         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_COLORIMETRY),
 372         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY),
 373         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_ENCRYPT_PREFER),
 374         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_AUDIO_STAT),
 375         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_STAT),
 376         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INDEX),
 377         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_INDEX),
 378         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INFO),
 379         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_AV_SPLIT),
 380         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_AV_SPLIT),
 381         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_TXRATE),
 382         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_TXRATE),
 383         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_DATA),
 384         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_DATA),
 385 };
 386
 387 #define SDVO_NAME(svdo) ((svdo)->port == PORT_B ? "SDVOB" : "SDVOC")
 388
 389 static void intel_sdvo_debug_write(struct intel_sdvo *intel_sdvo, u8 cmd,
 390                                    const void *args, int args_len)
 391 {
 392         int i, pos = 0;
 393 #define BUF_LEN 256
 394         char buffer[BUF_LEN];
 395
 396 #define BUF_PRINT(args...) \
 397         pos += snprintf(buffer + pos, max_t(int, BUF_LEN - pos, 0), args)
 398
 399
 400         for (i = 0; i < args_len; i++) {
 401                 BUF_PRINT("%02X ", ((u8 *)args)[i]);
 402         }
 403         for (; i < 8; i++) {
 404                 BUF_PRINT("   ");
 405         }
 406         for (i = 0; i < ARRAY_SIZE(sdvo_cmd_names); i++) {
 407                 if (cmd == sdvo_cmd_names[i].cmd) {
 408                         BUF_PRINT("(%s)", sdvo_cmd_names[i].name);
 409                         break;
 410                 }
 411         }
 412         if (i == ARRAY_SIZE(sdvo_cmd_names)) {
 413                 BUF_PRINT("(%02X)", cmd);
 414         }
 415         BUG_ON(pos >= BUF_LEN - 1);
 416 #undef BUF_PRINT
 417 #undef BUF_LEN
 418
 419         DRM_DEBUG_KMS("%s: W: %02X %s\n", SDVO_NAME(intel_sdvo), cmd, buffer);
 420 }
 421
 422 static const char * const cmd_status_names[] = {
 423         "Power on",
 424         "Success",
 425         "Not supported",
 426         "Invalid arg",
 427         "Pending",
 428         "Target not specified",
 429         "Scaling not supported"
 430 };
 431
 432 static bool __intel_sdvo_write_cmd(struct intel_sdvo *intel_sdvo, u8 cmd,
 433                                    const void *args, int args_len,
 434                                    bool unlocked)
 435 {
 436         u8 *buf, status;
 437         struct i2c_msg *msgs;
 438         int i, ret = true;
 439
 440         /* Would be simpler to allocate both in one go ? */
 441         buf = kzalloc(args_len * 2 + 2, GFP_KERNEL);
 442         if (!buf)
 443                 return false;
 444
 445         msgs = kcalloc(args_len + 3, sizeof(*msgs), GFP_KERNEL);
 446         if (!msgs) {
 447                 kfree(buf);
 448                 return false;
 449         }
 450
 451         intel_sdvo_debug_write(intel_sdvo, cmd, args, args_len);
 452
 453         for (i = 0; i < args_len; i++) {
 454                 msgs[i].addr = intel_sdvo->slave_addr;
 455                 msgs[i].flags = 0;
 456                 msgs[i].len = 2;
 457                 msgs[i].buf = buf + 2 *i;
 458                 buf[2*i + 0] = SDVO_I2C_ARG_0 - i;
 459                 buf[2*i + 1] = ((u8*)args)[i];
 460         }
 461         msgs[i].addr = intel_sdvo->slave_addr;
 462         msgs[i].flags = 0;
 463         msgs[i].len = 2;
 464         msgs[i].buf = buf + 2*i;
 465         buf[2*i + 0] = SDVO_I2C_OPCODE;
 466         buf[2*i + 1] = cmd;
 467
 468         /* the following two are to read the response */
 469         status = SDVO_I2C_CMD_STATUS;
 470         msgs[i+1].addr = intel_sdvo->slave_addr;
 471         msgs[i+1].flags = 0;
 472         msgs[i+1].len = 1;
 473         msgs[i+1].buf = &status;
 474
 475         msgs[i+2].addr = intel_sdvo->slave_addr;
 476         msgs[i+2].flags = I2C_M_RD;
 477         msgs[i+2].len = 1;
 478         msgs[i+2].buf = &status;
 479
 480         if (unlocked)
 481                 ret = i2c_transfer(intel_sdvo->i2c, msgs, i+3);
 482         else
 483                 ret = __i2c_transfer(intel_sdvo->i2c, msgs, i+3);
 484         if (ret < 0) {
 485                 DRM_DEBUG_KMS("I2c transfer returned %d\n", ret);
 486                 ret = false;
 487                 goto out;
 488         }
 489         if (ret != i+3) {
 490                 /* failure in I2C transfer */
 491                 DRM_DEBUG_KMS("I2c transfer returned %d/%d\n", ret, i+3);
 492                 ret = false;
 493         }
 494
 495 out:
 496         kfree(msgs);
 497         kfree(buf);
 498         return ret;
 499 }
 500
 501 static bool intel_sdvo_write_cmd(struct intel_sdvo *intel_sdvo, u8 cmd,
 502                                  const void *args, int args_len)
 503 {
 504         return __intel_sdvo_write_cmd(intel_sdvo, cmd, args, args_len, true);
 505 }
 506
 507 static bool intel_sdvo_read_response(struct intel_sdvo *intel_sdvo,
 508                                      void *response, int response_len)
 509 {
 510         u8 retry = 15; /* 5 quick checks, followed by 10 long checks */
 511         u8 status;
 512         int i, pos = 0;
 513 #define BUF_LEN 256
 514         char buffer[BUF_LEN];
 515
 516
 517         /*
 518          * The documentation states that all commands will be
 519          * processed within 15µs, and that we need only poll
 520          * the status byte a maximum of 3 times in order for the
 521          * command to be complete.
 522          *
 523          * Check 5 times in case the hardware failed to read the docs.
 524          *
 525          * Also beware that the first response by many devices is to
 526          * reply PENDING and stall for time. TVs are notorious for
 527          * requiring longer than specified to complete their replies.
 528          * Originally (in the DDX long ago), the delay was only ever 15ms
 529          * with an additional delay of 30ms applied for TVs added later after
 530          * many experiments. To accommodate both sets of delays, we do a
 531          * sequence of slow checks if the device is falling behind and fails
 532          * to reply within 5*15µs.
 533          */
 534         if (!intel_sdvo_read_byte(intel_sdvo,
 535                                   SDVO_I2C_CMD_STATUS,
 536                                   &status))
 537                 goto log_fail;
 538
 539         while ((status == SDVO_CMD_STATUS_PENDING ||
 540                 status == SDVO_CMD_STATUS_TARGET_NOT_SPECIFIED) && --retry) {
 541                 if (retry < 10)
 542                         msleep(15);
 543                 else
 544                         udelay(15);
 545
 546                 if (!intel_sdvo_read_byte(intel_sdvo,
 547                                           SDVO_I2C_CMD_STATUS,
 548                                           &status))
 549                         goto log_fail;
 550         }
 551
 552 #define BUF_PRINT(args...) \
 553         pos += snprintf(buffer + pos, max_t(int, BUF_LEN - pos, 0), args)
 554
 555         if (status <= SDVO_CMD_STATUS_SCALING_NOT_SUPP)
 556                 BUF_PRINT("(%s)", cmd_status_names[status]);
 557         else
 558                 BUF_PRINT("(??? %d)", status);
 559
 560         if (status != SDVO_CMD_STATUS_SUCCESS)
 561                 goto log_fail;
 562
 563         /* Read the command response */
 564         for (i = 0; i < response_len; i++) {
 565                 if (!intel_sdvo_read_byte(intel_sdvo,
 566                                           SDVO_I2C_RETURN_0 + i,
 567                                           &((u8 *)response)[i]))
 568                         goto log_fail;
 569                 BUF_PRINT(" %02X", ((u8 *)response)[i]);
 570         }
 571         BUG_ON(pos >= BUF_LEN - 1);
 572 #undef BUF_PRINT
 573 #undef BUF_LEN
 574
 575         DRM_DEBUG_KMS("%s: R: %s\n", SDVO_NAME(intel_sdvo), buffer);
 576         return true;
 577
 578 log_fail:
 579         DRM_DEBUG_KMS("%s: R: ... failed\n", SDVO_NAME(intel_sdvo));
 580         return false;
 581 }
 582
 583 static int intel_sdvo_get_pixel_multiplier(const struct drm_display_mode *adjusted_mode)
 584 {
 585         if (adjusted_mode->crtc_clock >= 100000)
 586                 return 1;
 587         else if (adjusted_mode->crtc_clock >= 50000)
 588                 return 2;
 589         else
 590                 return 4;
 591 }
 592
 593 static bool __intel_sdvo_set_control_bus_switch(struct intel_sdvo *intel_sdvo,
 594                                                 u8 ddc_bus)
 595 {
 596         /* This must be the immediately preceding write before the i2c xfer */
 597         return __intel_sdvo_write_cmd(intel_sdvo,
 598                                       SDVO_CMD_SET_CONTROL_BUS_SWITCH,
 599                                       &ddc_bus, 1, false);
 600 }
 601
 602 static bool intel_sdvo_set_value(struct intel_sdvo *intel_sdvo, u8 cmd, const void *data, int len)
 603 {
 604         if (!intel_sdvo_write_cmd(intel_sdvo, cmd, data, len))
 605                 return false;
 606
 607         return intel_sdvo_read_response(intel_sdvo, NULL, 0);
 608 }
 609
 610 static bool
 611 intel_sdvo_get_value(struct intel_sdvo *intel_sdvo, u8 cmd, void *value, int len)
 612 {
 613         if (!intel_sdvo_write_cmd(intel_sdvo, cmd, NULL, 0))
 614                 return false;
 615
 616         return intel_sdvo_read_response(intel_sdvo, value, len);
 617 }
 618
 619 static bool intel_sdvo_set_target_input(struct intel_sdvo *intel_sdvo)
 620 {
 621         struct intel_sdvo_set_target_input_args targets = {0};
 622         return intel_sdvo_set_value(intel_sdvo,
 623                                     SDVO_CMD_SET_TARGET_INPUT,
 624                                     &targets, sizeof(targets));
 625 }
 626
 627 /*
 628  * Return whether each input is trained.
 629  *
 630  * This function is making an assumption about the layout of the response,
 631  * which should be checked against the docs.
 632  */
 633 static bool intel_sdvo_get_trained_inputs(struct intel_sdvo *intel_sdvo, bool *input_1, bool *input_2)
 634 {
 635         struct intel_sdvo_get_trained_inputs_response response;
 636
 637         BUILD_BUG_ON(sizeof(response) != 1);
 638         if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_TRAINED_INPUTS,
 639                                   &response, sizeof(response)))
 640                 return false;
 641
 642         *input_1 = response.input0_trained;
 643         *input_2 = response.input1_trained;
 644         return true;
 645 }
 646
 647 static bool intel_sdvo_set_active_outputs(struct intel_sdvo *intel_sdvo,
 648                                           u16 outputs)
 649 {
 650         return intel_sdvo_set_value(intel_sdvo,
 651                                     SDVO_CMD_SET_ACTIVE_OUTPUTS,
 652                                     &outputs, sizeof(outputs));
 653 }
 654
 655 static bool intel_sdvo_get_active_outputs(struct intel_sdvo *intel_sdvo,
 656                                           u16 *outputs)
 657 {
 658         return intel_sdvo_get_value(intel_sdvo,
 659                                     SDVO_CMD_GET_ACTIVE_OUTPUTS,
 660                                     outputs, sizeof(*outputs));
 661 }
 662
 663 static bool intel_sdvo_set_encoder_power_state(struct intel_sdvo *intel_sdvo,
 664                                                int mode)
 665 {
 666         u8 state = SDVO_ENCODER_STATE_ON;
 667
 668         switch (mode) {
 669         case DRM_MODE_DPMS_ON:
 670                 state = SDVO_ENCODER_STATE_ON;
 671                 break;
 672         case DRM_MODE_DPMS_STANDBY:
 673                 state = SDVO_ENCODER_STATE_STANDBY;
 674                 break;
 675         case DRM_MODE_DPMS_SUSPEND:
 676                 state = SDVO_ENCODER_STATE_SUSPEND;
 677                 break;
 678         case DRM_MODE_DPMS_OFF:
 679                 state = SDVO_ENCODER_STATE_OFF;
 680                 break;
 681         }
 682
 683         return intel_sdvo_set_value(intel_sdvo,
 684                                     SDVO_CMD_SET_ENCODER_POWER_STATE, &state, sizeof(state));
 685 }
 686
 687 static bool intel_sdvo_get_input_pixel_clock_range(struct intel_sdvo *intel_sdvo,
 688                                                    int *clock_min,
 689                                                    int *clock_max)
 690 {
 691         struct intel_sdvo_pixel_clock_range clocks;
 692
 693         BUILD_BUG_ON(sizeof(clocks) != 4);
 694         if (!intel_sdvo_get_value(intel_sdvo,
 695                                   SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE,
 696                                   &clocks, sizeof(clocks)))
 697                 return false;
 698
 699         /* Convert the values from units of 10 kHz to kHz. */
 700         *clock_min = clocks.min * 10;
 701         *clock_max = clocks.max * 10;
 702         return true;
 703 }
 704
 705 static bool intel_sdvo_set_target_output(struct intel_sdvo *intel_sdvo,
 706                                          u16 outputs)
 707 {
 708         return intel_sdvo_set_value(intel_sdvo,
 709                                     SDVO_CMD_SET_TARGET_OUTPUT,
 710                                     &outputs, sizeof(outputs));
 711 }
 712
 713 static bool intel_sdvo_set_timing(struct intel_sdvo *intel_sdvo, u8 cmd,
 714                                   struct intel_sdvo_dtd *dtd)
 715 {
 716         return intel_sdvo_set_value(intel_sdvo, cmd, &dtd->part1, sizeof(dtd->part1)) &&
 717                 intel_sdvo_set_value(intel_sdvo, cmd + 1, &dtd->part2, sizeof(dtd->part2));
 718 }
 719
 720 static bool intel_sdvo_get_timing(struct intel_sdvo *intel_sdvo, u8 cmd,
 721                                   struct intel_sdvo_dtd *dtd)
 722 {
 723         return intel_sdvo_get_value(intel_sdvo, cmd, &dtd->part1, sizeof(dtd->part1)) &&
 724                 intel_sdvo_get_value(intel_sdvo, cmd + 1, &dtd->part2, sizeof(dtd->part2));
 725 }
 726
 727 static bool intel_sdvo_set_input_timing(struct intel_sdvo *intel_sdvo,
 728                                          struct intel_sdvo_dtd *dtd)
 729 {
 730         return intel_sdvo_set_timing(intel_sdvo,
 731                                      SDVO_CMD_SET_INPUT_TIMINGS_PART1, dtd);
 732 }
 733
 734 static bool intel_sdvo_set_output_timing(struct intel_sdvo *intel_sdvo,
 735                                          struct intel_sdvo_dtd *dtd)
 736 {
 737         return intel_sdvo_set_timing(intel_sdvo,
 738                                      SDVO_CMD_SET_OUTPUT_TIMINGS_PART1, dtd);
 739 }
 740
 741 static bool intel_sdvo_get_input_timing(struct intel_sdvo *intel_sdvo,
 742                                         struct intel_sdvo_dtd *dtd)
 743 {
 744         return intel_sdvo_get_timing(intel_sdvo,
 745                                      SDVO_CMD_GET_INPUT_TIMINGS_PART1, dtd);
 746 }
 747
 748 static bool
 749 intel_sdvo_create_preferred_input_timing(struct intel_sdvo *intel_sdvo,
 750                                          struct intel_sdvo_connector *intel_sdvo_connector,
 751                                          uint16_t clock,
 752                                          uint16_t width,
 753                                          uint16_t height)
 754 {
 755         struct intel_sdvo_preferred_input_timing_args args;
 756
 757         memset(&args, 0, sizeof(args));
 758         args.clock = clock;
 759         args.width = width;
 760         args.height = height;
 761         args.interlace = 0;
 762
 763         if (IS_LVDS(intel_sdvo_connector)) {
 764                 const struct drm_display_mode *fixed_mode =
 765                         intel_sdvo_connector->base.panel.fixed_mode;
 766
 767                 if (fixed_mode->hdisplay != width ||
 768                     fixed_mode->vdisplay != height)
 769                         args.scaled = 1;
 770         }
 771
 772         return intel_sdvo_set_value(intel_sdvo,
 773                                     SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING,
 774                                     &args, sizeof(args));
 775 }
 776
 777 static bool intel_sdvo_get_preferred_input_timing(struct intel_sdvo *intel_sdvo,
 778                                                   struct intel_sdvo_dtd *dtd)
 779 {
 780         BUILD_BUG_ON(sizeof(dtd->part1) != 8);
 781         BUILD_BUG_ON(sizeof(dtd->part2) != 8);
 782         return intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1,
 783                                     &dtd->part1, sizeof(dtd->part1)) &&
 784                 intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2,
 785                                      &dtd->part2, sizeof(dtd->part2));
 786 }
 787
 788 static bool intel_sdvo_set_clock_rate_mult(struct intel_sdvo *intel_sdvo, u8 val)
 789 {
 790         return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_CLOCK_RATE_MULT, &val, 1);
 791 }
 792
 793 static void intel_sdvo_get_dtd_from_mode(struct intel_sdvo_dtd *dtd,
 794                                          const struct drm_display_mode *mode)
 795 {
 796         uint16_t width, height;
 797         uint16_t h_blank_len, h_sync_len, v_blank_len, v_sync_len;
 798         uint16_t h_sync_offset, v_sync_offset;
 799         int mode_clock;
 800
 801         memset(dtd, 0, sizeof(*dtd));
 802
 803         width = mode->hdisplay;
 804         height = mode->vdisplay;
 805
 806         /* do some mode translations */
 807         h_blank_len = mode->htotal - mode->hdisplay;
 808         h_sync_len = mode->hsync_end - mode->hsync_start;
 809
 810         v_blank_len = mode->vtotal - mode->vdisplay;
 811         v_sync_len = mode->vsync_end - mode->vsync_start;
 812
 813         h_sync_offset = mode->hsync_start - mode->hdisplay;
 814         v_sync_offset = mode->vsync_start - mode->vdisplay;
 815
 816         mode_clock = mode->clock;
 817         mode_clock /= 10;
 818         dtd->part1.clock = mode_clock;
 819
 820         dtd->part1.h_active = width & 0xff;
 821         dtd->part1.h_blank = h_blank_len & 0xff;
 822         dtd->part1.h_high = (((width >> 8) & 0xf) << 4) |
 823                 ((h_blank_len >> 8) & 0xf);
 824         dtd->part1.v_active = height & 0xff;
 825         dtd->part1.v_blank = v_blank_len & 0xff;
 826         dtd->part1.v_high = (((height >> 8) & 0xf) << 4) |
 827                 ((v_blank_len >> 8) & 0xf);
 828
 829         dtd->part2.h_sync_off = h_sync_offset & 0xff;
 830         dtd->part2.h_sync_width = h_sync_len & 0xff;
 831         dtd->part2.v_sync_off_width = (v_sync_offset & 0xf) << 4 |
 832                 (v_sync_len & 0xf);
 833         dtd->part2.sync_off_width_high = ((h_sync_offset & 0x300) >> 2) |
 834                 ((h_sync_len & 0x300) >> 4) | ((v_sync_offset & 0x30) >> 2) |
 835                 ((v_sync_len & 0x30) >> 4);
 836
 837         dtd->part2.dtd_flags = 0x18;
 838         if (mode->flags & DRM_MODE_FLAG_INTERLACE)
 839                 dtd->part2.dtd_flags |= DTD_FLAG_INTERLACE;
 840         if (mode->flags & DRM_MODE_FLAG_PHSYNC)
 841                 dtd->part2.dtd_flags |= DTD_FLAG_HSYNC_POSITIVE;
 842         if (mode->flags & DRM_MODE_FLAG_PVSYNC)
 843                 dtd->part2.dtd_flags |= DTD_FLAG_VSYNC_POSITIVE;
 844
 845         dtd->part2.v_sync_off_high = v_sync_offset & 0xc0;
 846 }
 847
 848 static void intel_sdvo_get_mode_from_dtd(struct drm_display_mode *pmode,
 849                                          const struct intel_sdvo_dtd *dtd)
 850 {
 851         struct drm_display_mode mode = {};
 852
 853         mode.hdisplay = dtd->part1.h_active;
 854         mode.hdisplay += ((dtd->part1.h_high >> 4) & 0x0f) << 8;
 855         mode.hsync_start = mode.hdisplay + dtd->part2.h_sync_off;
 856         mode.hsync_start += (dtd->part2.sync_off_width_high & 0xc0) << 2;
 857         mode.hsync_end = mode.hsync_start + dtd->part2.h_sync_width;
 858         mode.hsync_end += (dtd->part2.sync_off_width_high & 0x30) << 4;
 859         mode.htotal = mode.hdisplay + dtd->part1.h_blank;
 860         mode.htotal += (dtd->part1.h_high & 0xf) << 8;
 861
 862         mode.vdisplay = dtd->part1.v_active;
 863         mode.vdisplay += ((dtd->part1.v_high >> 4) & 0x0f) << 8;
 864         mode.vsync_start = mode.vdisplay;
 865         mode.vsync_start += (dtd->part2.v_sync_off_width >> 4) & 0xf;
 866         mode.vsync_start += (dtd->part2.sync_off_width_high & 0x0c) << 2;
 867         mode.vsync_start += dtd->part2.v_sync_off_high & 0xc0;
 868         mode.vsync_end = mode.vsync_start +
 869                 (dtd->part2.v_sync_off_width & 0xf);
 870         mode.vsync_end += (dtd->part2.sync_off_width_high & 0x3) << 4;
 871         mode.vtotal = mode.vdisplay + dtd->part1.v_blank;
 872         mode.vtotal += (dtd->part1.v_high & 0xf) << 8;
 873
 874         mode.clock = dtd->part1.clock * 10;
 875
 876         if (dtd->part2.dtd_flags & DTD_FLAG_INTERLACE)
 877                 mode.flags |= DRM_MODE_FLAG_INTERLACE;
 878         if (dtd->part2.dtd_flags & DTD_FLAG_HSYNC_POSITIVE)
 879                 mode.flags |= DRM_MODE_FLAG_PHSYNC;
 880         else
 881                 mode.flags |= DRM_MODE_FLAG_NHSYNC;
 882         if (dtd->part2.dtd_flags & DTD_FLAG_VSYNC_POSITIVE)
 883                 mode.flags |= DRM_MODE_FLAG_PVSYNC;
 884         else
 885                 mode.flags |= DRM_MODE_FLAG_NVSYNC;
 886
 887         drm_mode_set_crtcinfo(&mode, 0);
 888
 889         drm_mode_copy(pmode, &mode);
 890 }
 891
 892 static bool intel_sdvo_check_supp_encode(struct intel_sdvo *intel_sdvo)
 893 {
 894         struct intel_sdvo_encode encode;
 895
 896         BUILD_BUG_ON(sizeof(encode) != 2);
 897         return intel_sdvo_get_value(intel_sdvo,
 898                                   SDVO_CMD_GET_SUPP_ENCODE,
 899                                   &encode, sizeof(encode));
 900 }
 901
 902 static bool intel_sdvo_set_encode(struct intel_sdvo *intel_sdvo,
 903                                   uint8_t mode)
 904 {
 905         return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_ENCODE, &mode, 1);
 906 }
 907
 908 static bool intel_sdvo_set_colorimetry(struct intel_sdvo *intel_sdvo,
 909                                        uint8_t mode)
 910 {
 911         return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_COLORIMETRY, &mode, 1);
 912 }
 913
 914 #if 0
 915 static void intel_sdvo_dump_hdmi_buf(struct intel_sdvo *intel_sdvo)
 916 {
 917         int i, j;
 918         uint8_t set_buf_index[2];
 919         uint8_t av_split;
 920         uint8_t buf_size;
 921         uint8_t buf[48];
 922         uint8_t *pos;
 923
 924         intel_sdvo_get_value(encoder, SDVO_CMD_GET_HBUF_AV_SPLIT, &av_split, 1);
 925
 926         for (i = 0; i <= av_split; i++) {
 927                 set_buf_index[0] = i; set_buf_index[1] = 0;
 928                 intel_sdvo_write_cmd(encoder, SDVO_CMD_SET_HBUF_INDEX,
 929                                      set_buf_index, 2);
 930                 intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_INFO, NULL, 0);
 931                 intel_sdvo_read_response(encoder, &buf_size, 1);
 932
 933                 pos = buf;
 934                 for (j = 0; j <= buf_size; j += 8) {
 935                         intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_DATA,
 936                                              NULL, 0);
 937                         intel_sdvo_read_response(encoder, pos, 8);
 938                         pos += 8;
 939                 }
 940         }
 941 }
 942 #endif
 943
 944 static bool intel_sdvo_write_infoframe(struct intel_sdvo *intel_sdvo,
 945                                        unsigned if_index, uint8_t tx_rate,
 946                                        const uint8_t *data, unsigned length)
 947 {
 948         uint8_t set_buf_index[2] = { if_index, 0 };
 949         uint8_t hbuf_size, tmp[8];
 950         int i;
 951
 952         if (!intel_sdvo_set_value(intel_sdvo,
 953                                   SDVO_CMD_SET_HBUF_INDEX,
 954                                   set_buf_index, 2))
 955                 return false;
 956
 957         if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_HBUF_INFO,
 958                                   &hbuf_size, 1))
 959                 return false;
 960
 961         /* Buffer size is 0 based, hooray! */
 962         hbuf_size++;
 963
 964         DRM_DEBUG_KMS("writing sdvo hbuf: %i, hbuf_size %i, hbuf_size: %i\n",
 965                       if_index, length, hbuf_size);
 966
 967         for (i = 0; i < hbuf_size; i += 8) {
 968                 memset(tmp, 0, 8);
 969                 if (i < length)
 970                         memcpy(tmp, data + i, min_t(unsigned, 8, length - i));
 971
 972                 if (!intel_sdvo_set_value(intel_sdvo,
 973                                           SDVO_CMD_SET_HBUF_DATA,
 974                                           tmp, 8))
 975                         return false;
 976         }
 977
 978         return intel_sdvo_set_value(intel_sdvo,
 979                                     SDVO_CMD_SET_HBUF_TXRATE,
 980                                     &tx_rate, 1);
 981 }
 982
 983 static bool intel_sdvo_set_avi_infoframe(struct intel_sdvo *intel_sdvo,
 984                                          const struct intel_crtc_state *pipe_config)
 985 {
 986         uint8_t sdvo_data[HDMI_INFOFRAME_SIZE(AVI)];
 987         union hdmi_infoframe frame;
 988         int ret;
 989         ssize_t len;
 990
 991         ret = drm_hdmi_avi_infoframe_from_display_mode(&frame.avi,
 992                                                        &pipe_config->base.adjusted_mode,
 993                                                        false);
 994         if (ret < 0) {
 995                 DRM_ERROR("couldn't fill AVI infoframe\n");
 996                 return false;
 997         }
 998
 999         if (intel_sdvo->rgb_quant_range_selectable) {
1000                 if (pipe_config->limited_color_range)
1001                         frame.avi.quantization_range =
1002                                 HDMI_QUANTIZATION_RANGE_LIMITED;
1003                 else
1004                         frame.avi.quantization_range =
1005                                 HDMI_QUANTIZATION_RANGE_FULL;
1006         }
1007
1008         len = hdmi_infoframe_pack(&frame, sdvo_data, sizeof(sdvo_data));
1009         if (len < 0)
1010                 return false;
1011
1012         return intel_sdvo_write_infoframe(intel_sdvo, SDVO_HBUF_INDEX_AVI_IF,
1013                                           SDVO_HBUF_TX_VSYNC,
1014                                           sdvo_data, sizeof(sdvo_data));
1015 }
1016
1017 static bool intel_sdvo_set_tv_format(struct intel_sdvo *intel_sdvo,
1018                                      const struct drm_connector_state *conn_state)
1019 {
1020         struct intel_sdvo_tv_format format;
1021         uint32_t format_map;
1022
1023         format_map = 1 << conn_state->tv.mode;
1024         memset(&format, 0, sizeof(format));
1025         memcpy(&format, &format_map, min(sizeof(format), sizeof(format_map)));
1026
1027         BUILD_BUG_ON(sizeof(format) != 6);
1028         return intel_sdvo_set_value(intel_sdvo,
1029                                     SDVO_CMD_SET_TV_FORMAT,
1030                                     &format, sizeof(format));
1031 }
1032
1033 static bool
1034 intel_sdvo_set_output_timings_from_mode(struct intel_sdvo *intel_sdvo,
1035                                         const struct drm_display_mode *mode)
1036 {
1037         struct intel_sdvo_dtd output_dtd;
1038
1039         if (!intel_sdvo_set_target_output(intel_sdvo,
1040                                           intel_sdvo->attached_output))
1041                 return false;
1042
1043         intel_sdvo_get_dtd_from_mode(&output_dtd, mode);
1044         if (!intel_sdvo_set_output_timing(intel_sdvo, &output_dtd))
1045                 return false;
1046
1047         return true;
1048 }
1049
1050 /*
1051  * Asks the sdvo controller for the preferred input mode given the output mode.
1052  * Unfortunately we have to set up the full output mode to do that.
1053  */
1054 static bool
1055 intel_sdvo_get_preferred_input_mode(struct intel_sdvo *intel_sdvo,
1056                                     struct intel_sdvo_connector *intel_sdvo_connector,
1057                                     const struct drm_display_mode *mode,
1058                                     struct drm_display_mode *adjusted_mode)
1059 {
1060         struct intel_sdvo_dtd input_dtd;
1061
1062         /* Reset the input timing to the screen. Assume always input 0. */
1063         if (!intel_sdvo_set_target_input(intel_sdvo))
1064                 return false;
1065
1066         if (!intel_sdvo_create_preferred_input_timing(intel_sdvo,
1067                                                       intel_sdvo_connector,
1068                                                       mode->clock / 10,
1069                                                       mode->hdisplay,
1070                                                       mode->vdisplay))
1071                 return false;
1072
1073         if (!intel_sdvo_get_preferred_input_timing(intel_sdvo,
1074                                                    &input_dtd))
1075                 return false;
1076
1077         intel_sdvo_get_mode_from_dtd(adjusted_mode, &input_dtd);
1078         intel_sdvo->dtd_sdvo_flags = input_dtd.part2.sdvo_flags;
1079
1080         return true;
1081 }
1082
1083 static void i9xx_adjust_sdvo_tv_clock(struct intel_crtc_state *pipe_config)
1084 {
1085         unsigned dotclock = pipe_config->port_clock;
1086         struct dpll *clock = &pipe_config->dpll;
1087
1088         /*
1089          * SDVO TV has fixed PLL values depend on its clock range,
1090          * this mirrors vbios setting.
1091          */
1092         if (dotclock >= 100000 && dotclock < 140500) {
1093                 clock->p1 = 2;
1094                 clock->p2 = 10;
1095                 clock->n = 3;
1096                 clock->m1 = 16;
1097                 clock->m2 = 8;
1098         } else if (dotclock >= 140500 && dotclock <= 200000) {
1099                 clock->p1 = 1;
1100                 clock->p2 = 10;
1101                 clock->n = 6;
1102                 clock->m1 = 12;
1103                 clock->m2 = 8;
1104         } else {
1105                 WARN(1, "SDVO TV clock out of range: %i\n", dotclock);
1106         }
1107
1108         pipe_config->clock_set = true;
1109 }
1110
1111 static bool intel_sdvo_compute_config(struct intel_encoder *encoder,
1112                                       struct intel_crtc_state *pipe_config,
1113                                       struct drm_connector_state *conn_state)
1114 {
1115         struct intel_sdvo *intel_sdvo = to_sdvo(encoder);
1116         struct intel_sdvo_connector_state *intel_sdvo_state =
1117                 to_intel_sdvo_connector_state(conn_state);
1118         struct intel_sdvo_connector *intel_sdvo_connector =
1119                 to_intel_sdvo_connector(conn_state->connector);
1120         struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode;
1121         struct drm_display_mode *mode = &pipe_config->base.mode;
1122
1123         DRM_DEBUG_KMS("forcing bpc to 8 for SDVO\n");
1124         pipe_config->pipe_bpp = 8*3;
1125         pipe_config->output_format = INTEL_OUTPUT_FORMAT_RGB;
1126
1127         if (HAS_PCH_SPLIT(to_i915(encoder->base.dev)))
1128                 pipe_config->has_pch_encoder = true;
1129
1130         /*
1131          * We need to construct preferred input timings based on our
1132          * output timings.  To do that, we have to set the output
1133          * timings, even though this isn't really the right place in
1134          * the sequence to do it. Oh well.
1135          */
1136         if (IS_TV(intel_sdvo_connector)) {
1137                 if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo, mode))
1138                         return false;
1139
1140                 (void) intel_sdvo_get_preferred_input_mode(intel_sdvo,
1141                                                            intel_sdvo_connector,
1142                                                            mode,
1143                                                            adjusted_mode);
1144                 pipe_config->sdvo_tv_clock = true;
1145         } else if (IS_LVDS(intel_sdvo_connector)) {
1146                 if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo,
1147                                                              intel_sdvo_connector->base.panel.fixed_mode))
1148                         return false;
1149
1150                 (void) intel_sdvo_get_preferred_input_mode(intel_sdvo,
1151                                                            intel_sdvo_connector,
1152                                                            mode,
1153                                                            adjusted_mode);
1154         }
1155
1156         if (adjusted_mode->flags & DRM_MODE_FLAG_DBLSCAN)
1157                 return false;
1158
1159         /*
1160          * Make the CRTC code factor in the SDVO pixel multiplier.  The
1161          * SDVO device will factor out the multiplier during mode_set.
1162          */
1163         pipe_config->pixel_multiplier =
1164                 intel_sdvo_get_pixel_multiplier(adjusted_mode);
1165
1166         if (intel_sdvo_state->base.force_audio != HDMI_AUDIO_OFF_DVI)
1167                 pipe_config->has_hdmi_sink = intel_sdvo->has_hdmi_monitor;
1168
1169         if (intel_sdvo_state->base.force_audio == HDMI_AUDIO_ON ||
1170             (intel_sdvo_state->base.force_audio == HDMI_AUDIO_AUTO && intel_sdvo->has_hdmi_audio))
1171                 pipe_config->has_audio = true;
1172
1173         if (intel_sdvo_state->base.broadcast_rgb == INTEL_BROADCAST_RGB_AUTO) {
1174                 /*
1175                  * See CEA-861-E - 5.1 Default Encoding Parameters
1176                  *
1177                  * FIXME: This bit is only valid when using TMDS encoding and 8
1178                  * bit per color mode.
1179                  */
1180                 if (pipe_config->has_hdmi_sink &&
1181                     drm_match_cea_mode(adjusted_mode) > 1)
1182                         pipe_config->limited_color_range = true;
1183         } else {
1184                 if (pipe_config->has_hdmi_sink &&
1185                     intel_sdvo_state->base.broadcast_rgb == INTEL_BROADCAST_RGB_LIMITED)
1186                         pipe_config->limited_color_range = true;
1187         }
1188
1189         /* Clock computation needs to happen after pixel multiplier. */
1190         if (IS_TV(intel_sdvo_connector))
1191                 i9xx_adjust_sdvo_tv_clock(pipe_config);
1192
1193         /* Set user selected PAR to incoming mode's member */
1194         if (intel_sdvo_connector->is_hdmi)
1195                 adjusted_mode->picture_aspect_ratio = conn_state->picture_aspect_ratio;
1196
1197         return true;
1198 }
1199
1200 #define UPDATE_PROPERTY(input, NAME) \
1201         do { \
1202                 val = input; \
1203                 intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_##NAME, &val, sizeof(val)); \
1204         } while (0)
1205
1206 static void intel_sdvo_update_props(struct intel_sdvo *intel_sdvo,
1207                                     const struct intel_sdvo_connector_state *sdvo_state)
1208 {
1209         const struct drm_connector_state *conn_state = &sdvo_state->base.base;
1210         struct intel_sdvo_connector *intel_sdvo_conn =
1211                 to_intel_sdvo_connector(conn_state->connector);
1212         uint16_t val;
1213
1214         if (intel_sdvo_conn->left)
1215                 UPDATE_PROPERTY(sdvo_state->tv.overscan_h, OVERSCAN_H);
1216
1217         if (intel_sdvo_conn->top)
1218                 UPDATE_PROPERTY(sdvo_state->tv.overscan_v, OVERSCAN_V);
1219
1220         if (intel_sdvo_conn->hpos)
1221                 UPDATE_PROPERTY(sdvo_state->tv.hpos, HPOS);
1222
1223         if (intel_sdvo_conn->vpos)
1224                 UPDATE_PROPERTY(sdvo_state->tv.vpos, VPOS);
1225
1226         if (intel_sdvo_conn->saturation)
1227                 UPDATE_PROPERTY(conn_state->tv.saturation, SATURATION);
1228
1229         if (intel_sdvo_conn->contrast)
1230                 UPDATE_PROPERTY(conn_state->tv.contrast, CONTRAST);
1231
1232         if (intel_sdvo_conn->hue)
1233                 UPDATE_PROPERTY(conn_state->tv.hue, HUE);
1234
1235         if (intel_sdvo_conn->brightness)
1236                 UPDATE_PROPERTY(conn_state->tv.brightness, BRIGHTNESS);
1237
1238         if (intel_sdvo_conn->sharpness)
1239                 UPDATE_PROPERTY(sdvo_state->tv.sharpness, SHARPNESS);
1240
1241         if (intel_sdvo_conn->flicker_filter)
1242                 UPDATE_PROPERTY(sdvo_state->tv.flicker_filter, FLICKER_FILTER);
1243
1244         if (intel_sdvo_conn->flicker_filter_2d)
1245                 UPDATE_PROPERTY(sdvo_state->tv.flicker_filter_2d, FLICKER_FILTER_2D);
1246
1247         if (intel_sdvo_conn->flicker_filter_adaptive)
1248                 UPDATE_PROPERTY(sdvo_state->tv.flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE);
1249
1250         if (intel_sdvo_conn->tv_chroma_filter)
1251                 UPDATE_PROPERTY(sdvo_state->tv.chroma_filter, TV_CHROMA_FILTER);
1252
1253         if (intel_sdvo_conn->tv_luma_filter)
1254                 UPDATE_PROPERTY(sdvo_state->tv.luma_filter, TV_LUMA_FILTER);
1255
1256         if (intel_sdvo_conn->dot_crawl)
1257                 UPDATE_PROPERTY(sdvo_state->tv.dot_crawl, DOT_CRAWL);
1258
1259 #undef UPDATE_PROPERTY
1260 }
1261
1262 static void intel_sdvo_pre_enable(struct intel_encoder *intel_encoder,
1263                                   const struct intel_crtc_state *crtc_state,
1264                                   const struct drm_connector_state *conn_state)
1265 {
1266         struct drm_i915_private *dev_priv = to_i915(intel_encoder->base.dev);
1267         struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);
1268         const struct drm_display_mode *adjusted_mode = &crtc_state->base.adjusted_mode;
1269         const struct intel_sdvo_connector_state *sdvo_state =
1270                 to_intel_sdvo_connector_state(conn_state);
1271         const struct intel_sdvo_connector *intel_sdvo_connector =
1272                 to_intel_sdvo_connector(conn_state->connector);
1273         const struct drm_display_mode *mode = &crtc_state->base.mode;
1274         struct intel_sdvo *intel_sdvo = to_sdvo(intel_encoder);
1275         u32 sdvox;
1276         struct intel_sdvo_in_out_map in_out;
1277         struct intel_sdvo_dtd input_dtd, output_dtd;
1278         int rate;
1279
1280         intel_sdvo_update_props(intel_sdvo, sdvo_state);
1281
1282         /*
1283          * First, set the input mapping for the first input to our controlled
1284          * output. This is only correct if we're a single-input device, in
1285          * which case the first input is the output from the appropriate SDVO
1286          * channel on the motherboard.  In a two-input device, the first input
1287          * will be SDVOB and the second SDVOC.
1288          */
1289         in_out.in0 = intel_sdvo->attached_output;
1290         in_out.in1 = 0;
1291
1292         intel_sdvo_set_value(intel_sdvo,
1293                              SDVO_CMD_SET_IN_OUT_MAP,
1294                              &in_out, sizeof(in_out));
1295
1296         /* Set the output timings to the screen */
1297         if (!intel_sdvo_set_target_output(intel_sdvo,
1298                                           intel_sdvo->attached_output))
1299                 return;
1300
1301         /* lvds has a special fixed output timing. */
1302         if (IS_LVDS(intel_sdvo_connector))
1303                 intel_sdvo_get_dtd_from_mode(&output_dtd,
1304                                              intel_sdvo_connector->base.panel.fixed_mode);
1305         else
1306                 intel_sdvo_get_dtd_from_mode(&output_dtd, mode);
1307         if (!intel_sdvo_set_output_timing(intel_sdvo, &output_dtd))
1308                 DRM_INFO("Setting output timings on %s failed\n",
1309                          SDVO_NAME(intel_sdvo));
1310
1311         /* Set the input timing to the screen. Assume always input 0. */
1312         if (!intel_sdvo_set_target_input(intel_sdvo))
1313                 return;
1314
1315         if (crtc_state->has_hdmi_sink) {
1316                 intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_HDMI);
1317                 intel_sdvo_set_colorimetry(intel_sdvo,
1318                                            SDVO_COLORIMETRY_RGB256);
1319                 intel_sdvo_set_avi_infoframe(intel_sdvo, crtc_state);
1320         } else
1321                 intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_DVI);
1322
1323         if (IS_TV(intel_sdvo_connector) &&
1324             !intel_sdvo_set_tv_format(intel_sdvo, conn_state))
1325                 return;
1326
1327         intel_sdvo_get_dtd_from_mode(&input_dtd, adjusted_mode);
1328
1329         if (IS_TV(intel_sdvo_connector) || IS_LVDS(intel_sdvo_connector))
1330                 input_dtd.part2.sdvo_flags = intel_sdvo->dtd_sdvo_flags;
1331         if (!intel_sdvo_set_input_timing(intel_sdvo, &input_dtd))
1332                 DRM_INFO("Setting input timings on %s failed\n",
1333                          SDVO_NAME(intel_sdvo));
1334
1335         switch (crtc_state->pixel_multiplier) {
1336         default:
1337                 WARN(1, "unknown pixel multiplier specified\n");
1338                 /* fall through */
1339         case 1: rate = SDVO_CLOCK_RATE_MULT_1X; break;
1340         case 2: rate = SDVO_CLOCK_RATE_MULT_2X; break;
1341         case 4: rate = SDVO_CLOCK_RATE_MULT_4X; break;
1342         }
1343         if (!intel_sdvo_set_clock_rate_mult(intel_sdvo, rate))
1344                 return;
1345
1346         /* Set the SDVO control regs. */
1347         if (INTEL_GEN(dev_priv) >= 4) {
1348                 /* The real mode polarity is set by the SDVO commands, using
1349                  * struct intel_sdvo_dtd. */
1350                 sdvox = SDVO_VSYNC_ACTIVE_HIGH | SDVO_HSYNC_ACTIVE_HIGH;
1351                 if (!HAS_PCH_SPLIT(dev_priv) && crtc_state->limited_color_range)
1352                         sdvox |= HDMI_COLOR_RANGE_16_235;
1353                 if (INTEL_GEN(dev_priv) < 5)
1354                         sdvox |= SDVO_BORDER_ENABLE;
1355         } else {
1356                 sdvox = I915_READ(intel_sdvo->sdvo_reg);
1357                 if (intel_sdvo->port == PORT_B)
1358                         sdvox &= SDVOB_PRESERVE_MASK;
1359                 else
1360                         sdvox &= SDVOC_PRESERVE_MASK;
1361                 sdvox |= (9 << 19) | SDVO_BORDER_ENABLE;
1362         }
1363
1364         if (HAS_PCH_CPT(dev_priv))
1365                 sdvox |= SDVO_PIPE_SEL_CPT(crtc->pipe);
1366         else
1367                 sdvox |= SDVO_PIPE_SEL(crtc->pipe);
1368
1369         if (crtc_state->has_audio) {
1370                 WARN_ON_ONCE(INTEL_GEN(dev_priv) < 4);
1371                 sdvox |= SDVO_AUDIO_ENABLE;
1372         }
1373
1374         if (INTEL_GEN(dev_priv) >= 4) {
1375                 /* done in crtc_mode_set as the dpll_md reg must be written early */
1376         } else if (IS_I945G(dev_priv) || IS_I945GM(dev_priv) ||
1377                    IS_G33(dev_priv) || IS_PINEVIEW(dev_priv)) {
1378                 /* done in crtc_mode_set as it lives inside the dpll register */
1379         } else {
1380                 sdvox |= (crtc_state->pixel_multiplier - 1)
1381                         << SDVO_PORT_MULTIPLY_SHIFT;
1382         }
1383
1384         if (input_dtd.part2.sdvo_flags & SDVO_NEED_TO_STALL &&
1385             INTEL_GEN(dev_priv) < 5)
1386                 sdvox |= SDVO_STALL_SELECT;
1387         intel_sdvo_write_sdvox(intel_sdvo, sdvox);
1388 }
1389
1390 static bool intel_sdvo_connector_get_hw_state(struct intel_connector *connector)
1391 {
1392         struct intel_sdvo_connector *intel_sdvo_connector =
1393                 to_intel_sdvo_connector(&connector->base);
1394         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(&connector->base);
1395         u16 active_outputs = 0;
1396
1397         intel_sdvo_get_active_outputs(intel_sdvo, &active_outputs);
1398
1399         return active_outputs & intel_sdvo_connector->output_flag;
1400 }
1401
1402 bool intel_sdvo_port_enabled(struct drm_i915_private *dev_priv,
1403                              i915_reg_t sdvo_reg, enum pipe *pipe)
1404 {
1405         u32 val;
1406
1407         val = I915_READ(sdvo_reg);
1408
1409         /* asserts want to know the pipe even if the port is disabled */
1410         if (HAS_PCH_CPT(dev_priv))
1411                 *pipe = (val & SDVO_PIPE_SEL_MASK_CPT) >> SDVO_PIPE_SEL_SHIFT_CPT;
1412         else if (IS_CHERRYVIEW(dev_priv))
1413                 *pipe = (val & SDVO_PIPE_SEL_MASK_CHV) >> SDVO_PIPE_SEL_SHIFT_CHV;
1414         else
1415                 *pipe = (val & SDVO_PIPE_SEL_MASK) >> SDVO_PIPE_SEL_SHIFT;
1416
1417         return val & SDVO_ENABLE;
1418 }
1419
1420 static bool intel_sdvo_get_hw_state(struct intel_encoder *encoder,
1421                                     enum pipe *pipe)
1422 {
1423         struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
1424         struct intel_sdvo *intel_sdvo = to_sdvo(encoder);
1425         u16 active_outputs = 0;
1426         bool ret;
1427
1428         intel_sdvo_get_active_outputs(intel_sdvo, &active_outputs);
1429
1430         ret = intel_sdvo_port_enabled(dev_priv, intel_sdvo->sdvo_reg, pipe);
1431
1432         return ret || active_outputs;
1433 }
1434
1435 static void intel_sdvo_get_config(struct intel_encoder *encoder,
1436                                   struct intel_crtc_state *pipe_config)
1437 {
1438         struct drm_device *dev = encoder->base.dev;
1439         struct drm_i915_private *dev_priv = to_i915(dev);
1440         struct intel_sdvo *intel_sdvo = to_sdvo(encoder);
1441         struct intel_sdvo_dtd dtd;
1442         int encoder_pixel_multiplier = 0;
1443         int dotclock;
1444         u32 flags = 0, sdvox;
1445         u8 val;
1446         bool ret;
1447
1448         pipe_config->output_types |= BIT(INTEL_OUTPUT_SDVO);
1449
1450         sdvox = I915_READ(intel_sdvo->sdvo_reg);
1451
1452         ret = intel_sdvo_get_input_timing(intel_sdvo, &dtd);
1453         if (!ret) {
1454                 /*
1455                  * Some sdvo encoders are not spec compliant and don't
1456                  * implement the mandatory get_timings function.
1457                  */
1458                 DRM_DEBUG_DRIVER("failed to retrieve SDVO DTD\n");
1459                 pipe_config->quirks |= PIPE_CONFIG_QUIRK_MODE_SYNC_FLAGS;
1460         } else {
1461                 if (dtd.part2.dtd_flags & DTD_FLAG_HSYNC_POSITIVE)
1462                         flags |= DRM_MODE_FLAG_PHSYNC;
1463                 else
1464                         flags |= DRM_MODE_FLAG_NHSYNC;
1465
1466                 if (dtd.part2.dtd_flags & DTD_FLAG_VSYNC_POSITIVE)
1467                         flags |= DRM_MODE_FLAG_PVSYNC;
1468                 else
1469                         flags |= DRM_MODE_FLAG_NVSYNC;
1470         }
1471
1472         pipe_config->base.adjusted_mode.flags |= flags;
1473
1474         /*
1475          * pixel multiplier readout is tricky: Only on i915g/gm it is stored in
1476          * the sdvo port register, on all other platforms it is part of the dpll
1477          * state. Since the general pipe state readout happens before the
1478          * encoder->get_config we so already have a valid pixel multplier on all
1479          * other platfroms.
1480          */
1481         if (IS_I915G(dev_priv) || IS_I915GM(dev_priv)) {
1482                 pipe_config->pixel_multiplier =
1483                         ((sdvox & SDVO_PORT_MULTIPLY_MASK)
1484                          >> SDVO_PORT_MULTIPLY_SHIFT) + 1;
1485         }
1486
1487         dotclock = pipe_config->port_clock;
1488
1489         if (pipe_config->pixel_multiplier)
1490                 dotclock /= pipe_config->pixel_multiplier;
1491
1492         pipe_config->base.adjusted_mode.crtc_clock = dotclock;
1493
1494         /* Cross check the port pixel multiplier with the sdvo encoder state. */
1495         if (intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_CLOCK_RATE_MULT,
1496                                  &val, 1)) {
1497                 switch (val) {
1498                 case SDVO_CLOCK_RATE_MULT_1X:
1499                         encoder_pixel_multiplier = 1;
1500                         break;
1501                 case SDVO_CLOCK_RATE_MULT_2X:
1502                         encoder_pixel_multiplier = 2;
1503                         break;
1504                 case SDVO_CLOCK_RATE_MULT_4X:
1505                         encoder_pixel_multiplier = 4;
1506                         break;
1507                 }
1508         }
1509
1510         if (sdvox & HDMI_COLOR_RANGE_16_235)
1511                 pipe_config->limited_color_range = true;
1512
1513         if (sdvox & SDVO_AUDIO_ENABLE)
1514                 pipe_config->has_audio = true;
1515
1516         if (intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_ENCODE,
1517                                  &val, 1)) {
1518                 if (val == SDVO_ENCODE_HDMI)
1519                         pipe_config->has_hdmi_sink = true;
1520         }
1521
1522         WARN(encoder_pixel_multiplier != pipe_config->pixel_multiplier,
1523              "SDVO pixel multiplier mismatch, port: %i, encoder: %i\n",
1524              pipe_config->pixel_multiplier, encoder_pixel_multiplier);
1525 }
1526
1527 static void intel_disable_sdvo(struct intel_encoder *encoder,
1528                                const struct intel_crtc_state *old_crtc_state,
1529                                const struct drm_connector_state *conn_state)
1530 {
1531         struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
1532         struct intel_sdvo *intel_sdvo = to_sdvo(encoder);
1533         struct intel_crtc *crtc = to_intel_crtc(old_crtc_state->base.crtc);
1534         u32 temp;
1535
1536         intel_sdvo_set_active_outputs(intel_sdvo, 0);
1537         if (0)
1538                 intel_sdvo_set_encoder_power_state(intel_sdvo,
1539                                                    DRM_MODE_DPMS_OFF);
1540
1541         temp = I915_READ(intel_sdvo->sdvo_reg);
1542
1543         temp &= ~SDVO_ENABLE;
1544         intel_sdvo_write_sdvox(intel_sdvo, temp);
1545
1546         /*
1547          * HW workaround for IBX, we need to move the port
1548          * to transcoder A after disabling it to allow the
1549          * matching DP port to be enabled on transcoder A.
1550          */
1551         if (HAS_PCH_IBX(dev_priv) && crtc->pipe == PIPE_B) {
1552                 /*
1553                  * We get CPU/PCH FIFO underruns on the other pipe when
1554                  * doing the workaround. Sweep them under the rug.
1555                  */
1556                 intel_set_cpu_fifo_underrun_reporting(dev_priv, PIPE_A, false);
1557                 intel_set_pch_fifo_underrun_reporting(dev_priv, PIPE_A, false);
1558
1559                 temp &= ~SDVO_PIPE_SEL_MASK;
1560                 temp |= SDVO_ENABLE | SDVO_PIPE_SEL(PIPE_A);
1561                 intel_sdvo_write_sdvox(intel_sdvo, temp);
1562
1563                 temp &= ~SDVO_ENABLE;
1564                 intel_sdvo_write_sdvox(intel_sdvo, temp);
1565
1566                 intel_wait_for_vblank_if_active(dev_priv, PIPE_A);
1567                 intel_set_cpu_fifo_underrun_reporting(dev_priv, PIPE_A, true);
1568                 intel_set_pch_fifo_underrun_reporting(dev_priv, PIPE_A, true);
1569         }
1570 }
1571
1572 static void pch_disable_sdvo(struct intel_encoder *encoder,
1573                              const struct intel_crtc_state *old_crtc_state,
1574                              const struct drm_connector_state *old_conn_state)
1575 {
1576 }
1577
1578 static void pch_post_disable_sdvo(struct intel_encoder *encoder,
1579                                   const struct intel_crtc_state *old_crtc_state,
1580                                   const struct drm_connector_state *old_conn_state)
1581 {
1582         intel_disable_sdvo(encoder, old_crtc_state, old_conn_state);
1583 }
1584
1585 static void intel_enable_sdvo(struct intel_encoder *encoder,
1586                               const struct intel_crtc_state *pipe_config,
1587                               const struct drm_connector_state *conn_state)
1588 {
1589         struct drm_device *dev = encoder->base.dev;
1590         struct drm_i915_private *dev_priv = to_i915(dev);
1591         struct intel_sdvo *intel_sdvo = to_sdvo(encoder);
1592         struct intel_crtc *intel_crtc = to_intel_crtc(pipe_config->base.crtc);
1593         u32 temp;
1594         bool input1, input2;
1595         int i;
1596         bool success;
1597
1598         temp = I915_READ(intel_sdvo->sdvo_reg);
1599         temp |= SDVO_ENABLE;
1600         intel_sdvo_write_sdvox(intel_sdvo, temp);
1601
1602         for (i = 0; i < 2; i++)
1603                 intel_wait_for_vblank(dev_priv, intel_crtc->pipe);
1604
1605         success = intel_sdvo_get_trained_inputs(intel_sdvo, &input1, &input2);
1606         /*
1607          * Warn if the device reported failure to sync.
1608          *
1609          * A lot of SDVO devices fail to notify of sync, but it's
1610          * a given it the status is a success, we succeeded.
1611          */
1612         if (success && !input1) {
1613                 DRM_DEBUG_KMS("First %s output reported failure to "
1614                                 "sync\n", SDVO_NAME(intel_sdvo));
1615         }
1616
1617         if (0)
1618                 intel_sdvo_set_encoder_power_state(intel_sdvo,
1619                                                    DRM_MODE_DPMS_ON);
1620         intel_sdvo_set_active_outputs(intel_sdvo, intel_sdvo->attached_output);
1621 }
1622
1623 static enum drm_mode_status
1624 intel_sdvo_mode_valid(struct drm_connector *connector,
1625                       struct drm_display_mode *mode)
1626 {
1627         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1628         struct intel_sdvo_connector *intel_sdvo_connector =
1629                 to_intel_sdvo_connector(connector);
1630         int max_dotclk = to_i915(connector->dev)->max_dotclk_freq;
1631
1632         if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
1633                 return MODE_NO_DBLESCAN;
1634
1635         if (intel_sdvo->pixel_clock_min > mode->clock)
1636                 return MODE_CLOCK_LOW;
1637
1638         if (intel_sdvo->pixel_clock_max < mode->clock)
1639                 return MODE_CLOCK_HIGH;
1640
1641         if (mode->clock > max_dotclk)
1642                 return MODE_CLOCK_HIGH;
1643
1644         if (IS_LVDS(intel_sdvo_connector)) {
1645                 const struct drm_display_mode *fixed_mode =
1646                         intel_sdvo_connector->base.panel.fixed_mode;
1647
1648                 if (mode->hdisplay > fixed_mode->hdisplay)
1649                         return MODE_PANEL;
1650
1651                 if (mode->vdisplay > fixed_mode->vdisplay)
1652                         return MODE_PANEL;
1653         }
1654
1655         return MODE_OK;
1656 }
1657
1658 static bool intel_sdvo_get_capabilities(struct intel_sdvo *intel_sdvo, struct intel_sdvo_caps *caps)
1659 {
1660         BUILD_BUG_ON(sizeof(*caps) != 8);
1661         if (!intel_sdvo_get_value(intel_sdvo,
1662                                   SDVO_CMD_GET_DEVICE_CAPS,
1663                                   caps, sizeof(*caps)))
1664                 return false;
1665
1666         DRM_DEBUG_KMS("SDVO capabilities:\n"
1667                       "  vendor_id: %d\n"
1668                       "  device_id: %d\n"
1669                       "  device_rev_id: %d\n"
1670                       "  sdvo_version_major: %d\n"
1671                       "  sdvo_version_minor: %d\n"
1672                       "  sdvo_inputs_mask: %d\n"
1673                       "  smooth_scaling: %d\n"
1674                       "  sharp_scaling: %d\n"
1675                       "  up_scaling: %d\n"
1676                       "  down_scaling: %d\n"
1677                       "  stall_support: %d\n"
1678                       "  output_flags: %d\n",
1679                       caps->vendor_id,
1680                       caps->device_id,
1681                       caps->device_rev_id,
1682                       caps->sdvo_version_major,
1683                       caps->sdvo_version_minor,
1684                       caps->sdvo_inputs_mask,
1685                       caps->smooth_scaling,
1686                       caps->sharp_scaling,
1687                       caps->up_scaling,
1688                       caps->down_scaling,
1689                       caps->stall_support,
1690                       caps->output_flags);
1691
1692         return true;
1693 }
1694
1695 static uint16_t intel_sdvo_get_hotplug_support(struct intel_sdvo *intel_sdvo)
1696 {
1697         struct drm_i915_private *dev_priv = to_i915(intel_sdvo->base.base.dev);
1698         uint16_t hotplug;
1699
1700         if (!I915_HAS_HOTPLUG(dev_priv))
1701                 return 0;
1702
1703         /*
1704          * HW Erratum: SDVO Hotplug is broken on all i945G chips, there's noise
1705          * on the line.
1706          */
1707         if (IS_I945G(dev_priv) || IS_I945GM(dev_priv))
1708                 return 0;
1709
1710         if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_HOT_PLUG_SUPPORT,
1711                                         &hotplug, sizeof(hotplug)))
1712                 return 0;
1713
1714         return hotplug;
1715 }
1716
1717 static void intel_sdvo_enable_hotplug(struct intel_encoder *encoder)
1718 {
1719         struct intel_sdvo *intel_sdvo = to_sdvo(encoder);
1720
1721         intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_SET_ACTIVE_HOT_PLUG,
1722                              &intel_sdvo->hotplug_active, 2);
1723 }
1724
1725 static bool intel_sdvo_hotplug(struct intel_encoder *encoder,
1726                                struct intel_connector *connector)
1727 {
1728         intel_sdvo_enable_hotplug(encoder);
1729
1730         return intel_encoder_hotplug(encoder, connector);
1731 }
1732
1733 static bool
1734 intel_sdvo_multifunc_encoder(struct intel_sdvo *intel_sdvo)
1735 {
1736         /* Is there more than one type of output? */
1737         return hweight16(intel_sdvo->caps.output_flags) > 1;
1738 }
1739
1740 static struct edid *
1741 intel_sdvo_get_edid(struct drm_connector *connector)
1742 {
1743         struct intel_sdvo *sdvo = intel_attached_sdvo(connector);
1744         return drm_get_edid(connector, &sdvo->ddc);
1745 }
1746
1747 /* Mac mini hack -- use the same DDC as the analog connector */
1748 static struct edid *
1749 intel_sdvo_get_analog_edid(struct drm_connector *connector)
1750 {
1751         struct drm_i915_private *dev_priv = to_i915(connector->dev);
1752
1753         return drm_get_edid(connector,
1754                             intel_gmbus_get_adapter(dev_priv,
1755                                                     dev_priv->vbt.crt_ddc_pin));
1756 }
1757
1758 static enum drm_connector_status
1759 intel_sdvo_tmds_sink_detect(struct drm_connector *connector)
1760 {
1761         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1762         struct intel_sdvo_connector *intel_sdvo_connector =
1763                 to_intel_sdvo_connector(connector);
1764         enum drm_connector_status status;
1765         struct edid *edid;
1766
1767         edid = intel_sdvo_get_edid(connector);
1768
1769         if (edid == NULL && intel_sdvo_multifunc_encoder(intel_sdvo)) {
1770                 u8 ddc, saved_ddc = intel_sdvo->ddc_bus;
1771
1772                 /*
1773                  * Don't use the 1 as the argument of DDC bus switch to get
1774                  * the EDID. It is used for SDVO SPD ROM.
1775                  */
1776                 for (ddc = intel_sdvo->ddc_bus >> 1; ddc > 1; ddc >>= 1) {
1777                         intel_sdvo->ddc_bus = ddc;
1778                         edid = intel_sdvo_get_edid(connector);
1779                         if (edid)
1780                                 break;
1781                 }
1782                 /*
1783                  * If we found the EDID on the other bus,
1784                  * assume that is the correct DDC bus.
1785                  */
1786                 if (edid == NULL)
1787                         intel_sdvo->ddc_bus = saved_ddc;
1788         }
1789
1790         /*
1791          * When there is no edid and no monitor is connected with VGA
1792          * port, try to use the CRT ddc to read the EDID for DVI-connector.
1793          */
1794         if (edid == NULL)
1795                 edid = intel_sdvo_get_analog_edid(connector);
1796
1797         status = connector_status_unknown;
1798         if (edid != NULL) {
1799                 /* DDC bus is shared, match EDID to connector type */
1800                 if (edid->input & DRM_EDID_INPUT_DIGITAL) {
1801                         status = connector_status_connected;
1802                         if (intel_sdvo_connector->is_hdmi) {
1803                                 intel_sdvo->has_hdmi_monitor = drm_detect_hdmi_monitor(edid);
1804                                 intel_sdvo->has_hdmi_audio = drm_detect_monitor_audio(edid);
1805                                 intel_sdvo->rgb_quant_range_selectable =
1806                                         drm_rgb_quant_range_selectable(edid);
1807                         }
1808                 } else
1809                         status = connector_status_disconnected;
1810                 kfree(edid);
1811         }
1812
1813         return status;
1814 }
1815
1816 static bool
1817 intel_sdvo_connector_matches_edid(struct intel_sdvo_connector *sdvo,
1818                                   struct edid *edid)
1819 {
1820         bool monitor_is_digital = !!(edid->input & DRM_EDID_INPUT_DIGITAL);
1821         bool connector_is_digital = !!IS_DIGITAL(sdvo);
1822
1823         DRM_DEBUG_KMS("connector_is_digital? %d, monitor_is_digital? %d\n",
1824                       connector_is_digital, monitor_is_digital);
1825         return connector_is_digital == monitor_is_digital;
1826 }
1827
1828 static enum drm_connector_status
1829 intel_sdvo_detect(struct drm_connector *connector, bool force)
1830 {
1831         uint16_t response;
1832         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1833         struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1834         enum drm_connector_status ret;
1835
1836         DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
1837                       connector->base.id, connector->name);
1838
1839         if (!intel_sdvo_get_value(intel_sdvo,
1840                                   SDVO_CMD_GET_ATTACHED_DISPLAYS,
1841                                   &response, 2))
1842                 return connector_status_unknown;
1843
1844         DRM_DEBUG_KMS("SDVO response %d %d [%x]\n",
1845                       response & 0xff, response >> 8,
1846                       intel_sdvo_connector->output_flag);
1847
1848         if (response == 0)
1849                 return connector_status_disconnected;
1850
1851         intel_sdvo->attached_output = response;
1852
1853         intel_sdvo->has_hdmi_monitor = false;
1854         intel_sdvo->has_hdmi_audio = false;
1855         intel_sdvo->rgb_quant_range_selectable = false;
1856
1857         if ((intel_sdvo_connector->output_flag & response) == 0)
1858                 ret = connector_status_disconnected;
1859         else if (IS_TMDS(intel_sdvo_connector))
1860                 ret = intel_sdvo_tmds_sink_detect(connector);
1861         else {
1862                 struct edid *edid;
1863
1864                 /* if we have an edid check it matches the connection */
1865                 edid = intel_sdvo_get_edid(connector);
1866                 if (edid == NULL)
1867                         edid = intel_sdvo_get_analog_edid(connector);
1868                 if (edid != NULL) {
1869                         if (intel_sdvo_connector_matches_edid(intel_sdvo_connector,
1870                                                               edid))
1871                                 ret = connector_status_connected;
1872                         else
1873                                 ret = connector_status_disconnected;
1874
1875                         kfree(edid);
1876                 } else
1877                         ret = connector_status_connected;
1878         }
1879
1880         return ret;
1881 }
1882
1883 static void intel_sdvo_get_ddc_modes(struct drm_connector *connector)
1884 {
1885         struct edid *edid;
1886
1887         DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
1888                       connector->base.id, connector->name);
1889
1890         /* set the bus switch and get the modes */
1891         edid = intel_sdvo_get_edid(connector);
1892
1893         /*
1894          * Mac mini hack.  On this device, the DVI-I connector shares one DDC
1895          * link between analog and digital outputs. So, if the regular SDVO
1896          * DDC fails, check to see if the analog output is disconnected, in
1897          * which case we'll look there for the digital DDC data.
1898          */
1899         if (edid == NULL)
1900                 edid = intel_sdvo_get_analog_edid(connector);
1901
1902         if (edid != NULL) {
1903                 if (intel_sdvo_connector_matches_edid(to_intel_sdvo_connector(connector),
1904                                                       edid)) {
1905                         drm_connector_update_edid_property(connector, edid);
1906                         drm_add_edid_modes(connector, edid);
1907                 }
1908
1909                 kfree(edid);
1910         }
1911 }
1912
1913 /*
1914  * Set of SDVO TV modes.
1915  * Note!  This is in reply order (see loop in get_tv_modes).
1916  * XXX: all 60Hz refresh?
1917  */
1918 static const struct drm_display_mode sdvo_tv_modes[] = {
1919         { DRM_MODE("320x200", DRM_MODE_TYPE_DRIVER, 5815, 320, 321, 384,
1920                    416, 0, 200, 201, 232, 233, 0,
1921                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1922         { DRM_MODE("320x240", DRM_MODE_TYPE_DRIVER, 6814, 320, 321, 384,
1923                    416, 0, 240, 241, 272, 273, 0,
1924                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1925         { DRM_MODE("400x300", DRM_MODE_TYPE_DRIVER, 9910, 400, 401, 464,
1926                    496, 0, 300, 301, 332, 333, 0,
1927                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1928         { DRM_MODE("640x350", DRM_MODE_TYPE_DRIVER, 16913, 640, 641, 704,
1929                    736, 0, 350, 351, 382, 383, 0,
1930                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1931         { DRM_MODE("640x400", DRM_MODE_TYPE_DRIVER, 19121, 640, 641, 704,
1932                    736, 0, 400, 401, 432, 433, 0,
1933                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1934         { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 22654, 640, 641, 704,
1935                    736, 0, 480, 481, 512, 513, 0,
1936                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1937         { DRM_MODE("704x480", DRM_MODE_TYPE_DRIVER, 24624, 704, 705, 768,
1938                    800, 0, 480, 481, 512, 513, 0,
1939                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1940         { DRM_MODE("704x576", DRM_MODE_TYPE_DRIVER, 29232, 704, 705, 768,
1941                    800, 0, 576, 577, 608, 609, 0,
1942                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1943         { DRM_MODE("720x350", DRM_MODE_TYPE_DRIVER, 18751, 720, 721, 784,
1944                    816, 0, 350, 351, 382, 383, 0,
1945                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1946         { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 21199, 720, 721, 784,
1947                    816, 0, 400, 401, 432, 433, 0,
1948                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1949         { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 25116, 720, 721, 784,
1950                    816, 0, 480, 481, 512, 513, 0,
1951                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1952         { DRM_MODE("720x540", DRM_MODE_TYPE_DRIVER, 28054, 720, 721, 784,
1953                    816, 0, 540, 541, 572, 573, 0,
1954                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1955         { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 29816, 720, 721, 784,
1956                    816, 0, 576, 577, 608, 609, 0,
1957                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1958         { DRM_MODE("768x576", DRM_MODE_TYPE_DRIVER, 31570, 768, 769, 832,
1959                    864, 0, 576, 577, 608, 609, 0,
1960                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1961         { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 34030, 800, 801, 864,
1962                    896, 0, 600, 601, 632, 633, 0,
1963                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1964         { DRM_MODE("832x624", DRM_MODE_TYPE_DRIVER, 36581, 832, 833, 896,
1965                    928, 0, 624, 625, 656, 657, 0,
1966                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1967         { DRM_MODE("920x766", DRM_MODE_TYPE_DRIVER, 48707, 920, 921, 984,
1968                    1016, 0, 766, 767, 798, 799, 0,
1969                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1970         { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 53827, 1024, 1025, 1088,
1971                    1120, 0, 768, 769, 800, 801, 0,
1972                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1973         { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 87265, 1280, 1281, 1344,
1974                    1376, 0, 1024, 1025, 1056, 1057, 0,
1975                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1976 };
1977
1978 static void intel_sdvo_get_tv_modes(struct drm_connector *connector)
1979 {
1980         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1981         const struct drm_connector_state *conn_state = connector->state;
1982         struct intel_sdvo_sdtv_resolution_request tv_res;
1983         uint32_t reply = 0, format_map = 0;
1984         int i;
1985
1986         DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
1987                       connector->base.id, connector->name);
1988
1989         /*
1990          * Read the list of supported input resolutions for the selected TV
1991          * format.
1992          */
1993         format_map = 1 << conn_state->tv.mode;
1994         memcpy(&tv_res, &format_map,
1995                min(sizeof(format_map), sizeof(struct intel_sdvo_sdtv_resolution_request)));
1996
1997         if (!intel_sdvo_set_target_output(intel_sdvo, intel_sdvo->attached_output))
1998                 return;
1999
2000         BUILD_BUG_ON(sizeof(tv_res) != 3);
2001         if (!intel_sdvo_write_cmd(intel_sdvo,
2002                                   SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT,
2003                                   &tv_res, sizeof(tv_res)))
2004                 return;
2005         if (!intel_sdvo_read_response(intel_sdvo, &reply, 3))
2006                 return;
2007
2008         for (i = 0; i < ARRAY_SIZE(sdvo_tv_modes); i++)
2009                 if (reply & (1 << i)) {
2010                         struct drm_display_mode *nmode;
2011                         nmode = drm_mode_duplicate(connector->dev,
2012                                                    &sdvo_tv_modes[i]);
2013                         if (nmode)
2014                                 drm_mode_probed_add(connector, nmode);
2015                 }
2016 }
2017
2018 static void intel_sdvo_get_lvds_modes(struct drm_connector *connector)
2019 {
2020         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
2021         struct drm_i915_private *dev_priv = to_i915(connector->dev);
2022         struct drm_display_mode *newmode;
2023
2024         DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
2025                       connector->base.id, connector->name);
2026
2027         /*
2028          * Fetch modes from VBT. For SDVO prefer the VBT mode since some
2029          * SDVO->LVDS transcoders can't cope with the EDID mode.
2030          */
2031         if (dev_priv->vbt.sdvo_lvds_vbt_mode != NULL) {
2032                 newmode = drm_mode_duplicate(connector->dev,
2033                                              dev_priv->vbt.sdvo_lvds_vbt_mode);
2034                 if (newmode != NULL) {
2035                         /* Guarantee the mode is preferred */
2036                         newmode->type = (DRM_MODE_TYPE_PREFERRED |
2037                                          DRM_MODE_TYPE_DRIVER);
2038                         drm_mode_probed_add(connector, newmode);
2039                 }
2040         }
2041
2042         /*
2043          * Attempt to get the mode list from DDC.
2044          * Assume that the preferred modes are
2045          * arranged in priority order.
2046          */
2047         intel_ddc_get_modes(connector, &intel_sdvo->ddc);
2048 }
2049
2050 static int intel_sdvo_get_modes(struct drm_connector *connector)
2051 {
2052         struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
2053
2054         if (IS_TV(intel_sdvo_connector))
2055                 intel_sdvo_get_tv_modes(connector);
2056         else if (IS_LVDS(intel_sdvo_connector))
2057                 intel_sdvo_get_lvds_modes(connector);
2058         else
2059                 intel_sdvo_get_ddc_modes(connector);
2060
2061         return !list_empty(&connector->probed_modes);
2062 }
2063
2064 static int
2065 intel_sdvo_connector_atomic_get_property(struct drm_connector *connector,
2066                                          const struct drm_connector_state *state,
2067                                          struct drm_property *property,
2068                                          uint64_t *val)
2069 {
2070         struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
2071         const struct intel_sdvo_connector_state *sdvo_state = to_intel_sdvo_connector_state((void *)state);
2072
2073         if (property == intel_sdvo_connector->tv_format) {
2074                 int i;
2075
2076                 for (i = 0; i < intel_sdvo_connector->format_supported_num; i++)
2077                         if (state->tv.mode == intel_sdvo_connector->tv_format_supported[i]) {
2078                                 *val = i;
2079
2080                                 return 0;
2081                         }
2082
2083                 WARN_ON(1);
2084                 *val = 0;
2085         } else if (property == intel_sdvo_connector->top ||
2086                    property == intel_sdvo_connector->bottom)
2087                 *val = intel_sdvo_connector->max_vscan - sdvo_state->tv.overscan_v;
2088         else if (property == intel_sdvo_connector->left ||
2089                  property == intel_sdvo_connector->right)
2090                 *val = intel_sdvo_connector->max_hscan - sdvo_state->tv.overscan_h;
2091         else if (property == intel_sdvo_connector->hpos)
2092                 *val = sdvo_state->tv.hpos;
2093         else if (property == intel_sdvo_connector->vpos)
2094                 *val = sdvo_state->tv.vpos;
2095         else if (property == intel_sdvo_connector->saturation)
2096                 *val = state->tv.saturation;
2097         else if (property == intel_sdvo_connector->contrast)
2098                 *val = state->tv.contrast;
2099         else if (property == intel_sdvo_connector->hue)
2100                 *val = state->tv.hue;
2101         else if (property == intel_sdvo_connector->brightness)
2102                 *val = state->tv.brightness;
2103         else if (property == intel_sdvo_connector->sharpness)
2104                 *val = sdvo_state->tv.sharpness;
2105         else if (property == intel_sdvo_connector->flicker_filter)
2106                 *val = sdvo_state->tv.flicker_filter;
2107         else if (property == intel_sdvo_connector->flicker_filter_2d)
2108                 *val = sdvo_state->tv.flicker_filter_2d;
2109         else if (property == intel_sdvo_connector->flicker_filter_adaptive)
2110                 *val = sdvo_state->tv.flicker_filter_adaptive;
2111         else if (property == intel_sdvo_connector->tv_chroma_filter)
2112                 *val = sdvo_state->tv.chroma_filter;
2113         else if (property == intel_sdvo_connector->tv_luma_filter)
2114                 *val = sdvo_state->tv.luma_filter;
2115         else if (property == intel_sdvo_connector->dot_crawl)
2116                 *val = sdvo_state->tv.dot_crawl;
2117         else
2118                 return intel_digital_connector_atomic_get_property(connector, state, property, val);
2119
2120         return 0;
2121 }
2122
2123 static int
2124 intel_sdvo_connector_atomic_set_property(struct drm_connector *connector,
2125                                          struct drm_connector_state *state,
2126                                          struct drm_property *property,
2127                                          uint64_t val)
2128 {
2129         struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
2130         struct intel_sdvo_connector_state *sdvo_state = to_intel_sdvo_connector_state(state);
2131
2132         if (property == intel_sdvo_connector->tv_format) {
2133                 state->tv.mode = intel_sdvo_connector->tv_format_supported[val];
2134
2135                 if (state->crtc) {
2136                         struct drm_crtc_state *crtc_state =
2137                                 drm_atomic_get_new_crtc_state(state->state, state->crtc);
2138
2139                         crtc_state->connectors_changed = true;
2140                 }
2141         } else if (property == intel_sdvo_connector->top ||
2142                    property == intel_sdvo_connector->bottom)
2143                 /* Cannot set these independent from each other */
2144                 sdvo_state->tv.overscan_v = intel_sdvo_connector->max_vscan - val;
2145         else if (property == intel_sdvo_connector->left ||
2146                  property == intel_sdvo_connector->right)
2147                 /* Cannot set these independent from each other */
2148                 sdvo_state->tv.overscan_h = intel_sdvo_connector->max_hscan - val;
2149         else if (property == intel_sdvo_connector->hpos)
2150                 sdvo_state->tv.hpos = val;
2151         else if (property == intel_sdvo_connector->vpos)
2152                 sdvo_state->tv.vpos = val;
2153         else if (property == intel_sdvo_connector->saturation)
2154                 state->tv.saturation = val;
2155         else if (property == intel_sdvo_connector->contrast)
2156                 state->tv.contrast = val;
2157         else if (property == intel_sdvo_connector->hue)
2158                 state->tv.hue = val;
2159         else if (property == intel_sdvo_connector->brightness)
2160                 state->tv.brightness = val;
2161         else if (property == intel_sdvo_connector->sharpness)
2162                 sdvo_state->tv.sharpness = val;
2163         else if (property == intel_sdvo_connector->flicker_filter)
2164                 sdvo_state->tv.flicker_filter = val;
2165         else if (property == intel_sdvo_connector->flicker_filter_2d)
2166                 sdvo_state->tv.flicker_filter_2d = val;
2167         else if (property == intel_sdvo_connector->flicker_filter_adaptive)
2168                 sdvo_state->tv.flicker_filter_adaptive = val;
2169         else if (property == intel_sdvo_connector->tv_chroma_filter)
2170                 sdvo_state->tv.chroma_filter = val;
2171         else if (property == intel_sdvo_connector->tv_luma_filter)
2172                 sdvo_state->tv.luma_filter = val;
2173         else if (property == intel_sdvo_connector->dot_crawl)
2174                 sdvo_state->tv.dot_crawl = val;
2175         else
2176                 return intel_digital_connector_atomic_set_property(connector, state, property, val);
2177
2178         return 0;
2179 }
2180
2181 static int
2182 intel_sdvo_connector_register(struct drm_connector *connector)
2183 {
2184         struct intel_sdvo *sdvo = intel_attached_sdvo(connector);
2185         int ret;
2186
2187         ret = intel_connector_register(connector);
2188         if (ret)
2189                 return ret;
2190
2191         return sysfs_create_link(&connector->kdev->kobj,
2192                                  &sdvo->ddc.dev.kobj,
2193                                  sdvo->ddc.dev.kobj.name);
2194 }
2195
2196 static void
2197 intel_sdvo_connector_unregister(struct drm_connector *connector)
2198 {
2199         struct intel_sdvo *sdvo = intel_attached_sdvo(connector);
2200
2201         sysfs_remove_link(&connector->kdev->kobj,
2202                           sdvo->ddc.dev.kobj.name);
2203         intel_connector_unregister(connector);
2204 }
2205
2206 static struct drm_connector_state *
2207 intel_sdvo_connector_duplicate_state(struct drm_connector *connector)
2208 {
2209         struct intel_sdvo_connector_state *state;
2210
2211         state = kmemdup(connector->state, sizeof(*state), GFP_KERNEL);
2212         if (!state)
2213                 return NULL;
2214
2215         __drm_atomic_helper_connector_duplicate_state(connector, &state->base.base);
2216         return &state->base.base;
2217 }
2218
2219 static const struct drm_connector_funcs intel_sdvo_connector_funcs = {
2220         .detect = intel_sdvo_detect,
2221         .fill_modes = drm_helper_probe_single_connector_modes,
2222         .atomic_get_property = intel_sdvo_connector_atomic_get_property,
2223         .atomic_set_property = intel_sdvo_connector_atomic_set_property,
2224         .late_register = intel_sdvo_connector_register,
2225         .early_unregister = intel_sdvo_connector_unregister,
2226         .destroy = intel_connector_destroy,
2227         .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
2228         .atomic_duplicate_state = intel_sdvo_connector_duplicate_state,
2229 };
2230
2231 static int intel_sdvo_atomic_check(struct drm_connector *conn,
2232                                    struct drm_connector_state *new_conn_state)
2233 {
2234         struct drm_atomic_state *state = new_conn_state->state;
2235         struct drm_connector_state *old_conn_state =
2236                 drm_atomic_get_old_connector_state(state, conn);
2237         struct intel_sdvo_connector_state *old_state =
2238                 to_intel_sdvo_connector_state(old_conn_state);
2239         struct intel_sdvo_connector_state *new_state =
2240                 to_intel_sdvo_connector_state(new_conn_state);
2241
2242         if (new_conn_state->crtc &&
2243             (memcmp(&old_state->tv, &new_state->tv, sizeof(old_state->tv)) ||
2244              memcmp(&old_conn_state->tv, &new_conn_state->tv, sizeof(old_conn_state->tv)))) {
2245                 struct drm_crtc_state *crtc_state =
2246                         drm_atomic_get_new_crtc_state(new_conn_state->state,
2247                                                       new_conn_state->crtc);
2248
2249                 crtc_state->connectors_changed = true;
2250         }
2251
2252         return intel_digital_connector_atomic_check(conn, new_conn_state);
2253 }
2254
2255 static const struct drm_connector_helper_funcs intel_sdvo_connector_helper_funcs = {
2256         .get_modes = intel_sdvo_get_modes,
2257         .mode_valid = intel_sdvo_mode_valid,
2258         .atomic_check = intel_sdvo_atomic_check,
2259 };
2260
2261 static void intel_sdvo_enc_destroy(struct drm_encoder *encoder)
2262 {
2263         struct intel_sdvo *intel_sdvo = to_sdvo(to_intel_encoder(encoder));
2264
2265         i2c_del_adapter(&intel_sdvo->ddc);
2266         intel_encoder_destroy(encoder);
2267 }
2268
2269 static const struct drm_encoder_funcs intel_sdvo_enc_funcs = {
2270         .destroy = intel_sdvo_enc_destroy,
2271 };
2272
2273 static void
2274 intel_sdvo_guess_ddc_bus(struct intel_sdvo *sdvo)
2275 {
2276         uint16_t mask = 0;
2277         unsigned int num_bits;
2278
2279         /*
2280          * Make a mask of outputs less than or equal to our own priority in the
2281          * list.
2282          */
2283         switch (sdvo->controlled_output) {
2284         case SDVO_OUTPUT_LVDS1:
2285                 mask |= SDVO_OUTPUT_LVDS1;
2286                 /* fall through */
2287         case SDVO_OUTPUT_LVDS0:
2288                 mask |= SDVO_OUTPUT_LVDS0;
2289                 /* fall through */
2290         case SDVO_OUTPUT_TMDS1:
2291                 mask |= SDVO_OUTPUT_TMDS1;
2292                 /* fall through */
2293         case SDVO_OUTPUT_TMDS0:
2294                 mask |= SDVO_OUTPUT_TMDS0;
2295                 /* fall through */
2296         case SDVO_OUTPUT_RGB1:
2297                 mask |= SDVO_OUTPUT_RGB1;
2298                 /* fall through */
2299         case SDVO_OUTPUT_RGB0:
2300                 mask |= SDVO_OUTPUT_RGB0;
2301                 break;
2302         }
2303
2304         /* Count bits to find what number we are in the priority list. */
2305         mask &= sdvo->caps.output_flags;
2306         num_bits = hweight16(mask);
2307         /* If more than 3 outputs, default to DDC bus 3 for now. */
2308         if (num_bits > 3)
2309                 num_bits = 3;
2310
2311         /* Corresponds to SDVO_CONTROL_BUS_DDCx */
2312         sdvo->ddc_bus = 1 << num_bits;
2313 }
2314
2315 /*
2316  * Choose the appropriate DDC bus for control bus switch command for this
2317  * SDVO output based on the controlled output.
2318  *
2319  * DDC bus number assignment is in a priority order of RGB outputs, then TMDS
2320  * outputs, then LVDS outputs.
2321  */
2322 static void
2323 intel_sdvo_select_ddc_bus(struct drm_i915_private *dev_priv,
2324                           struct intel_sdvo *sdvo)
2325 {
2326         struct sdvo_device_mapping *mapping;
2327
2328         if (sdvo->port == PORT_B)
2329                 mapping = &dev_priv->vbt.sdvo_mappings[0];
2330         else
2331                 mapping = &dev_priv->vbt.sdvo_mappings[1];
2332
2333         if (mapping->initialized)
2334                 sdvo->ddc_bus = 1 << ((mapping->ddc_pin & 0xf0) >> 4);
2335         else
2336                 intel_sdvo_guess_ddc_bus(sdvo);
2337 }
2338
2339 static void
2340 intel_sdvo_select_i2c_bus(struct drm_i915_private *dev_priv,
2341                           struct intel_sdvo *sdvo)
2342 {
2343         struct sdvo_device_mapping *mapping;
2344         u8 pin;
2345
2346         if (sdvo->port == PORT_B)
2347                 mapping = &dev_priv->vbt.sdvo_mappings[0];
2348         else
2349                 mapping = &dev_priv->vbt.sdvo_mappings[1];
2350
2351         if (mapping->initialized &&
2352             intel_gmbus_is_valid_pin(dev_priv, mapping->i2c_pin))
2353                 pin = mapping->i2c_pin;
2354         else
2355                 pin = GMBUS_PIN_DPB;
2356
2357         sdvo->i2c = intel_gmbus_get_adapter(dev_priv, pin);
2358
2359         /*
2360          * With gmbus we should be able to drive sdvo i2c at 2MHz, but somehow
2361          * our code totally fails once we start using gmbus. Hence fall back to
2362          * bit banging for now.
2363          */
2364         intel_gmbus_force_bit(sdvo->i2c, true);
2365 }
2366
2367 /* undo any changes intel_sdvo_select_i2c_bus() did to sdvo->i2c */
2368 static void
2369 intel_sdvo_unselect_i2c_bus(struct intel_sdvo *sdvo)
2370 {
2371         intel_gmbus_force_bit(sdvo->i2c, false);
2372 }
2373
2374 static bool
2375 intel_sdvo_is_hdmi_connector(struct intel_sdvo *intel_sdvo, int device)
2376 {
2377         return intel_sdvo_check_supp_encode(intel_sdvo);
2378 }
2379
2380 static u8
2381 intel_sdvo_get_slave_addr(struct drm_i915_private *dev_priv,
2382                           struct intel_sdvo *sdvo)
2383 {
2384         struct sdvo_device_mapping *my_mapping, *other_mapping;
2385
2386         if (sdvo->port == PORT_B) {
2387                 my_mapping = &dev_priv->vbt.sdvo_mappings[0];
2388                 other_mapping = &dev_priv->vbt.sdvo_mappings[1];
2389         } else {
2390                 my_mapping = &dev_priv->vbt.sdvo_mappings[1];
2391                 other_mapping = &dev_priv->vbt.sdvo_mappings[0];
2392         }
2393
2394         /* If the BIOS described our SDVO device, take advantage of it. */
2395         if (my_mapping->slave_addr)
2396                 return my_mapping->slave_addr;
2397
2398         /*
2399          * If the BIOS only described a different SDVO device, use the
2400          * address that it isn't using.
2401          */
2402         if (other_mapping->slave_addr) {
2403                 if (other_mapping->slave_addr == 0x70)
2404                         return 0x72;
2405                 else
2406                         return 0x70;
2407         }
2408
2409         /*
2410          * No SDVO device info is found for another DVO port,
2411          * so use mapping assumption we had before BIOS parsing.
2412          */
2413         if (sdvo->port == PORT_B)
2414                 return 0x70;
2415         else
2416                 return 0x72;
2417 }
2418
2419 static int
2420 intel_sdvo_connector_init(struct intel_sdvo_connector *connector,
2421                           struct intel_sdvo *encoder)
2422 {
2423         struct drm_connector *drm_connector;
2424         int ret;
2425
2426         drm_connector = &connector->base.base;
2427         ret = drm_connector_init(encoder->base.base.dev,
2428                            drm_connector,
2429                            &intel_sdvo_connector_funcs,
2430                            connector->base.base.connector_type);
2431         if (ret < 0)
2432                 return ret;
2433
2434         drm_connector_helper_add(drm_connector,
2435                                  &intel_sdvo_connector_helper_funcs);
2436
2437         connector->base.base.interlace_allowed = 1;
2438         connector->base.base.doublescan_allowed = 0;
2439         connector->base.base.display_info.subpixel_order = SubPixelHorizontalRGB;
2440         connector->base.get_hw_state = intel_sdvo_connector_get_hw_state;
2441
2442         intel_connector_attach_encoder(&connector->base, &encoder->base);
2443
2444         return 0;
2445 }
2446
2447 static void
2448 intel_sdvo_add_hdmi_properties(struct intel_sdvo *intel_sdvo,
2449                                struct intel_sdvo_connector *connector)
2450 {
2451         struct drm_i915_private *dev_priv = to_i915(connector->base.base.dev);
2452
2453         intel_attach_force_audio_property(&connector->base.base);
2454         if (INTEL_GEN(dev_priv) >= 4 && IS_MOBILE(dev_priv)) {
2455                 intel_attach_broadcast_rgb_property(&connector->base.base);
2456         }
2457         intel_attach_aspect_ratio_property(&connector->base.base);
2458         connector->base.base.state->picture_aspect_ratio = HDMI_PICTURE_ASPECT_NONE;
2459 }
2460
2461 static struct intel_sdvo_connector *intel_sdvo_connector_alloc(void)
2462 {
2463         struct intel_sdvo_connector *sdvo_connector;
2464         struct intel_sdvo_connector_state *conn_state;
2465
2466         sdvo_connector = kzalloc(sizeof(*sdvo_connector), GFP_KERNEL);
2467         if (!sdvo_connector)
2468                 return NULL;
2469
2470         conn_state = kzalloc(sizeof(*conn_state), GFP_KERNEL);
2471         if (!conn_state) {
2472                 kfree(sdvo_connector);
2473                 return NULL;
2474         }
2475
2476         __drm_atomic_helper_connector_reset(&sdvo_connector->base.base,
2477                                             &conn_state->base.base);
2478
2479         return sdvo_connector;
2480 }
2481
2482 static bool
2483 intel_sdvo_dvi_init(struct intel_sdvo *intel_sdvo, int device)
2484 {
2485         struct drm_encoder *encoder = &intel_sdvo->base.base;
2486         struct drm_i915_private *dev_priv = to_i915(encoder->dev);
2487         struct drm_connector *connector;
2488         struct intel_encoder *intel_encoder = to_intel_encoder(encoder);
2489         struct intel_connector *intel_connector;
2490         struct intel_sdvo_connector *intel_sdvo_connector;
2491
2492         DRM_DEBUG_KMS("initialising DVI device %d\n", device);
2493
2494         intel_sdvo_connector = intel_sdvo_connector_alloc();
2495         if (!intel_sdvo_connector)
2496                 return false;
2497
2498         if (device == 0) {
2499                 intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS0;
2500                 intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS0;
2501         } else if (device == 1) {
2502                 intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS1;
2503                 intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS1;
2504         }
2505
2506         intel_connector = &intel_sdvo_connector->base;
2507         connector = &intel_connector->base;
2508         if (intel_sdvo_get_hotplug_support(intel_sdvo) &
2509                 intel_sdvo_connector->output_flag) {
2510                 intel_sdvo->hotplug_active |= intel_sdvo_connector->output_flag;
2511                 /*
2512                  * Some SDVO devices have one-shot hotplug interrupts.
2513                  * Ensure that they get re-enabled when an interrupt happens.
2514                  */
2515                 intel_encoder->hotplug = intel_sdvo_hotplug;
2516                 intel_sdvo_enable_hotplug(intel_encoder);
2517         } else {
2518                 intel_connector->polled = DRM_CONNECTOR_POLL_CONNECT | DRM_CONNECTOR_POLL_DISCONNECT;
2519         }
2520         encoder->encoder_type = DRM_MODE_ENCODER_TMDS;
2521         connector->connector_type = DRM_MODE_CONNECTOR_DVID;
2522
2523         /* gen3 doesn't do the hdmi bits in the SDVO register */
2524         if (INTEL_GEN(dev_priv) >= 4 &&
2525             intel_sdvo_is_hdmi_connector(intel_sdvo, device)) {
2526                 connector->connector_type = DRM_MODE_CONNECTOR_HDMIA;
2527                 intel_sdvo_connector->is_hdmi = true;
2528         }
2529
2530         if (intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo) < 0) {
2531                 kfree(intel_sdvo_connector);
2532                 return false;
2533         }
2534
2535         if (intel_sdvo_connector->is_hdmi)
2536                 intel_sdvo_add_hdmi_properties(intel_sdvo, intel_sdvo_connector);
2537
2538         return true;
2539 }
2540
2541 static bool
2542 intel_sdvo_tv_init(struct intel_sdvo *intel_sdvo, int type)
2543 {
2544         struct drm_encoder *encoder = &intel_sdvo->base.base;
2545         struct drm_connector *connector;
2546         struct intel_connector *intel_connector;
2547         struct intel_sdvo_connector *intel_sdvo_connector;
2548
2549         DRM_DEBUG_KMS("initialising TV type %d\n", type);
2550
2551         intel_sdvo_connector = intel_sdvo_connector_alloc();
2552         if (!intel_sdvo_connector)
2553                 return false;
2554
2555         intel_connector = &intel_sdvo_connector->base;
2556         connector = &intel_connector->base;
2557         encoder->encoder_type = DRM_MODE_ENCODER_TVDAC;
2558         connector->connector_type = DRM_MODE_CONNECTOR_SVIDEO;
2559
2560         intel_sdvo->controlled_output |= type;
2561         intel_sdvo_connector->output_flag = type;
2562
2563         if (intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo) < 0) {
2564                 kfree(intel_sdvo_connector);
2565                 return false;
2566         }
2567
2568         if (!intel_sdvo_tv_create_property(intel_sdvo, intel_sdvo_connector, type))
2569                 goto err;
2570
2571         if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector))
2572                 goto err;
2573
2574         return true;
2575
2576 err:
2577         intel_connector_destroy(connector);
2578         return false;
2579 }
2580
2581 static bool
2582 intel_sdvo_analog_init(struct intel_sdvo *intel_sdvo, int device)
2583 {
2584         struct drm_encoder *encoder = &intel_sdvo->base.base;
2585         struct drm_connector *connector;
2586         struct intel_connector *intel_connector;
2587         struct intel_sdvo_connector *intel_sdvo_connector;
2588
2589         DRM_DEBUG_KMS("initialising analog device %d\n", device);
2590
2591         intel_sdvo_connector = intel_sdvo_connector_alloc();
2592         if (!intel_sdvo_connector)
2593                 return false;
2594
2595         intel_connector = &intel_sdvo_connector->base;
2596         connector = &intel_connector->base;
2597         intel_connector->polled = DRM_CONNECTOR_POLL_CONNECT;
2598         encoder->encoder_type = DRM_MODE_ENCODER_DAC;
2599         connector->connector_type = DRM_MODE_CONNECTOR_VGA;
2600
2601         if (device == 0) {
2602                 intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB0;
2603                 intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB0;
2604         } else if (device == 1) {
2605                 intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB1;
2606                 intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB1;
2607         }
2608
2609         if (intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo) < 0) {
2610                 kfree(intel_sdvo_connector);
2611                 return false;
2612         }
2613
2614         return true;
2615 }
2616
2617 static bool
2618 intel_sdvo_lvds_init(struct intel_sdvo *intel_sdvo, int device)
2619 {
2620         struct drm_encoder *encoder = &intel_sdvo->base.base;
2621         struct drm_connector *connector;
2622         struct intel_connector *intel_connector;
2623         struct intel_sdvo_connector *intel_sdvo_connector;
2624         struct drm_display_mode *mode;
2625
2626         DRM_DEBUG_KMS("initialising LVDS device %d\n", device);
2627
2628         intel_sdvo_connector = intel_sdvo_connector_alloc();
2629         if (!intel_sdvo_connector)
2630                 return false;
2631
2632         intel_connector = &intel_sdvo_connector->base;
2633         connector = &intel_connector->base;
2634         encoder->encoder_type = DRM_MODE_ENCODER_LVDS;
2635         connector->connector_type = DRM_MODE_CONNECTOR_LVDS;
2636
2637         if (device == 0) {
2638                 intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS0;
2639                 intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS0;
2640         } else if (device == 1) {
2641                 intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS1;
2642                 intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS1;
2643         }
2644
2645         if (intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo) < 0) {
2646                 kfree(intel_sdvo_connector);
2647                 return false;
2648         }
2649
2650         if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector))
2651                 goto err;
2652
2653         intel_sdvo_get_lvds_modes(connector);
2654
2655         list_for_each_entry(mode, &connector->probed_modes, head) {
2656                 if (mode->type & DRM_MODE_TYPE_PREFERRED) {
2657                         struct drm_display_mode *fixed_mode =
2658                                 drm_mode_duplicate(connector->dev, mode);
2659
2660                         intel_panel_init(&intel_connector->panel,
2661                                          fixed_mode, NULL);
2662                         break;
2663                 }
2664         }
2665
2666         if (!intel_connector->panel.fixed_mode)
2667                 goto err;
2668
2669         return true;
2670
2671 err:
2672         intel_connector_destroy(connector);
2673         return false;
2674 }
2675
2676 static bool
2677 intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, uint16_t flags)
2678 {
2679         /* SDVO requires XXX1 function may not exist unless it has XXX0 function.*/
2680
2681         if (flags & SDVO_OUTPUT_TMDS0)
2682                 if (!intel_sdvo_dvi_init(intel_sdvo, 0))
2683                         return false;
2684
2685         if ((flags & SDVO_TMDS_MASK) == SDVO_TMDS_MASK)
2686                 if (!intel_sdvo_dvi_init(intel_sdvo, 1))
2687                         return false;
2688
2689         /* TV has no XXX1 function block */
2690         if (flags & SDVO_OUTPUT_SVID0)
2691                 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_SVID0))
2692                         return false;
2693
2694         if (flags & SDVO_OUTPUT_CVBS0)
2695                 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_CVBS0))
2696                         return false;
2697
2698         if (flags & SDVO_OUTPUT_YPRPB0)
2699                 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_YPRPB0))
2700                         return false;
2701
2702         if (flags & SDVO_OUTPUT_RGB0)
2703                 if (!intel_sdvo_analog_init(intel_sdvo, 0))
2704                         return false;
2705
2706         if ((flags & SDVO_RGB_MASK) == SDVO_RGB_MASK)
2707                 if (!intel_sdvo_analog_init(intel_sdvo, 1))
2708                         return false;
2709
2710         if (flags & SDVO_OUTPUT_LVDS0)
2711                 if (!intel_sdvo_lvds_init(intel_sdvo, 0))
2712                         return false;
2713
2714         if ((flags & SDVO_LVDS_MASK) == SDVO_LVDS_MASK)
2715                 if (!intel_sdvo_lvds_init(intel_sdvo, 1))
2716                         return false;
2717
2718         if ((flags & SDVO_OUTPUT_MASK) == 0) {
2719                 unsigned char bytes[2];
2720
2721                 intel_sdvo->controlled_output = 0;
2722                 memcpy(bytes, &intel_sdvo->caps.output_flags, 2);
2723                 DRM_DEBUG_KMS("%s: Unknown SDVO output type (0x%02x%02x)\n",
2724                               SDVO_NAME(intel_sdvo),
2725                               bytes[0], bytes[1]);
2726                 return false;
2727         }
2728         intel_sdvo->base.crtc_mask = (1 << 0) | (1 << 1) | (1 << 2);
2729
2730         return true;
2731 }
2732
2733 static void intel_sdvo_output_cleanup(struct intel_sdvo *intel_sdvo)
2734 {
2735         struct drm_device *dev = intel_sdvo->base.base.dev;
2736         struct drm_connector *connector, *tmp;
2737
2738         list_for_each_entry_safe(connector, tmp,
2739                                  &dev->mode_config.connector_list, head) {
2740                 if (intel_attached_encoder(connector) == &intel_sdvo->base) {
2741                         drm_connector_unregister(connector);
2742                         intel_connector_destroy(connector);
2743                 }
2744         }
2745 }
2746
2747 static bool intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo,
2748                                           struct intel_sdvo_connector *intel_sdvo_connector,
2749                                           int type)
2750 {
2751         struct drm_device *dev = intel_sdvo->base.base.dev;
2752         struct intel_sdvo_tv_format format;
2753         uint32_t format_map, i;
2754
2755         if (!intel_sdvo_set_target_output(intel_sdvo, type))
2756                 return false;
2757
2758         BUILD_BUG_ON(sizeof(format) != 6);
2759         if (!intel_sdvo_get_value(intel_sdvo,
2760                                   SDVO_CMD_GET_SUPPORTED_TV_FORMATS,
2761                                   &format, sizeof(format)))
2762                 return false;
2763
2764         memcpy(&format_map, &format, min(sizeof(format_map), sizeof(format)));
2765
2766         if (format_map == 0)
2767                 return false;
2768
2769         intel_sdvo_connector->format_supported_num = 0;
2770         for (i = 0 ; i < TV_FORMAT_NUM; i++)
2771                 if (format_map & (1 << i))
2772                         intel_sdvo_connector->tv_format_supported[intel_sdvo_connector->format_supported_num++] = i;
2773
2774
2775         intel_sdvo_connector->tv_format =
2776                         drm_property_create(dev, DRM_MODE_PROP_ENUM,
2777                                             "mode", intel_sdvo_connector->format_supported_num);
2778         if (!intel_sdvo_connector->tv_format)
2779                 return false;
2780
2781         for (i = 0; i < intel_sdvo_connector->format_supported_num; i++)
2782                 drm_property_add_enum(intel_sdvo_connector->tv_format, i,
2783                                       tv_format_names[intel_sdvo_connector->tv_format_supported[i]]);
2784
2785         intel_sdvo_connector->base.base.state->tv.mode = intel_sdvo_connector->tv_format_supported[0];
2786         drm_object_attach_property(&intel_sdvo_connector->base.base.base,
2787                                    intel_sdvo_connector->tv_format, 0);
2788         return true;
2789
2790 }
2791
2792 #define _ENHANCEMENT(state_assignment, name, NAME) do { \
2793         if (enhancements.name) { \
2794                 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_MAX_##NAME, &data_value, 4) || \
2795                     !intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_##NAME, &response, 2)) \
2796                         return false; \
2797                 intel_sdvo_connector->name = \
2798                         drm_property_create_range(dev, 0, #name, 0, data_value[0]); \
2799                 if (!intel_sdvo_connector->name) return false; \
2800                 state_assignment = response; \
2801                 drm_object_attach_property(&connector->base, \
2802                                            intel_sdvo_connector->name, 0); \
2803                 DRM_DEBUG_KMS(#name ": max %d, default %d, current %d\n", \
2804                               data_value[0], data_value[1], response); \
2805         } \
2806 } while (0)
2807
2808 #define ENHANCEMENT(state, name, NAME) _ENHANCEMENT((state)->name, name, NAME)
2809
2810 static bool
2811 intel_sdvo_create_enhance_property_tv(struct intel_sdvo *intel_sdvo,
2812                                       struct intel_sdvo_connector *intel_sdvo_connector,
2813                                       struct intel_sdvo_enhancements_reply enhancements)
2814 {
2815         struct drm_device *dev = intel_sdvo->base.base.dev;
2816         struct drm_connector *connector = &intel_sdvo_connector->base.base;
2817         struct drm_connector_state *conn_state = connector->state;
2818         struct intel_sdvo_connector_state *sdvo_state =
2819                 to_intel_sdvo_connector_state(conn_state);
2820         uint16_t response, data_value[2];
2821
2822         /* when horizontal overscan is supported, Add the left/right property */
2823         if (enhancements.overscan_h) {
2824                 if (!intel_sdvo_get_value(intel_sdvo,
2825                                           SDVO_CMD_GET_MAX_OVERSCAN_H,
2826                                           &data_value, 4))
2827                         return false;
2828
2829                 if (!intel_sdvo_get_value(intel_sdvo,
2830                                           SDVO_CMD_GET_OVERSCAN_H,
2831                                           &response, 2))
2832                         return false;
2833
2834                 sdvo_state->tv.overscan_h = response;
2835
2836                 intel_sdvo_connector->max_hscan = data_value[0];
2837                 intel_sdvo_connector->left =
2838                         drm_property_create_range(dev, 0, "left_margin", 0, data_value[0]);
2839                 if (!intel_sdvo_connector->left)
2840                         return false;
2841
2842                 drm_object_attach_property(&connector->base,
2843                                            intel_sdvo_connector->left, 0);
2844
2845                 intel_sdvo_connector->right =
2846                         drm_property_create_range(dev, 0, "right_margin", 0, data_value[0]);
2847                 if (!intel_sdvo_connector->right)
2848                         return false;
2849
2850                 drm_object_attach_property(&connector->base,
2851                                               intel_sdvo_connector->right, 0);
2852                 DRM_DEBUG_KMS("h_overscan: max %d, "
2853                               "default %d, current %d\n",
2854                               data_value[0], data_value[1], response);
2855         }
2856
2857         if (enhancements.overscan_v) {
2858                 if (!intel_sdvo_get_value(intel_sdvo,
2859                                           SDVO_CMD_GET_MAX_OVERSCAN_V,
2860                                           &data_value, 4))
2861                         return false;
2862
2863                 if (!intel_sdvo_get_value(intel_sdvo,
2864                                           SDVO_CMD_GET_OVERSCAN_V,
2865                                           &response, 2))
2866                         return false;
2867
2868                 sdvo_state->tv.overscan_v = response;
2869
2870                 intel_sdvo_connector->max_vscan = data_value[0];
2871                 intel_sdvo_connector->top =
2872                         drm_property_create_range(dev, 0,
2873                                             "top_margin", 0, data_value[0]);
2874                 if (!intel_sdvo_connector->top)
2875                         return false;
2876
2877                 drm_object_attach_property(&connector->base,
2878                                            intel_sdvo_connector->top, 0);
2879
2880                 intel_sdvo_connector->bottom =
2881                         drm_property_create_range(dev, 0,
2882                                             "bottom_margin", 0, data_value[0]);
2883                 if (!intel_sdvo_connector->bottom)
2884                         return false;
2885
2886                 drm_object_attach_property(&connector->base,
2887                                               intel_sdvo_connector->bottom, 0);
2888                 DRM_DEBUG_KMS("v_overscan: max %d, "
2889                               "default %d, current %d\n",
2890                               data_value[0], data_value[1], response);
2891         }
2892
2893         ENHANCEMENT(&sdvo_state->tv, hpos, HPOS);
2894         ENHANCEMENT(&sdvo_state->tv, vpos, VPOS);
2895         ENHANCEMENT(&conn_state->tv, saturation, SATURATION);
2896         ENHANCEMENT(&conn_state->tv, contrast, CONTRAST);
2897         ENHANCEMENT(&conn_state->tv, hue, HUE);
2898         ENHANCEMENT(&conn_state->tv, brightness, BRIGHTNESS);
2899         ENHANCEMENT(&sdvo_state->tv, sharpness, SHARPNESS);
2900         ENHANCEMENT(&sdvo_state->tv, flicker_filter, FLICKER_FILTER);
2901         ENHANCEMENT(&sdvo_state->tv, flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE);
2902         ENHANCEMENT(&sdvo_state->tv, flicker_filter_2d, FLICKER_FILTER_2D);
2903         _ENHANCEMENT(sdvo_state->tv.chroma_filter, tv_chroma_filter, TV_CHROMA_FILTER);
2904         _ENHANCEMENT(sdvo_state->tv.luma_filter, tv_luma_filter, TV_LUMA_FILTER);
2905
2906         if (enhancements.dot_crawl) {
2907                 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_DOT_CRAWL, &response, 2))
2908                         return false;
2909
2910                 sdvo_state->tv.dot_crawl = response & 0x1;
2911                 intel_sdvo_connector->dot_crawl =
2912                         drm_property_create_range(dev, 0, "dot_crawl", 0, 1);
2913                 if (!intel_sdvo_connector->dot_crawl)
2914                         return false;
2915
2916                 drm_object_attach_property(&connector->base,
2917                                            intel_sdvo_connector->dot_crawl, 0);
2918                 DRM_DEBUG_KMS("dot crawl: current %d\n", response);
2919         }
2920
2921         return true;
2922 }
2923
2924 static bool
2925 intel_sdvo_create_enhance_property_lvds(struct intel_sdvo *intel_sdvo,
2926                                         struct intel_sdvo_connector *intel_sdvo_connector,
2927                                         struct intel_sdvo_enhancements_reply enhancements)
2928 {
2929         struct drm_device *dev = intel_sdvo->base.base.dev;
2930         struct drm_connector *connector = &intel_sdvo_connector->base.base;
2931         uint16_t response, data_value[2];
2932
2933         ENHANCEMENT(&connector->state->tv, brightness, BRIGHTNESS);
2934
2935         return true;
2936 }
2937 #undef ENHANCEMENT
2938 #undef _ENHANCEMENT
2939
2940 static bool intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo,
2941                                                struct intel_sdvo_connector *intel_sdvo_connector)
2942 {
2943         union {
2944                 struct intel_sdvo_enhancements_reply reply;
2945                 uint16_t response;
2946         } enhancements;
2947
2948         BUILD_BUG_ON(sizeof(enhancements) != 2);
2949
2950         if (!intel_sdvo_get_value(intel_sdvo,
2951                                   SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS,
2952                                   &enhancements, sizeof(enhancements)) ||
2953             enhancements.response == 0) {
2954                 DRM_DEBUG_KMS("No enhancement is supported\n");
2955                 return true;
2956         }
2957
2958         if (IS_TV(intel_sdvo_connector))
2959                 return intel_sdvo_create_enhance_property_tv(intel_sdvo, intel_sdvo_connector, enhancements.reply);
2960         else if (IS_LVDS(intel_sdvo_connector))
2961                 return intel_sdvo_create_enhance_property_lvds(intel_sdvo, intel_sdvo_connector, enhancements.reply);
2962         else
2963                 return true;
2964 }
2965
2966 static int intel_sdvo_ddc_proxy_xfer(struct i2c_adapter *adapter,
2967                                      struct i2c_msg *msgs,
2968                                      int num)
2969 {
2970         struct intel_sdvo *sdvo = adapter->algo_data;
2971
2972         if (!__intel_sdvo_set_control_bus_switch(sdvo, sdvo->ddc_bus))
2973                 return -EIO;
2974
2975         return sdvo->i2c->algo->master_xfer(sdvo->i2c, msgs, num);
2976 }
2977
2978 static u32 intel_sdvo_ddc_proxy_func(struct i2c_adapter *adapter)
2979 {
2980         struct intel_sdvo *sdvo = adapter->algo_data;
2981         return sdvo->i2c->algo->functionality(sdvo->i2c);
2982 }
2983
2984 static const struct i2c_algorithm intel_sdvo_ddc_proxy = {
2985         .master_xfer    = intel_sdvo_ddc_proxy_xfer,
2986         .functionality  = intel_sdvo_ddc_proxy_func
2987 };
2988
2989 static void proxy_lock_bus(struct i2c_adapter *adapter,
2990                            unsigned int flags)
2991 {
2992         struct intel_sdvo *sdvo = adapter->algo_data;
2993         sdvo->i2c->lock_ops->lock_bus(sdvo->i2c, flags);
2994 }
2995
2996 static int proxy_trylock_bus(struct i2c_adapter *adapter,
2997                              unsigned int flags)
2998 {
2999         struct intel_sdvo *sdvo = adapter->algo_data;
3000         return sdvo->i2c->lock_ops->trylock_bus(sdvo->i2c, flags);
3001 }
3002
3003 static void proxy_unlock_bus(struct i2c_adapter *adapter,
3004                              unsigned int flags)
3005 {
3006         struct intel_sdvo *sdvo = adapter->algo_data;
3007         sdvo->i2c->lock_ops->unlock_bus(sdvo->i2c, flags);
3008 }
3009
3010 static const struct i2c_lock_operations proxy_lock_ops = {
3011         .lock_bus =    proxy_lock_bus,
3012         .trylock_bus = proxy_trylock_bus,
3013         .unlock_bus =  proxy_unlock_bus,
3014 };
3015
3016 static bool
3017 intel_sdvo_init_ddc_proxy(struct intel_sdvo *sdvo,
3018                           struct drm_i915_private *dev_priv)
3019 {
3020         struct pci_dev *pdev = dev_priv->drm.pdev;
3021
3022         sdvo->ddc.owner = THIS_MODULE;
3023         sdvo->ddc.class = I2C_CLASS_DDC;
3024         snprintf(sdvo->ddc.name, I2C_NAME_SIZE, "SDVO DDC proxy");
3025         sdvo->ddc.dev.parent = &pdev->dev;
3026         sdvo->ddc.algo_data = sdvo;
3027         sdvo->ddc.algo = &intel_sdvo_ddc_proxy;
3028         sdvo->ddc.lock_ops = &proxy_lock_ops;
3029
3030         return i2c_add_adapter(&sdvo->ddc) == 0;
3031 }
3032
3033 static void assert_sdvo_port_valid(const struct drm_i915_private *dev_priv,
3034                                    enum port port)
3035 {
3036         if (HAS_PCH_SPLIT(dev_priv))
3037                 WARN_ON(port != PORT_B);
3038         else
3039                 WARN_ON(port != PORT_B && port != PORT_C);
3040 }
3041
3042 bool intel_sdvo_init(struct drm_i915_private *dev_priv,
3043                      i915_reg_t sdvo_reg, enum port port)
3044 {
3045         struct intel_encoder *intel_encoder;
3046         struct intel_sdvo *intel_sdvo;
3047         int i;
3048
3049         assert_sdvo_port_valid(dev_priv, port);
3050
3051         intel_sdvo = kzalloc(sizeof(*intel_sdvo), GFP_KERNEL);
3052         if (!intel_sdvo)
3053                 return false;
3054
3055         intel_sdvo->sdvo_reg = sdvo_reg;
3056         intel_sdvo->port = port;
3057         intel_sdvo->slave_addr =
3058                 intel_sdvo_get_slave_addr(dev_priv, intel_sdvo) >> 1;
3059         intel_sdvo_select_i2c_bus(dev_priv, intel_sdvo);
3060         if (!intel_sdvo_init_ddc_proxy(intel_sdvo, dev_priv))
3061                 goto err_i2c_bus;
3062
3063         /* encoder type will be decided later */
3064         intel_encoder = &intel_sdvo->base;
3065         intel_encoder->type = INTEL_OUTPUT_SDVO;
3066         intel_encoder->power_domain = POWER_DOMAIN_PORT_OTHER;
3067         intel_encoder->port = port;
3068         drm_encoder_init(&dev_priv->drm, &intel_encoder->base,
3069                          &intel_sdvo_enc_funcs, 0,
3070                          "SDVO %c", port_name(port));
3071
3072         /* Read the regs to test if we can talk to the device */
3073         for (i = 0; i < 0x40; i++) {
3074                 u8 byte;
3075
3076                 if (!intel_sdvo_read_byte(intel_sdvo, i, &byte)) {
3077                         DRM_DEBUG_KMS("No SDVO device found on %s\n",
3078                                       SDVO_NAME(intel_sdvo));
3079                         goto err;
3080                 }
3081         }
3082
3083         intel_encoder->compute_config = intel_sdvo_compute_config;
3084         if (HAS_PCH_SPLIT(dev_priv)) {
3085                 intel_encoder->disable = pch_disable_sdvo;
3086                 intel_encoder->post_disable = pch_post_disable_sdvo;
3087         } else {
3088                 intel_encoder->disable = intel_disable_sdvo;
3089         }
3090         intel_encoder->pre_enable = intel_sdvo_pre_enable;
3091         intel_encoder->enable = intel_enable_sdvo;
3092         intel_encoder->get_hw_state = intel_sdvo_get_hw_state;
3093         intel_encoder->get_config = intel_sdvo_get_config;
3094
3095         /* In default case sdvo lvds is false */
3096         if (!intel_sdvo_get_capabilities(intel_sdvo, &intel_sdvo->caps))
3097                 goto err;
3098
3099         if (intel_sdvo_output_setup(intel_sdvo,
3100                                     intel_sdvo->caps.output_flags) != true) {
3101                 DRM_DEBUG_KMS("SDVO output failed to setup on %s\n",
3102                               SDVO_NAME(intel_sdvo));
3103                 /* Output_setup can leave behind connectors! */
3104                 goto err_output;
3105         }
3106
3107         /*
3108          * Only enable the hotplug irq if we need it, to work around noisy
3109          * hotplug lines.
3110          */
3111         if (intel_sdvo->hotplug_active) {
3112                 if (intel_sdvo->port == PORT_B)
3113                         intel_encoder->hpd_pin = HPD_SDVO_B;
3114                 else
3115                         intel_encoder->hpd_pin = HPD_SDVO_C;
3116         }
3117
3118         /*
3119          * Cloning SDVO with anything is often impossible, since the SDVO
3120          * encoder can request a special input timing mode. And even if that's
3121          * not the case we have evidence that cloning a plain unscaled mode with
3122          * VGA doesn't really work. Furthermore the cloning flags are way too
3123          * simplistic anyway to express such constraints, so just give up on
3124          * cloning for SDVO encoders.
3125          */
3126         intel_sdvo->base.cloneable = 0;
3127
3128         intel_sdvo_select_ddc_bus(dev_priv, intel_sdvo);
3129
3130         /* Set the input timing to the screen. Assume always input 0. */
3131         if (!intel_sdvo_set_target_input(intel_sdvo))
3132                 goto err_output;
3133
3134         if (!intel_sdvo_get_input_pixel_clock_range(intel_sdvo,
3135                                                     &intel_sdvo->pixel_clock_min,
3136                                                     &intel_sdvo->pixel_clock_max))
3137                 goto err_output;
3138
3139         DRM_DEBUG_KMS("%s device VID/DID: %02X:%02X.%02X, "
3140                         "clock range %dMHz - %dMHz, "
3141                         "input 1: %c, input 2: %c, "
3142                         "output 1: %c, output 2: %c\n",
3143                         SDVO_NAME(intel_sdvo),
3144                         intel_sdvo->caps.vendor_id, intel_sdvo->caps.device_id,
3145                         intel_sdvo->caps.device_rev_id,
3146                         intel_sdvo->pixel_clock_min / 1000,
3147                         intel_sdvo->pixel_clock_max / 1000,
3148                         (intel_sdvo->caps.sdvo_inputs_mask & 0x1) ? 'Y' : 'N',
3149                         (intel_sdvo->caps.sdvo_inputs_mask & 0x2) ? 'Y' : 'N',
3150                         /* check currently supported outputs */
3151                         intel_sdvo->caps.output_flags &
3152                         (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_RGB0) ? 'Y' : 'N',
3153                         intel_sdvo->caps.output_flags &
3154                         (SDVO_OUTPUT_TMDS1 | SDVO_OUTPUT_RGB1) ? 'Y' : 'N');
3155         return true;
3156
3157 err_output:
3158         intel_sdvo_output_cleanup(intel_sdvo);
3159
3160 err:
3161         drm_encoder_cleanup(&intel_encoder->base);
3162         i2c_del_adapter(&intel_sdvo->ddc);
3163 err_i2c_bus:
3164         intel_sdvo_unselect_i2c_bus(intel_sdvo);
3165         kfree(intel_sdvo);
3166
3167         return false;
3168 }