drivers/staging/iio/cdc/ad7152.c

   1 /*
   2  * AD7152 capacitive sensor driver supporting AD7152/3
   3  *
   4  * Copyright 2010-2011a Analog Devices Inc.
   5  *
   6  * Licensed under the GPL-2 or later.
   7  */
   8
   9 #include <linux/interrupt.h>
  10 #include <linux/device.h>
  11 #include <linux/kernel.h>
  12 #include <linux/slab.h>
  13 #include <linux/sysfs.h>
  14 #include <linux/i2c.h>
  15 #include <linux/module.h>
  16 #include <linux/delay.h>
  17
  18 #include <linux/iio/iio.h>
  19 #include <linux/iio/sysfs.h>
  20
  21 /*
  22  * TODO: Check compliance of calibbias with abi (units)
  23  */
  24 /*
  25  * AD7152 registers definition
  26  */
  27
  28 #define AD7152_REG_STATUS               0
  29 #define AD7152_REG_CH1_DATA_HIGH        1
  30 #define AD7152_REG_CH2_DATA_HIGH        3
  31 #define AD7152_REG_CH1_OFFS_HIGH        5
  32 #define AD7152_REG_CH2_OFFS_HIGH        7
  33 #define AD7152_REG_CH1_GAIN_HIGH        9
  34 #define AD7152_REG_CH1_SETUP            11
  35 #define AD7152_REG_CH2_GAIN_HIGH        12
  36 #define AD7152_REG_CH2_SETUP            14
  37 #define AD7152_REG_CFG                  15
  38 #define AD7152_REG_RESEVERD             16
  39 #define AD7152_REG_CAPDAC_POS           17
  40 #define AD7152_REG_CAPDAC_NEG           18
  41 #define AD7152_REG_CFG2                 26
  42
  43 /* Status Register Bit Designations (AD7152_REG_STATUS) */
  44 #define AD7152_STATUS_RDY1              (1 << 0)
  45 #define AD7152_STATUS_RDY2              (1 << 1)
  46 #define AD7152_STATUS_C1C2              (1 << 2)
  47 #define AD7152_STATUS_PWDN              (1 << 7)
  48
  49 /* Setup Register Bit Designations (AD7152_REG_CHx_SETUP) */
  50 #define AD7152_SETUP_CAPDIFF            (1 << 5)
  51 #define AD7152_SETUP_RANGE_2pF          (0 << 6)
  52 #define AD7152_SETUP_RANGE_0_5pF        (1 << 6)
  53 #define AD7152_SETUP_RANGE_1pF          (2 << 6)
  54 #define AD7152_SETUP_RANGE_4pF          (3 << 6)
  55 #define AD7152_SETUP_RANGE(x)           ((x) << 6)
  56
  57 /* Config Register Bit Designations (AD7152_REG_CFG) */
  58 #define AD7152_CONF_CH2EN               (1 << 3)
  59 #define AD7152_CONF_CH1EN               (1 << 4)
  60 #define AD7152_CONF_MODE_IDLE           (0 << 0)
  61 #define AD7152_CONF_MODE_CONT_CONV      (1 << 0)
  62 #define AD7152_CONF_MODE_SINGLE_CONV    (2 << 0)
  63 #define AD7152_CONF_MODE_OFFS_CAL       (5 << 0)
  64 #define AD7152_CONF_MODE_GAIN_CAL       (6 << 0)
  65
  66 /* Capdac Register Bit Designations (AD7152_REG_CAPDAC_XXX) */
  67 #define AD7152_CAPDAC_DACEN             (1 << 7)
  68 #define AD7152_CAPDAC_DACP(x)           ((x) & 0x1F)
  69
  70 /* CFG2 Register Bit Designations (AD7152_REG_CFG2) */
  71 #define AD7152_CFG2_OSR(x)              (((x) & 0x3) << 4)
  72
  73 enum {
  74         AD7152_DATA,
  75         AD7152_OFFS,
  76         AD7152_GAIN,
  77         AD7152_SETUP
  78 };
  79
  80 /*
  81  * struct ad7152_chip_info - chip specific information
  82  */
  83
  84 struct ad7152_chip_info {
  85         struct i2c_client *client;
  86         /*
  87          * Capacitive channel digital filter setup;
  88          * conversion time/update rate setup per channel
  89          */
  90         u8      filter_rate_setup;
  91         u8      setup[2];
  92 };
  93
  94 static inline ssize_t ad7152_start_calib(struct device *dev,
  95                                          struct device_attribute *attr,
  96                                          const char *buf,
  97                                          size_t len,
  98                                          u8 regval)
  99 {
 100         struct iio_dev *indio_dev = dev_to_iio_dev(dev);
 101         struct ad7152_chip_info *chip = iio_priv(indio_dev);
 102         struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
 103         bool doit;
 104         int ret, timeout = 10;
 105
 106         ret = strtobool(buf, &doit);
 107         if (ret < 0)
 108                 return ret;
 109
 110         if (!doit)
 111                 return 0;
 112
 113         if (this_attr->address == 0)
 114                 regval |= AD7152_CONF_CH1EN;
 115         else
 116                 regval |= AD7152_CONF_CH2EN;
 117
 118         mutex_lock(&indio_dev->mlock);
 119         ret = i2c_smbus_write_byte_data(chip->client, AD7152_REG_CFG, regval);
 120         if (ret < 0) {
 121                 mutex_unlock(&indio_dev->mlock);
 122                 return ret;
 123         }
 124
 125         do {
 126                 mdelay(20);
 127                 ret = i2c_smbus_read_byte_data(chip->client, AD7152_REG_CFG);
 128                 if (ret < 0) {
 129                         mutex_unlock(&indio_dev->mlock);
 130                         return ret;
 131                 }
 132         } while ((ret == regval) && timeout--);
 133
 134         mutex_unlock(&indio_dev->mlock);
 135         return len;
 136 }
 137 static ssize_t ad7152_start_offset_calib(struct device *dev,
 138                                          struct device_attribute *attr,
 139                                          const char *buf,
 140                                          size_t len)
 141 {
 142         return ad7152_start_calib(dev, attr, buf, len,
 143                                   AD7152_CONF_MODE_OFFS_CAL);
 144 }
 145 static ssize_t ad7152_start_gain_calib(struct device *dev,
 146                                        struct device_attribute *attr,
 147                                        const char *buf,
 148                                        size_t len)
 149 {
 150         return ad7152_start_calib(dev, attr, buf, len,
 151                                   AD7152_CONF_MODE_GAIN_CAL);
 152 }
 153
 154 static IIO_DEVICE_ATTR(in_capacitance0_calibbias_calibration,
 155                        S_IWUSR, NULL, ad7152_start_offset_calib, 0);
 156 static IIO_DEVICE_ATTR(in_capacitance1_calibbias_calibration,
 157                        S_IWUSR, NULL, ad7152_start_offset_calib, 1);
 158 static IIO_DEVICE_ATTR(in_capacitance0_calibscale_calibration,
 159                        S_IWUSR, NULL, ad7152_start_gain_calib, 0);
 160 static IIO_DEVICE_ATTR(in_capacitance1_calibscale_calibration,
 161                        S_IWUSR, NULL, ad7152_start_gain_calib, 1);
 162
 163 /* Values are Update Rate (Hz), Conversion Time (ms) + 1*/
 164 static const unsigned char ad7152_filter_rate_table[][2] = {
 165         {200, 5 + 1}, {50, 20 + 1}, {20, 50 + 1}, {17, 60 + 1},
 166 };
 167
 168 static ssize_t ad7152_show_filter_rate_setup(struct device *dev,
 169                 struct device_attribute *attr,
 170                 char *buf)
 171 {
 172         struct iio_dev *indio_dev = dev_to_iio_dev(dev);
 173         struct ad7152_chip_info *chip = iio_priv(indio_dev);
 174
 175         return sprintf(buf, "%d\n",
 176                        ad7152_filter_rate_table[chip->filter_rate_setup][0]);
 177 }
 178
 179 static ssize_t ad7152_store_filter_rate_setup(struct device *dev,
 180                 struct device_attribute *attr,
 181                 const char *buf,
 182                 size_t len)
 183 {
 184         struct iio_dev *indio_dev = dev_to_iio_dev(dev);
 185         struct ad7152_chip_info *chip = iio_priv(indio_dev);
 186         u8 data;
 187         int ret, i;
 188
 189         ret = kstrtou8(buf, 10, &data);
 190         if (ret < 0)
 191                 return ret;
 192
 193         for (i = 0; i < ARRAY_SIZE(ad7152_filter_rate_table); i++)
 194                 if (data >= ad7152_filter_rate_table[i][0])
 195                         break;
 196
 197         if (i >= ARRAY_SIZE(ad7152_filter_rate_table))
 198                 i = ARRAY_SIZE(ad7152_filter_rate_table) - 1;
 199
 200         mutex_lock(&indio_dev->mlock);
 201         ret = i2c_smbus_write_byte_data(chip->client,
 202                         AD7152_REG_CFG2, AD7152_CFG2_OSR(i));
 203         if (ret < 0) {
 204                 mutex_unlock(&indio_dev->mlock);
 205                 return ret;
 206         }
 207
 208         chip->filter_rate_setup = i;
 209         mutex_unlock(&indio_dev->mlock);
 210
 211         return len;
 212 }
 213
 214 static IIO_DEV_ATTR_SAMP_FREQ(S_IRUGO | S_IWUSR,
 215                 ad7152_show_filter_rate_setup,
 216                 ad7152_store_filter_rate_setup);
 217
 218 static IIO_CONST_ATTR_SAMP_FREQ_AVAIL("200 50 20 17");
 219
 220 static IIO_CONST_ATTR(in_capacitance_scale_available,
 221                       "0.000061050 0.000030525 0.000015263 0.000007631");
 222
 223 static struct attribute *ad7152_attributes[] = {
 224         &iio_dev_attr_sampling_frequency.dev_attr.attr,
 225         &iio_dev_attr_in_capacitance0_calibbias_calibration.dev_attr.attr,
 226         &iio_dev_attr_in_capacitance1_calibbias_calibration.dev_attr.attr,
 227         &iio_dev_attr_in_capacitance0_calibscale_calibration.dev_attr.attr,
 228         &iio_dev_attr_in_capacitance1_calibscale_calibration.dev_attr.attr,
 229         &iio_const_attr_in_capacitance_scale_available.dev_attr.attr,
 230         &iio_const_attr_sampling_frequency_available.dev_attr.attr,
 231         NULL,
 232 };
 233
 234 static const struct attribute_group ad7152_attribute_group = {
 235         .attrs = ad7152_attributes,
 236 };
 237
 238 static const u8 ad7152_addresses[][4] = {
 239         { AD7152_REG_CH1_DATA_HIGH, AD7152_REG_CH1_OFFS_HIGH,
 240           AD7152_REG_CH1_GAIN_HIGH, AD7152_REG_CH1_SETUP },
 241         { AD7152_REG_CH2_DATA_HIGH, AD7152_REG_CH2_OFFS_HIGH,
 242           AD7152_REG_CH2_GAIN_HIGH, AD7152_REG_CH2_SETUP },
 243 };
 244
 245 /* Values are nano relative to pf base. */
 246 static const int ad7152_scale_table[] = {
 247         30525, 7631, 15263, 61050
 248 };
 249
 250 static int ad7152_write_raw(struct iio_dev *indio_dev,
 251                             struct iio_chan_spec const *chan,
 252                             int val,
 253                             int val2,
 254                             long mask)
 255 {
 256         struct ad7152_chip_info *chip = iio_priv(indio_dev);
 257         int ret, i;
 258
 259         mutex_lock(&indio_dev->mlock);
 260
 261         switch (mask) {
 262         case IIO_CHAN_INFO_CALIBSCALE:
 263                 if (val != 1) {
 264                         ret = -EINVAL;
 265                         goto out;
 266                 }
 267
 268                 val = (val2 * 1024) / 15625;
 269
 270                 ret = i2c_smbus_write_word_data(chip->client,
 271                                 ad7152_addresses[chan->channel][AD7152_GAIN],
 272                                 swab16(val));
 273                 if (ret < 0)
 274                         goto out;
 275
 276                 ret = 0;
 277                 break;
 278
 279         case IIO_CHAN_INFO_CALIBBIAS:
 280                 if ((val < 0) | (val > 0xFFFF)) {
 281                         ret = -EINVAL;
 282                         goto out;
 283                 }
 284                 ret = i2c_smbus_write_word_data(chip->client,
 285                                 ad7152_addresses[chan->channel][AD7152_OFFS],
 286                                 swab16(val));
 287                 if (ret < 0)
 288                         goto out;
 289
 290                 ret = 0;
 291                 break;
 292         case IIO_CHAN_INFO_SCALE:
 293                 if (val) {
 294                         ret = -EINVAL;
 295                         goto out;
 296                 }
 297                 for (i = 0; i < ARRAY_SIZE(ad7152_scale_table); i++)
 298                         if (val2 == ad7152_scale_table[i])
 299                                 break;
 300
 301                 chip->setup[chan->channel] &= ~AD7152_SETUP_RANGE_4pF;
 302                 chip->setup[chan->channel] |= AD7152_SETUP_RANGE(i);
 303
 304                 ret = i2c_smbus_write_byte_data(chip->client,
 305                                 ad7152_addresses[chan->channel][AD7152_SETUP],
 306                                 chip->setup[chan->channel]);
 307                 if (ret < 0)
 308                         goto out;
 309
 310                 ret = 0;
 311                 break;
 312         default:
 313                 ret = -EINVAL;
 314         }
 315
 316 out:
 317         mutex_unlock(&indio_dev->mlock);
 318         return ret;
 319 }
 320 static int ad7152_read_raw(struct iio_dev *indio_dev,
 321                            struct iio_chan_spec const *chan,
 322                            int *val, int *val2,
 323                            long mask)
 324 {
 325         struct ad7152_chip_info *chip = iio_priv(indio_dev);
 326         int ret;
 327         u8 regval = 0;
 328
 329         mutex_lock(&indio_dev->mlock);
 330
 331         switch (mask) {
 332         case IIO_CHAN_INFO_RAW:
 333                 /* First set whether in differential mode */
 334
 335                 regval = chip->setup[chan->channel];
 336
 337                 if (chan->differential)
 338                         chip->setup[chan->channel] |= AD7152_SETUP_CAPDIFF;
 339                 else
 340                         chip->setup[chan->channel] &= ~AD7152_SETUP_CAPDIFF;
 341
 342                 if (regval != chip->setup[chan->channel]) {
 343                         ret = i2c_smbus_write_byte_data(chip->client,
 344                                 ad7152_addresses[chan->channel][AD7152_SETUP],
 345                                 chip->setup[chan->channel]);
 346                         if (ret < 0)
 347                                 goto out;
 348                 }
 349                 /* Make sure the channel is enabled */
 350                 if (chan->channel == 0)
 351                         regval = AD7152_CONF_CH1EN;
 352                 else
 353                         regval = AD7152_CONF_CH2EN;
 354
 355                 /* Trigger a single read */
 356                 regval |= AD7152_CONF_MODE_SINGLE_CONV;
 357                 ret = i2c_smbus_write_byte_data(chip->client, AD7152_REG_CFG,
 358                                 regval);
 359                 if (ret < 0)
 360                         goto out;
 361
 362                 msleep(ad7152_filter_rate_table[chip->filter_rate_setup][1]);
 363                 /* Now read the actual register */
 364                 ret = i2c_smbus_read_word_data(chip->client,
 365                                 ad7152_addresses[chan->channel][AD7152_DATA]);
 366                 if (ret < 0)
 367                         goto out;
 368                 *val = swab16(ret);
 369
 370                 if (chan->differential)
 371                         *val -= 0x8000;
 372
 373                 ret = IIO_VAL_INT;
 374                 break;
 375         case IIO_CHAN_INFO_CALIBSCALE:
 376
 377                 ret = i2c_smbus_read_word_data(chip->client,
 378                                 ad7152_addresses[chan->channel][AD7152_GAIN]);
 379                 if (ret < 0)
 380                         goto out;
 381                 /* 1 + gain_val / 2^16 */
 382                 *val = 1;
 383                 *val2 = (15625 * swab16(ret)) / 1024;
 384
 385                 ret = IIO_VAL_INT_PLUS_MICRO;
 386                 break;
 387         case IIO_CHAN_INFO_CALIBBIAS:
 388                 ret = i2c_smbus_read_word_data(chip->client,
 389                                 ad7152_addresses[chan->channel][AD7152_OFFS]);
 390                 if (ret < 0)
 391                         goto out;
 392                 *val = swab16(ret);
 393
 394                 ret = IIO_VAL_INT;
 395                 break;
 396         case IIO_CHAN_INFO_SCALE:
 397                 ret = i2c_smbus_read_byte_data(chip->client,
 398                                 ad7152_addresses[chan->channel][AD7152_SETUP]);
 399                 if (ret < 0)
 400                         goto out;
 401                 *val = 0;
 402                 *val2 = ad7152_scale_table[ret >> 6];
 403
 404                 ret = IIO_VAL_INT_PLUS_NANO;
 405                 break;
 406         default:
 407                 ret = -EINVAL;
 408         }
 409 out:
 410         mutex_unlock(&indio_dev->mlock);
 411         return ret;
 412 }
 413
 414 static int ad7152_write_raw_get_fmt(struct iio_dev *indio_dev,
 415                                struct iio_chan_spec const *chan,
 416                                long mask)
 417 {
 418         switch (mask) {
 419         case IIO_CHAN_INFO_SCALE:
 420                 return IIO_VAL_INT_PLUS_NANO;
 421         default:
 422                 return IIO_VAL_INT_PLUS_MICRO;
 423         }
 424 }
 425
 426 static const struct iio_info ad7152_info = {
 427         .attrs = &ad7152_attribute_group,
 428         .read_raw = &ad7152_read_raw,
 429         .write_raw = &ad7152_write_raw,
 430         .write_raw_get_fmt = &ad7152_write_raw_get_fmt,
 431         .driver_module = THIS_MODULE,
 432 };
 433
 434 static const struct iio_chan_spec ad7152_channels[] = {
 435         {
 436                 .type = IIO_CAPACITANCE,
 437                 .indexed = 1,
 438                 .channel = 0,
 439                 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
 440                 BIT(IIO_CHAN_INFO_CALIBSCALE) |
 441                 BIT(IIO_CHAN_INFO_CALIBBIAS) |
 442                 BIT(IIO_CHAN_INFO_SCALE),
 443         }, {
 444                 .type = IIO_CAPACITANCE,
 445                 .differential = 1,
 446                 .indexed = 1,
 447                 .channel = 0,
 448                 .channel2 = 2,
 449                 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
 450                 BIT(IIO_CHAN_INFO_CALIBSCALE) |
 451                 BIT(IIO_CHAN_INFO_CALIBBIAS) |
 452                 BIT(IIO_CHAN_INFO_SCALE),
 453         }, {
 454                 .type = IIO_CAPACITANCE,
 455                 .indexed = 1,
 456                 .channel = 1,
 457                 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
 458                 BIT(IIO_CHAN_INFO_CALIBSCALE) |
 459                 BIT(IIO_CHAN_INFO_CALIBBIAS) |
 460                 BIT(IIO_CHAN_INFO_SCALE),
 461         }, {
 462                 .type = IIO_CAPACITANCE,
 463                 .differential = 1,
 464                 .indexed = 1,
 465                 .channel = 1,
 466                 .channel2 = 3,
 467                 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
 468                 BIT(IIO_CHAN_INFO_CALIBSCALE) |
 469                 BIT(IIO_CHAN_INFO_CALIBBIAS) |
 470                 BIT(IIO_CHAN_INFO_SCALE),
 471         }
 472 };
 473 /*
 474  * device probe and remove
 475  */
 476
 477 static int ad7152_probe(struct i2c_client *client,
 478                 const struct i2c_device_id *id)
 479 {
 480         int ret = 0;
 481         struct ad7152_chip_info *chip;
 482         struct iio_dev *indio_dev;
 483
 484         indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*chip));
 485         if (!indio_dev)
 486                 return -ENOMEM;
 487         chip = iio_priv(indio_dev);
 488         /* this is only used for device removal purposes */
 489         i2c_set_clientdata(client, indio_dev);
 490
 491         chip->client = client;
 492
 493         /* Establish that the iio_dev is a child of the i2c device */
 494         indio_dev->name = id->name;
 495         indio_dev->dev.parent = &client->dev;
 496         indio_dev->info = &ad7152_info;
 497         indio_dev->channels = ad7152_channels;
 498         if (id->driver_data == 0)
 499                 indio_dev->num_channels = ARRAY_SIZE(ad7152_channels);
 500         else
 501                 indio_dev->num_channels = 2;
 502         indio_dev->num_channels = ARRAY_SIZE(ad7152_channels);
 503         indio_dev->modes = INDIO_DIRECT_MODE;
 504
 505         ret = devm_iio_device_register(indio_dev->dev.parent, indio_dev);
 506         if (ret)
 507                 return ret;
 508
 509         dev_err(&client->dev, "%s capacitive sensor registered\n", id->name);
 510
 511         return 0;
 512 }
 513
 514 static const struct i2c_device_id ad7152_id[] = {
 515         { "ad7152", 0 },
 516         { "ad7153", 1 },
 517         {}
 518 };
 519
 520 MODULE_DEVICE_TABLE(i2c, ad7152_id);
 521
 522 static struct i2c_driver ad7152_driver = {
 523         .driver = {
 524                 .name = KBUILD_MODNAME,
 525         },
 526         .probe = ad7152_probe,
 527         .id_table = ad7152_id,
 528 };
 529 module_i2c_driver(ad7152_driver);
 530
 531 MODULE_AUTHOR("Barry Song <[email protected]>");
 532 MODULE_DESCRIPTION("Analog Devices AD7152/3 capacitive sensor driver");
 533 MODULE_LICENSE("GPL v2");