2 * Driver for 93xx46 EEPROMs
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
11 #include <linux/delay.h>
12 #include <linux/device.h>
13 #include <linux/gpio/consumer.h>
14 #include <linux/kernel.h>
15 #include <linux/module.h>
16 #include <linux/mutex.h>
18 #include <linux/of_device.h>
19 #include <linux/of_gpio.h>
20 #include <linux/slab.h>
21 #include <linux/spi/spi.h>
22 #include <linux/nvmem-provider.h>
23 #include <linux/eeprom_93xx46.h>
26 #define OP_WRITE (OP_START | 0x1)
27 #define OP_READ (OP_START | 0x2)
28 #define ADDR_EWDS 0x00
29 #define ADDR_ERAL 0x20
30 #define ADDR_EWEN 0x30
32 struct eeprom_93xx46_devtype_data {
36 static const struct eeprom_93xx46_devtype_data atmel_at93c46d_data = {
37 .quirks = EEPROM_93XX46_QUIRK_SINGLE_WORD_READ |
38 EEPROM_93XX46_QUIRK_INSTRUCTION_LENGTH,
41 struct eeprom_93xx46_dev {
42 struct spi_device *spi;
43 struct eeprom_93xx46_platform_data *pdata;
45 struct nvmem_config nvmem_config;
46 struct nvmem_device *nvmem;
51 static inline bool has_quirk_single_word_read(struct eeprom_93xx46_dev *edev)
53 return edev->pdata->quirks & EEPROM_93XX46_QUIRK_SINGLE_WORD_READ;
56 static inline bool has_quirk_instruction_length(struct eeprom_93xx46_dev *edev)
58 return edev->pdata->quirks & EEPROM_93XX46_QUIRK_INSTRUCTION_LENGTH;
61 static int eeprom_93xx46_read(void *priv, unsigned int off,
62 void *val, size_t count)
64 struct eeprom_93xx46_dev *edev = priv;
68 if (unlikely(off >= edev->size))
70 if ((off + count) > edev->size)
71 count = edev->size - off;
75 mutex_lock(&edev->lock);
77 if (edev->pdata->prepare)
78 edev->pdata->prepare(edev);
82 struct spi_transfer t[2] = { { 0 } };
83 u16 cmd_addr = OP_READ << edev->addrlen;
84 size_t nbytes = count;
87 if (edev->addrlen == 7) {
88 cmd_addr |= off & 0x7f;
90 if (has_quirk_single_word_read(edev))
93 cmd_addr |= (off >> 1) & 0x3f;
95 if (has_quirk_single_word_read(edev))
99 dev_dbg(&edev->spi->dev, "read cmd 0x%x, %d Hz\n",
100 cmd_addr, edev->spi->max_speed_hz);
102 spi_message_init(&m);
104 t[0].tx_buf = (char *)&cmd_addr;
106 t[0].bits_per_word = bits;
107 spi_message_add_tail(&t[0], &m);
111 t[1].bits_per_word = 8;
112 spi_message_add_tail(&t[1], &m);
114 err = spi_sync(edev->spi, &m);
115 /* have to wait at least Tcsl ns */
119 dev_err(&edev->spi->dev, "read %zu bytes at %d: err. %d\n",
120 nbytes, (int)off, err);
129 if (edev->pdata->finish)
130 edev->pdata->finish(edev);
132 mutex_unlock(&edev->lock);
137 static int eeprom_93xx46_ew(struct eeprom_93xx46_dev *edev, int is_on)
139 struct spi_message m;
140 struct spi_transfer t;
144 cmd_addr = OP_START << edev->addrlen;
145 if (edev->addrlen == 7) {
146 cmd_addr |= (is_on ? ADDR_EWEN : ADDR_EWDS) << 1;
149 cmd_addr |= (is_on ? ADDR_EWEN : ADDR_EWDS);
153 if (has_quirk_instruction_length(edev)) {
158 dev_dbg(&edev->spi->dev, "ew%s cmd 0x%04x, %d bits\n",
159 is_on ? "en" : "ds", cmd_addr, bits);
161 spi_message_init(&m);
162 memset(&t, 0, sizeof(t));
164 t.tx_buf = &cmd_addr;
166 t.bits_per_word = bits;
167 spi_message_add_tail(&t, &m);
169 mutex_lock(&edev->lock);
171 if (edev->pdata->prepare)
172 edev->pdata->prepare(edev);
174 ret = spi_sync(edev->spi, &m);
175 /* have to wait at least Tcsl ns */
178 dev_err(&edev->spi->dev, "erase/write %sable error %d\n",
179 is_on ? "en" : "dis", ret);
181 if (edev->pdata->finish)
182 edev->pdata->finish(edev);
184 mutex_unlock(&edev->lock);
189 eeprom_93xx46_write_word(struct eeprom_93xx46_dev *edev,
190 const char *buf, unsigned off)
192 struct spi_message m;
193 struct spi_transfer t[2];
194 int bits, data_len, ret;
197 cmd_addr = OP_WRITE << edev->addrlen;
199 if (edev->addrlen == 7) {
200 cmd_addr |= off & 0x7f;
204 cmd_addr |= (off >> 1) & 0x3f;
209 dev_dbg(&edev->spi->dev, "write cmd 0x%x\n", cmd_addr);
211 spi_message_init(&m);
212 memset(t, 0, sizeof(t));
214 t[0].tx_buf = (char *)&cmd_addr;
216 t[0].bits_per_word = bits;
217 spi_message_add_tail(&t[0], &m);
221 t[1].bits_per_word = 8;
222 spi_message_add_tail(&t[1], &m);
224 ret = spi_sync(edev->spi, &m);
225 /* have to wait program cycle time Twc ms */
230 static int eeprom_93xx46_write(void *priv, unsigned int off,
231 void *val, size_t count)
233 struct eeprom_93xx46_dev *edev = priv;
235 int i, ret, step = 1;
237 if (unlikely(off >= edev->size))
239 if ((off + count) > edev->size)
240 count = edev->size - off;
241 if (unlikely(!count))
244 /* only write even number of bytes on 16-bit devices */
245 if (edev->addrlen == 6) {
250 /* erase/write enable */
251 ret = eeprom_93xx46_ew(edev, 1);
255 mutex_lock(&edev->lock);
257 if (edev->pdata->prepare)
258 edev->pdata->prepare(edev);
260 for (i = 0; i < count; i += step) {
261 ret = eeprom_93xx46_write_word(edev, &buf[i], off + i);
263 dev_err(&edev->spi->dev, "write failed at %d: %d\n",
269 if (edev->pdata->finish)
270 edev->pdata->finish(edev);
272 mutex_unlock(&edev->lock);
274 /* erase/write disable */
275 eeprom_93xx46_ew(edev, 0);
279 static int eeprom_93xx46_eral(struct eeprom_93xx46_dev *edev)
281 struct eeprom_93xx46_platform_data *pd = edev->pdata;
282 struct spi_message m;
283 struct spi_transfer t;
287 cmd_addr = OP_START << edev->addrlen;
288 if (edev->addrlen == 7) {
289 cmd_addr |= ADDR_ERAL << 1;
292 cmd_addr |= ADDR_ERAL;
296 if (has_quirk_instruction_length(edev)) {
301 dev_dbg(&edev->spi->dev, "eral cmd 0x%04x, %d bits\n", cmd_addr, bits);
303 spi_message_init(&m);
304 memset(&t, 0, sizeof(t));
306 t.tx_buf = &cmd_addr;
308 t.bits_per_word = bits;
309 spi_message_add_tail(&t, &m);
311 mutex_lock(&edev->lock);
313 if (edev->pdata->prepare)
314 edev->pdata->prepare(edev);
316 ret = spi_sync(edev->spi, &m);
318 dev_err(&edev->spi->dev, "erase error %d\n", ret);
319 /* have to wait erase cycle time Tec ms */
325 mutex_unlock(&edev->lock);
329 static ssize_t eeprom_93xx46_store_erase(struct device *dev,
330 struct device_attribute *attr,
331 const char *buf, size_t count)
333 struct eeprom_93xx46_dev *edev = dev_get_drvdata(dev);
336 sscanf(buf, "%d", &erase);
338 ret = eeprom_93xx46_ew(edev, 1);
341 ret = eeprom_93xx46_eral(edev);
344 ret = eeprom_93xx46_ew(edev, 0);
350 static DEVICE_ATTR(erase, S_IWUSR, NULL, eeprom_93xx46_store_erase);
352 static void select_assert(void *context)
354 struct eeprom_93xx46_dev *edev = context;
356 gpiod_set_value_cansleep(edev->pdata->select, 1);
359 static void select_deassert(void *context)
361 struct eeprom_93xx46_dev *edev = context;
363 gpiod_set_value_cansleep(edev->pdata->select, 0);
366 static const struct of_device_id eeprom_93xx46_of_table[] = {
367 { .compatible = "eeprom-93xx46", },
368 { .compatible = "atmel,at93c46d", .data = &atmel_at93c46d_data, },
371 MODULE_DEVICE_TABLE(of, eeprom_93xx46_of_table);
373 static int eeprom_93xx46_probe_dt(struct spi_device *spi)
375 const struct of_device_id *of_id =
376 of_match_device(eeprom_93xx46_of_table, &spi->dev);
377 struct device_node *np = spi->dev.of_node;
378 struct eeprom_93xx46_platform_data *pd;
382 pd = devm_kzalloc(&spi->dev, sizeof(*pd), GFP_KERNEL);
386 ret = of_property_read_u32(np, "data-size", &tmp);
388 dev_err(&spi->dev, "data-size property not found\n");
393 pd->flags |= EE_ADDR8;
394 } else if (tmp == 16) {
395 pd->flags |= EE_ADDR16;
397 dev_err(&spi->dev, "invalid data-size (%d)\n", tmp);
401 if (of_property_read_bool(np, "read-only"))
402 pd->flags |= EE_READONLY;
404 pd->select = devm_gpiod_get_optional(&spi->dev, "select",
406 if (IS_ERR(pd->select))
407 return PTR_ERR(pd->select);
409 pd->prepare = select_assert;
410 pd->finish = select_deassert;
411 gpiod_direction_output(pd->select, 0);
414 const struct eeprom_93xx46_devtype_data *data = of_id->data;
416 pd->quirks = data->quirks;
419 spi->dev.platform_data = pd;
424 static int eeprom_93xx46_probe(struct spi_device *spi)
426 struct eeprom_93xx46_platform_data *pd;
427 struct eeprom_93xx46_dev *edev;
430 if (spi->dev.of_node) {
431 err = eeprom_93xx46_probe_dt(spi);
436 pd = spi->dev.platform_data;
438 dev_err(&spi->dev, "missing platform data\n");
442 edev = kzalloc(sizeof(*edev), GFP_KERNEL);
446 if (pd->flags & EE_ADDR8)
448 else if (pd->flags & EE_ADDR16)
451 dev_err(&spi->dev, "unspecified address type\n");
456 mutex_init(&edev->lock);
462 edev->nvmem_config.name = dev_name(&spi->dev);
463 edev->nvmem_config.dev = &spi->dev;
464 edev->nvmem_config.read_only = pd->flags & EE_READONLY;
465 edev->nvmem_config.root_only = true;
466 edev->nvmem_config.owner = THIS_MODULE;
467 edev->nvmem_config.compat = true;
468 edev->nvmem_config.base_dev = &spi->dev;
469 edev->nvmem_config.reg_read = eeprom_93xx46_read;
470 edev->nvmem_config.reg_write = eeprom_93xx46_write;
471 edev->nvmem_config.priv = edev;
472 edev->nvmem_config.stride = 4;
473 edev->nvmem_config.word_size = 1;
474 edev->nvmem_config.size = edev->size;
476 edev->nvmem = nvmem_register(&edev->nvmem_config);
477 if (IS_ERR(edev->nvmem)) {
478 err = PTR_ERR(edev->nvmem);
482 dev_info(&spi->dev, "%d-bit eeprom %s\n",
483 (pd->flags & EE_ADDR8) ? 8 : 16,
484 (pd->flags & EE_READONLY) ? "(readonly)" : "");
486 if (!(pd->flags & EE_READONLY)) {
487 if (device_create_file(&spi->dev, &dev_attr_erase))
488 dev_err(&spi->dev, "can't create erase interface\n");
491 spi_set_drvdata(spi, edev);
498 static int eeprom_93xx46_remove(struct spi_device *spi)
500 struct eeprom_93xx46_dev *edev = spi_get_drvdata(spi);
502 nvmem_unregister(edev->nvmem);
504 if (!(edev->pdata->flags & EE_READONLY))
505 device_remove_file(&spi->dev, &dev_attr_erase);
511 static struct spi_driver eeprom_93xx46_driver = {
514 .of_match_table = of_match_ptr(eeprom_93xx46_of_table),
516 .probe = eeprom_93xx46_probe,
517 .remove = eeprom_93xx46_remove,
520 module_spi_driver(eeprom_93xx46_driver);
522 MODULE_LICENSE("GPL");
523 MODULE_DESCRIPTION("Driver for 93xx46 EEPROMs");
525 MODULE_ALIAS("spi:93xx46");