sound/soc/sof/ipc3.c

   1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause)
   2 //
   3 // This file is provided under a dual BSD/GPLv2 license.  When using or
   4 // redistributing this file, you may do so under either license.
   5 //
   6 // Copyright(c) 2021 Intel Corporation. All rights reserved.
   7 //
   8 //
   9
  10 #include <sound/sof/stream.h>
  11 #include <sound/sof/control.h>
  12 #include "sof-priv.h"
  13 #include "sof-audio.h"
  14 #include "ipc3-priv.h"
  15 #include "ops.h"
  16
  17 typedef void (*ipc3_rx_callback)(struct snd_sof_dev *sdev, void *msg_buf);
  18
  19 #if IS_ENABLED(CONFIG_SND_SOC_SOF_DEBUG_VERBOSE_IPC)
  20 static void ipc3_log_header(struct device *dev, u8 *text, u32 cmd)
  21 {
  22         u8 *str;
  23         u8 *str2 = NULL;
  24         u32 glb;
  25         u32 type;
  26         bool vdbg = false;
  27
  28         glb = cmd & SOF_GLB_TYPE_MASK;
  29         type = cmd & SOF_CMD_TYPE_MASK;
  30
  31         switch (glb) {
  32         case SOF_IPC_GLB_REPLY:
  33                 str = "GLB_REPLY"; break;
  34         case SOF_IPC_GLB_COMPOUND:
  35                 str = "GLB_COMPOUND"; break;
  36         case SOF_IPC_GLB_TPLG_MSG:
  37                 str = "GLB_TPLG_MSG";
  38                 switch (type) {
  39                 case SOF_IPC_TPLG_COMP_NEW:
  40                         str2 = "COMP_NEW"; break;
  41                 case SOF_IPC_TPLG_COMP_FREE:
  42                         str2 = "COMP_FREE"; break;
  43                 case SOF_IPC_TPLG_COMP_CONNECT:
  44                         str2 = "COMP_CONNECT"; break;
  45                 case SOF_IPC_TPLG_PIPE_NEW:
  46                         str2 = "PIPE_NEW"; break;
  47                 case SOF_IPC_TPLG_PIPE_FREE:
  48                         str2 = "PIPE_FREE"; break;
  49                 case SOF_IPC_TPLG_PIPE_CONNECT:
  50                         str2 = "PIPE_CONNECT"; break;
  51                 case SOF_IPC_TPLG_PIPE_COMPLETE:
  52                         str2 = "PIPE_COMPLETE"; break;
  53                 case SOF_IPC_TPLG_BUFFER_NEW:
  54                         str2 = "BUFFER_NEW"; break;
  55                 case SOF_IPC_TPLG_BUFFER_FREE:
  56                         str2 = "BUFFER_FREE"; break;
  57                 default:
  58                         str2 = "unknown type"; break;
  59                 }
  60                 break;
  61         case SOF_IPC_GLB_PM_MSG:
  62                 str = "GLB_PM_MSG";
  63                 switch (type) {
  64                 case SOF_IPC_PM_CTX_SAVE:
  65                         str2 = "CTX_SAVE"; break;
  66                 case SOF_IPC_PM_CTX_RESTORE:
  67                         str2 = "CTX_RESTORE"; break;
  68                 case SOF_IPC_PM_CTX_SIZE:
  69                         str2 = "CTX_SIZE"; break;
  70                 case SOF_IPC_PM_CLK_SET:
  71                         str2 = "CLK_SET"; break;
  72                 case SOF_IPC_PM_CLK_GET:
  73                         str2 = "CLK_GET"; break;
  74                 case SOF_IPC_PM_CLK_REQ:
  75                         str2 = "CLK_REQ"; break;
  76                 case SOF_IPC_PM_CORE_ENABLE:
  77                         str2 = "CORE_ENABLE"; break;
  78                 case SOF_IPC_PM_GATE:
  79                         str2 = "GATE"; break;
  80                 default:
  81                         str2 = "unknown type"; break;
  82                 }
  83                 break;
  84         case SOF_IPC_GLB_COMP_MSG:
  85                 str = "GLB_COMP_MSG";
  86                 switch (type) {
  87                 case SOF_IPC_COMP_SET_VALUE:
  88                         str2 = "SET_VALUE"; break;
  89                 case SOF_IPC_COMP_GET_VALUE:
  90                         str2 = "GET_VALUE"; break;
  91                 case SOF_IPC_COMP_SET_DATA:
  92                         str2 = "SET_DATA"; break;
  93                 case SOF_IPC_COMP_GET_DATA:
  94                         str2 = "GET_DATA"; break;
  95                 default:
  96                         str2 = "unknown type"; break;
  97                 }
  98                 break;
  99         case SOF_IPC_GLB_STREAM_MSG:
 100                 str = "GLB_STREAM_MSG";
 101                 switch (type) {
 102                 case SOF_IPC_STREAM_PCM_PARAMS:
 103                         str2 = "PCM_PARAMS"; break;
 104                 case SOF_IPC_STREAM_PCM_PARAMS_REPLY:
 105                         str2 = "PCM_REPLY"; break;
 106                 case SOF_IPC_STREAM_PCM_FREE:
 107                         str2 = "PCM_FREE"; break;
 108                 case SOF_IPC_STREAM_TRIG_START:
 109                         str2 = "TRIG_START"; break;
 110                 case SOF_IPC_STREAM_TRIG_STOP:
 111                         str2 = "TRIG_STOP"; break;
 112                 case SOF_IPC_STREAM_TRIG_PAUSE:
 113                         str2 = "TRIG_PAUSE"; break;
 114                 case SOF_IPC_STREAM_TRIG_RELEASE:
 115                         str2 = "TRIG_RELEASE"; break;
 116                 case SOF_IPC_STREAM_TRIG_DRAIN:
 117                         str2 = "TRIG_DRAIN"; break;
 118                 case SOF_IPC_STREAM_TRIG_XRUN:
 119                         str2 = "TRIG_XRUN"; break;
 120                 case SOF_IPC_STREAM_POSITION:
 121                         vdbg = true;
 122                         str2 = "POSITION"; break;
 123                 case SOF_IPC_STREAM_VORBIS_PARAMS:
 124                         str2 = "VORBIS_PARAMS"; break;
 125                 case SOF_IPC_STREAM_VORBIS_FREE:
 126                         str2 = "VORBIS_FREE"; break;
 127                 default:
 128                         str2 = "unknown type"; break;
 129                 }
 130                 break;
 131         case SOF_IPC_FW_READY:
 132                 str = "FW_READY"; break;
 133         case SOF_IPC_GLB_DAI_MSG:
 134                 str = "GLB_DAI_MSG";
 135                 switch (type) {
 136                 case SOF_IPC_DAI_CONFIG:
 137                         str2 = "CONFIG"; break;
 138                 case SOF_IPC_DAI_LOOPBACK:
 139                         str2 = "LOOPBACK"; break;
 140                 default:
 141                         str2 = "unknown type"; break;
 142                 }
 143                 break;
 144         case SOF_IPC_GLB_TRACE_MSG:
 145                 str = "GLB_TRACE_MSG";
 146                 switch (type) {
 147                 case SOF_IPC_TRACE_DMA_PARAMS:
 148                         str2 = "DMA_PARAMS"; break;
 149                 case SOF_IPC_TRACE_DMA_POSITION:
 150                         if (!sof_debug_check_flag(SOF_DBG_PRINT_DMA_POSITION_UPDATE_LOGS))
 151                                 return;
 152                         str2 = "DMA_POSITION"; break;
 153                 case SOF_IPC_TRACE_DMA_PARAMS_EXT:
 154                         str2 = "DMA_PARAMS_EXT"; break;
 155                 case SOF_IPC_TRACE_FILTER_UPDATE:
 156                         str2 = "FILTER_UPDATE"; break;
 157                 case SOF_IPC_TRACE_DMA_FREE:
 158                         str2 = "DMA_FREE"; break;
 159                 default:
 160                         str2 = "unknown type"; break;
 161                 }
 162                 break;
 163         case SOF_IPC_GLB_TEST_MSG:
 164                 str = "GLB_TEST_MSG";
 165                 switch (type) {
 166                 case SOF_IPC_TEST_IPC_FLOOD:
 167                         str2 = "IPC_FLOOD"; break;
 168                 default:
 169                         str2 = "unknown type"; break;
 170                 }
 171                 break;
 172         case SOF_IPC_GLB_DEBUG:
 173                 str = "GLB_DEBUG";
 174                 switch (type) {
 175                 case SOF_IPC_DEBUG_MEM_USAGE:
 176                         str2 = "MEM_USAGE"; break;
 177                 default:
 178                         str2 = "unknown type"; break;
 179                 }
 180                 break;
 181         case SOF_IPC_GLB_PROBE:
 182                 str = "GLB_PROBE";
 183                 switch (type) {
 184                 case SOF_IPC_PROBE_INIT:
 185                         str2 = "INIT"; break;
 186                 case SOF_IPC_PROBE_DEINIT:
 187                         str2 = "DEINIT"; break;
 188                 case SOF_IPC_PROBE_DMA_ADD:
 189                         str2 = "DMA_ADD"; break;
 190                 case SOF_IPC_PROBE_DMA_INFO:
 191                         str2 = "DMA_INFO"; break;
 192                 case SOF_IPC_PROBE_DMA_REMOVE:
 193                         str2 = "DMA_REMOVE"; break;
 194                 case SOF_IPC_PROBE_POINT_ADD:
 195                         str2 = "POINT_ADD"; break;
 196                 case SOF_IPC_PROBE_POINT_INFO:
 197                         str2 = "POINT_INFO"; break;
 198                 case SOF_IPC_PROBE_POINT_REMOVE:
 199                         str2 = "POINT_REMOVE"; break;
 200                 default:
 201                         str2 = "unknown type"; break;
 202                 }
 203                 break;
 204         default:
 205                 str = "unknown GLB command"; break;
 206         }
 207
 208         if (str2) {
 209                 if (vdbg)
 210                         dev_vdbg(dev, "%s: 0x%x: %s: %s\n", text, cmd, str, str2);
 211                 else
 212                         dev_dbg(dev, "%s: 0x%x: %s: %s\n", text, cmd, str, str2);
 213         } else {
 214                 dev_dbg(dev, "%s: 0x%x: %s\n", text, cmd, str);
 215         }
 216 }
 217 #else
 218 static inline void ipc3_log_header(struct device *dev, u8 *text, u32 cmd)
 219 {
 220         if ((cmd & SOF_GLB_TYPE_MASK) != SOF_IPC_GLB_TRACE_MSG)
 221                 dev_dbg(dev, "%s: 0x%x\n", text, cmd);
 222 }
 223 #endif
 224
 225 static int sof_ipc3_get_reply(struct snd_sof_dev *sdev)
 226 {
 227         struct snd_sof_ipc_msg *msg = sdev->msg;
 228         struct sof_ipc_reply *reply;
 229         int ret = 0;
 230
 231         /* get the generic reply */
 232         reply = msg->reply_data;
 233         snd_sof_dsp_mailbox_read(sdev, sdev->host_box.offset, reply, sizeof(*reply));
 234
 235         if (reply->error < 0)
 236                 return reply->error;
 237
 238         if (!reply->hdr.size) {
 239                 /* Reply should always be >= sizeof(struct sof_ipc_reply) */
 240                 if (msg->reply_size)
 241                         dev_err(sdev->dev,
 242                                 "empty reply received, expected %zu bytes\n",
 243                                 msg->reply_size);
 244                 else
 245                         dev_err(sdev->dev, "empty reply received\n");
 246
 247                 return -EINVAL;
 248         }
 249
 250         if (msg->reply_size > 0) {
 251                 if (reply->hdr.size == msg->reply_size) {
 252                         ret = 0;
 253                 } else if (reply->hdr.size < msg->reply_size) {
 254                         dev_dbg(sdev->dev,
 255                                 "reply size (%u) is less than expected (%zu)\n",
 256                                 reply->hdr.size, msg->reply_size);
 257
 258                         msg->reply_size = reply->hdr.size;
 259                         ret = 0;
 260                 } else {
 261                         dev_err(sdev->dev,
 262                                 "reply size (%u) exceeds the buffer size (%zu)\n",
 263                                 reply->hdr.size, msg->reply_size);
 264                         ret = -EINVAL;
 265                 }
 266
 267                 /*
 268                  * get the full message if reply->hdr.size <= msg->reply_size
 269                  * and the reply->hdr.size > sizeof(struct sof_ipc_reply)
 270                  */
 271                 if (!ret && msg->reply_size > sizeof(*reply))
 272                         snd_sof_dsp_mailbox_read(sdev, sdev->host_box.offset,
 273                                                  msg->reply_data, msg->reply_size);
 274         }
 275
 276         return ret;
 277 }
 278
 279 /* wait for IPC message reply */
 280 static int ipc3_wait_tx_done(struct snd_sof_ipc *ipc, void *reply_data)
 281 {
 282         struct snd_sof_ipc_msg *msg = &ipc->msg;
 283         struct sof_ipc_cmd_hdr *hdr = msg->msg_data;
 284         struct snd_sof_dev *sdev = ipc->sdev;
 285         int ret;
 286
 287         /* wait for DSP IPC completion */
 288         ret = wait_event_timeout(msg->waitq, msg->ipc_complete,
 289                                  msecs_to_jiffies(sdev->ipc_timeout));
 290
 291         if (ret == 0) {
 292                 dev_err(sdev->dev,
 293                         "ipc tx timed out for %#x (msg/reply size: %d/%zu)\n",
 294                         hdr->cmd, hdr->size, msg->reply_size);
 295                 snd_sof_handle_fw_exception(ipc->sdev, "IPC timeout");
 296                 ret = -ETIMEDOUT;
 297         } else {
 298                 ret = msg->reply_error;
 299                 if (ret < 0) {
 300                         dev_err(sdev->dev,
 301                                 "ipc tx error for %#x (msg/reply size: %d/%zu): %d\n",
 302                                 hdr->cmd, hdr->size, msg->reply_size, ret);
 303                 } else {
 304                         if (sof_debug_check_flag(SOF_DBG_PRINT_IPC_SUCCESS_LOGS))
 305                                 ipc3_log_header(sdev->dev, "ipc tx succeeded", hdr->cmd);
 306                         if (msg->reply_size)
 307                                 /* copy the data returned from DSP */
 308                                 memcpy(reply_data, msg->reply_data,
 309                                        msg->reply_size);
 310                 }
 311
 312                 /* re-enable dumps after successful IPC tx */
 313                 if (sdev->ipc_dump_printed) {
 314                         sdev->dbg_dump_printed = false;
 315                         sdev->ipc_dump_printed = false;
 316                 }
 317         }
 318
 319         return ret;
 320 }
 321
 322 /* send IPC message from host to DSP */
 323 static int ipc3_tx_msg_unlocked(struct snd_sof_ipc *ipc,
 324                                 void *msg_data, size_t msg_bytes,
 325                                 void *reply_data, size_t reply_bytes)
 326 {
 327         struct sof_ipc_cmd_hdr *hdr = msg_data;
 328         struct snd_sof_dev *sdev = ipc->sdev;
 329         int ret;
 330
 331         ret = sof_ipc_send_msg(sdev, msg_data, msg_bytes, reply_bytes);
 332
 333         if (ret) {
 334                 dev_err_ratelimited(sdev->dev,
 335                                     "%s: ipc message send for %#x failed: %d\n",
 336                                     __func__, hdr->cmd, ret);
 337                 return ret;
 338         }
 339
 340         ipc3_log_header(sdev->dev, "ipc tx", hdr->cmd);
 341
 342         /* now wait for completion */
 343         return ipc3_wait_tx_done(ipc, reply_data);
 344 }
 345
 346 static int sof_ipc3_tx_msg(struct snd_sof_dev *sdev, void *msg_data, size_t msg_bytes,
 347                            void *reply_data, size_t reply_bytes, bool no_pm)
 348 {
 349         struct snd_sof_ipc *ipc = sdev->ipc;
 350         int ret;
 351
 352         if (!msg_data || msg_bytes < sizeof(struct sof_ipc_cmd_hdr)) {
 353                 dev_err_ratelimited(sdev->dev, "No IPC message to send\n");
 354                 return -EINVAL;
 355         }
 356
 357         if (!no_pm) {
 358                 const struct sof_dsp_power_state target_state = {
 359                         .state = SOF_DSP_PM_D0,
 360                 };
 361
 362                 /* ensure the DSP is in D0 before sending a new IPC */
 363                 ret = snd_sof_dsp_set_power_state(sdev, &target_state);
 364                 if (ret < 0) {
 365                         dev_err(sdev->dev, "%s: resuming DSP failed: %d\n",
 366                                 __func__, ret);
 367                         return ret;
 368                 }
 369         }
 370
 371         /* Serialise IPC TX */
 372         mutex_lock(&ipc->tx_mutex);
 373
 374         ret = ipc3_tx_msg_unlocked(ipc, msg_data, msg_bytes, reply_data, reply_bytes);
 375
 376         mutex_unlock(&ipc->tx_mutex);
 377
 378         return ret;
 379 }
 380
 381 static int sof_ipc3_set_get_data(struct snd_sof_dev *sdev, void *data, size_t data_bytes,
 382                                  bool set)
 383 {
 384         size_t msg_bytes, hdr_bytes, payload_size, send_bytes;
 385         struct sof_ipc_ctrl_data *cdata = data;
 386         struct sof_ipc_ctrl_data *cdata_chunk;
 387         struct snd_sof_ipc *ipc = sdev->ipc;
 388         size_t offset = 0;
 389         u8 *src, *dst;
 390         u32 num_msg;
 391         int ret = 0;
 392         int i;
 393
 394         if (!cdata || data_bytes < sizeof(*cdata))
 395                 return -EINVAL;
 396
 397         if ((cdata->rhdr.hdr.cmd & SOF_GLB_TYPE_MASK) != SOF_IPC_GLB_COMP_MSG) {
 398                 dev_err(sdev->dev, "%s: Not supported message type of %#x\n",
 399                         __func__, cdata->rhdr.hdr.cmd);
 400                 return -EINVAL;
 401         }
 402
 403         /* send normal size ipc in one part */
 404         if (cdata->rhdr.hdr.size <= ipc->max_payload_size)
 405                 return sof_ipc3_tx_msg(sdev, cdata, cdata->rhdr.hdr.size,
 406                                        cdata, cdata->rhdr.hdr.size, false);
 407
 408         cdata_chunk = kzalloc(ipc->max_payload_size, GFP_KERNEL);
 409         if (!cdata_chunk)
 410                 return -ENOMEM;
 411
 412         switch (cdata->type) {
 413         case SOF_CTRL_TYPE_VALUE_CHAN_GET:
 414         case SOF_CTRL_TYPE_VALUE_CHAN_SET:
 415                 hdr_bytes = sizeof(struct sof_ipc_ctrl_data);
 416                 if (set) {
 417                         src = (u8 *)cdata->chanv;
 418                         dst = (u8 *)cdata_chunk->chanv;
 419                 } else {
 420                         src = (u8 *)cdata_chunk->chanv;
 421                         dst = (u8 *)cdata->chanv;
 422                 }
 423                 break;
 424         case SOF_CTRL_TYPE_DATA_GET:
 425         case SOF_CTRL_TYPE_DATA_SET:
 426                 hdr_bytes = sizeof(struct sof_ipc_ctrl_data) + sizeof(struct sof_abi_hdr);
 427                 if (set) {
 428                         src = (u8 *)cdata->data->data;
 429                         dst = (u8 *)cdata_chunk->data->data;
 430                 } else {
 431                         src = (u8 *)cdata_chunk->data->data;
 432                         dst = (u8 *)cdata->data->data;
 433                 }
 434                 break;
 435         default:
 436                 kfree(cdata_chunk);
 437                 return -EINVAL;
 438         }
 439
 440         msg_bytes = cdata->rhdr.hdr.size - hdr_bytes;
 441         payload_size = ipc->max_payload_size - hdr_bytes;
 442         num_msg = DIV_ROUND_UP(msg_bytes, payload_size);
 443
 444         /* copy the header data */
 445         memcpy(cdata_chunk, cdata, hdr_bytes);
 446
 447         /* Serialise IPC TX */
 448         mutex_lock(&sdev->ipc->tx_mutex);
 449
 450         /* copy the payload data in a loop */
 451         for (i = 0; i < num_msg; i++) {
 452                 send_bytes = min(msg_bytes, payload_size);
 453                 cdata_chunk->num_elems = send_bytes;
 454                 cdata_chunk->rhdr.hdr.size = hdr_bytes + send_bytes;
 455                 cdata_chunk->msg_index = i;
 456                 msg_bytes -= send_bytes;
 457                 cdata_chunk->elems_remaining = msg_bytes;
 458
 459                 if (set)
 460                         memcpy(dst, src + offset, send_bytes);
 461
 462                 ret = ipc3_tx_msg_unlocked(sdev->ipc,
 463                                            cdata_chunk, cdata_chunk->rhdr.hdr.size,
 464                                            cdata_chunk, cdata_chunk->rhdr.hdr.size);
 465                 if (ret < 0)
 466                         break;
 467
 468                 if (!set)
 469                         memcpy(dst + offset, src, send_bytes);
 470
 471                 offset += payload_size;
 472         }
 473
 474         mutex_unlock(&sdev->ipc->tx_mutex);
 475
 476         kfree(cdata_chunk);
 477
 478         return ret;
 479 }
 480
 481 int sof_ipc3_get_ext_windows(struct snd_sof_dev *sdev,
 482                              const struct sof_ipc_ext_data_hdr *ext_hdr)
 483 {
 484         const struct sof_ipc_window *w =
 485                 container_of(ext_hdr, struct sof_ipc_window, ext_hdr);
 486
 487         if (w->num_windows == 0 || w->num_windows > SOF_IPC_MAX_ELEMS)
 488                 return -EINVAL;
 489
 490         if (sdev->info_window) {
 491                 if (memcmp(sdev->info_window, w, ext_hdr->hdr.size)) {
 492                         dev_err(sdev->dev, "mismatch between window descriptor from extended manifest and mailbox");
 493                         return -EINVAL;
 494                 }
 495                 return 0;
 496         }
 497
 498         /* keep a local copy of the data */
 499         sdev->info_window = devm_kmemdup(sdev->dev, w, ext_hdr->hdr.size, GFP_KERNEL);
 500         if (!sdev->info_window)
 501                 return -ENOMEM;
 502
 503         return 0;
 504 }
 505
 506 int sof_ipc3_get_cc_info(struct snd_sof_dev *sdev,
 507                          const struct sof_ipc_ext_data_hdr *ext_hdr)
 508 {
 509         int ret;
 510
 511         const struct sof_ipc_cc_version *cc =
 512                 container_of(ext_hdr, struct sof_ipc_cc_version, ext_hdr);
 513
 514         if (sdev->cc_version) {
 515                 if (memcmp(sdev->cc_version, cc, cc->ext_hdr.hdr.size)) {
 516                         dev_err(sdev->dev,
 517                                 "Receive diverged cc_version descriptions");
 518                         return -EINVAL;
 519                 }
 520                 return 0;
 521         }
 522
 523         dev_dbg(sdev->dev,
 524                 "Firmware info: used compiler %s %d:%d:%d%s used optimization flags %s\n",
 525                 cc->name, cc->major, cc->minor, cc->micro, cc->desc, cc->optim);
 526
 527         /* create read-only cc_version debugfs to store compiler version info */
 528         /* use local copy of the cc_version to prevent data corruption */
 529         if (sdev->first_boot) {
 530                 sdev->cc_version = devm_kmalloc(sdev->dev, cc->ext_hdr.hdr.size,
 531                                                 GFP_KERNEL);
 532
 533                 if (!sdev->cc_version)
 534                         return -ENOMEM;
 535
 536                 memcpy(sdev->cc_version, cc, cc->ext_hdr.hdr.size);
 537                 ret = snd_sof_debugfs_buf_item(sdev, sdev->cc_version,
 538                                                cc->ext_hdr.hdr.size,
 539                                                "cc_version", 0444);
 540
 541                 /* errors are only due to memory allocation, not debugfs */
 542                 if (ret < 0) {
 543                         dev_err(sdev->dev, "snd_sof_debugfs_buf_item failed\n");
 544                         return ret;
 545                 }
 546         }
 547
 548         return 0;
 549 }
 550
 551 /* parse the extended FW boot data structures from FW boot message */
 552 static int ipc3_fw_parse_ext_data(struct snd_sof_dev *sdev, u32 offset)
 553 {
 554         struct sof_ipc_ext_data_hdr *ext_hdr;
 555         void *ext_data;
 556         int ret = 0;
 557
 558         ext_data = kzalloc(PAGE_SIZE, GFP_KERNEL);
 559         if (!ext_data)
 560                 return -ENOMEM;
 561
 562         /* get first header */
 563         snd_sof_dsp_block_read(sdev, SOF_FW_BLK_TYPE_SRAM, offset, ext_data,
 564                                sizeof(*ext_hdr));
 565         ext_hdr = ext_data;
 566
 567         while (ext_hdr->hdr.cmd == SOF_IPC_FW_READY) {
 568                 /* read in ext structure */
 569                 snd_sof_dsp_block_read(sdev, SOF_FW_BLK_TYPE_SRAM,
 570                                        offset + sizeof(*ext_hdr),
 571                                        (void *)((u8 *)ext_data + sizeof(*ext_hdr)),
 572                                        ext_hdr->hdr.size - sizeof(*ext_hdr));
 573
 574                 dev_dbg(sdev->dev, "found ext header type %d size 0x%x\n",
 575                         ext_hdr->type, ext_hdr->hdr.size);
 576
 577                 /* process structure data */
 578                 switch (ext_hdr->type) {
 579                 case SOF_IPC_EXT_WINDOW:
 580                         ret = sof_ipc3_get_ext_windows(sdev, ext_hdr);
 581                         break;
 582                 case SOF_IPC_EXT_CC_INFO:
 583                         ret = sof_ipc3_get_cc_info(sdev, ext_hdr);
 584                         break;
 585                 case SOF_IPC_EXT_UNUSED:
 586                 case SOF_IPC_EXT_PROBE_INFO:
 587                 case SOF_IPC_EXT_USER_ABI_INFO:
 588                         /* They are supported but we don't do anything here */
 589                         break;
 590                 default:
 591                         dev_info(sdev->dev, "unknown ext header type %d size 0x%x\n",
 592                                  ext_hdr->type, ext_hdr->hdr.size);
 593                         ret = 0;
 594                         break;
 595                 }
 596
 597                 if (ret < 0) {
 598                         dev_err(sdev->dev, "Failed to parse ext data type %d\n",
 599                                 ext_hdr->type);
 600                         break;
 601                 }
 602
 603                 /* move to next header */
 604                 offset += ext_hdr->hdr.size;
 605                 snd_sof_dsp_block_read(sdev, SOF_FW_BLK_TYPE_SRAM, offset, ext_data,
 606                                        sizeof(*ext_hdr));
 607                 ext_hdr = ext_data;
 608         }
 609
 610         kfree(ext_data);
 611         return ret;
 612 }
 613
 614 static void ipc3_get_windows(struct snd_sof_dev *sdev)
 615 {
 616         struct sof_ipc_window_elem *elem;
 617         u32 outbox_offset = 0;
 618         u32 stream_offset = 0;
 619         u32 inbox_offset = 0;
 620         u32 outbox_size = 0;
 621         u32 stream_size = 0;
 622         u32 inbox_size = 0;
 623         u32 debug_size = 0;
 624         u32 debug_offset = 0;
 625         int window_offset;
 626         int i;
 627
 628         if (!sdev->info_window) {
 629                 dev_err(sdev->dev, "%s: No window info present\n", __func__);
 630                 return;
 631         }
 632
 633         for (i = 0; i < sdev->info_window->num_windows; i++) {
 634                 elem = &sdev->info_window->window[i];
 635
 636                 window_offset = snd_sof_dsp_get_window_offset(sdev, elem->id);
 637                 if (window_offset < 0) {
 638                         dev_warn(sdev->dev, "No offset for window %d\n", elem->id);
 639                         continue;
 640                 }
 641
 642                 switch (elem->type) {
 643                 case SOF_IPC_REGION_UPBOX:
 644                         inbox_offset = window_offset + elem->offset;
 645                         inbox_size = elem->size;
 646                         snd_sof_debugfs_add_region_item(sdev, SOF_FW_BLK_TYPE_SRAM,
 647                                                         inbox_offset,
 648                                                         elem->size, "inbox",
 649                                                         SOF_DEBUGFS_ACCESS_D0_ONLY);
 650                         break;
 651                 case SOF_IPC_REGION_DOWNBOX:
 652                         outbox_offset = window_offset + elem->offset;
 653                         outbox_size = elem->size;
 654                         snd_sof_debugfs_add_region_item(sdev, SOF_FW_BLK_TYPE_SRAM,
 655                                                         outbox_offset,
 656                                                         elem->size, "outbox",
 657                                                         SOF_DEBUGFS_ACCESS_D0_ONLY);
 658                         break;
 659                 case SOF_IPC_REGION_TRACE:
 660                         snd_sof_debugfs_add_region_item(sdev, SOF_FW_BLK_TYPE_SRAM,
 661                                                         window_offset + elem->offset,
 662                                                         elem->size, "etrace",
 663                                                         SOF_DEBUGFS_ACCESS_D0_ONLY);
 664                         break;
 665                 case SOF_IPC_REGION_DEBUG:
 666                         debug_offset = window_offset + elem->offset;
 667                         debug_size = elem->size;
 668                         snd_sof_debugfs_add_region_item(sdev, SOF_FW_BLK_TYPE_SRAM,
 669                                                         window_offset + elem->offset,
 670                                                         elem->size, "debug",
 671                                                         SOF_DEBUGFS_ACCESS_D0_ONLY);
 672                         break;
 673                 case SOF_IPC_REGION_STREAM:
 674                         stream_offset = window_offset + elem->offset;
 675                         stream_size = elem->size;
 676                         snd_sof_debugfs_add_region_item(sdev, SOF_FW_BLK_TYPE_SRAM,
 677                                                         stream_offset,
 678                                                         elem->size, "stream",
 679                                                         SOF_DEBUGFS_ACCESS_D0_ONLY);
 680                         break;
 681                 case SOF_IPC_REGION_REGS:
 682                         snd_sof_debugfs_add_region_item(sdev, SOF_FW_BLK_TYPE_SRAM,
 683                                                         window_offset + elem->offset,
 684                                                         elem->size, "regs",
 685                                                         SOF_DEBUGFS_ACCESS_D0_ONLY);
 686                         break;
 687                 case SOF_IPC_REGION_EXCEPTION:
 688                         sdev->dsp_oops_offset = window_offset + elem->offset;
 689                         snd_sof_debugfs_add_region_item(sdev, SOF_FW_BLK_TYPE_SRAM,
 690                                                         window_offset + elem->offset,
 691                                                         elem->size, "exception",
 692                                                         SOF_DEBUGFS_ACCESS_D0_ONLY);
 693                         break;
 694                 default:
 695                         dev_err(sdev->dev, "%s: Illegal window info: %u\n",
 696                                 __func__, elem->type);
 697                         return;
 698                 }
 699         }
 700
 701         if (outbox_size == 0 || inbox_size == 0) {
 702                 dev_err(sdev->dev, "%s: Illegal mailbox window\n", __func__);
 703                 return;
 704         }
 705
 706         sdev->dsp_box.offset = inbox_offset;
 707         sdev->dsp_box.size = inbox_size;
 708
 709         sdev->host_box.offset = outbox_offset;
 710         sdev->host_box.size = outbox_size;
 711
 712         sdev->stream_box.offset = stream_offset;
 713         sdev->stream_box.size = stream_size;
 714
 715         sdev->debug_box.offset = debug_offset;
 716         sdev->debug_box.size = debug_size;
 717
 718         dev_dbg(sdev->dev, " mailbox upstream 0x%x - size 0x%x\n",
 719                 inbox_offset, inbox_size);
 720         dev_dbg(sdev->dev, " mailbox downstream 0x%x - size 0x%x\n",
 721                 outbox_offset, outbox_size);
 722         dev_dbg(sdev->dev, " stream region 0x%x - size 0x%x\n",
 723                 stream_offset, stream_size);
 724         dev_dbg(sdev->dev, " debug region 0x%x - size 0x%x\n",
 725                 debug_offset, debug_size);
 726 }
 727
 728 static int ipc3_init_reply_data_buffer(struct snd_sof_dev *sdev)
 729 {
 730         struct snd_sof_ipc_msg *msg = &sdev->ipc->msg;
 731
 732         msg->reply_data = devm_kzalloc(sdev->dev, SOF_IPC_MSG_MAX_SIZE, GFP_KERNEL);
 733         if (!msg->reply_data)
 734                 return -ENOMEM;
 735
 736         sdev->ipc->max_payload_size = SOF_IPC_MSG_MAX_SIZE;
 737
 738         return 0;
 739 }
 740
 741 int sof_ipc3_validate_fw_version(struct snd_sof_dev *sdev)
 742 {
 743         struct sof_ipc_fw_ready *ready = &sdev->fw_ready;
 744         struct sof_ipc_fw_version *v = &ready->version;
 745
 746         dev_info(sdev->dev,
 747                  "Firmware info: version %d:%d:%d-%s\n",  v->major, v->minor,
 748                  v->micro, v->tag);
 749         dev_info(sdev->dev,
 750                  "Firmware: ABI %d:%d:%d Kernel ABI %d:%d:%d\n",
 751                  SOF_ABI_VERSION_MAJOR(v->abi_version),
 752                  SOF_ABI_VERSION_MINOR(v->abi_version),
 753                  SOF_ABI_VERSION_PATCH(v->abi_version),
 754                  SOF_ABI_MAJOR, SOF_ABI_MINOR, SOF_ABI_PATCH);
 755
 756         if (SOF_ABI_VERSION_INCOMPATIBLE(SOF_ABI_VERSION, v->abi_version)) {
 757                 dev_err(sdev->dev, "incompatible FW ABI version\n");
 758                 return -EINVAL;
 759         }
 760
 761         if (IS_ENABLED(CONFIG_SND_SOC_SOF_STRICT_ABI_CHECKS) &&
 762             SOF_ABI_VERSION_MINOR(v->abi_version) > SOF_ABI_MINOR) {
 763                 dev_err(sdev->dev, "FW ABI is more recent than kernel\n");
 764                 return -EINVAL;
 765         }
 766
 767         if (ready->flags & SOF_IPC_INFO_BUILD) {
 768                 dev_info(sdev->dev,
 769                          "Firmware debug build %d on %s-%s - options:\n"
 770                          " GDB: %s\n"
 771                          " lock debug: %s\n"
 772                          " lock vdebug: %s\n",
 773                          v->build, v->date, v->time,
 774                          (ready->flags & SOF_IPC_INFO_GDB) ?
 775                                 "enabled" : "disabled",
 776                          (ready->flags & SOF_IPC_INFO_LOCKS) ?
 777                                 "enabled" : "disabled",
 778                          (ready->flags & SOF_IPC_INFO_LOCKSV) ?
 779                                 "enabled" : "disabled");
 780         }
 781
 782         /* copy the fw_version into debugfs at first boot */
 783         memcpy(&sdev->fw_version, v, sizeof(*v));
 784
 785         return 0;
 786 }
 787
 788 static int ipc3_fw_ready(struct snd_sof_dev *sdev, u32 cmd)
 789 {
 790         struct sof_ipc_fw_ready *fw_ready = &sdev->fw_ready;
 791         int offset;
 792         int ret;
 793
 794         /* mailbox must be on 4k boundary */
 795         offset = snd_sof_dsp_get_mailbox_offset(sdev);
 796         if (offset < 0) {
 797                 dev_err(sdev->dev, "%s: no mailbox offset\n", __func__);
 798                 return offset;
 799         }
 800
 801         dev_dbg(sdev->dev, "DSP is ready 0x%8.8x offset 0x%x\n", cmd, offset);
 802
 803         /* no need to re-check version/ABI for subsequent boots */
 804         if (!sdev->first_boot)
 805                 return 0;
 806
 807         /*
 808          * copy data from the DSP FW ready offset
 809          * Subsequent error handling is not needed for BLK_TYPE_SRAM
 810          */
 811         ret = snd_sof_dsp_block_read(sdev, SOF_FW_BLK_TYPE_SRAM, offset, fw_ready,
 812                                      sizeof(*fw_ready));
 813         if (ret) {
 814                 dev_err(sdev->dev,
 815                         "Unable to read fw_ready, read from TYPE_SRAM failed\n");
 816                 return ret;
 817         }
 818
 819         /* make sure ABI version is compatible */
 820         ret = sof_ipc3_validate_fw_version(sdev);
 821         if (ret < 0)
 822                 return ret;
 823
 824         /* now check for extended data */
 825         ipc3_fw_parse_ext_data(sdev, offset + sizeof(struct sof_ipc_fw_ready));
 826
 827         ipc3_get_windows(sdev);
 828
 829         return ipc3_init_reply_data_buffer(sdev);
 830 }
 831
 832 /* IPC stream position. */
 833 static void ipc3_period_elapsed(struct snd_sof_dev *sdev, u32 msg_id)
 834 {
 835         struct snd_soc_component *scomp = sdev->component;
 836         struct snd_sof_pcm_stream *stream;
 837         struct sof_ipc_stream_posn posn;
 838         struct snd_sof_pcm *spcm;
 839         int direction, ret;
 840
 841         spcm = snd_sof_find_spcm_comp(scomp, msg_id, &direction);
 842         if (!spcm) {
 843                 dev_err(sdev->dev, "period elapsed for unknown stream, msg_id %d\n",
 844                         msg_id);
 845                 return;
 846         }
 847
 848         stream = &spcm->stream[direction];
 849         ret = snd_sof_ipc_msg_data(sdev, stream->substream, &posn, sizeof(posn));
 850         if (ret < 0) {
 851                 dev_warn(sdev->dev, "failed to read stream position: %d\n", ret);
 852                 return;
 853         }
 854
 855         dev_vdbg(sdev->dev, "posn : host 0x%llx dai 0x%llx wall 0x%llx\n",
 856                  posn.host_posn, posn.dai_posn, posn.wallclock);
 857
 858         memcpy(&stream->posn, &posn, sizeof(posn));
 859
 860         if (spcm->pcm.compress)
 861                 snd_sof_compr_fragment_elapsed(stream->cstream);
 862         else if (stream->substream->runtime &&
 863                  !stream->substream->runtime->no_period_wakeup)
 864                 /* only inform ALSA for period_wakeup mode */
 865                 snd_sof_pcm_period_elapsed(stream->substream);
 866 }
 867
 868 /* DSP notifies host of an XRUN within FW */
 869 static void ipc3_xrun(struct snd_sof_dev *sdev, u32 msg_id)
 870 {
 871         struct snd_soc_component *scomp = sdev->component;
 872         struct snd_sof_pcm_stream *stream;
 873         struct sof_ipc_stream_posn posn;
 874         struct snd_sof_pcm *spcm;
 875         int direction, ret;
 876
 877         spcm = snd_sof_find_spcm_comp(scomp, msg_id, &direction);
 878         if (!spcm) {
 879                 dev_err(sdev->dev, "XRUN for unknown stream, msg_id %d\n",
 880                         msg_id);
 881                 return;
 882         }
 883
 884         stream = &spcm->stream[direction];
 885         ret = snd_sof_ipc_msg_data(sdev, stream->substream, &posn, sizeof(posn));
 886         if (ret < 0) {
 887                 dev_warn(sdev->dev, "failed to read overrun position: %d\n", ret);
 888                 return;
 889         }
 890
 891         dev_dbg(sdev->dev,  "posn XRUN: host %llx comp %d size %d\n",
 892                 posn.host_posn, posn.xrun_comp_id, posn.xrun_size);
 893
 894 #if defined(CONFIG_SND_SOC_SOF_DEBUG_XRUN_STOP)
 895         /* stop PCM on XRUN - used for pipeline debug */
 896         memcpy(&stream->posn, &posn, sizeof(posn));
 897         snd_pcm_stop_xrun(stream->substream);
 898 #endif
 899 }
 900
 901 /* stream notifications from firmware */
 902 static void ipc3_stream_message(struct snd_sof_dev *sdev, void *msg_buf)
 903 {
 904         struct sof_ipc_cmd_hdr *hdr = msg_buf;
 905         u32 msg_type = hdr->cmd & SOF_CMD_TYPE_MASK;
 906         u32 msg_id = SOF_IPC_MESSAGE_ID(hdr->cmd);
 907
 908         switch (msg_type) {
 909         case SOF_IPC_STREAM_POSITION:
 910                 ipc3_period_elapsed(sdev, msg_id);
 911                 break;
 912         case SOF_IPC_STREAM_TRIG_XRUN:
 913                 ipc3_xrun(sdev, msg_id);
 914                 break;
 915         default:
 916                 dev_err(sdev->dev, "unhandled stream message %#x\n",
 917                         msg_id);
 918                 break;
 919         }
 920 }
 921
 922 /* component notifications from firmware */
 923 static void ipc3_comp_notification(struct snd_sof_dev *sdev, void *msg_buf)
 924 {
 925         const struct sof_ipc_tplg_ops *tplg_ops = sdev->ipc->ops->tplg;
 926         struct sof_ipc_cmd_hdr *hdr = msg_buf;
 927         u32 msg_type = hdr->cmd & SOF_CMD_TYPE_MASK;
 928
 929         switch (msg_type) {
 930         case SOF_IPC_COMP_GET_VALUE:
 931         case SOF_IPC_COMP_GET_DATA:
 932                 break;
 933         default:
 934                 dev_err(sdev->dev, "unhandled component message %#x\n", msg_type);
 935                 return;
 936         }
 937
 938         if (tplg_ops->control->update)
 939                 tplg_ops->control->update(sdev, msg_buf);
 940 }
 941
 942 static void ipc3_trace_message(struct snd_sof_dev *sdev, void *msg_buf)
 943 {
 944         struct sof_ipc_cmd_hdr *hdr = msg_buf;
 945         u32 msg_type = hdr->cmd & SOF_CMD_TYPE_MASK;
 946
 947         switch (msg_type) {
 948         case SOF_IPC_TRACE_DMA_POSITION:
 949                 ipc3_dtrace_posn_update(sdev, msg_buf);
 950                 break;
 951         default:
 952                 dev_err(sdev->dev, "unhandled trace message %#x\n", msg_type);
 953                 break;
 954         }
 955 }
 956
 957 /* DSP firmware has sent host a message  */
 958 static void sof_ipc3_rx_msg(struct snd_sof_dev *sdev)
 959 {
 960         ipc3_rx_callback rx_callback = NULL;
 961         struct sof_ipc_cmd_hdr hdr;
 962         void *msg_buf;
 963         u32 cmd;
 964         int err;
 965
 966         /* read back header */
 967         err = snd_sof_ipc_msg_data(sdev, NULL, &hdr, sizeof(hdr));
 968         if (err < 0) {
 969                 dev_warn(sdev->dev, "failed to read IPC header: %d\n", err);
 970                 return;
 971         }
 972
 973         if (hdr.size < sizeof(hdr)) {
 974                 dev_err(sdev->dev, "The received message size is invalid\n");
 975                 return;
 976         }
 977
 978         ipc3_log_header(sdev->dev, "ipc rx", hdr.cmd);
 979
 980         cmd = hdr.cmd & SOF_GLB_TYPE_MASK;
 981
 982         /* check message type */
 983         switch (cmd) {
 984         case SOF_IPC_GLB_REPLY:
 985                 dev_err(sdev->dev, "ipc reply unknown\n");
 986                 break;
 987         case SOF_IPC_FW_READY:
 988                 /* check for FW boot completion */
 989                 if (sdev->fw_state == SOF_FW_BOOT_IN_PROGRESS) {
 990                         err = ipc3_fw_ready(sdev, cmd);
 991                         if (err < 0)
 992                                 sof_set_fw_state(sdev, SOF_FW_BOOT_READY_FAILED);
 993                         else
 994                                 sof_set_fw_state(sdev, SOF_FW_BOOT_READY_OK);
 995
 996                         /* wake up firmware loader */
 997                         wake_up(&sdev->boot_wait);
 998                 }
 999                 break;
1000         case SOF_IPC_GLB_COMPOUND:
1001         case SOF_IPC_GLB_TPLG_MSG:
1002         case SOF_IPC_GLB_PM_MSG:
1003                 break;
1004         case SOF_IPC_GLB_COMP_MSG:
1005                 rx_callback = ipc3_comp_notification;
1006                 break;
1007         case SOF_IPC_GLB_STREAM_MSG:
1008                 rx_callback = ipc3_stream_message;
1009                 break;
1010         case SOF_IPC_GLB_TRACE_MSG:
1011                 rx_callback = ipc3_trace_message;
1012                 break;
1013         default:
1014                 dev_err(sdev->dev, "%s: Unknown DSP message: 0x%x\n", __func__, cmd);
1015                 break;
1016         }
1017
1018         /* read the full message */
1019         msg_buf = kmalloc(hdr.size, GFP_KERNEL);
1020         if (!msg_buf)
1021                 return;
1022
1023         err = snd_sof_ipc_msg_data(sdev, NULL, msg_buf, hdr.size);
1024         if (err < 0) {
1025                 dev_err(sdev->dev, "%s: Failed to read message: %d\n", __func__, err);
1026         } else {
1027                 /* Call local handler for the message */
1028                 if (rx_callback)
1029                         rx_callback(sdev, msg_buf);
1030
1031                 /* Notify registered clients */
1032                 sof_client_ipc_rx_dispatcher(sdev, msg_buf);
1033         }
1034
1035         kfree(msg_buf);
1036
1037         ipc3_log_header(sdev->dev, "ipc rx done", hdr.cmd);
1038 }
1039
1040 static int sof_ipc3_set_core_state(struct snd_sof_dev *sdev, int core_idx, bool on)
1041 {
1042         struct sof_ipc_pm_core_config core_cfg = {
1043                 .hdr.size = sizeof(core_cfg),
1044                 .hdr.cmd = SOF_IPC_GLB_PM_MSG | SOF_IPC_PM_CORE_ENABLE,
1045         };
1046         struct sof_ipc_reply reply;
1047
1048         if (on)
1049                 core_cfg.enable_mask = sdev->enabled_cores_mask | BIT(core_idx);
1050         else
1051                 core_cfg.enable_mask = sdev->enabled_cores_mask & ~BIT(core_idx);
1052
1053         return sof_ipc3_tx_msg(sdev, &core_cfg, sizeof(core_cfg),
1054                                &reply, sizeof(reply), false);
1055 }
1056
1057 static int sof_ipc3_ctx_ipc(struct snd_sof_dev *sdev, int cmd)
1058 {
1059         struct sof_ipc_pm_ctx pm_ctx = {
1060                 .hdr.size = sizeof(pm_ctx),
1061                 .hdr.cmd = SOF_IPC_GLB_PM_MSG | cmd,
1062         };
1063         struct sof_ipc_reply reply;
1064
1065         /* send ctx save ipc to dsp */
1066         return sof_ipc3_tx_msg(sdev, &pm_ctx, sizeof(pm_ctx),
1067                                &reply, sizeof(reply), false);
1068 }
1069
1070 static int sof_ipc3_ctx_save(struct snd_sof_dev *sdev)
1071 {
1072         return sof_ipc3_ctx_ipc(sdev, SOF_IPC_PM_CTX_SAVE);
1073 }
1074
1075 static int sof_ipc3_ctx_restore(struct snd_sof_dev *sdev)
1076 {
1077         return sof_ipc3_ctx_ipc(sdev, SOF_IPC_PM_CTX_RESTORE);
1078 }
1079
1080 static const struct sof_ipc_pm_ops ipc3_pm_ops = {
1081         .ctx_save = sof_ipc3_ctx_save,
1082         .ctx_restore = sof_ipc3_ctx_restore,
1083         .set_core_state = sof_ipc3_set_core_state,
1084 };
1085
1086 const struct sof_ipc_ops ipc3_ops = {
1087         .tplg = &ipc3_tplg_ops,
1088         .pm = &ipc3_pm_ops,
1089         .pcm = &ipc3_pcm_ops,
1090         .fw_loader = &ipc3_loader_ops,
1091         .fw_tracing = &ipc3_dtrace_ops,
1092
1093         .tx_msg = sof_ipc3_tx_msg,
1094         .rx_msg = sof_ipc3_rx_msg,
1095         .set_get_data = sof_ipc3_set_get_data,
1096         .get_reply = sof_ipc3_get_reply,
1097 };