1 // SPDX-License-Identifier: GPL-2.0 or MIT
4 /* Copyright 2023 Collabora ltd. */
8 #include <linux/platform_device.h>
9 #include <linux/pm_domain.h>
10 #include <linux/pm_runtime.h>
11 #include <linux/regulator/consumer.h>
12 #include <linux/reset.h>
14 #include <drm/drm_drv.h>
15 #include <drm/drm_managed.h>
17 #include "panthor_devfreq.h"
18 #include "panthor_device.h"
19 #include "panthor_fw.h"
20 #include "panthor_gpu.h"
21 #include "panthor_mmu.h"
22 #include "panthor_regs.h"
23 #include "panthor_sched.h"
25 static int panthor_clk_init(struct panthor_device *ptdev)
27 ptdev->clks.core = devm_clk_get(ptdev->base.dev, NULL);
28 if (IS_ERR(ptdev->clks.core))
29 return dev_err_probe(ptdev->base.dev,
30 PTR_ERR(ptdev->clks.core),
31 "get 'core' clock failed");
33 ptdev->clks.stacks = devm_clk_get_optional(ptdev->base.dev, "stacks");
34 if (IS_ERR(ptdev->clks.stacks))
35 return dev_err_probe(ptdev->base.dev,
36 PTR_ERR(ptdev->clks.stacks),
37 "get 'stacks' clock failed");
39 ptdev->clks.coregroup = devm_clk_get_optional(ptdev->base.dev, "coregroup");
40 if (IS_ERR(ptdev->clks.coregroup))
41 return dev_err_probe(ptdev->base.dev,
42 PTR_ERR(ptdev->clks.coregroup),
43 "get 'coregroup' clock failed");
45 drm_info(&ptdev->base, "clock rate = %lu\n", clk_get_rate(ptdev->clks.core));
49 void panthor_device_unplug(struct panthor_device *ptdev)
51 /* This function can be called from two different path: the reset work
52 * and the platform device remove callback. drm_dev_unplug() doesn't
53 * deal with concurrent callers, so we have to protect drm_dev_unplug()
54 * calls with our own lock, and bail out if the device is already
57 mutex_lock(&ptdev->unplug.lock);
58 if (drm_dev_is_unplugged(&ptdev->base)) {
59 /* Someone beat us, release the lock and wait for the unplug
60 * operation to be reported as done.
62 mutex_unlock(&ptdev->unplug.lock);
63 wait_for_completion(&ptdev->unplug.done);
67 /* Call drm_dev_unplug() so any access to HW blocks happening after
68 * that point get rejected.
70 drm_dev_unplug(&ptdev->base);
72 /* We do the rest of the unplug with the unplug lock released,
73 * future callers will wait on ptdev->unplug.done anyway.
75 mutex_unlock(&ptdev->unplug.lock);
77 drm_WARN_ON(&ptdev->base, pm_runtime_get_sync(ptdev->base.dev) < 0);
79 /* Now, try to cleanly shutdown the GPU before the device resources
82 panthor_sched_unplug(ptdev);
83 panthor_fw_unplug(ptdev);
84 panthor_mmu_unplug(ptdev);
85 panthor_gpu_unplug(ptdev);
87 pm_runtime_dont_use_autosuspend(ptdev->base.dev);
88 pm_runtime_put_sync_suspend(ptdev->base.dev);
90 /* If PM is disabled, we need to call the suspend handler manually. */
91 if (!IS_ENABLED(CONFIG_PM))
92 panthor_device_suspend(ptdev->base.dev);
94 /* Report the unplug operation as done to unblock concurrent
95 * panthor_device_unplug() callers.
97 complete_all(&ptdev->unplug.done);
100 static void panthor_device_reset_cleanup(struct drm_device *ddev, void *data)
102 struct panthor_device *ptdev = container_of(ddev, struct panthor_device, base);
104 cancel_work_sync(&ptdev->reset.work);
105 destroy_workqueue(ptdev->reset.wq);
108 static void panthor_device_reset_work(struct work_struct *work)
110 struct panthor_device *ptdev = container_of(work, struct panthor_device, reset.work);
113 if (atomic_read(&ptdev->pm.state) != PANTHOR_DEVICE_PM_STATE_ACTIVE) {
115 * No need for a reset as the device has been (or will be)
118 atomic_set(&ptdev->reset.pending, 0);
122 if (!drm_dev_enter(&ptdev->base, &cookie))
125 panthor_sched_pre_reset(ptdev);
126 panthor_fw_pre_reset(ptdev, true);
127 panthor_mmu_pre_reset(ptdev);
128 panthor_gpu_soft_reset(ptdev);
129 panthor_gpu_l2_power_on(ptdev);
130 panthor_mmu_post_reset(ptdev);
131 ret = panthor_fw_post_reset(ptdev);
135 atomic_set(&ptdev->reset.pending, 0);
136 panthor_sched_post_reset(ptdev);
139 drm_dev_exit(cookie);
142 panthor_device_unplug(ptdev);
143 drm_err(&ptdev->base, "Failed to boot MCU after reset, making device unusable.");
147 static bool panthor_device_is_initialized(struct panthor_device *ptdev)
149 return !!ptdev->scheduler;
152 static void panthor_device_free_page(struct drm_device *ddev, void *data)
157 int panthor_device_init(struct panthor_device *ptdev)
159 u32 *dummy_page_virt;
160 struct resource *res;
164 ptdev->coherent = device_get_dma_attr(ptdev->base.dev) == DEV_DMA_COHERENT;
166 init_completion(&ptdev->unplug.done);
167 ret = drmm_mutex_init(&ptdev->base, &ptdev->unplug.lock);
171 ret = drmm_mutex_init(&ptdev->base, &ptdev->pm.mmio_lock);
175 atomic_set(&ptdev->pm.state, PANTHOR_DEVICE_PM_STATE_SUSPENDED);
176 p = alloc_page(GFP_KERNEL | __GFP_ZERO);
180 ptdev->pm.dummy_latest_flush = p;
181 dummy_page_virt = page_address(p);
182 ret = drmm_add_action_or_reset(&ptdev->base, panthor_device_free_page,
183 ptdev->pm.dummy_latest_flush);
188 * Set the dummy page holding the latest flush to 1. This will cause the
189 * flush to avoided as we know it isn't necessary if the submission
190 * happens while the dummy page is mapped. Zero cannot be used because
191 * that means 'always flush'.
193 *dummy_page_virt = 1;
195 INIT_WORK(&ptdev->reset.work, panthor_device_reset_work);
196 ptdev->reset.wq = alloc_ordered_workqueue("panthor-reset-wq", 0);
197 if (!ptdev->reset.wq)
200 ret = drmm_add_action_or_reset(&ptdev->base, panthor_device_reset_cleanup, NULL);
204 ret = panthor_clk_init(ptdev);
208 ret = panthor_devfreq_init(ptdev);
212 ptdev->iomem = devm_platform_get_and_ioremap_resource(to_platform_device(ptdev->base.dev),
214 if (IS_ERR(ptdev->iomem))
215 return PTR_ERR(ptdev->iomem);
217 ptdev->phys_addr = res->start;
219 ret = devm_pm_runtime_enable(ptdev->base.dev);
223 ret = pm_runtime_resume_and_get(ptdev->base.dev);
227 /* If PM is disabled, we need to call panthor_device_resume() manually. */
228 if (!IS_ENABLED(CONFIG_PM)) {
229 ret = panthor_device_resume(ptdev->base.dev);
234 ret = panthor_gpu_init(ptdev);
238 ret = panthor_mmu_init(ptdev);
242 ret = panthor_fw_init(ptdev);
246 ret = panthor_sched_init(ptdev);
251 pm_runtime_set_autosuspend_delay(ptdev->base.dev, 50);
252 pm_runtime_use_autosuspend(ptdev->base.dev);
254 ret = drm_dev_register(&ptdev->base, 0);
256 goto err_disable_autosuspend;
258 pm_runtime_put_autosuspend(ptdev->base.dev);
261 err_disable_autosuspend:
262 pm_runtime_dont_use_autosuspend(ptdev->base.dev);
263 panthor_sched_unplug(ptdev);
266 panthor_fw_unplug(ptdev);
269 panthor_mmu_unplug(ptdev);
272 panthor_gpu_unplug(ptdev);
275 pm_runtime_put_sync_suspend(ptdev->base.dev);
279 #define PANTHOR_EXCEPTION(id) \
280 [DRM_PANTHOR_EXCEPTION_ ## id] = { \
284 struct panthor_exception_info {
288 static const struct panthor_exception_info panthor_exception_infos[] = {
289 PANTHOR_EXCEPTION(OK),
290 PANTHOR_EXCEPTION(TERMINATED),
291 PANTHOR_EXCEPTION(KABOOM),
292 PANTHOR_EXCEPTION(EUREKA),
293 PANTHOR_EXCEPTION(ACTIVE),
294 PANTHOR_EXCEPTION(CS_RES_TERM),
295 PANTHOR_EXCEPTION(CS_CONFIG_FAULT),
296 PANTHOR_EXCEPTION(CS_ENDPOINT_FAULT),
297 PANTHOR_EXCEPTION(CS_BUS_FAULT),
298 PANTHOR_EXCEPTION(CS_INSTR_INVALID),
299 PANTHOR_EXCEPTION(CS_CALL_STACK_OVERFLOW),
300 PANTHOR_EXCEPTION(CS_INHERIT_FAULT),
301 PANTHOR_EXCEPTION(INSTR_INVALID_PC),
302 PANTHOR_EXCEPTION(INSTR_INVALID_ENC),
303 PANTHOR_EXCEPTION(INSTR_BARRIER_FAULT),
304 PANTHOR_EXCEPTION(DATA_INVALID_FAULT),
305 PANTHOR_EXCEPTION(TILE_RANGE_FAULT),
306 PANTHOR_EXCEPTION(ADDR_RANGE_FAULT),
307 PANTHOR_EXCEPTION(IMPRECISE_FAULT),
308 PANTHOR_EXCEPTION(OOM),
309 PANTHOR_EXCEPTION(CSF_FW_INTERNAL_ERROR),
310 PANTHOR_EXCEPTION(CSF_RES_EVICTION_TIMEOUT),
311 PANTHOR_EXCEPTION(GPU_BUS_FAULT),
312 PANTHOR_EXCEPTION(GPU_SHAREABILITY_FAULT),
313 PANTHOR_EXCEPTION(SYS_SHAREABILITY_FAULT),
314 PANTHOR_EXCEPTION(GPU_CACHEABILITY_FAULT),
315 PANTHOR_EXCEPTION(TRANSLATION_FAULT_0),
316 PANTHOR_EXCEPTION(TRANSLATION_FAULT_1),
317 PANTHOR_EXCEPTION(TRANSLATION_FAULT_2),
318 PANTHOR_EXCEPTION(TRANSLATION_FAULT_3),
319 PANTHOR_EXCEPTION(TRANSLATION_FAULT_4),
320 PANTHOR_EXCEPTION(PERM_FAULT_0),
321 PANTHOR_EXCEPTION(PERM_FAULT_1),
322 PANTHOR_EXCEPTION(PERM_FAULT_2),
323 PANTHOR_EXCEPTION(PERM_FAULT_3),
324 PANTHOR_EXCEPTION(ACCESS_FLAG_1),
325 PANTHOR_EXCEPTION(ACCESS_FLAG_2),
326 PANTHOR_EXCEPTION(ACCESS_FLAG_3),
327 PANTHOR_EXCEPTION(ADDR_SIZE_FAULT_IN),
328 PANTHOR_EXCEPTION(ADDR_SIZE_FAULT_OUT0),
329 PANTHOR_EXCEPTION(ADDR_SIZE_FAULT_OUT1),
330 PANTHOR_EXCEPTION(ADDR_SIZE_FAULT_OUT2),
331 PANTHOR_EXCEPTION(ADDR_SIZE_FAULT_OUT3),
332 PANTHOR_EXCEPTION(MEM_ATTR_FAULT_0),
333 PANTHOR_EXCEPTION(MEM_ATTR_FAULT_1),
334 PANTHOR_EXCEPTION(MEM_ATTR_FAULT_2),
335 PANTHOR_EXCEPTION(MEM_ATTR_FAULT_3),
338 const char *panthor_exception_name(struct panthor_device *ptdev, u32 exception_code)
340 if (exception_code >= ARRAY_SIZE(panthor_exception_infos) ||
341 !panthor_exception_infos[exception_code].name)
342 return "Unknown exception type";
344 return panthor_exception_infos[exception_code].name;
347 static vm_fault_t panthor_mmio_vm_fault(struct vm_fault *vmf)
349 struct vm_area_struct *vma = vmf->vma;
350 struct panthor_device *ptdev = vma->vm_private_data;
351 u64 offset = (u64)vma->vm_pgoff << PAGE_SHIFT;
358 if (!drm_dev_enter(&ptdev->base, &cookie))
359 return VM_FAULT_SIGBUS;
361 mutex_lock(&ptdev->pm.mmio_lock);
362 active = atomic_read(&ptdev->pm.state) == PANTHOR_DEVICE_PM_STATE_ACTIVE;
365 case DRM_PANTHOR_USER_FLUSH_ID_MMIO_OFFSET:
367 pfn = __phys_to_pfn(ptdev->phys_addr + CSF_GPU_LATEST_FLUSH_ID);
369 pfn = page_to_pfn(ptdev->pm.dummy_latest_flush);
373 ret = VM_FAULT_SIGBUS;
377 pgprot = vma->vm_page_prot;
379 pgprot = pgprot_noncached(pgprot);
381 ret = vmf_insert_pfn_prot(vma, vmf->address, pfn, pgprot);
384 mutex_unlock(&ptdev->pm.mmio_lock);
385 drm_dev_exit(cookie);
389 static const struct vm_operations_struct panthor_mmio_vm_ops = {
390 .fault = panthor_mmio_vm_fault,
393 int panthor_device_mmap_io(struct panthor_device *ptdev, struct vm_area_struct *vma)
395 u64 offset = (u64)vma->vm_pgoff << PAGE_SHIFT;
398 case DRM_PANTHOR_USER_FLUSH_ID_MMIO_OFFSET:
399 if (vma->vm_end - vma->vm_start != PAGE_SIZE ||
400 (vma->vm_flags & (VM_WRITE | VM_EXEC)))
409 /* Defer actual mapping to the fault handler. */
410 vma->vm_private_data = ptdev;
411 vma->vm_ops = &panthor_mmio_vm_ops;
413 VM_IO | VM_DONTCOPY | VM_DONTEXPAND |
414 VM_NORESERVE | VM_DONTDUMP | VM_PFNMAP);
418 int panthor_device_resume(struct device *dev)
420 struct panthor_device *ptdev = dev_get_drvdata(dev);
423 if (atomic_read(&ptdev->pm.state) != PANTHOR_DEVICE_PM_STATE_SUSPENDED)
426 atomic_set(&ptdev->pm.state, PANTHOR_DEVICE_PM_STATE_RESUMING);
428 ret = clk_prepare_enable(ptdev->clks.core);
430 goto err_set_suspended;
432 ret = clk_prepare_enable(ptdev->clks.stacks);
434 goto err_disable_core_clk;
436 ret = clk_prepare_enable(ptdev->clks.coregroup);
438 goto err_disable_stacks_clk;
440 ret = panthor_devfreq_resume(ptdev);
442 goto err_disable_coregroup_clk;
444 if (panthor_device_is_initialized(ptdev) &&
445 drm_dev_enter(&ptdev->base, &cookie)) {
446 panthor_gpu_resume(ptdev);
447 panthor_mmu_resume(ptdev);
448 ret = drm_WARN_ON(&ptdev->base, panthor_fw_resume(ptdev));
450 panthor_sched_resume(ptdev);
452 panthor_mmu_suspend(ptdev);
453 panthor_gpu_suspend(ptdev);
456 drm_dev_exit(cookie);
459 goto err_suspend_devfreq;
462 if (atomic_read(&ptdev->reset.pending))
463 queue_work(ptdev->reset.wq, &ptdev->reset.work);
465 /* Clear all IOMEM mappings pointing to this device after we've
466 * resumed. This way the fake mappings pointing to the dummy pages
467 * are removed and the real iomem mapping will be restored on next
470 mutex_lock(&ptdev->pm.mmio_lock);
471 unmap_mapping_range(ptdev->base.anon_inode->i_mapping,
472 DRM_PANTHOR_USER_MMIO_OFFSET, 0, 1);
473 atomic_set(&ptdev->pm.state, PANTHOR_DEVICE_PM_STATE_ACTIVE);
474 mutex_unlock(&ptdev->pm.mmio_lock);
478 panthor_devfreq_suspend(ptdev);
480 err_disable_coregroup_clk:
481 clk_disable_unprepare(ptdev->clks.coregroup);
483 err_disable_stacks_clk:
484 clk_disable_unprepare(ptdev->clks.stacks);
486 err_disable_core_clk:
487 clk_disable_unprepare(ptdev->clks.core);
490 atomic_set(&ptdev->pm.state, PANTHOR_DEVICE_PM_STATE_SUSPENDED);
494 int panthor_device_suspend(struct device *dev)
496 struct panthor_device *ptdev = dev_get_drvdata(dev);
499 if (atomic_read(&ptdev->pm.state) != PANTHOR_DEVICE_PM_STATE_ACTIVE)
502 /* Clear all IOMEM mappings pointing to this device before we
503 * shutdown the power-domain and clocks. Failing to do that results
504 * in external aborts when the process accesses the iomem region.
505 * We change the state and call unmap_mapping_range() with the
506 * mmio_lock held to make sure the vm_fault handler won't set up
509 mutex_lock(&ptdev->pm.mmio_lock);
510 atomic_set(&ptdev->pm.state, PANTHOR_DEVICE_PM_STATE_SUSPENDING);
511 unmap_mapping_range(ptdev->base.anon_inode->i_mapping,
512 DRM_PANTHOR_USER_MMIO_OFFSET, 0, 1);
513 mutex_unlock(&ptdev->pm.mmio_lock);
515 if (panthor_device_is_initialized(ptdev) &&
516 drm_dev_enter(&ptdev->base, &cookie)) {
517 cancel_work_sync(&ptdev->reset.work);
519 /* We prepare everything as if we were resetting the GPU.
520 * The end of the reset will happen in the resume path though.
522 panthor_sched_suspend(ptdev);
523 panthor_fw_suspend(ptdev);
524 panthor_mmu_suspend(ptdev);
525 panthor_gpu_suspend(ptdev);
526 drm_dev_exit(cookie);
529 ret = panthor_devfreq_suspend(ptdev);
531 if (panthor_device_is_initialized(ptdev) &&
532 drm_dev_enter(&ptdev->base, &cookie)) {
533 panthor_gpu_resume(ptdev);
534 panthor_mmu_resume(ptdev);
535 drm_WARN_ON(&ptdev->base, panthor_fw_resume(ptdev));
536 panthor_sched_resume(ptdev);
537 drm_dev_exit(cookie);
543 clk_disable_unprepare(ptdev->clks.coregroup);
544 clk_disable_unprepare(ptdev->clks.stacks);
545 clk_disable_unprepare(ptdev->clks.core);
546 atomic_set(&ptdev->pm.state, PANTHOR_DEVICE_PM_STATE_SUSPENDED);
550 /* If something failed and we have to revert back to an
551 * active state, we also need to clear the MMIO userspace
552 * mappings, so any dumb pages that were mapped while we
553 * were trying to suspend gets invalidated.
555 mutex_lock(&ptdev->pm.mmio_lock);
556 atomic_set(&ptdev->pm.state, PANTHOR_DEVICE_PM_STATE_ACTIVE);
557 unmap_mapping_range(ptdev->base.anon_inode->i_mapping,
558 DRM_PANTHOR_USER_MMIO_OFFSET, 0, 1);
559 mutex_unlock(&ptdev->pm.mmio_lock);