drivers/cpufreq/tegra20-cpufreq.c

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /*
   3  * Copyright (C) 2010 Google, Inc.
   4  *
   5  * Author:
   6  *      Colin Cross <[email protected]>
   7  *      Based on arch/arm/plat-omap/cpu-omap.c, (C) 2005 Nokia Corporation
   8  */
   9
  10 #include <linux/bits.h>
  11 #include <linux/cpu.h>
  12 #include <linux/err.h>
  13 #include <linux/init.h>
  14 #include <linux/module.h>
  15 #include <linux/of_device.h>
  16 #include <linux/platform_device.h>
  17 #include <linux/pm_opp.h>
  18 #include <linux/types.h>
  19
  20 #include <soc/tegra/common.h>
  21 #include <soc/tegra/fuse.h>
  22
  23 static bool cpu0_node_has_opp_v2_prop(void)
  24 {
  25         struct device_node *np = of_cpu_device_node_get(0);
  26         bool ret = false;
  27
  28         if (of_get_property(np, "operating-points-v2", NULL))
  29                 ret = true;
  30
  31         of_node_put(np);
  32         return ret;
  33 }
  34
  35 static int tegra20_cpufreq_probe(struct platform_device *pdev)
  36 {
  37         struct platform_device *cpufreq_dt;
  38         struct opp_table *opp_table;
  39         struct device *cpu_dev;
  40         u32 versions[2];
  41         int err;
  42
  43         if (!cpu0_node_has_opp_v2_prop()) {
  44                 dev_err(&pdev->dev, "operating points not found\n");
  45                 dev_err(&pdev->dev, "please update your device tree\n");
  46                 return -ENODEV;
  47         }
  48
  49         if (of_machine_is_compatible("nvidia,tegra20")) {
  50                 versions[0] = BIT(tegra_sku_info.cpu_process_id);
  51                 versions[1] = BIT(tegra_sku_info.soc_speedo_id);
  52         } else {
  53                 versions[0] = BIT(tegra_sku_info.cpu_process_id);
  54                 versions[1] = BIT(tegra_sku_info.cpu_speedo_id);
  55         }
  56
  57         dev_info(&pdev->dev, "hardware version 0x%x 0x%x\n",
  58                  versions[0], versions[1]);
  59
  60         cpu_dev = get_cpu_device(0);
  61         if (WARN_ON(!cpu_dev))
  62                 return -ENODEV;
  63
  64         opp_table = dev_pm_opp_set_supported_hw(cpu_dev, versions, 2);
  65         err = PTR_ERR_OR_ZERO(opp_table);
  66         if (err) {
  67                 dev_err(&pdev->dev, "failed to set supported hw: %d\n", err);
  68                 return err;
  69         }
  70
  71         cpufreq_dt = platform_device_register_simple("cpufreq-dt", -1, NULL, 0);
  72         err = PTR_ERR_OR_ZERO(cpufreq_dt);
  73         if (err) {
  74                 dev_err(&pdev->dev,
  75                         "failed to create cpufreq-dt device: %d\n", err);
  76                 goto err_put_supported_hw;
  77         }
  78
  79         platform_set_drvdata(pdev, cpufreq_dt);
  80
  81         return 0;
  82
  83 err_put_supported_hw:
  84         dev_pm_opp_put_supported_hw(opp_table);
  85
  86         return err;
  87 }
  88
  89 static int tegra20_cpufreq_remove(struct platform_device *pdev)
  90 {
  91         struct platform_device *cpufreq_dt;
  92         struct opp_table *opp_table;
  93
  94         cpufreq_dt = platform_get_drvdata(pdev);
  95         platform_device_unregister(cpufreq_dt);
  96
  97         opp_table = dev_pm_opp_get_opp_table(get_cpu_device(0));
  98         dev_pm_opp_put_supported_hw(opp_table);
  99         dev_pm_opp_put_opp_table(opp_table);
 100
 101         return 0;
 102 }
 103
 104 static struct platform_driver tegra20_cpufreq_driver = {
 105         .probe          = tegra20_cpufreq_probe,
 106         .remove         = tegra20_cpufreq_remove,
 107         .driver         = {
 108                 .name   = "tegra20-cpufreq",
 109         },
 110 };
 111 module_platform_driver(tegra20_cpufreq_driver);
 112
 113 MODULE_ALIAS("platform:tegra20-cpufreq");
 114 MODULE_AUTHOR("Colin Cross <[email protected]>");
 115 MODULE_DESCRIPTION("NVIDIA Tegra20 cpufreq driver");
 116 MODULE_LICENSE("GPL");