drivers/gpu/drm/amd/amdgpu/amdgpu_securedisplay.c

   1 /*
   2  * Copyright 2021 Advanced Micro Devices, Inc.
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice shall be included in
  12  * all copies or substantial portions of the Software.
  13  *
  14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20  * OTHER DEALINGS IN THE SOFTWARE.
  21  *
  22  *
  23  */
  24 #include <linux/debugfs.h>
  25 #include <linux/pm_runtime.h>
  26
  27 #include "amdgpu.h"
  28 #include "amdgpu_securedisplay.h"
  29
  30 /**
  31  * DOC: AMDGPU SECUREDISPLAY debugfs test interface
  32  *
  33  * how to use?
  34  * echo opcode <value> > <debugfs_dir>/dri/xxx/securedisplay_test
  35  * eg. echo 1 > <debugfs_dir>/dri/xxx/securedisplay_test
  36  * eg. echo 2 phy_id > <debugfs_dir>/dri/xxx/securedisplay_test
  37  *
  38  * opcode:
  39  * 1：Query whether TA is responding used only for validation pupose
  40  * 2: Send region of Interest and CRC value to I2C. (uint32)phy_id is
  41  * send to determine which DIO scratch register should be used to get
  42  * ROI and receive i2c_buf as the output.
  43  *
  44  * You can refer more detail from header file ta_securedisplay_if.h
  45  *
  46  */
  47
  48 void psp_securedisplay_parse_resp_status(struct psp_context *psp,
  49         enum ta_securedisplay_status status)
  50 {
  51         switch (status) {
  52         case TA_SECUREDISPLAY_STATUS__SUCCESS:
  53                 break;
  54         case TA_SECUREDISPLAY_STATUS__GENERIC_FAILURE:
  55                 dev_err(psp->adev->dev, "Secure display: Generic Failure.");
  56                 break;
  57         case TA_SECUREDISPLAY_STATUS__INVALID_PARAMETER:
  58                 dev_err(psp->adev->dev, "Secure display: Invalid Parameter.");
  59                 break;
  60         case TA_SECUREDISPLAY_STATUS__NULL_POINTER:
  61                 dev_err(psp->adev->dev, "Secure display: Null Pointer.");
  62                 break;
  63         case TA_SECUREDISPLAY_STATUS__I2C_WRITE_ERROR:
  64                 dev_err(psp->adev->dev, "Secure display: Failed to write to I2C.");
  65                 break;
  66         case TA_SECUREDISPLAY_STATUS__READ_DIO_SCRATCH_ERROR:
  67                 dev_err(psp->adev->dev, "Secure display: Failed to Read DIO Scratch Register.");
  68                 break;
  69         case TA_SECUREDISPLAY_STATUS__READ_CRC_ERROR:
  70                 dev_err(psp->adev->dev, "Secure display: Failed to Read CRC");
  71                 break;
  72         default:
  73                 dev_err(psp->adev->dev, "Secure display: Failed to parse status: %d\n", status);
  74         }
  75 }
  76
  77 void psp_prep_securedisplay_cmd_buf(struct psp_context *psp, struct securedisplay_cmd **cmd,
  78         enum ta_securedisplay_command command_id)
  79 {
  80         *cmd = (struct securedisplay_cmd *)psp->securedisplay_context.securedisplay_shared_buf;
  81         memset(*cmd, 0, sizeof(struct securedisplay_cmd));
  82         (*cmd)->status = TA_SECUREDISPLAY_STATUS__GENERIC_FAILURE;
  83         (*cmd)->cmd_id = command_id;
  84 }
  85
  86 static ssize_t amdgpu_securedisplay_debugfs_write(struct file *f, const char __user *buf,
  87                 size_t size, loff_t *pos)
  88 {
  89         struct amdgpu_device *adev = (struct amdgpu_device *)file_inode(f)->i_private;
  90         struct psp_context *psp = &adev->psp;
  91         struct securedisplay_cmd *securedisplay_cmd;
  92         struct drm_device *dev = adev_to_drm(adev);
  93         uint32_t phy_id;
  94         uint32_t op;
  95         int i;
  96         char str[64];
  97         char i2c_output[256];
  98         int ret;
  99
 100         if (*pos || size > sizeof(str) - 1)
 101                 return -EINVAL;
 102
 103         memset(str,  0, sizeof(str));
 104         ret = copy_from_user(str, buf, size);
 105         if (ret)
 106                 return -EFAULT;
 107
 108         ret = pm_runtime_get_sync(dev->dev);
 109         if (ret < 0) {
 110                 pm_runtime_put_autosuspend(dev->dev);
 111                 return ret;
 112         }
 113
 114         if (size < 3)
 115                 sscanf(str, "%u ", &op);
 116         else
 117                 sscanf(str, "%u %u", &op, &phy_id);
 118
 119         switch (op) {
 120         case 1:
 121                 psp_prep_securedisplay_cmd_buf(psp, &securedisplay_cmd,
 122                         TA_SECUREDISPLAY_COMMAND__QUERY_TA);
 123                 ret = psp_securedisplay_invoke(psp, TA_SECUREDISPLAY_COMMAND__QUERY_TA);
 124                 if (!ret) {
 125                         if (securedisplay_cmd->status == TA_SECUREDISPLAY_STATUS__SUCCESS)
 126                                 dev_info(adev->dev, "SECUREDISPLAY: query securedisplay TA ret is 0x%X\n",
 127                                         securedisplay_cmd->securedisplay_out_message.query_ta.query_cmd_ret);
 128                         else
 129                                 psp_securedisplay_parse_resp_status(psp, securedisplay_cmd->status);
 130                 }
 131                 break;
 132         case 2:
 133                 psp_prep_securedisplay_cmd_buf(psp, &securedisplay_cmd,
 134                         TA_SECUREDISPLAY_COMMAND__SEND_ROI_CRC);
 135                 securedisplay_cmd->securedisplay_in_message.send_roi_crc.phy_id = phy_id;
 136                 ret = psp_securedisplay_invoke(psp, TA_SECUREDISPLAY_COMMAND__SEND_ROI_CRC);
 137                 if (!ret) {
 138                         if (securedisplay_cmd->status == TA_SECUREDISPLAY_STATUS__SUCCESS) {
 139                                 memset(i2c_output,  0, sizeof(i2c_output));
 140                                 for (i = 0; i < TA_SECUREDISPLAY_I2C_BUFFER_SIZE; i++)
 141                                         sprintf(i2c_output, "%s 0x%X", i2c_output,
 142                                                 securedisplay_cmd->securedisplay_out_message.send_roi_crc.i2c_buf[i]);
 143                                 dev_info(adev->dev, "SECUREDISPLAY: I2C buffer out put is :%s\n", i2c_output);
 144                         } else {
 145                                 psp_securedisplay_parse_resp_status(psp, securedisplay_cmd->status);
 146                         }
 147                 }
 148                 break;
 149         default:
 150                 dev_err(adev->dev, "Invalid input: %s\n", str);
 151         }
 152
 153         pm_runtime_mark_last_busy(dev->dev);
 154         pm_runtime_put_autosuspend(dev->dev);
 155
 156         return size;
 157 }
 158
 159 static const struct file_operations amdgpu_securedisplay_debugfs_ops = {
 160         .owner = THIS_MODULE,
 161         .read = NULL,
 162         .write = amdgpu_securedisplay_debugfs_write,
 163         .llseek = default_llseek
 164 };
 165
 166 void amdgpu_securedisplay_debugfs_init(struct amdgpu_device *adev)
 167 {
 168 #if defined(CONFIG_DEBUG_FS)
 169
 170         if (!adev->psp.securedisplay_context.securedisplay_initialized)
 171                 return;
 172
 173         debugfs_create_file("securedisplay_test", S_IWUSR, adev_to_drm(adev)->primary->debugfs_root,
 174                                 adev, &amdgpu_securedisplay_debugfs_ops);
 175 #endif
 176 }