1 // SPDX-License-Identifier: GPL-2.0
3 * USB4 specific functionality
5 * Copyright (C) 2019, Intel Corporation
10 #include <linux/delay.h>
11 #include <linux/ktime.h>
16 #define USB4_DATA_DWORDS 16
17 #define USB4_DATA_RETRIES 3
20 USB4_SB_TARGET_ROUTER,
21 USB4_SB_TARGET_PARTNER,
22 USB4_SB_TARGET_RETIMER,
25 #define USB4_NVM_READ_OFFSET_MASK GENMASK(23, 2)
26 #define USB4_NVM_READ_OFFSET_SHIFT 2
27 #define USB4_NVM_READ_LENGTH_MASK GENMASK(27, 24)
28 #define USB4_NVM_READ_LENGTH_SHIFT 24
30 #define USB4_NVM_SET_OFFSET_MASK USB4_NVM_READ_OFFSET_MASK
31 #define USB4_NVM_SET_OFFSET_SHIFT USB4_NVM_READ_OFFSET_SHIFT
33 #define USB4_DROM_ADDRESS_MASK GENMASK(14, 2)
34 #define USB4_DROM_ADDRESS_SHIFT 2
35 #define USB4_DROM_SIZE_MASK GENMASK(19, 15)
36 #define USB4_DROM_SIZE_SHIFT 15
38 #define USB4_NVM_SECTOR_SIZE_MASK GENMASK(23, 0)
40 typedef int (*read_block_fn)(void *, unsigned int, void *, size_t);
41 typedef int (*write_block_fn)(void *, const void *, size_t);
43 static int usb4_switch_wait_for_bit(struct tb_switch *sw, u32 offset, u32 bit,
44 u32 value, int timeout_msec)
46 ktime_t timeout = ktime_add_ms(ktime_get(), timeout_msec);
52 ret = tb_sw_read(sw, &val, TB_CFG_SWITCH, offset, 1);
56 if ((val & bit) == value)
59 usleep_range(50, 100);
60 } while (ktime_before(ktime_get(), timeout));
65 static int usb4_do_read_data(u16 address, void *buf, size_t size,
66 read_block_fn read_block, void *read_block_data)
68 unsigned int retries = USB4_DATA_RETRIES;
72 address = address & ~3;
75 size_t nbytes = min_t(size_t, size, USB4_DATA_DWORDS * 4);
76 unsigned int dwaddress, dwords;
77 u8 data[USB4_DATA_DWORDS * 4];
80 dwaddress = address / 4;
81 dwords = ALIGN(nbytes, 4) / 4;
83 ret = read_block(read_block_data, dwaddress, data, dwords);
85 if (ret != -ENODEV && retries--)
90 memcpy(buf, data + offset, nbytes);
100 static int usb4_do_write_data(unsigned int address, const void *buf, size_t size,
101 write_block_fn write_next_block, void *write_block_data)
103 unsigned int retries = USB4_DATA_RETRIES;
106 offset = address & 3;
107 address = address & ~3;
110 u32 nbytes = min_t(u32, size, USB4_DATA_DWORDS * 4);
111 u8 data[USB4_DATA_DWORDS * 4];
114 memcpy(data + offset, buf, nbytes);
116 ret = write_next_block(write_block_data, data, nbytes / 4);
118 if (ret == -ETIMEDOUT) {
134 static int usb4_native_switch_op(struct tb_switch *sw, u16 opcode,
135 u32 *metadata, u8 *status,
136 const void *tx_data, size_t tx_dwords,
137 void *rx_data, size_t rx_dwords)
143 ret = tb_sw_write(sw, metadata, TB_CFG_SWITCH, ROUTER_CS_25, 1);
148 ret = tb_sw_write(sw, tx_data, TB_CFG_SWITCH, ROUTER_CS_9,
154 val = opcode | ROUTER_CS_26_OV;
155 ret = tb_sw_write(sw, &val, TB_CFG_SWITCH, ROUTER_CS_26, 1);
159 ret = usb4_switch_wait_for_bit(sw, ROUTER_CS_26, ROUTER_CS_26_OV, 0, 500);
163 ret = tb_sw_read(sw, &val, TB_CFG_SWITCH, ROUTER_CS_26, 1);
167 if (val & ROUTER_CS_26_ONS)
171 *status = (val & ROUTER_CS_26_STATUS_MASK) >>
172 ROUTER_CS_26_STATUS_SHIFT;
175 ret = tb_sw_read(sw, metadata, TB_CFG_SWITCH, ROUTER_CS_25, 1);
180 ret = tb_sw_read(sw, rx_data, TB_CFG_SWITCH, ROUTER_CS_9,
189 static int __usb4_switch_op(struct tb_switch *sw, u16 opcode, u32 *metadata,
190 u8 *status, const void *tx_data, size_t tx_dwords,
191 void *rx_data, size_t rx_dwords)
193 const struct tb_cm_ops *cm_ops = sw->tb->cm_ops;
195 if (tx_dwords > USB4_DATA_DWORDS || rx_dwords > USB4_DATA_DWORDS)
199 * If the connection manager implementation provides USB4 router
200 * operation proxy callback, call it here instead of running the
201 * operation natively.
203 if (cm_ops->usb4_switch_op) {
206 ret = cm_ops->usb4_switch_op(sw, opcode, metadata, status,
207 tx_data, tx_dwords, rx_data,
209 if (ret != -EOPNOTSUPP)
213 * If the proxy was not supported then run the native
214 * router operation instead.
218 return usb4_native_switch_op(sw, opcode, metadata, status, tx_data,
219 tx_dwords, rx_data, rx_dwords);
222 static inline int usb4_switch_op(struct tb_switch *sw, u16 opcode,
223 u32 *metadata, u8 *status)
225 return __usb4_switch_op(sw, opcode, metadata, status, NULL, 0, NULL, 0);
228 static inline int usb4_switch_op_data(struct tb_switch *sw, u16 opcode,
229 u32 *metadata, u8 *status,
230 const void *tx_data, size_t tx_dwords,
231 void *rx_data, size_t rx_dwords)
233 return __usb4_switch_op(sw, opcode, metadata, status, tx_data,
234 tx_dwords, rx_data, rx_dwords);
237 static void usb4_switch_check_wakes(struct tb_switch *sw)
239 struct tb_port *port;
243 if (!device_may_wakeup(&sw->dev))
247 if (tb_sw_read(sw, &val, TB_CFG_SWITCH, ROUTER_CS_6, 1))
250 tb_sw_dbg(sw, "PCIe wake: %s, USB3 wake: %s\n",
251 (val & ROUTER_CS_6_WOPS) ? "yes" : "no",
252 (val & ROUTER_CS_6_WOUS) ? "yes" : "no");
254 wakeup = val & (ROUTER_CS_6_WOPS | ROUTER_CS_6_WOUS);
257 /* Check for any connected downstream ports for USB4 wake */
258 tb_switch_for_each_port(sw, port) {
259 if (!tb_port_has_remote(port))
262 if (tb_port_read(port, &val, TB_CFG_PORT,
263 port->cap_usb4 + PORT_CS_18, 1))
266 tb_port_dbg(port, "USB4 wake: %s\n",
267 (val & PORT_CS_18_WOU4S) ? "yes" : "no");
269 if (val & PORT_CS_18_WOU4S)
274 pm_wakeup_event(&sw->dev, 0);
277 static bool link_is_usb4(struct tb_port *port)
284 if (tb_port_read(port, &val, TB_CFG_PORT,
285 port->cap_usb4 + PORT_CS_18, 1))
288 return !(val & PORT_CS_18_TCM);
292 * usb4_switch_setup() - Additional setup for USB4 device
293 * @sw: USB4 router to setup
295 * USB4 routers need additional settings in order to enable all the
296 * tunneling. This function enables USB and PCIe tunneling if it can be
297 * enabled (e.g the parent switch also supports them). If USB tunneling
298 * is not available for some reason (like that there is Thunderbolt 3
299 * switch upstream) then the internal xHCI controller is enabled
302 int usb4_switch_setup(struct tb_switch *sw)
304 struct tb_port *downstream_port;
305 struct tb_switch *parent;
310 usb4_switch_check_wakes(sw);
315 ret = tb_sw_read(sw, &val, TB_CFG_SWITCH, ROUTER_CS_6, 1);
319 parent = tb_switch_parent(sw);
320 downstream_port = tb_port_at(tb_route(sw), parent);
321 sw->link_usb4 = link_is_usb4(downstream_port);
322 tb_sw_dbg(sw, "link: %s\n", sw->link_usb4 ? "USB4" : "TBT3");
324 xhci = val & ROUTER_CS_6_HCI;
325 tbt3 = !(val & ROUTER_CS_6_TNS);
327 tb_sw_dbg(sw, "TBT3 support: %s, xHCI: %s\n",
328 tbt3 ? "yes" : "no", xhci ? "yes" : "no");
330 ret = tb_sw_read(sw, &val, TB_CFG_SWITCH, ROUTER_CS_5, 1);
334 if (tb_acpi_may_tunnel_usb3() && sw->link_usb4 &&
335 tb_switch_find_port(parent, TB_TYPE_USB3_DOWN)) {
336 val |= ROUTER_CS_5_UTO;
341 * Only enable PCIe tunneling if the parent router supports it
342 * and it is not disabled.
344 if (tb_acpi_may_tunnel_pcie() &&
345 tb_switch_find_port(parent, TB_TYPE_PCIE_DOWN)) {
346 val |= ROUTER_CS_5_PTO;
348 * xHCI can be enabled if PCIe tunneling is supported
349 * and the parent does not have any USB3 dowstream
350 * adapters (so we cannot do USB 3.x tunneling).
353 val |= ROUTER_CS_5_HCO;
356 /* TBT3 supported by the CM */
357 val |= ROUTER_CS_5_C3S;
358 /* Tunneling configuration is ready now */
359 val |= ROUTER_CS_5_CV;
361 ret = tb_sw_write(sw, &val, TB_CFG_SWITCH, ROUTER_CS_5, 1);
365 return usb4_switch_wait_for_bit(sw, ROUTER_CS_6, ROUTER_CS_6_CR,
370 * usb4_switch_read_uid() - Read UID from USB4 router
372 * @uid: UID is stored here
374 * Reads 64-bit UID from USB4 router config space.
376 int usb4_switch_read_uid(struct tb_switch *sw, u64 *uid)
378 return tb_sw_read(sw, uid, TB_CFG_SWITCH, ROUTER_CS_7, 2);
381 static int usb4_switch_drom_read_block(void *data,
382 unsigned int dwaddress, void *buf,
385 struct tb_switch *sw = data;
390 metadata = (dwords << USB4_DROM_SIZE_SHIFT) & USB4_DROM_SIZE_MASK;
391 metadata |= (dwaddress << USB4_DROM_ADDRESS_SHIFT) &
392 USB4_DROM_ADDRESS_MASK;
394 ret = usb4_switch_op_data(sw, USB4_SWITCH_OP_DROM_READ, &metadata,
395 &status, NULL, 0, buf, dwords);
399 return status ? -EIO : 0;
403 * usb4_switch_drom_read() - Read arbitrary bytes from USB4 router DROM
405 * @address: Byte address inside DROM to start reading
406 * @buf: Buffer where the DROM content is stored
407 * @size: Number of bytes to read from DROM
409 * Uses USB4 router operations to read router DROM. For devices this
410 * should always work but for hosts it may return %-EOPNOTSUPP in which
411 * case the host router does not have DROM.
413 int usb4_switch_drom_read(struct tb_switch *sw, unsigned int address, void *buf,
416 return usb4_do_read_data(address, buf, size,
417 usb4_switch_drom_read_block, sw);
421 * usb4_switch_lane_bonding_possible() - Are conditions met for lane bonding
424 * Checks whether conditions are met so that lane bonding can be
425 * established with the upstream router. Call only for device routers.
427 bool usb4_switch_lane_bonding_possible(struct tb_switch *sw)
433 up = tb_upstream_port(sw);
434 ret = tb_port_read(up, &val, TB_CFG_PORT, up->cap_usb4 + PORT_CS_18, 1);
438 return !!(val & PORT_CS_18_BE);
442 * usb4_switch_set_wake() - Enabled/disable wake
444 * @flags: Wakeup flags (%0 to disable)
446 * Enables/disables router to wake up from sleep.
448 int usb4_switch_set_wake(struct tb_switch *sw, unsigned int flags)
450 struct tb_port *port;
451 u64 route = tb_route(sw);
456 * Enable wakes coming from all USB4 downstream ports (from
457 * child routers). For device routers do this also for the
458 * upstream USB4 port.
460 tb_switch_for_each_port(sw, port) {
461 if (!tb_port_is_null(port))
463 if (!route && tb_is_upstream_port(port))
468 ret = tb_port_read(port, &val, TB_CFG_PORT,
469 port->cap_usb4 + PORT_CS_19, 1);
473 val &= ~(PORT_CS_19_WOC | PORT_CS_19_WOD | PORT_CS_19_WOU4);
475 if (flags & TB_WAKE_ON_CONNECT)
476 val |= PORT_CS_19_WOC;
477 if (flags & TB_WAKE_ON_DISCONNECT)
478 val |= PORT_CS_19_WOD;
479 if (flags & TB_WAKE_ON_USB4)
480 val |= PORT_CS_19_WOU4;
482 ret = tb_port_write(port, &val, TB_CFG_PORT,
483 port->cap_usb4 + PORT_CS_19, 1);
489 * Enable wakes from PCIe and USB 3.x on this router. Only
490 * needed for device routers.
493 ret = tb_sw_read(sw, &val, TB_CFG_SWITCH, ROUTER_CS_5, 1);
497 val &= ~(ROUTER_CS_5_WOP | ROUTER_CS_5_WOU);
498 if (flags & TB_WAKE_ON_USB3)
499 val |= ROUTER_CS_5_WOU;
500 if (flags & TB_WAKE_ON_PCIE)
501 val |= ROUTER_CS_5_WOP;
503 ret = tb_sw_write(sw, &val, TB_CFG_SWITCH, ROUTER_CS_5, 1);
512 * usb4_switch_set_sleep() - Prepare the router to enter sleep
515 * Sets sleep bit for the router. Returns when the router sleep ready
516 * bit has been asserted.
518 int usb4_switch_set_sleep(struct tb_switch *sw)
523 /* Set sleep bit and wait for sleep ready to be asserted */
524 ret = tb_sw_read(sw, &val, TB_CFG_SWITCH, ROUTER_CS_5, 1);
528 val |= ROUTER_CS_5_SLP;
530 ret = tb_sw_write(sw, &val, TB_CFG_SWITCH, ROUTER_CS_5, 1);
534 return usb4_switch_wait_for_bit(sw, ROUTER_CS_6, ROUTER_CS_6_SLPR,
535 ROUTER_CS_6_SLPR, 500);
539 * usb4_switch_nvm_sector_size() - Return router NVM sector size
542 * If the router supports NVM operations this function returns the NVM
543 * sector size in bytes. If NVM operations are not supported returns
546 int usb4_switch_nvm_sector_size(struct tb_switch *sw)
552 ret = usb4_switch_op(sw, USB4_SWITCH_OP_NVM_SECTOR_SIZE, &metadata,
558 return status == 0x2 ? -EOPNOTSUPP : -EIO;
560 return metadata & USB4_NVM_SECTOR_SIZE_MASK;
563 static int usb4_switch_nvm_read_block(void *data,
564 unsigned int dwaddress, void *buf, size_t dwords)
566 struct tb_switch *sw = data;
571 metadata = (dwords << USB4_NVM_READ_LENGTH_SHIFT) &
572 USB4_NVM_READ_LENGTH_MASK;
573 metadata |= (dwaddress << USB4_NVM_READ_OFFSET_SHIFT) &
574 USB4_NVM_READ_OFFSET_MASK;
576 ret = usb4_switch_op_data(sw, USB4_SWITCH_OP_NVM_READ, &metadata,
577 &status, NULL, 0, buf, dwords);
581 return status ? -EIO : 0;
585 * usb4_switch_nvm_read() - Read arbitrary bytes from router NVM
587 * @address: Starting address in bytes
588 * @buf: Read data is placed here
589 * @size: How many bytes to read
591 * Reads NVM contents of the router. If NVM is not supported returns
594 int usb4_switch_nvm_read(struct tb_switch *sw, unsigned int address, void *buf,
597 return usb4_do_read_data(address, buf, size,
598 usb4_switch_nvm_read_block, sw);
601 static int usb4_switch_nvm_set_offset(struct tb_switch *sw,
602 unsigned int address)
604 u32 metadata, dwaddress;
608 dwaddress = address / 4;
609 metadata = (dwaddress << USB4_NVM_SET_OFFSET_SHIFT) &
610 USB4_NVM_SET_OFFSET_MASK;
612 ret = usb4_switch_op(sw, USB4_SWITCH_OP_NVM_SET_OFFSET, &metadata,
617 return status ? -EIO : 0;
620 static int usb4_switch_nvm_write_next_block(void *data, const void *buf,
623 struct tb_switch *sw = data;
627 ret = usb4_switch_op_data(sw, USB4_SWITCH_OP_NVM_WRITE, NULL, &status,
628 buf, dwords, NULL, 0);
632 return status ? -EIO : 0;
636 * usb4_switch_nvm_write() - Write to the router NVM
638 * @address: Start address where to write in bytes
639 * @buf: Pointer to the data to write
640 * @size: Size of @buf in bytes
642 * Writes @buf to the router NVM using USB4 router operations. If NVM
643 * write is not supported returns %-EOPNOTSUPP.
645 int usb4_switch_nvm_write(struct tb_switch *sw, unsigned int address,
646 const void *buf, size_t size)
650 ret = usb4_switch_nvm_set_offset(sw, address);
654 return usb4_do_write_data(address, buf, size,
655 usb4_switch_nvm_write_next_block, sw);
659 * usb4_switch_nvm_authenticate() - Authenticate new NVM
662 * After the new NVM has been written via usb4_switch_nvm_write(), this
663 * function triggers NVM authentication process. The router gets power
664 * cycled and if the authentication is successful the new NVM starts
665 * running. In case of failure returns negative errno.
667 * The caller should call usb4_switch_nvm_authenticate_status() to read
668 * the status of the authentication after power cycle. It should be the
669 * first router operation to avoid the status being lost.
671 int usb4_switch_nvm_authenticate(struct tb_switch *sw)
675 ret = usb4_switch_op(sw, USB4_SWITCH_OP_NVM_AUTH, NULL, NULL);
678 * The router is power cycled once NVM_AUTH is started so it is
679 * expected to get any of the following errors back.
692 * usb4_switch_nvm_authenticate_status() - Read status of last NVM authenticate
694 * @status: Status code of the operation
696 * The function checks if there is status available from the last NVM
697 * authenticate router operation. If there is status then %0 is returned
698 * and the status code is placed in @status. Returns negative errno in case
701 * Must be called before any other router operation.
703 int usb4_switch_nvm_authenticate_status(struct tb_switch *sw, u32 *status)
705 const struct tb_cm_ops *cm_ops = sw->tb->cm_ops;
710 if (cm_ops->usb4_switch_nvm_authenticate_status) {
711 ret = cm_ops->usb4_switch_nvm_authenticate_status(sw, status);
712 if (ret != -EOPNOTSUPP)
716 ret = tb_sw_read(sw, &val, TB_CFG_SWITCH, ROUTER_CS_26, 1);
720 /* Check that the opcode is correct */
721 opcode = val & ROUTER_CS_26_OPCODE_MASK;
722 if (opcode == USB4_SWITCH_OP_NVM_AUTH) {
723 if (val & ROUTER_CS_26_OV)
725 if (val & ROUTER_CS_26_ONS)
728 *status = (val & ROUTER_CS_26_STATUS_MASK) >>
729 ROUTER_CS_26_STATUS_SHIFT;
738 * usb4_switch_query_dp_resource() - Query availability of DP IN resource
742 * For DP tunneling this function can be used to query availability of
743 * DP IN resource. Returns true if the resource is available for DP
744 * tunneling, false otherwise.
746 bool usb4_switch_query_dp_resource(struct tb_switch *sw, struct tb_port *in)
748 u32 metadata = in->port;
752 ret = usb4_switch_op(sw, USB4_SWITCH_OP_QUERY_DP_RESOURCE, &metadata,
755 * If DP resource allocation is not supported assume it is
758 if (ret == -EOPNOTSUPP)
767 * usb4_switch_alloc_dp_resource() - Allocate DP IN resource
771 * Allocates DP IN resource for DP tunneling using USB4 router
772 * operations. If the resource was allocated returns %0. Otherwise
773 * returns negative errno, in particular %-EBUSY if the resource is
776 int usb4_switch_alloc_dp_resource(struct tb_switch *sw, struct tb_port *in)
778 u32 metadata = in->port;
782 ret = usb4_switch_op(sw, USB4_SWITCH_OP_ALLOC_DP_RESOURCE, &metadata,
784 if (ret == -EOPNOTSUPP)
789 return status ? -EBUSY : 0;
793 * usb4_switch_dealloc_dp_resource() - Releases allocated DP IN resource
797 * Releases the previously allocated DP IN resource.
799 int usb4_switch_dealloc_dp_resource(struct tb_switch *sw, struct tb_port *in)
801 u32 metadata = in->port;
805 ret = usb4_switch_op(sw, USB4_SWITCH_OP_DEALLOC_DP_RESOURCE, &metadata,
807 if (ret == -EOPNOTSUPP)
812 return status ? -EIO : 0;
815 static int usb4_port_idx(const struct tb_switch *sw, const struct tb_port *port)
820 /* Assume port is primary */
821 tb_switch_for_each_port(sw, p) {
822 if (!tb_port_is_null(p))
824 if (tb_is_upstream_port(p))
837 * usb4_switch_map_pcie_down() - Map USB4 port to a PCIe downstream adapter
841 * USB4 routers have direct mapping between USB4 ports and PCIe
842 * downstream adapters where the PCIe topology is extended. This
843 * function returns the corresponding downstream PCIe adapter or %NULL
844 * if no such mapping was possible.
846 struct tb_port *usb4_switch_map_pcie_down(struct tb_switch *sw,
847 const struct tb_port *port)
849 int usb4_idx = usb4_port_idx(sw, port);
853 /* Find PCIe down port matching usb4_port */
854 tb_switch_for_each_port(sw, p) {
855 if (!tb_port_is_pcie_down(p))
858 if (pcie_idx == usb4_idx)
868 * usb4_switch_map_usb3_down() - Map USB4 port to a USB3 downstream adapter
872 * USB4 routers have direct mapping between USB4 ports and USB 3.x
873 * downstream adapters where the USB 3.x topology is extended. This
874 * function returns the corresponding downstream USB 3.x adapter or
875 * %NULL if no such mapping was possible.
877 struct tb_port *usb4_switch_map_usb3_down(struct tb_switch *sw,
878 const struct tb_port *port)
880 int usb4_idx = usb4_port_idx(sw, port);
884 /* Find USB3 down port matching usb4_port */
885 tb_switch_for_each_port(sw, p) {
886 if (!tb_port_is_usb3_down(p))
889 if (usb_idx == usb4_idx)
899 * usb4_port_unlock() - Unlock USB4 downstream port
900 * @port: USB4 port to unlock
902 * Unlocks USB4 downstream port so that the connection manager can
903 * access the router below this port.
905 int usb4_port_unlock(struct tb_port *port)
910 ret = tb_port_read(port, &val, TB_CFG_PORT, ADP_CS_4, 1);
914 val &= ~ADP_CS_4_LCK;
915 return tb_port_write(port, &val, TB_CFG_PORT, ADP_CS_4, 1);
918 static int usb4_port_set_configured(struct tb_port *port, bool configured)
926 ret = tb_port_read(port, &val, TB_CFG_PORT,
927 port->cap_usb4 + PORT_CS_19, 1);
932 val |= PORT_CS_19_PC;
934 val &= ~PORT_CS_19_PC;
936 return tb_port_write(port, &val, TB_CFG_PORT,
937 port->cap_usb4 + PORT_CS_19, 1);
941 * usb4_port_configure() - Set USB4 port configured
944 * Sets the USB4 link to be configured for power management purposes.
946 int usb4_port_configure(struct tb_port *port)
948 return usb4_port_set_configured(port, true);
952 * usb4_port_unconfigure() - Set USB4 port unconfigured
955 * Sets the USB4 link to be unconfigured for power management purposes.
957 void usb4_port_unconfigure(struct tb_port *port)
959 usb4_port_set_configured(port, false);
962 static int usb4_set_xdomain_configured(struct tb_port *port, bool configured)
970 ret = tb_port_read(port, &val, TB_CFG_PORT,
971 port->cap_usb4 + PORT_CS_19, 1);
976 val |= PORT_CS_19_PID;
978 val &= ~PORT_CS_19_PID;
980 return tb_port_write(port, &val, TB_CFG_PORT,
981 port->cap_usb4 + PORT_CS_19, 1);
985 * usb4_port_configure_xdomain() - Configure port for XDomain
986 * @port: USB4 port connected to another host
988 * Marks the USB4 port as being connected to another host. Returns %0 in
989 * success and negative errno in failure.
991 int usb4_port_configure_xdomain(struct tb_port *port)
993 return usb4_set_xdomain_configured(port, true);
997 * usb4_port_unconfigure_xdomain() - Unconfigure port for XDomain
998 * @port: USB4 port that was connected to another host
1000 * Clears USB4 port from being marked as XDomain.
1002 void usb4_port_unconfigure_xdomain(struct tb_port *port)
1004 usb4_set_xdomain_configured(port, false);
1007 static int usb4_port_wait_for_bit(struct tb_port *port, u32 offset, u32 bit,
1008 u32 value, int timeout_msec)
1010 ktime_t timeout = ktime_add_ms(ktime_get(), timeout_msec);
1016 ret = tb_port_read(port, &val, TB_CFG_PORT, offset, 1);
1020 if ((val & bit) == value)
1023 usleep_range(50, 100);
1024 } while (ktime_before(ktime_get(), timeout));
1029 static int usb4_port_read_data(struct tb_port *port, void *data, size_t dwords)
1031 if (dwords > USB4_DATA_DWORDS)
1034 return tb_port_read(port, data, TB_CFG_PORT, port->cap_usb4 + PORT_CS_2,
1038 static int usb4_port_write_data(struct tb_port *port, const void *data,
1041 if (dwords > USB4_DATA_DWORDS)
1044 return tb_port_write(port, data, TB_CFG_PORT, port->cap_usb4 + PORT_CS_2,
1048 static int usb4_port_sb_read(struct tb_port *port, enum usb4_sb_target target,
1049 u8 index, u8 reg, void *buf, u8 size)
1051 size_t dwords = DIV_ROUND_UP(size, 4);
1055 if (!port->cap_usb4)
1059 val |= size << PORT_CS_1_LENGTH_SHIFT;
1060 val |= (target << PORT_CS_1_TARGET_SHIFT) & PORT_CS_1_TARGET_MASK;
1061 if (target == USB4_SB_TARGET_RETIMER)
1062 val |= (index << PORT_CS_1_RETIMER_INDEX_SHIFT);
1063 val |= PORT_CS_1_PND;
1065 ret = tb_port_write(port, &val, TB_CFG_PORT,
1066 port->cap_usb4 + PORT_CS_1, 1);
1070 ret = usb4_port_wait_for_bit(port, port->cap_usb4 + PORT_CS_1,
1071 PORT_CS_1_PND, 0, 500);
1075 ret = tb_port_read(port, &val, TB_CFG_PORT,
1076 port->cap_usb4 + PORT_CS_1, 1);
1080 if (val & PORT_CS_1_NR)
1082 if (val & PORT_CS_1_RC)
1085 return buf ? usb4_port_read_data(port, buf, dwords) : 0;
1088 static int usb4_port_sb_write(struct tb_port *port, enum usb4_sb_target target,
1089 u8 index, u8 reg, const void *buf, u8 size)
1091 size_t dwords = DIV_ROUND_UP(size, 4);
1095 if (!port->cap_usb4)
1099 ret = usb4_port_write_data(port, buf, dwords);
1105 val |= size << PORT_CS_1_LENGTH_SHIFT;
1106 val |= PORT_CS_1_WNR_WRITE;
1107 val |= (target << PORT_CS_1_TARGET_SHIFT) & PORT_CS_1_TARGET_MASK;
1108 if (target == USB4_SB_TARGET_RETIMER)
1109 val |= (index << PORT_CS_1_RETIMER_INDEX_SHIFT);
1110 val |= PORT_CS_1_PND;
1112 ret = tb_port_write(port, &val, TB_CFG_PORT,
1113 port->cap_usb4 + PORT_CS_1, 1);
1117 ret = usb4_port_wait_for_bit(port, port->cap_usb4 + PORT_CS_1,
1118 PORT_CS_1_PND, 0, 500);
1122 ret = tb_port_read(port, &val, TB_CFG_PORT,
1123 port->cap_usb4 + PORT_CS_1, 1);
1127 if (val & PORT_CS_1_NR)
1129 if (val & PORT_CS_1_RC)
1135 static int usb4_port_sb_op(struct tb_port *port, enum usb4_sb_target target,
1136 u8 index, enum usb4_sb_opcode opcode, int timeout_msec)
1143 ret = usb4_port_sb_write(port, target, index, USB4_SB_OPCODE, &val,
1148 timeout = ktime_add_ms(ktime_get(), timeout_msec);
1152 ret = usb4_port_sb_read(port, target, index, USB4_SB_OPCODE,
1161 case USB4_SB_OPCODE_ERR:
1164 case USB4_SB_OPCODE_ONS:
1172 } while (ktime_before(ktime_get(), timeout));
1178 * usb4_port_enumerate_retimers() - Send RT broadcast transaction
1181 * This forces the USB4 port to send broadcast RT transaction which
1182 * makes the retimers on the link to assign index to themselves. Returns
1183 * %0 in case of success and negative errno if there was an error.
1185 int usb4_port_enumerate_retimers(struct tb_port *port)
1189 val = USB4_SB_OPCODE_ENUMERATE_RETIMERS;
1190 return usb4_port_sb_write(port, USB4_SB_TARGET_ROUTER, 0,
1191 USB4_SB_OPCODE, &val, sizeof(val));
1194 static inline int usb4_port_retimer_op(struct tb_port *port, u8 index,
1195 enum usb4_sb_opcode opcode,
1198 return usb4_port_sb_op(port, USB4_SB_TARGET_RETIMER, index, opcode,
1203 * usb4_port_retimer_read() - Read from retimer sideband registers
1205 * @index: Retimer index
1206 * @reg: Sideband register to read
1207 * @buf: Data from @reg is stored here
1208 * @size: Number of bytes to read
1210 * Function reads retimer sideband registers starting from @reg. The
1211 * retimer is connected to @port at @index. Returns %0 in case of
1212 * success, and read data is copied to @buf. If there is no retimer
1213 * present at given @index returns %-ENODEV. In any other failure
1214 * returns negative errno.
1216 int usb4_port_retimer_read(struct tb_port *port, u8 index, u8 reg, void *buf,
1219 return usb4_port_sb_read(port, USB4_SB_TARGET_RETIMER, index, reg, buf,
1224 * usb4_port_retimer_write() - Write to retimer sideband registers
1226 * @index: Retimer index
1227 * @reg: Sideband register to write
1228 * @buf: Data that is written starting from @reg
1229 * @size: Number of bytes to write
1231 * Writes retimer sideband registers starting from @reg. The retimer is
1232 * connected to @port at @index. Returns %0 in case of success. If there
1233 * is no retimer present at given @index returns %-ENODEV. In any other
1234 * failure returns negative errno.
1236 int usb4_port_retimer_write(struct tb_port *port, u8 index, u8 reg,
1237 const void *buf, u8 size)
1239 return usb4_port_sb_write(port, USB4_SB_TARGET_RETIMER, index, reg, buf,
1244 * usb4_port_retimer_is_last() - Is the retimer last on-board retimer
1246 * @index: Retimer index
1248 * If the retimer at @index is last one (connected directly to the
1249 * Type-C port) this function returns %1. If it is not returns %0. If
1250 * the retimer is not present returns %-ENODEV. Otherwise returns
1253 int usb4_port_retimer_is_last(struct tb_port *port, u8 index)
1258 ret = usb4_port_retimer_op(port, index, USB4_SB_OPCODE_QUERY_LAST_RETIMER,
1263 ret = usb4_port_retimer_read(port, index, USB4_SB_METADATA, &metadata,
1265 return ret ? ret : metadata & 1;
1269 * usb4_port_retimer_nvm_sector_size() - Read retimer NVM sector size
1271 * @index: Retimer index
1273 * Reads NVM sector size (in bytes) of a retimer at @index. This
1274 * operation can be used to determine whether the retimer supports NVM
1275 * upgrade for example. Returns sector size in bytes or negative errno
1276 * in case of error. Specifically returns %-ENODEV if there is no
1277 * retimer at @index.
1279 int usb4_port_retimer_nvm_sector_size(struct tb_port *port, u8 index)
1284 ret = usb4_port_retimer_op(port, index, USB4_SB_OPCODE_GET_NVM_SECTOR_SIZE,
1289 ret = usb4_port_retimer_read(port, index, USB4_SB_METADATA, &metadata,
1291 return ret ? ret : metadata & USB4_NVM_SECTOR_SIZE_MASK;
1294 static int usb4_port_retimer_nvm_set_offset(struct tb_port *port, u8 index,
1295 unsigned int address)
1297 u32 metadata, dwaddress;
1300 dwaddress = address / 4;
1301 metadata = (dwaddress << USB4_NVM_SET_OFFSET_SHIFT) &
1302 USB4_NVM_SET_OFFSET_MASK;
1304 ret = usb4_port_retimer_write(port, index, USB4_SB_METADATA, &metadata,
1309 return usb4_port_retimer_op(port, index, USB4_SB_OPCODE_NVM_SET_OFFSET,
1313 struct retimer_info {
1314 struct tb_port *port;
1318 static int usb4_port_retimer_nvm_write_next_block(void *data, const void *buf,
1322 const struct retimer_info *info = data;
1323 struct tb_port *port = info->port;
1324 u8 index = info->index;
1327 ret = usb4_port_retimer_write(port, index, USB4_SB_DATA,
1332 return usb4_port_retimer_op(port, index,
1333 USB4_SB_OPCODE_NVM_BLOCK_WRITE, 1000);
1337 * usb4_port_retimer_nvm_write() - Write to retimer NVM
1339 * @index: Retimer index
1340 * @address: Byte address where to start the write
1341 * @buf: Data to write
1342 * @size: Size in bytes how much to write
1344 * Writes @size bytes from @buf to the retimer NVM. Used for NVM
1345 * upgrade. Returns %0 if the data was written successfully and negative
1346 * errno in case of failure. Specifically returns %-ENODEV if there is
1347 * no retimer at @index.
1349 int usb4_port_retimer_nvm_write(struct tb_port *port, u8 index, unsigned int address,
1350 const void *buf, size_t size)
1352 struct retimer_info info = { .port = port, .index = index };
1355 ret = usb4_port_retimer_nvm_set_offset(port, index, address);
1359 return usb4_do_write_data(address, buf, size,
1360 usb4_port_retimer_nvm_write_next_block, &info);
1364 * usb4_port_retimer_nvm_authenticate() - Start retimer NVM upgrade
1366 * @index: Retimer index
1368 * After the new NVM image has been written via usb4_port_retimer_nvm_write()
1369 * this function can be used to trigger the NVM upgrade process. If
1370 * successful the retimer restarts with the new NVM and may not have the
1371 * index set so one needs to call usb4_port_enumerate_retimers() to
1372 * force index to be assigned.
1374 int usb4_port_retimer_nvm_authenticate(struct tb_port *port, u8 index)
1379 * We need to use the raw operation here because once the
1380 * authentication completes the retimer index is not set anymore
1381 * so we do not get back the status now.
1383 val = USB4_SB_OPCODE_NVM_AUTH_WRITE;
1384 return usb4_port_sb_write(port, USB4_SB_TARGET_RETIMER, index,
1385 USB4_SB_OPCODE, &val, sizeof(val));
1389 * usb4_port_retimer_nvm_authenticate_status() - Read status of NVM upgrade
1391 * @index: Retimer index
1392 * @status: Raw status code read from metadata
1394 * This can be called after usb4_port_retimer_nvm_authenticate() and
1395 * usb4_port_enumerate_retimers() to fetch status of the NVM upgrade.
1397 * Returns %0 if the authentication status was successfully read. The
1398 * completion metadata (the result) is then stored into @status. If
1399 * reading the status fails, returns negative errno.
1401 int usb4_port_retimer_nvm_authenticate_status(struct tb_port *port, u8 index,
1407 ret = usb4_port_retimer_read(port, index, USB4_SB_OPCODE, &val,
1417 case USB4_SB_OPCODE_ERR:
1418 ret = usb4_port_retimer_read(port, index, USB4_SB_METADATA,
1419 &metadata, sizeof(metadata));
1423 *status = metadata & USB4_SB_METADATA_NVM_AUTH_WRITE_MASK;
1426 case USB4_SB_OPCODE_ONS:
1434 static int usb4_port_retimer_nvm_read_block(void *data, unsigned int dwaddress,
1435 void *buf, size_t dwords)
1437 const struct retimer_info *info = data;
1438 struct tb_port *port = info->port;
1439 u8 index = info->index;
1443 metadata = dwaddress << USB4_NVM_READ_OFFSET_SHIFT;
1444 if (dwords < USB4_DATA_DWORDS)
1445 metadata |= dwords << USB4_NVM_READ_LENGTH_SHIFT;
1447 ret = usb4_port_retimer_write(port, index, USB4_SB_METADATA, &metadata,
1452 ret = usb4_port_retimer_op(port, index, USB4_SB_OPCODE_NVM_READ, 500);
1456 return usb4_port_retimer_read(port, index, USB4_SB_DATA, buf,
1461 * usb4_port_retimer_nvm_read() - Read contents of retimer NVM
1463 * @index: Retimer index
1464 * @address: NVM address (in bytes) to start reading
1465 * @buf: Data read from NVM is stored here
1466 * @size: Number of bytes to read
1468 * Reads retimer NVM and copies the contents to @buf. Returns %0 if the
1469 * read was successful and negative errno in case of failure.
1470 * Specifically returns %-ENODEV if there is no retimer at @index.
1472 int usb4_port_retimer_nvm_read(struct tb_port *port, u8 index,
1473 unsigned int address, void *buf, size_t size)
1475 struct retimer_info info = { .port = port, .index = index };
1477 return usb4_do_read_data(address, buf, size,
1478 usb4_port_retimer_nvm_read_block, &info);
1482 * usb4_usb3_port_max_link_rate() - Maximum support USB3 link rate
1483 * @port: USB3 adapter port
1485 * Return maximum supported link rate of a USB3 adapter in Mb/s.
1486 * Negative errno in case of error.
1488 int usb4_usb3_port_max_link_rate(struct tb_port *port)
1493 if (!tb_port_is_usb3_down(port) && !tb_port_is_usb3_up(port))
1496 ret = tb_port_read(port, &val, TB_CFG_PORT,
1497 port->cap_adap + ADP_USB3_CS_4, 1);
1501 lr = (val & ADP_USB3_CS_4_MSLR_MASK) >> ADP_USB3_CS_4_MSLR_SHIFT;
1502 return lr == ADP_USB3_CS_4_MSLR_20G ? 20000 : 10000;
1506 * usb4_usb3_port_actual_link_rate() - Established USB3 link rate
1507 * @port: USB3 adapter port
1509 * Return actual established link rate of a USB3 adapter in Mb/s. If the
1510 * link is not up returns %0 and negative errno in case of failure.
1512 int usb4_usb3_port_actual_link_rate(struct tb_port *port)
1517 if (!tb_port_is_usb3_down(port) && !tb_port_is_usb3_up(port))
1520 ret = tb_port_read(port, &val, TB_CFG_PORT,
1521 port->cap_adap + ADP_USB3_CS_4, 1);
1525 if (!(val & ADP_USB3_CS_4_ULV))
1528 lr = val & ADP_USB3_CS_4_ALR_MASK;
1529 return lr == ADP_USB3_CS_4_ALR_20G ? 20000 : 10000;
1532 static int usb4_usb3_port_cm_request(struct tb_port *port, bool request)
1537 if (!tb_port_is_usb3_down(port))
1539 if (tb_route(port->sw))
1542 ret = tb_port_read(port, &val, TB_CFG_PORT,
1543 port->cap_adap + ADP_USB3_CS_2, 1);
1548 val |= ADP_USB3_CS_2_CMR;
1550 val &= ~ADP_USB3_CS_2_CMR;
1552 ret = tb_port_write(port, &val, TB_CFG_PORT,
1553 port->cap_adap + ADP_USB3_CS_2, 1);
1558 * We can use val here directly as the CMR bit is in the same place
1559 * as HCA. Just mask out others.
1561 val &= ADP_USB3_CS_2_CMR;
1562 return usb4_port_wait_for_bit(port, port->cap_adap + ADP_USB3_CS_1,
1563 ADP_USB3_CS_1_HCA, val, 1500);
1566 static inline int usb4_usb3_port_set_cm_request(struct tb_port *port)
1568 return usb4_usb3_port_cm_request(port, true);
1571 static inline int usb4_usb3_port_clear_cm_request(struct tb_port *port)
1573 return usb4_usb3_port_cm_request(port, false);
1576 static unsigned int usb3_bw_to_mbps(u32 bw, u8 scale)
1578 unsigned long uframes;
1580 uframes = bw * 512UL << scale;
1581 return DIV_ROUND_CLOSEST(uframes * 8000, 1000 * 1000);
1584 static u32 mbps_to_usb3_bw(unsigned int mbps, u8 scale)
1586 unsigned long uframes;
1588 /* 1 uframe is 1/8 ms (125 us) -> 1 / 8000 s */
1589 uframes = ((unsigned long)mbps * 1000 * 1000) / 8000;
1590 return DIV_ROUND_UP(uframes, 512UL << scale);
1593 static int usb4_usb3_port_read_allocated_bandwidth(struct tb_port *port,
1600 ret = tb_port_read(port, &val, TB_CFG_PORT,
1601 port->cap_adap + ADP_USB3_CS_2, 1);
1605 ret = tb_port_read(port, &scale, TB_CFG_PORT,
1606 port->cap_adap + ADP_USB3_CS_3, 1);
1610 scale &= ADP_USB3_CS_3_SCALE_MASK;
1612 bw = val & ADP_USB3_CS_2_AUBW_MASK;
1613 *upstream_bw = usb3_bw_to_mbps(bw, scale);
1615 bw = (val & ADP_USB3_CS_2_ADBW_MASK) >> ADP_USB3_CS_2_ADBW_SHIFT;
1616 *downstream_bw = usb3_bw_to_mbps(bw, scale);
1622 * usb4_usb3_port_allocated_bandwidth() - Bandwidth allocated for USB3
1623 * @port: USB3 adapter port
1624 * @upstream_bw: Allocated upstream bandwidth is stored here
1625 * @downstream_bw: Allocated downstream bandwidth is stored here
1627 * Stores currently allocated USB3 bandwidth into @upstream_bw and
1628 * @downstream_bw in Mb/s. Returns %0 in case of success and negative
1631 int usb4_usb3_port_allocated_bandwidth(struct tb_port *port, int *upstream_bw,
1636 ret = usb4_usb3_port_set_cm_request(port);
1640 ret = usb4_usb3_port_read_allocated_bandwidth(port, upstream_bw,
1642 usb4_usb3_port_clear_cm_request(port);
1647 static int usb4_usb3_port_read_consumed_bandwidth(struct tb_port *port,
1654 ret = tb_port_read(port, &val, TB_CFG_PORT,
1655 port->cap_adap + ADP_USB3_CS_1, 1);
1659 ret = tb_port_read(port, &scale, TB_CFG_PORT,
1660 port->cap_adap + ADP_USB3_CS_3, 1);
1664 scale &= ADP_USB3_CS_3_SCALE_MASK;
1666 bw = val & ADP_USB3_CS_1_CUBW_MASK;
1667 *upstream_bw = usb3_bw_to_mbps(bw, scale);
1669 bw = (val & ADP_USB3_CS_1_CDBW_MASK) >> ADP_USB3_CS_1_CDBW_SHIFT;
1670 *downstream_bw = usb3_bw_to_mbps(bw, scale);
1675 static int usb4_usb3_port_write_allocated_bandwidth(struct tb_port *port,
1679 u32 val, ubw, dbw, scale;
1682 /* Read the used scale, hardware default is 0 */
1683 ret = tb_port_read(port, &scale, TB_CFG_PORT,
1684 port->cap_adap + ADP_USB3_CS_3, 1);
1688 scale &= ADP_USB3_CS_3_SCALE_MASK;
1689 ubw = mbps_to_usb3_bw(upstream_bw, scale);
1690 dbw = mbps_to_usb3_bw(downstream_bw, scale);
1692 ret = tb_port_read(port, &val, TB_CFG_PORT,
1693 port->cap_adap + ADP_USB3_CS_2, 1);
1697 val &= ~(ADP_USB3_CS_2_AUBW_MASK | ADP_USB3_CS_2_ADBW_MASK);
1698 val |= dbw << ADP_USB3_CS_2_ADBW_SHIFT;
1701 return tb_port_write(port, &val, TB_CFG_PORT,
1702 port->cap_adap + ADP_USB3_CS_2, 1);
1706 * usb4_usb3_port_allocate_bandwidth() - Allocate bandwidth for USB3
1707 * @port: USB3 adapter port
1708 * @upstream_bw: New upstream bandwidth
1709 * @downstream_bw: New downstream bandwidth
1711 * This can be used to set how much bandwidth is allocated for the USB3
1712 * tunneled isochronous traffic. @upstream_bw and @downstream_bw are the
1713 * new values programmed to the USB3 adapter allocation registers. If
1714 * the values are lower than what is currently consumed the allocation
1715 * is set to what is currently consumed instead (consumed bandwidth
1716 * cannot be taken away by CM). The actual new values are returned in
1717 * @upstream_bw and @downstream_bw.
1719 * Returns %0 in case of success and negative errno if there was a
1722 int usb4_usb3_port_allocate_bandwidth(struct tb_port *port, int *upstream_bw,
1725 int ret, consumed_up, consumed_down, allocate_up, allocate_down;
1727 ret = usb4_usb3_port_set_cm_request(port);
1731 ret = usb4_usb3_port_read_consumed_bandwidth(port, &consumed_up,
1736 /* Don't allow it go lower than what is consumed */
1737 allocate_up = max(*upstream_bw, consumed_up);
1738 allocate_down = max(*downstream_bw, consumed_down);
1740 ret = usb4_usb3_port_write_allocated_bandwidth(port, allocate_up,
1745 *upstream_bw = allocate_up;
1746 *downstream_bw = allocate_down;
1749 usb4_usb3_port_clear_cm_request(port);
1754 * usb4_usb3_port_release_bandwidth() - Release allocated USB3 bandwidth
1755 * @port: USB3 adapter port
1756 * @upstream_bw: New allocated upstream bandwidth
1757 * @downstream_bw: New allocated downstream bandwidth
1759 * Releases USB3 allocated bandwidth down to what is actually consumed.
1760 * The new bandwidth is returned in @upstream_bw and @downstream_bw.
1762 * Returns 0% in success and negative errno in case of failure.
1764 int usb4_usb3_port_release_bandwidth(struct tb_port *port, int *upstream_bw,
1767 int ret, consumed_up, consumed_down;
1769 ret = usb4_usb3_port_set_cm_request(port);
1773 ret = usb4_usb3_port_read_consumed_bandwidth(port, &consumed_up,
1779 * Always keep 1000 Mb/s to make sure xHCI has at least some
1780 * bandwidth available for isochronous traffic.
1782 if (consumed_up < 1000)
1784 if (consumed_down < 1000)
1785 consumed_down = 1000;
1787 ret = usb4_usb3_port_write_allocated_bandwidth(port, consumed_up,
1792 *upstream_bw = consumed_up;
1793 *downstream_bw = consumed_down;
1796 usb4_usb3_port_clear_cm_request(port);