drivers/kvm/vmx.c

   1 /*
   2  * Kernel-based Virtual Machine driver for Linux
   3  *
   4  * This module enables machines with Intel VT-x extensions to run virtual
   5  * machines without emulation or binary translation.
   6  *
   7  * Copyright (C) 2006 Qumranet, Inc.
   8  *
   9  * Authors:
  10  *   Avi Kivity   <[email protected]>
  11  *   Yaniv Kamay  <[email protected]>
  12  *
  13  * This work is licensed under the terms of the GNU GPL, version 2.  See
  14  * the COPYING file in the top-level directory.
  15  *
  16  */
  17
  18 #include "kvm.h"
  19 #include "x86_emulate.h"
  20 #include "irq.h"
  21 #include "vmx.h"
  22 #include "segment_descriptor.h"
  23
  24 #include <linux/module.h>
  25 #include <linux/kernel.h>
  26 #include <linux/mm.h>
  27 #include <linux/highmem.h>
  28 #include <linux/profile.h>
  29 #include <linux/sched.h>
  30
  31 #include <asm/io.h>
  32 #include <asm/desc.h>
  33
  34 MODULE_AUTHOR("Qumranet");
  35 MODULE_LICENSE("GPL");
  36
  37 struct vmcs {
  38         u32 revision_id;
  39         u32 abort;
  40         char data[0];
  41 };
  42
  43 struct vcpu_vmx {
  44         struct kvm_vcpu       vcpu;
  45         int                   launched;
  46         struct kvm_msr_entry *guest_msrs;
  47         struct kvm_msr_entry *host_msrs;
  48         int                   nmsrs;
  49         int                   save_nmsrs;
  50         int                   msr_offset_efer;
  51 #ifdef CONFIG_X86_64
  52         int                   msr_offset_kernel_gs_base;
  53 #endif
  54         struct vmcs          *vmcs;
  55         struct {
  56                 int           loaded;
  57                 u16           fs_sel, gs_sel, ldt_sel;
  58                 int           gs_ldt_reload_needed;
  59                 int           fs_reload_needed;
  60         }host_state;
  61
  62 };
  63
  64 static inline struct vcpu_vmx *to_vmx(struct kvm_vcpu *vcpu)
  65 {
  66         return container_of(vcpu, struct vcpu_vmx, vcpu);
  67 }
  68
  69 static int init_rmode_tss(struct kvm *kvm);
  70
  71 static DEFINE_PER_CPU(struct vmcs *, vmxarea);
  72 static DEFINE_PER_CPU(struct vmcs *, current_vmcs);
  73
  74 static struct page *vmx_io_bitmap_a;
  75 static struct page *vmx_io_bitmap_b;
  76
  77 #define EFER_SAVE_RESTORE_BITS ((u64)EFER_SCE)
  78
  79 static struct vmcs_config {
  80         int size;
  81         int order;
  82         u32 revision_id;
  83         u32 pin_based_exec_ctrl;
  84         u32 cpu_based_exec_ctrl;
  85         u32 vmexit_ctrl;
  86         u32 vmentry_ctrl;
  87 } vmcs_config;
  88
  89 #define VMX_SEGMENT_FIELD(seg)                                  \
  90         [VCPU_SREG_##seg] = {                                   \
  91                 .selector = GUEST_##seg##_SELECTOR,             \
  92                 .base = GUEST_##seg##_BASE,                     \
  93                 .limit = GUEST_##seg##_LIMIT,                   \
  94                 .ar_bytes = GUEST_##seg##_AR_BYTES,             \
  95         }
  96
  97 static struct kvm_vmx_segment_field {
  98         unsigned selector;
  99         unsigned base;
 100         unsigned limit;
 101         unsigned ar_bytes;
 102 } kvm_vmx_segment_fields[] = {
 103         VMX_SEGMENT_FIELD(CS),
 104         VMX_SEGMENT_FIELD(DS),
 105         VMX_SEGMENT_FIELD(ES),
 106         VMX_SEGMENT_FIELD(FS),
 107         VMX_SEGMENT_FIELD(GS),
 108         VMX_SEGMENT_FIELD(SS),
 109         VMX_SEGMENT_FIELD(TR),
 110         VMX_SEGMENT_FIELD(LDTR),
 111 };
 112
 113 /*
 114  * Keep MSR_K6_STAR at the end, as setup_msrs() will try to optimize it
 115  * away by decrementing the array size.
 116  */
 117 static const u32 vmx_msr_index[] = {
 118 #ifdef CONFIG_X86_64
 119         MSR_SYSCALL_MASK, MSR_LSTAR, MSR_CSTAR, MSR_KERNEL_GS_BASE,
 120 #endif
 121         MSR_EFER, MSR_K6_STAR,
 122 };
 123 #define NR_VMX_MSR ARRAY_SIZE(vmx_msr_index)
 124
 125 static void load_msrs(struct kvm_msr_entry *e, int n)
 126 {
 127         int i;
 128
 129         for (i = 0; i < n; ++i)
 130                 wrmsrl(e[i].index, e[i].data);
 131 }
 132
 133 static void save_msrs(struct kvm_msr_entry *e, int n)
 134 {
 135         int i;
 136
 137         for (i = 0; i < n; ++i)
 138                 rdmsrl(e[i].index, e[i].data);
 139 }
 140
 141 static inline u64 msr_efer_save_restore_bits(struct kvm_msr_entry msr)
 142 {
 143         return (u64)msr.data & EFER_SAVE_RESTORE_BITS;
 144 }
 145
 146 static inline int msr_efer_need_save_restore(struct vcpu_vmx *vmx)
 147 {
 148         int efer_offset = vmx->msr_offset_efer;
 149         return msr_efer_save_restore_bits(vmx->host_msrs[efer_offset]) !=
 150                 msr_efer_save_restore_bits(vmx->guest_msrs[efer_offset]);
 151 }
 152
 153 static inline int is_page_fault(u32 intr_info)
 154 {
 155         return (intr_info & (INTR_INFO_INTR_TYPE_MASK | INTR_INFO_VECTOR_MASK |
 156                              INTR_INFO_VALID_MASK)) ==
 157                 (INTR_TYPE_EXCEPTION | PF_VECTOR | INTR_INFO_VALID_MASK);
 158 }
 159
 160 static inline int is_no_device(u32 intr_info)
 161 {
 162         return (intr_info & (INTR_INFO_INTR_TYPE_MASK | INTR_INFO_VECTOR_MASK |
 163                              INTR_INFO_VALID_MASK)) ==
 164                 (INTR_TYPE_EXCEPTION | NM_VECTOR | INTR_INFO_VALID_MASK);
 165 }
 166
 167 static inline int is_external_interrupt(u32 intr_info)
 168 {
 169         return (intr_info & (INTR_INFO_INTR_TYPE_MASK | INTR_INFO_VALID_MASK))
 170                 == (INTR_TYPE_EXT_INTR | INTR_INFO_VALID_MASK);
 171 }
 172
 173 static int __find_msr_index(struct vcpu_vmx *vmx, u32 msr)
 174 {
 175         int i;
 176
 177         for (i = 0; i < vmx->nmsrs; ++i)
 178                 if (vmx->guest_msrs[i].index == msr)
 179                         return i;
 180         return -1;
 181 }
 182
 183 static struct kvm_msr_entry *find_msr_entry(struct vcpu_vmx *vmx, u32 msr)
 184 {
 185         int i;
 186
 187         i = __find_msr_index(vmx, msr);
 188         if (i >= 0)
 189                 return &vmx->guest_msrs[i];
 190         return NULL;
 191 }
 192
 193 static void vmcs_clear(struct vmcs *vmcs)
 194 {
 195         u64 phys_addr = __pa(vmcs);
 196         u8 error;
 197
 198         asm volatile (ASM_VMX_VMCLEAR_RAX "; setna %0"
 199                       : "=g"(error) : "a"(&phys_addr), "m"(phys_addr)
 200                       : "cc", "memory");
 201         if (error)
 202                 printk(KERN_ERR "kvm: vmclear fail: %p/%llx\n",
 203                        vmcs, phys_addr);
 204 }
 205
 206 static void __vcpu_clear(void *arg)
 207 {
 208         struct vcpu_vmx *vmx = arg;
 209         int cpu = raw_smp_processor_id();
 210
 211         if (vmx->vcpu.cpu == cpu)
 212                 vmcs_clear(vmx->vmcs);
 213         if (per_cpu(current_vmcs, cpu) == vmx->vmcs)
 214                 per_cpu(current_vmcs, cpu) = NULL;
 215         rdtscll(vmx->vcpu.host_tsc);
 216 }
 217
 218 static void vcpu_clear(struct vcpu_vmx *vmx)
 219 {
 220         if (vmx->vcpu.cpu != raw_smp_processor_id() && vmx->vcpu.cpu != -1)
 221                 smp_call_function_single(vmx->vcpu.cpu, __vcpu_clear,
 222                                          vmx, 0, 1);
 223         else
 224                 __vcpu_clear(vmx);
 225         vmx->launched = 0;
 226 }
 227
 228 static unsigned long vmcs_readl(unsigned long field)
 229 {
 230         unsigned long value;
 231
 232         asm volatile (ASM_VMX_VMREAD_RDX_RAX
 233                       : "=a"(value) : "d"(field) : "cc");
 234         return value;
 235 }
 236
 237 static u16 vmcs_read16(unsigned long field)
 238 {
 239         return vmcs_readl(field);
 240 }
 241
 242 static u32 vmcs_read32(unsigned long field)
 243 {
 244         return vmcs_readl(field);
 245 }
 246
 247 static u64 vmcs_read64(unsigned long field)
 248 {
 249 #ifdef CONFIG_X86_64
 250         return vmcs_readl(field);
 251 #else
 252         return vmcs_readl(field) | ((u64)vmcs_readl(field+1) << 32);
 253 #endif
 254 }
 255
 256 static noinline void vmwrite_error(unsigned long field, unsigned long value)
 257 {
 258         printk(KERN_ERR "vmwrite error: reg %lx value %lx (err %d)\n",
 259                field, value, vmcs_read32(VM_INSTRUCTION_ERROR));
 260         dump_stack();
 261 }
 262
 263 static void vmcs_writel(unsigned long field, unsigned long value)
 264 {
 265         u8 error;
 266
 267         asm volatile (ASM_VMX_VMWRITE_RAX_RDX "; setna %0"
 268                        : "=q"(error) : "a"(value), "d"(field) : "cc" );
 269         if (unlikely(error))
 270                 vmwrite_error(field, value);
 271 }
 272
 273 static void vmcs_write16(unsigned long field, u16 value)
 274 {
 275         vmcs_writel(field, value);
 276 }
 277
 278 static void vmcs_write32(unsigned long field, u32 value)
 279 {
 280         vmcs_writel(field, value);
 281 }
 282
 283 static void vmcs_write64(unsigned long field, u64 value)
 284 {
 285 #ifdef CONFIG_X86_64
 286         vmcs_writel(field, value);
 287 #else
 288         vmcs_writel(field, value);
 289         asm volatile ("");
 290         vmcs_writel(field+1, value >> 32);
 291 #endif
 292 }
 293
 294 static void vmcs_clear_bits(unsigned long field, u32 mask)
 295 {
 296         vmcs_writel(field, vmcs_readl(field) & ~mask);
 297 }
 298
 299 static void vmcs_set_bits(unsigned long field, u32 mask)
 300 {
 301         vmcs_writel(field, vmcs_readl(field) | mask);
 302 }
 303
 304 static void update_exception_bitmap(struct kvm_vcpu *vcpu)
 305 {
 306         u32 eb;
 307
 308         eb = 1u << PF_VECTOR;
 309         if (!vcpu->fpu_active)
 310                 eb |= 1u << NM_VECTOR;
 311         if (vcpu->guest_debug.enabled)
 312                 eb |= 1u << 1;
 313         if (vcpu->rmode.active)
 314                 eb = ~0;
 315         vmcs_write32(EXCEPTION_BITMAP, eb);
 316 }
 317
 318 static void reload_tss(void)
 319 {
 320 #ifndef CONFIG_X86_64
 321
 322         /*
 323          * VT restores TR but not its size.  Useless.
 324          */
 325         struct descriptor_table gdt;
 326         struct segment_descriptor *descs;
 327
 328         get_gdt(&gdt);
 329         descs = (void *)gdt.base;
 330         descs[GDT_ENTRY_TSS].type = 9; /* available TSS */
 331         load_TR_desc();
 332 #endif
 333 }
 334
 335 static void load_transition_efer(struct vcpu_vmx *vmx)
 336 {
 337         u64 trans_efer;
 338         int efer_offset = vmx->msr_offset_efer;
 339
 340         trans_efer = vmx->host_msrs[efer_offset].data;
 341         trans_efer &= ~EFER_SAVE_RESTORE_BITS;
 342         trans_efer |= msr_efer_save_restore_bits(vmx->guest_msrs[efer_offset]);
 343         wrmsrl(MSR_EFER, trans_efer);
 344         vmx->vcpu.stat.efer_reload++;
 345 }
 346
 347 static void vmx_save_host_state(struct vcpu_vmx *vmx)
 348 {
 349         if (vmx->host_state.loaded)
 350                 return;
 351
 352         vmx->host_state.loaded = 1;
 353         /*
 354          * Set host fs and gs selectors.  Unfortunately, 22.2.3 does not
 355          * allow segment selectors with cpl > 0 or ti == 1.
 356          */
 357         vmx->host_state.ldt_sel = read_ldt();
 358         vmx->host_state.gs_ldt_reload_needed = vmx->host_state.ldt_sel;
 359         vmx->host_state.fs_sel = read_fs();
 360         if (!(vmx->host_state.fs_sel & 7)) {
 361                 vmcs_write16(HOST_FS_SELECTOR, vmx->host_state.fs_sel);
 362                 vmx->host_state.fs_reload_needed = 0;
 363         } else {
 364                 vmcs_write16(HOST_FS_SELECTOR, 0);
 365                 vmx->host_state.fs_reload_needed = 1;
 366         }
 367         vmx->host_state.gs_sel = read_gs();
 368         if (!(vmx->host_state.gs_sel & 7))
 369                 vmcs_write16(HOST_GS_SELECTOR, vmx->host_state.gs_sel);
 370         else {
 371                 vmcs_write16(HOST_GS_SELECTOR, 0);
 372                 vmx->host_state.gs_ldt_reload_needed = 1;
 373         }
 374
 375 #ifdef CONFIG_X86_64
 376         vmcs_writel(HOST_FS_BASE, read_msr(MSR_FS_BASE));
 377         vmcs_writel(HOST_GS_BASE, read_msr(MSR_GS_BASE));
 378 #else
 379         vmcs_writel(HOST_FS_BASE, segment_base(vmx->host_state.fs_sel));
 380         vmcs_writel(HOST_GS_BASE, segment_base(vmx->host_state.gs_sel));
 381 #endif
 382
 383 #ifdef CONFIG_X86_64
 384         if (is_long_mode(&vmx->vcpu)) {
 385                 save_msrs(vmx->host_msrs +
 386                           vmx->msr_offset_kernel_gs_base, 1);
 387         }
 388 #endif
 389         load_msrs(vmx->guest_msrs, vmx->save_nmsrs);
 390         if (msr_efer_need_save_restore(vmx))
 391                 load_transition_efer(vmx);
 392 }
 393
 394 static void vmx_load_host_state(struct vcpu_vmx *vmx)
 395 {
 396         unsigned long flags;
 397
 398         if (!vmx->host_state.loaded)
 399                 return;
 400
 401         vmx->host_state.loaded = 0;
 402         if (vmx->host_state.fs_reload_needed)
 403                 load_fs(vmx->host_state.fs_sel);
 404         if (vmx->host_state.gs_ldt_reload_needed) {
 405                 load_ldt(vmx->host_state.ldt_sel);
 406                 /*
 407                  * If we have to reload gs, we must take care to
 408                  * preserve our gs base.
 409                  */
 410                 local_irq_save(flags);
 411                 load_gs(vmx->host_state.gs_sel);
 412 #ifdef CONFIG_X86_64
 413                 wrmsrl(MSR_GS_BASE, vmcs_readl(HOST_GS_BASE));
 414 #endif
 415                 local_irq_restore(flags);
 416         }
 417         reload_tss();
 418         save_msrs(vmx->guest_msrs, vmx->save_nmsrs);
 419         load_msrs(vmx->host_msrs, vmx->save_nmsrs);
 420         if (msr_efer_need_save_restore(vmx))
 421                 load_msrs(vmx->host_msrs + vmx->msr_offset_efer, 1);
 422 }
 423
 424 /*
 425  * Switches to specified vcpu, until a matching vcpu_put(), but assumes
 426  * vcpu mutex is already taken.
 427  */
 428 static void vmx_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
 429 {
 430         struct vcpu_vmx *vmx = to_vmx(vcpu);
 431         u64 phys_addr = __pa(vmx->vmcs);
 432         u64 tsc_this, delta;
 433
 434         if (vcpu->cpu != cpu)
 435                 vcpu_clear(vmx);
 436
 437         if (per_cpu(current_vmcs, cpu) != vmx->vmcs) {
 438                 u8 error;
 439
 440                 per_cpu(current_vmcs, cpu) = vmx->vmcs;
 441                 asm volatile (ASM_VMX_VMPTRLD_RAX "; setna %0"
 442                               : "=g"(error) : "a"(&phys_addr), "m"(phys_addr)
 443                               : "cc");
 444                 if (error)
 445                         printk(KERN_ERR "kvm: vmptrld %p/%llx fail\n",
 446                                vmx->vmcs, phys_addr);
 447         }
 448
 449         if (vcpu->cpu != cpu) {
 450                 struct descriptor_table dt;
 451                 unsigned long sysenter_esp;
 452
 453                 vcpu->cpu = cpu;
 454                 /*
 455                  * Linux uses per-cpu TSS and GDT, so set these when switching
 456                  * processors.
 457                  */
 458                 vmcs_writel(HOST_TR_BASE, read_tr_base()); /* 22.2.4 */
 459                 get_gdt(&dt);
 460                 vmcs_writel(HOST_GDTR_BASE, dt.base);   /* 22.2.4 */
 461
 462                 rdmsrl(MSR_IA32_SYSENTER_ESP, sysenter_esp);
 463                 vmcs_writel(HOST_IA32_SYSENTER_ESP, sysenter_esp); /* 22.2.3 */
 464
 465                 /*
 466                  * Make sure the time stamp counter is monotonous.
 467                  */
 468                 rdtscll(tsc_this);
 469                 delta = vcpu->host_tsc - tsc_this;
 470                 vmcs_write64(TSC_OFFSET, vmcs_read64(TSC_OFFSET) + delta);
 471         }
 472 }
 473
 474 static void vmx_vcpu_put(struct kvm_vcpu *vcpu)
 475 {
 476         vmx_load_host_state(to_vmx(vcpu));
 477         kvm_put_guest_fpu(vcpu);
 478 }
 479
 480 static void vmx_fpu_activate(struct kvm_vcpu *vcpu)
 481 {
 482         if (vcpu->fpu_active)
 483                 return;
 484         vcpu->fpu_active = 1;
 485         vmcs_clear_bits(GUEST_CR0, X86_CR0_TS);
 486         if (vcpu->cr0 & X86_CR0_TS)
 487                 vmcs_set_bits(GUEST_CR0, X86_CR0_TS);
 488         update_exception_bitmap(vcpu);
 489 }
 490
 491 static void vmx_fpu_deactivate(struct kvm_vcpu *vcpu)
 492 {
 493         if (!vcpu->fpu_active)
 494                 return;
 495         vcpu->fpu_active = 0;
 496         vmcs_set_bits(GUEST_CR0, X86_CR0_TS);
 497         update_exception_bitmap(vcpu);
 498 }
 499
 500 static void vmx_vcpu_decache(struct kvm_vcpu *vcpu)
 501 {
 502         vcpu_clear(to_vmx(vcpu));
 503 }
 504
 505 static unsigned long vmx_get_rflags(struct kvm_vcpu *vcpu)
 506 {
 507         return vmcs_readl(GUEST_RFLAGS);
 508 }
 509
 510 static void vmx_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
 511 {
 512         vmcs_writel(GUEST_RFLAGS, rflags);
 513 }
 514
 515 static void skip_emulated_instruction(struct kvm_vcpu *vcpu)
 516 {
 517         unsigned long rip;
 518         u32 interruptibility;
 519
 520         rip = vmcs_readl(GUEST_RIP);
 521         rip += vmcs_read32(VM_EXIT_INSTRUCTION_LEN);
 522         vmcs_writel(GUEST_RIP, rip);
 523
 524         /*
 525          * We emulated an instruction, so temporary interrupt blocking
 526          * should be removed, if set.
 527          */
 528         interruptibility = vmcs_read32(GUEST_INTERRUPTIBILITY_INFO);
 529         if (interruptibility & 3)
 530                 vmcs_write32(GUEST_INTERRUPTIBILITY_INFO,
 531                              interruptibility & ~3);
 532         vcpu->interrupt_window_open = 1;
 533 }
 534
 535 static void vmx_inject_gp(struct kvm_vcpu *vcpu, unsigned error_code)
 536 {
 537         printk(KERN_DEBUG "inject_general_protection: rip 0x%lx\n",
 538                vmcs_readl(GUEST_RIP));
 539         vmcs_write32(VM_ENTRY_EXCEPTION_ERROR_CODE, error_code);
 540         vmcs_write32(VM_ENTRY_INTR_INFO_FIELD,
 541                      GP_VECTOR |
 542                      INTR_TYPE_EXCEPTION |
 543                      INTR_INFO_DELIEVER_CODE_MASK |
 544                      INTR_INFO_VALID_MASK);
 545 }
 546
 547 /*
 548  * Swap MSR entry in host/guest MSR entry array.
 549  */
 550 #ifdef CONFIG_X86_64
 551 static void move_msr_up(struct vcpu_vmx *vmx, int from, int to)
 552 {
 553         struct kvm_msr_entry tmp;
 554
 555         tmp = vmx->guest_msrs[to];
 556         vmx->guest_msrs[to] = vmx->guest_msrs[from];
 557         vmx->guest_msrs[from] = tmp;
 558         tmp = vmx->host_msrs[to];
 559         vmx->host_msrs[to] = vmx->host_msrs[from];
 560         vmx->host_msrs[from] = tmp;
 561 }
 562 #endif
 563
 564 /*
 565  * Set up the vmcs to automatically save and restore system
 566  * msrs.  Don't touch the 64-bit msrs if the guest is in legacy
 567  * mode, as fiddling with msrs is very expensive.
 568  */
 569 static void setup_msrs(struct vcpu_vmx *vmx)
 570 {
 571         int save_nmsrs;
 572
 573         save_nmsrs = 0;
 574 #ifdef CONFIG_X86_64
 575         if (is_long_mode(&vmx->vcpu)) {
 576                 int index;
 577
 578                 index = __find_msr_index(vmx, MSR_SYSCALL_MASK);
 579                 if (index >= 0)
 580                         move_msr_up(vmx, index, save_nmsrs++);
 581                 index = __find_msr_index(vmx, MSR_LSTAR);
 582                 if (index >= 0)
 583                         move_msr_up(vmx, index, save_nmsrs++);
 584                 index = __find_msr_index(vmx, MSR_CSTAR);
 585                 if (index >= 0)
 586                         move_msr_up(vmx, index, save_nmsrs++);
 587                 index = __find_msr_index(vmx, MSR_KERNEL_GS_BASE);
 588                 if (index >= 0)
 589                         move_msr_up(vmx, index, save_nmsrs++);
 590                 /*
 591                  * MSR_K6_STAR is only needed on long mode guests, and only
 592                  * if efer.sce is enabled.
 593                  */
 594                 index = __find_msr_index(vmx, MSR_K6_STAR);
 595                 if ((index >= 0) && (vmx->vcpu.shadow_efer & EFER_SCE))
 596                         move_msr_up(vmx, index, save_nmsrs++);
 597         }
 598 #endif
 599         vmx->save_nmsrs = save_nmsrs;
 600
 601 #ifdef CONFIG_X86_64
 602         vmx->msr_offset_kernel_gs_base =
 603                 __find_msr_index(vmx, MSR_KERNEL_GS_BASE);
 604 #endif
 605         vmx->msr_offset_efer = __find_msr_index(vmx, MSR_EFER);
 606 }
 607
 608 /*
 609  * reads and returns guest's timestamp counter "register"
 610  * guest_tsc = host_tsc + tsc_offset    -- 21.3
 611  */
 612 static u64 guest_read_tsc(void)
 613 {
 614         u64 host_tsc, tsc_offset;
 615
 616         rdtscll(host_tsc);
 617         tsc_offset = vmcs_read64(TSC_OFFSET);
 618         return host_tsc + tsc_offset;
 619 }
 620
 621 /*
 622  * writes 'guest_tsc' into guest's timestamp counter "register"
 623  * guest_tsc = host_tsc + tsc_offset ==> tsc_offset = guest_tsc - host_tsc
 624  */
 625 static void guest_write_tsc(u64 guest_tsc)
 626 {
 627         u64 host_tsc;
 628
 629         rdtscll(host_tsc);
 630         vmcs_write64(TSC_OFFSET, guest_tsc - host_tsc);
 631 }
 632
 633 /*
 634  * Reads an msr value (of 'msr_index') into 'pdata'.
 635  * Returns 0 on success, non-0 otherwise.
 636  * Assumes vcpu_load() was already called.
 637  */
 638 static int vmx_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata)
 639 {
 640         u64 data;
 641         struct kvm_msr_entry *msr;
 642
 643         if (!pdata) {
 644                 printk(KERN_ERR "BUG: get_msr called with NULL pdata\n");
 645                 return -EINVAL;
 646         }
 647
 648         switch (msr_index) {
 649 #ifdef CONFIG_X86_64
 650         case MSR_FS_BASE:
 651                 data = vmcs_readl(GUEST_FS_BASE);
 652                 break;
 653         case MSR_GS_BASE:
 654                 data = vmcs_readl(GUEST_GS_BASE);
 655                 break;
 656         case MSR_EFER:
 657                 return kvm_get_msr_common(vcpu, msr_index, pdata);
 658 #endif
 659         case MSR_IA32_TIME_STAMP_COUNTER:
 660                 data = guest_read_tsc();
 661                 break;
 662         case MSR_IA32_SYSENTER_CS:
 663                 data = vmcs_read32(GUEST_SYSENTER_CS);
 664                 break;
 665         case MSR_IA32_SYSENTER_EIP:
 666                 data = vmcs_readl(GUEST_SYSENTER_EIP);
 667                 break;
 668         case MSR_IA32_SYSENTER_ESP:
 669                 data = vmcs_readl(GUEST_SYSENTER_ESP);
 670                 break;
 671         default:
 672                 msr = find_msr_entry(to_vmx(vcpu), msr_index);
 673                 if (msr) {
 674                         data = msr->data;
 675                         break;
 676                 }
 677                 return kvm_get_msr_common(vcpu, msr_index, pdata);
 678         }
 679
 680         *pdata = data;
 681         return 0;
 682 }
 683
 684 /*
 685  * Writes msr value into into the appropriate "register".
 686  * Returns 0 on success, non-0 otherwise.
 687  * Assumes vcpu_load() was already called.
 688  */
 689 static int vmx_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data)
 690 {
 691         struct vcpu_vmx *vmx = to_vmx(vcpu);
 692         struct kvm_msr_entry *msr;
 693         int ret = 0;
 694
 695         switch (msr_index) {
 696 #ifdef CONFIG_X86_64
 697         case MSR_EFER:
 698                 ret = kvm_set_msr_common(vcpu, msr_index, data);
 699                 if (vmx->host_state.loaded)
 700                         load_transition_efer(vmx);
 701                 break;
 702         case MSR_FS_BASE:
 703                 vmcs_writel(GUEST_FS_BASE, data);
 704                 break;
 705         case MSR_GS_BASE:
 706                 vmcs_writel(GUEST_GS_BASE, data);
 707                 break;
 708 #endif
 709         case MSR_IA32_SYSENTER_CS:
 710                 vmcs_write32(GUEST_SYSENTER_CS, data);
 711                 break;
 712         case MSR_IA32_SYSENTER_EIP:
 713                 vmcs_writel(GUEST_SYSENTER_EIP, data);
 714                 break;
 715         case MSR_IA32_SYSENTER_ESP:
 716                 vmcs_writel(GUEST_SYSENTER_ESP, data);
 717                 break;
 718         case MSR_IA32_TIME_STAMP_COUNTER:
 719                 guest_write_tsc(data);
 720                 break;
 721         default:
 722                 msr = find_msr_entry(vmx, msr_index);
 723                 if (msr) {
 724                         msr->data = data;
 725                         if (vmx->host_state.loaded)
 726                                 load_msrs(vmx->guest_msrs, vmx->save_nmsrs);
 727                         break;
 728                 }
 729                 ret = kvm_set_msr_common(vcpu, msr_index, data);
 730         }
 731
 732         return ret;
 733 }
 734
 735 /*
 736  * Sync the rsp and rip registers into the vcpu structure.  This allows
 737  * registers to be accessed by indexing vcpu->regs.
 738  */
 739 static void vcpu_load_rsp_rip(struct kvm_vcpu *vcpu)
 740 {
 741         vcpu->regs[VCPU_REGS_RSP] = vmcs_readl(GUEST_RSP);
 742         vcpu->rip = vmcs_readl(GUEST_RIP);
 743 }
 744
 745 /*
 746  * Syncs rsp and rip back into the vmcs.  Should be called after possible
 747  * modification.
 748  */
 749 static void vcpu_put_rsp_rip(struct kvm_vcpu *vcpu)
 750 {
 751         vmcs_writel(GUEST_RSP, vcpu->regs[VCPU_REGS_RSP]);
 752         vmcs_writel(GUEST_RIP, vcpu->rip);
 753 }
 754
 755 static int set_guest_debug(struct kvm_vcpu *vcpu, struct kvm_debug_guest *dbg)
 756 {
 757         unsigned long dr7 = 0x400;
 758         int old_singlestep;
 759
 760         old_singlestep = vcpu->guest_debug.singlestep;
 761
 762         vcpu->guest_debug.enabled = dbg->enabled;
 763         if (vcpu->guest_debug.enabled) {
 764                 int i;
 765
 766                 dr7 |= 0x200;  /* exact */
 767                 for (i = 0; i < 4; ++i) {
 768                         if (!dbg->breakpoints[i].enabled)
 769                                 continue;
 770                         vcpu->guest_debug.bp[i] = dbg->breakpoints[i].address;
 771                         dr7 |= 2 << (i*2);    /* global enable */
 772                         dr7 |= 0 << (i*4+16); /* execution breakpoint */
 773                 }
 774
 775                 vcpu->guest_debug.singlestep = dbg->singlestep;
 776         } else
 777                 vcpu->guest_debug.singlestep = 0;
 778
 779         if (old_singlestep && !vcpu->guest_debug.singlestep) {
 780                 unsigned long flags;
 781
 782                 flags = vmcs_readl(GUEST_RFLAGS);
 783                 flags &= ~(X86_EFLAGS_TF | X86_EFLAGS_RF);
 784                 vmcs_writel(GUEST_RFLAGS, flags);
 785         }
 786
 787         update_exception_bitmap(vcpu);
 788         vmcs_writel(GUEST_DR7, dr7);
 789
 790         return 0;
 791 }
 792
 793 static int vmx_get_irq(struct kvm_vcpu *vcpu)
 794 {
 795         u32 idtv_info_field;
 796
 797         idtv_info_field = vmcs_read32(IDT_VECTORING_INFO_FIELD);
 798         if (idtv_info_field & INTR_INFO_VALID_MASK) {
 799                 if (is_external_interrupt(idtv_info_field))
 800                         return idtv_info_field & VECTORING_INFO_VECTOR_MASK;
 801                 else
 802                         printk("pending exception: not handled yet\n");
 803         }
 804         return -1;
 805 }
 806
 807 static __init int cpu_has_kvm_support(void)
 808 {
 809         unsigned long ecx = cpuid_ecx(1);
 810         return test_bit(5, &ecx); /* CPUID.1:ECX.VMX[bit 5] -> VT */
 811 }
 812
 813 static __init int vmx_disabled_by_bios(void)
 814 {
 815         u64 msr;
 816
 817         rdmsrl(MSR_IA32_FEATURE_CONTROL, msr);
 818         return (msr & (MSR_IA32_FEATURE_CONTROL_LOCKED |
 819                        MSR_IA32_FEATURE_CONTROL_VMXON_ENABLED))
 820             == MSR_IA32_FEATURE_CONTROL_LOCKED;
 821         /* locked but not enabled */
 822 }
 823
 824 static void hardware_enable(void *garbage)
 825 {
 826         int cpu = raw_smp_processor_id();
 827         u64 phys_addr = __pa(per_cpu(vmxarea, cpu));
 828         u64 old;
 829
 830         rdmsrl(MSR_IA32_FEATURE_CONTROL, old);
 831         if ((old & (MSR_IA32_FEATURE_CONTROL_LOCKED |
 832                     MSR_IA32_FEATURE_CONTROL_VMXON_ENABLED))
 833             != (MSR_IA32_FEATURE_CONTROL_LOCKED |
 834                 MSR_IA32_FEATURE_CONTROL_VMXON_ENABLED))
 835                 /* enable and lock */
 836                 wrmsrl(MSR_IA32_FEATURE_CONTROL, old |
 837                        MSR_IA32_FEATURE_CONTROL_LOCKED |
 838                        MSR_IA32_FEATURE_CONTROL_VMXON_ENABLED);
 839         write_cr4(read_cr4() | X86_CR4_VMXE); /* FIXME: not cpu hotplug safe */
 840         asm volatile (ASM_VMX_VMXON_RAX : : "a"(&phys_addr), "m"(phys_addr)
 841                       : "memory", "cc");
 842 }
 843
 844 static void hardware_disable(void *garbage)
 845 {
 846         asm volatile (ASM_VMX_VMXOFF : : : "cc");
 847 }
 848
 849 static __init int adjust_vmx_controls(u32 ctl_min, u32 ctl_opt,
 850                                       u32 msr, u32* result)
 851 {
 852         u32 vmx_msr_low, vmx_msr_high;
 853         u32 ctl = ctl_min | ctl_opt;
 854
 855         rdmsr(msr, vmx_msr_low, vmx_msr_high);
 856
 857         ctl &= vmx_msr_high; /* bit == 0 in high word ==> must be zero */
 858         ctl |= vmx_msr_low;  /* bit == 1 in low word  ==> must be one  */
 859
 860         /* Ensure minimum (required) set of control bits are supported. */
 861         if (ctl_min & ~ctl)
 862                 return -EIO;
 863
 864         *result = ctl;
 865         return 0;
 866 }
 867
 868 static __init int setup_vmcs_config(struct vmcs_config *vmcs_conf)
 869 {
 870         u32 vmx_msr_low, vmx_msr_high;
 871         u32 min, opt;
 872         u32 _pin_based_exec_control = 0;
 873         u32 _cpu_based_exec_control = 0;
 874         u32 _vmexit_control = 0;
 875         u32 _vmentry_control = 0;
 876
 877         min = PIN_BASED_EXT_INTR_MASK | PIN_BASED_NMI_EXITING;
 878         opt = 0;
 879         if (adjust_vmx_controls(min, opt, MSR_IA32_VMX_PINBASED_CTLS,
 880                                 &_pin_based_exec_control) < 0)
 881                 return -EIO;
 882
 883         min = CPU_BASED_HLT_EXITING |
 884 #ifdef CONFIG_X86_64
 885               CPU_BASED_CR8_LOAD_EXITING |
 886               CPU_BASED_CR8_STORE_EXITING |
 887 #endif
 888               CPU_BASED_USE_IO_BITMAPS |
 889               CPU_BASED_MOV_DR_EXITING |
 890               CPU_BASED_USE_TSC_OFFSETING;
 891         opt = 0;
 892         if (adjust_vmx_controls(min, opt, MSR_IA32_VMX_PROCBASED_CTLS,
 893                                 &_cpu_based_exec_control) < 0)
 894                 return -EIO;
 895
 896         min = 0;
 897 #ifdef CONFIG_X86_64
 898         min |= VM_EXIT_HOST_ADDR_SPACE_SIZE;
 899 #endif
 900         opt = 0;
 901         if (adjust_vmx_controls(min, opt, MSR_IA32_VMX_EXIT_CTLS,
 902                                 &_vmexit_control) < 0)
 903                 return -EIO;
 904
 905         min = opt = 0;
 906         if (adjust_vmx_controls(min, opt, MSR_IA32_VMX_ENTRY_CTLS,
 907                                 &_vmentry_control) < 0)
 908                 return -EIO;
 909
 910         rdmsr(MSR_IA32_VMX_BASIC, vmx_msr_low, vmx_msr_high);
 911
 912         /* IA-32 SDM Vol 3B: VMCS size is never greater than 4kB. */
 913         if ((vmx_msr_high & 0x1fff) > PAGE_SIZE)
 914                 return -EIO;
 915
 916 #ifdef CONFIG_X86_64
 917         /* IA-32 SDM Vol 3B: 64-bit CPUs always have VMX_BASIC_MSR[48]==0. */
 918         if (vmx_msr_high & (1u<<16))
 919                 return -EIO;
 920 #endif
 921
 922         /* Require Write-Back (WB) memory type for VMCS accesses. */
 923         if (((vmx_msr_high >> 18) & 15) != 6)
 924                 return -EIO;
 925
 926         vmcs_conf->size = vmx_msr_high & 0x1fff;
 927         vmcs_conf->order = get_order(vmcs_config.size);
 928         vmcs_conf->revision_id = vmx_msr_low;
 929
 930         vmcs_conf->pin_based_exec_ctrl = _pin_based_exec_control;
 931         vmcs_conf->cpu_based_exec_ctrl = _cpu_based_exec_control;
 932         vmcs_conf->vmexit_ctrl         = _vmexit_control;
 933         vmcs_conf->vmentry_ctrl        = _vmentry_control;
 934
 935         return 0;
 936 }
 937
 938 static struct vmcs *alloc_vmcs_cpu(int cpu)
 939 {
 940         int node = cpu_to_node(cpu);
 941         struct page *pages;
 942         struct vmcs *vmcs;
 943
 944         pages = alloc_pages_node(node, GFP_KERNEL, vmcs_config.order);
 945         if (!pages)
 946                 return NULL;
 947         vmcs = page_address(pages);
 948         memset(vmcs, 0, vmcs_config.size);
 949         vmcs->revision_id = vmcs_config.revision_id; /* vmcs revision id */
 950         return vmcs;
 951 }
 952
 953 static struct vmcs *alloc_vmcs(void)
 954 {
 955         return alloc_vmcs_cpu(raw_smp_processor_id());
 956 }
 957
 958 static void free_vmcs(struct vmcs *vmcs)
 959 {
 960         free_pages((unsigned long)vmcs, vmcs_config.order);
 961 }
 962
 963 static void free_kvm_area(void)
 964 {
 965         int cpu;
 966
 967         for_each_online_cpu(cpu)
 968                 free_vmcs(per_cpu(vmxarea, cpu));
 969 }
 970
 971 static __init int alloc_kvm_area(void)
 972 {
 973         int cpu;
 974
 975         for_each_online_cpu(cpu) {
 976                 struct vmcs *vmcs;
 977
 978                 vmcs = alloc_vmcs_cpu(cpu);
 979                 if (!vmcs) {
 980                         free_kvm_area();
 981                         return -ENOMEM;
 982                 }
 983
 984                 per_cpu(vmxarea, cpu) = vmcs;
 985         }
 986         return 0;
 987 }
 988
 989 static __init int hardware_setup(void)
 990 {
 991         if (setup_vmcs_config(&vmcs_config) < 0)
 992                 return -EIO;
 993         return alloc_kvm_area();
 994 }
 995
 996 static __exit void hardware_unsetup(void)
 997 {
 998         free_kvm_area();
 999 }
1000
1001 static void fix_pmode_dataseg(int seg, struct kvm_save_segment *save)
1002 {
1003         struct kvm_vmx_segment_field *sf = &kvm_vmx_segment_fields[seg];
1004
1005         if (vmcs_readl(sf->base) == save->base && (save->base & AR_S_MASK)) {
1006                 vmcs_write16(sf->selector, save->selector);
1007                 vmcs_writel(sf->base, save->base);
1008                 vmcs_write32(sf->limit, save->limit);
1009                 vmcs_write32(sf->ar_bytes, save->ar);
1010         } else {
1011                 u32 dpl = (vmcs_read16(sf->selector) & SELECTOR_RPL_MASK)
1012                         << AR_DPL_SHIFT;
1013                 vmcs_write32(sf->ar_bytes, 0x93 | dpl);
1014         }
1015 }
1016
1017 static void enter_pmode(struct kvm_vcpu *vcpu)
1018 {
1019         unsigned long flags;
1020
1021         vcpu->rmode.active = 0;
1022
1023         vmcs_writel(GUEST_TR_BASE, vcpu->rmode.tr.base);
1024         vmcs_write32(GUEST_TR_LIMIT, vcpu->rmode.tr.limit);
1025         vmcs_write32(GUEST_TR_AR_BYTES, vcpu->rmode.tr.ar);
1026
1027         flags = vmcs_readl(GUEST_RFLAGS);
1028         flags &= ~(IOPL_MASK | X86_EFLAGS_VM);
1029         flags |= (vcpu->rmode.save_iopl << IOPL_SHIFT);
1030         vmcs_writel(GUEST_RFLAGS, flags);
1031
1032         vmcs_writel(GUEST_CR4, (vmcs_readl(GUEST_CR4) & ~X86_CR4_VME) |
1033                         (vmcs_readl(CR4_READ_SHADOW) & X86_CR4_VME));
1034
1035         update_exception_bitmap(vcpu);
1036
1037         fix_pmode_dataseg(VCPU_SREG_ES, &vcpu->rmode.es);
1038         fix_pmode_dataseg(VCPU_SREG_DS, &vcpu->rmode.ds);
1039         fix_pmode_dataseg(VCPU_SREG_GS, &vcpu->rmode.gs);
1040         fix_pmode_dataseg(VCPU_SREG_FS, &vcpu->rmode.fs);
1041
1042         vmcs_write16(GUEST_SS_SELECTOR, 0);
1043         vmcs_write32(GUEST_SS_AR_BYTES, 0x93);
1044
1045         vmcs_write16(GUEST_CS_SELECTOR,
1046                      vmcs_read16(GUEST_CS_SELECTOR) & ~SELECTOR_RPL_MASK);
1047         vmcs_write32(GUEST_CS_AR_BYTES, 0x9b);
1048 }
1049
1050 static gva_t rmode_tss_base(struct kvm* kvm)
1051 {
1052         gfn_t base_gfn = kvm->memslots[0].base_gfn + kvm->memslots[0].npages - 3;
1053         return base_gfn << PAGE_SHIFT;
1054 }
1055
1056 static void fix_rmode_seg(int seg, struct kvm_save_segment *save)
1057 {
1058         struct kvm_vmx_segment_field *sf = &kvm_vmx_segment_fields[seg];
1059
1060         save->selector = vmcs_read16(sf->selector);
1061         save->base = vmcs_readl(sf->base);
1062         save->limit = vmcs_read32(sf->limit);
1063         save->ar = vmcs_read32(sf->ar_bytes);
1064         vmcs_write16(sf->selector, vmcs_readl(sf->base) >> 4);
1065         vmcs_write32(sf->limit, 0xffff);
1066         vmcs_write32(sf->ar_bytes, 0xf3);
1067 }
1068
1069 static void enter_rmode(struct kvm_vcpu *vcpu)
1070 {
1071         unsigned long flags;
1072
1073         vcpu->rmode.active = 1;
1074
1075         vcpu->rmode.tr.base = vmcs_readl(GUEST_TR_BASE);
1076         vmcs_writel(GUEST_TR_BASE, rmode_tss_base(vcpu->kvm));
1077
1078         vcpu->rmode.tr.limit = vmcs_read32(GUEST_TR_LIMIT);
1079         vmcs_write32(GUEST_TR_LIMIT, RMODE_TSS_SIZE - 1);
1080
1081         vcpu->rmode.tr.ar = vmcs_read32(GUEST_TR_AR_BYTES);
1082         vmcs_write32(GUEST_TR_AR_BYTES, 0x008b);
1083
1084         flags = vmcs_readl(GUEST_RFLAGS);
1085         vcpu->rmode.save_iopl = (flags & IOPL_MASK) >> IOPL_SHIFT;
1086
1087         flags |= IOPL_MASK | X86_EFLAGS_VM;
1088
1089         vmcs_writel(GUEST_RFLAGS, flags);
1090         vmcs_writel(GUEST_CR4, vmcs_readl(GUEST_CR4) | X86_CR4_VME);
1091         update_exception_bitmap(vcpu);
1092
1093         vmcs_write16(GUEST_SS_SELECTOR, vmcs_readl(GUEST_SS_BASE) >> 4);
1094         vmcs_write32(GUEST_SS_LIMIT, 0xffff);
1095         vmcs_write32(GUEST_SS_AR_BYTES, 0xf3);
1096
1097         vmcs_write32(GUEST_CS_AR_BYTES, 0xf3);
1098         vmcs_write32(GUEST_CS_LIMIT, 0xffff);
1099         if (vmcs_readl(GUEST_CS_BASE) == 0xffff0000)
1100                 vmcs_writel(GUEST_CS_BASE, 0xf0000);
1101         vmcs_write16(GUEST_CS_SELECTOR, vmcs_readl(GUEST_CS_BASE) >> 4);
1102
1103         fix_rmode_seg(VCPU_SREG_ES, &vcpu->rmode.es);
1104         fix_rmode_seg(VCPU_SREG_DS, &vcpu->rmode.ds);
1105         fix_rmode_seg(VCPU_SREG_GS, &vcpu->rmode.gs);
1106         fix_rmode_seg(VCPU_SREG_FS, &vcpu->rmode.fs);
1107
1108         init_rmode_tss(vcpu->kvm);
1109 }
1110
1111 #ifdef CONFIG_X86_64
1112
1113 static void enter_lmode(struct kvm_vcpu *vcpu)
1114 {
1115         u32 guest_tr_ar;
1116
1117         guest_tr_ar = vmcs_read32(GUEST_TR_AR_BYTES);
1118         if ((guest_tr_ar & AR_TYPE_MASK) != AR_TYPE_BUSY_64_TSS) {
1119                 printk(KERN_DEBUG "%s: tss fixup for long mode. \n",
1120                        __FUNCTION__);
1121                 vmcs_write32(GUEST_TR_AR_BYTES,
1122                              (guest_tr_ar & ~AR_TYPE_MASK)
1123                              | AR_TYPE_BUSY_64_TSS);
1124         }
1125
1126         vcpu->shadow_efer |= EFER_LMA;
1127
1128         find_msr_entry(to_vmx(vcpu), MSR_EFER)->data |= EFER_LMA | EFER_LME;
1129         vmcs_write32(VM_ENTRY_CONTROLS,
1130                      vmcs_read32(VM_ENTRY_CONTROLS)
1131                      | VM_ENTRY_IA32E_MODE);
1132 }
1133
1134 static void exit_lmode(struct kvm_vcpu *vcpu)
1135 {
1136         vcpu->shadow_efer &= ~EFER_LMA;
1137
1138         vmcs_write32(VM_ENTRY_CONTROLS,
1139                      vmcs_read32(VM_ENTRY_CONTROLS)
1140                      & ~VM_ENTRY_IA32E_MODE);
1141 }
1142
1143 #endif
1144
1145 static void vmx_decache_cr4_guest_bits(struct kvm_vcpu *vcpu)
1146 {
1147         vcpu->cr4 &= KVM_GUEST_CR4_MASK;
1148         vcpu->cr4 |= vmcs_readl(GUEST_CR4) & ~KVM_GUEST_CR4_MASK;
1149 }
1150
1151 static void vmx_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
1152 {
1153         vmx_fpu_deactivate(vcpu);
1154
1155         if (vcpu->rmode.active && (cr0 & X86_CR0_PE))
1156                 enter_pmode(vcpu);
1157
1158         if (!vcpu->rmode.active && !(cr0 & X86_CR0_PE))
1159                 enter_rmode(vcpu);
1160
1161 #ifdef CONFIG_X86_64
1162         if (vcpu->shadow_efer & EFER_LME) {
1163                 if (!is_paging(vcpu) && (cr0 & X86_CR0_PG))
1164                         enter_lmode(vcpu);
1165                 if (is_paging(vcpu) && !(cr0 & X86_CR0_PG))
1166                         exit_lmode(vcpu);
1167         }
1168 #endif
1169
1170         vmcs_writel(CR0_READ_SHADOW, cr0);
1171         vmcs_writel(GUEST_CR0,
1172                     (cr0 & ~KVM_GUEST_CR0_MASK) | KVM_VM_CR0_ALWAYS_ON);
1173         vcpu->cr0 = cr0;
1174
1175         if (!(cr0 & X86_CR0_TS) || !(cr0 & X86_CR0_PE))
1176                 vmx_fpu_activate(vcpu);
1177 }
1178
1179 static void vmx_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
1180 {
1181         vmcs_writel(GUEST_CR3, cr3);
1182         if (vcpu->cr0 & X86_CR0_PE)
1183                 vmx_fpu_deactivate(vcpu);
1184 }
1185
1186 static void vmx_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
1187 {
1188         vmcs_writel(CR4_READ_SHADOW, cr4);
1189         vmcs_writel(GUEST_CR4, cr4 | (vcpu->rmode.active ?
1190                     KVM_RMODE_VM_CR4_ALWAYS_ON : KVM_PMODE_VM_CR4_ALWAYS_ON));
1191         vcpu->cr4 = cr4;
1192 }
1193
1194 #ifdef CONFIG_X86_64
1195
1196 static void vmx_set_efer(struct kvm_vcpu *vcpu, u64 efer)
1197 {
1198         struct vcpu_vmx *vmx = to_vmx(vcpu);
1199         struct kvm_msr_entry *msr = find_msr_entry(vmx, MSR_EFER);
1200
1201         vcpu->shadow_efer = efer;
1202         if (efer & EFER_LMA) {
1203                 vmcs_write32(VM_ENTRY_CONTROLS,
1204                                      vmcs_read32(VM_ENTRY_CONTROLS) |
1205                                      VM_ENTRY_IA32E_MODE);
1206                 msr->data = efer;
1207
1208         } else {
1209                 vmcs_write32(VM_ENTRY_CONTROLS,
1210                                      vmcs_read32(VM_ENTRY_CONTROLS) &
1211                                      ~VM_ENTRY_IA32E_MODE);
1212
1213                 msr->data = efer & ~EFER_LME;
1214         }
1215         setup_msrs(vmx);
1216 }
1217
1218 #endif
1219
1220 static u64 vmx_get_segment_base(struct kvm_vcpu *vcpu, int seg)
1221 {
1222         struct kvm_vmx_segment_field *sf = &kvm_vmx_segment_fields[seg];
1223
1224         return vmcs_readl(sf->base);
1225 }
1226
1227 static void vmx_get_segment(struct kvm_vcpu *vcpu,
1228                             struct kvm_segment *var, int seg)
1229 {
1230         struct kvm_vmx_segment_field *sf = &kvm_vmx_segment_fields[seg];
1231         u32 ar;
1232
1233         var->base = vmcs_readl(sf->base);
1234         var->limit = vmcs_read32(sf->limit);
1235         var->selector = vmcs_read16(sf->selector);
1236         ar = vmcs_read32(sf->ar_bytes);
1237         if (ar & AR_UNUSABLE_MASK)
1238                 ar = 0;
1239         var->type = ar & 15;
1240         var->s = (ar >> 4) & 1;
1241         var->dpl = (ar >> 5) & 3;
1242         var->present = (ar >> 7) & 1;
1243         var->avl = (ar >> 12) & 1;
1244         var->l = (ar >> 13) & 1;
1245         var->db = (ar >> 14) & 1;
1246         var->g = (ar >> 15) & 1;
1247         var->unusable = (ar >> 16) & 1;
1248 }
1249
1250 static u32 vmx_segment_access_rights(struct kvm_segment *var)
1251 {
1252         u32 ar;
1253
1254         if (var->unusable)
1255                 ar = 1 << 16;
1256         else {
1257                 ar = var->type & 15;
1258                 ar |= (var->s & 1) << 4;
1259                 ar |= (var->dpl & 3) << 5;
1260                 ar |= (var->present & 1) << 7;
1261                 ar |= (var->avl & 1) << 12;
1262                 ar |= (var->l & 1) << 13;
1263                 ar |= (var->db & 1) << 14;
1264                 ar |= (var->g & 1) << 15;
1265         }
1266         if (ar == 0) /* a 0 value means unusable */
1267                 ar = AR_UNUSABLE_MASK;
1268
1269         return ar;
1270 }
1271
1272 static void vmx_set_segment(struct kvm_vcpu *vcpu,
1273                             struct kvm_segment *var, int seg)
1274 {
1275         struct kvm_vmx_segment_field *sf = &kvm_vmx_segment_fields[seg];
1276         u32 ar;
1277
1278         if (vcpu->rmode.active && seg == VCPU_SREG_TR) {
1279                 vcpu->rmode.tr.selector = var->selector;
1280                 vcpu->rmode.tr.base = var->base;
1281                 vcpu->rmode.tr.limit = var->limit;
1282                 vcpu->rmode.tr.ar = vmx_segment_access_rights(var);
1283                 return;
1284         }
1285         vmcs_writel(sf->base, var->base);
1286         vmcs_write32(sf->limit, var->limit);
1287         vmcs_write16(sf->selector, var->selector);
1288         if (vcpu->rmode.active && var->s) {
1289                 /*
1290                  * Hack real-mode segments into vm86 compatibility.
1291                  */
1292                 if (var->base == 0xffff0000 && var->selector == 0xf000)
1293                         vmcs_writel(sf->base, 0xf0000);
1294                 ar = 0xf3;
1295         } else
1296                 ar = vmx_segment_access_rights(var);
1297         vmcs_write32(sf->ar_bytes, ar);
1298 }
1299
1300 static void vmx_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
1301 {
1302         u32 ar = vmcs_read32(GUEST_CS_AR_BYTES);
1303
1304         *db = (ar >> 14) & 1;
1305         *l = (ar >> 13) & 1;
1306 }
1307
1308 static void vmx_get_idt(struct kvm_vcpu *vcpu, struct descriptor_table *dt)
1309 {
1310         dt->limit = vmcs_read32(GUEST_IDTR_LIMIT);
1311         dt->base = vmcs_readl(GUEST_IDTR_BASE);
1312 }
1313
1314 static void vmx_set_idt(struct kvm_vcpu *vcpu, struct descriptor_table *dt)
1315 {
1316         vmcs_write32(GUEST_IDTR_LIMIT, dt->limit);
1317         vmcs_writel(GUEST_IDTR_BASE, dt->base);
1318 }
1319
1320 static void vmx_get_gdt(struct kvm_vcpu *vcpu, struct descriptor_table *dt)
1321 {
1322         dt->limit = vmcs_read32(GUEST_GDTR_LIMIT);
1323         dt->base = vmcs_readl(GUEST_GDTR_BASE);
1324 }
1325
1326 static void vmx_set_gdt(struct kvm_vcpu *vcpu, struct descriptor_table *dt)
1327 {
1328         vmcs_write32(GUEST_GDTR_LIMIT, dt->limit);
1329         vmcs_writel(GUEST_GDTR_BASE, dt->base);
1330 }
1331
1332 static int init_rmode_tss(struct kvm* kvm)
1333 {
1334         struct page *p1, *p2, *p3;
1335         gfn_t fn = rmode_tss_base(kvm) >> PAGE_SHIFT;
1336         char *page;
1337
1338         p1 = gfn_to_page(kvm, fn++);
1339         p2 = gfn_to_page(kvm, fn++);
1340         p3 = gfn_to_page(kvm, fn);
1341
1342         if (!p1 || !p2 || !p3) {
1343                 kvm_printf(kvm,"%s: gfn_to_page failed\n", __FUNCTION__);
1344                 return 0;
1345         }
1346
1347         page = kmap_atomic(p1, KM_USER0);
1348         clear_page(page);
1349         *(u16*)(page + 0x66) = TSS_BASE_SIZE + TSS_REDIRECTION_SIZE;
1350         kunmap_atomic(page, KM_USER0);
1351
1352         page = kmap_atomic(p2, KM_USER0);
1353         clear_page(page);
1354         kunmap_atomic(page, KM_USER0);
1355
1356         page = kmap_atomic(p3, KM_USER0);
1357         clear_page(page);
1358         *(page + RMODE_TSS_SIZE - 2 * PAGE_SIZE - 1) = ~0;
1359         kunmap_atomic(page, KM_USER0);
1360
1361         return 1;
1362 }
1363
1364 static void seg_setup(int seg)
1365 {
1366         struct kvm_vmx_segment_field *sf = &kvm_vmx_segment_fields[seg];
1367
1368         vmcs_write16(sf->selector, 0);
1369         vmcs_writel(sf->base, 0);
1370         vmcs_write32(sf->limit, 0xffff);
1371         vmcs_write32(sf->ar_bytes, 0x93);
1372 }
1373
1374 /*
1375  * Sets up the vmcs for emulated real mode.
1376  */
1377 static int vmx_vcpu_setup(struct vcpu_vmx *vmx)
1378 {
1379         u32 host_sysenter_cs;
1380         u32 junk;
1381         unsigned long a;
1382         struct descriptor_table dt;
1383         int i;
1384         int ret = 0;
1385         unsigned long kvm_vmx_return;
1386         u64 msr;
1387
1388         if (!init_rmode_tss(vmx->vcpu.kvm)) {
1389                 ret = -ENOMEM;
1390                 goto out;
1391         }
1392
1393         vmx->vcpu.regs[VCPU_REGS_RDX] = get_rdx_init_val();
1394         set_cr8(&vmx->vcpu, 0);
1395         msr = 0xfee00000 | MSR_IA32_APICBASE_ENABLE;
1396         if (vmx->vcpu.vcpu_id == 0)
1397                 msr |= MSR_IA32_APICBASE_BSP;
1398         kvm_set_apic_base(&vmx->vcpu, msr);
1399
1400         fx_init(&vmx->vcpu);
1401
1402         /*
1403          * GUEST_CS_BASE should really be 0xffff0000, but VT vm86 mode
1404          * insists on having GUEST_CS_BASE == GUEST_CS_SELECTOR << 4.  Sigh.
1405          */
1406         vmcs_write16(GUEST_CS_SELECTOR, 0xf000);
1407         vmcs_writel(GUEST_CS_BASE, 0x000f0000);
1408         vmcs_write32(GUEST_CS_LIMIT, 0xffff);
1409         vmcs_write32(GUEST_CS_AR_BYTES, 0x9b);
1410
1411         seg_setup(VCPU_SREG_DS);
1412         seg_setup(VCPU_SREG_ES);
1413         seg_setup(VCPU_SREG_FS);
1414         seg_setup(VCPU_SREG_GS);
1415         seg_setup(VCPU_SREG_SS);
1416
1417         vmcs_write16(GUEST_TR_SELECTOR, 0);
1418         vmcs_writel(GUEST_TR_BASE, 0);
1419         vmcs_write32(GUEST_TR_LIMIT, 0xffff);
1420         vmcs_write32(GUEST_TR_AR_BYTES, 0x008b);
1421
1422         vmcs_write16(GUEST_LDTR_SELECTOR, 0);
1423         vmcs_writel(GUEST_LDTR_BASE, 0);
1424         vmcs_write32(GUEST_LDTR_LIMIT, 0xffff);
1425         vmcs_write32(GUEST_LDTR_AR_BYTES, 0x00082);
1426
1427         vmcs_write32(GUEST_SYSENTER_CS, 0);
1428         vmcs_writel(GUEST_SYSENTER_ESP, 0);
1429         vmcs_writel(GUEST_SYSENTER_EIP, 0);
1430
1431         vmcs_writel(GUEST_RFLAGS, 0x02);
1432         vmcs_writel(GUEST_RIP, 0xfff0);
1433         vmcs_writel(GUEST_RSP, 0);
1434
1435         //todo: dr0 = dr1 = dr2 = dr3 = 0; dr6 = 0xffff0ff0
1436         vmcs_writel(GUEST_DR7, 0x400);
1437
1438         vmcs_writel(GUEST_GDTR_BASE, 0);
1439         vmcs_write32(GUEST_GDTR_LIMIT, 0xffff);
1440
1441         vmcs_writel(GUEST_IDTR_BASE, 0);
1442         vmcs_write32(GUEST_IDTR_LIMIT, 0xffff);
1443
1444         vmcs_write32(GUEST_ACTIVITY_STATE, 0);
1445         vmcs_write32(GUEST_INTERRUPTIBILITY_INFO, 0);
1446         vmcs_write32(GUEST_PENDING_DBG_EXCEPTIONS, 0);
1447
1448         /* I/O */
1449         vmcs_write64(IO_BITMAP_A, page_to_phys(vmx_io_bitmap_a));
1450         vmcs_write64(IO_BITMAP_B, page_to_phys(vmx_io_bitmap_b));
1451
1452         guest_write_tsc(0);
1453
1454         vmcs_write64(VMCS_LINK_POINTER, -1ull); /* 22.3.1.5 */
1455
1456         /* Special registers */
1457         vmcs_write64(GUEST_IA32_DEBUGCTL, 0);
1458
1459         /* Control */
1460         vmcs_write32(PIN_BASED_VM_EXEC_CONTROL,
1461                 vmcs_config.pin_based_exec_ctrl);
1462         vmcs_write32(CPU_BASED_VM_EXEC_CONTROL,
1463                 vmcs_config.cpu_based_exec_ctrl);
1464
1465         vmcs_write32(PAGE_FAULT_ERROR_CODE_MASK, 0);
1466         vmcs_write32(PAGE_FAULT_ERROR_CODE_MATCH, 0);
1467         vmcs_write32(CR3_TARGET_COUNT, 0);           /* 22.2.1 */
1468
1469         vmcs_writel(HOST_CR0, read_cr0());  /* 22.2.3 */
1470         vmcs_writel(HOST_CR4, read_cr4());  /* 22.2.3, 22.2.5 */
1471         vmcs_writel(HOST_CR3, read_cr3());  /* 22.2.3  FIXME: shadow tables */
1472
1473         vmcs_write16(HOST_CS_SELECTOR, __KERNEL_CS);  /* 22.2.4 */
1474         vmcs_write16(HOST_DS_SELECTOR, __KERNEL_DS);  /* 22.2.4 */
1475         vmcs_write16(HOST_ES_SELECTOR, __KERNEL_DS);  /* 22.2.4 */
1476         vmcs_write16(HOST_FS_SELECTOR, read_fs());    /* 22.2.4 */
1477         vmcs_write16(HOST_GS_SELECTOR, read_gs());    /* 22.2.4 */
1478         vmcs_write16(HOST_SS_SELECTOR, __KERNEL_DS);  /* 22.2.4 */
1479 #ifdef CONFIG_X86_64
1480         rdmsrl(MSR_FS_BASE, a);
1481         vmcs_writel(HOST_FS_BASE, a); /* 22.2.4 */
1482         rdmsrl(MSR_GS_BASE, a);
1483         vmcs_writel(HOST_GS_BASE, a); /* 22.2.4 */
1484 #else
1485         vmcs_writel(HOST_FS_BASE, 0); /* 22.2.4 */
1486         vmcs_writel(HOST_GS_BASE, 0); /* 22.2.4 */
1487 #endif
1488
1489         vmcs_write16(HOST_TR_SELECTOR, GDT_ENTRY_TSS*8);  /* 22.2.4 */
1490
1491         get_idt(&dt);
1492         vmcs_writel(HOST_IDTR_BASE, dt.base);   /* 22.2.4 */
1493
1494         asm ("mov $.Lkvm_vmx_return, %0" : "=r"(kvm_vmx_return));
1495         vmcs_writel(HOST_RIP, kvm_vmx_return); /* 22.2.5 */
1496         vmcs_write32(VM_EXIT_MSR_STORE_COUNT, 0);
1497         vmcs_write32(VM_EXIT_MSR_LOAD_COUNT, 0);
1498         vmcs_write32(VM_ENTRY_MSR_LOAD_COUNT, 0);
1499
1500         rdmsr(MSR_IA32_SYSENTER_CS, host_sysenter_cs, junk);
1501         vmcs_write32(HOST_IA32_SYSENTER_CS, host_sysenter_cs);
1502         rdmsrl(MSR_IA32_SYSENTER_ESP, a);
1503         vmcs_writel(HOST_IA32_SYSENTER_ESP, a);   /* 22.2.3 */
1504         rdmsrl(MSR_IA32_SYSENTER_EIP, a);
1505         vmcs_writel(HOST_IA32_SYSENTER_EIP, a);   /* 22.2.3 */
1506
1507         for (i = 0; i < NR_VMX_MSR; ++i) {
1508                 u32 index = vmx_msr_index[i];
1509                 u32 data_low, data_high;
1510                 u64 data;
1511                 int j = vmx->nmsrs;
1512
1513                 if (rdmsr_safe(index, &data_low, &data_high) < 0)
1514                         continue;
1515                 if (wrmsr_safe(index, data_low, data_high) < 0)
1516                         continue;
1517                 data = data_low | ((u64)data_high << 32);
1518                 vmx->host_msrs[j].index = index;
1519                 vmx->host_msrs[j].reserved = 0;
1520                 vmx->host_msrs[j].data = data;
1521                 vmx->guest_msrs[j] = vmx->host_msrs[j];
1522                 ++vmx->nmsrs;
1523         }
1524
1525         setup_msrs(vmx);
1526
1527         vmcs_write32(VM_EXIT_CONTROLS, vmcs_config.vmexit_ctrl);
1528
1529         /* 22.2.1, 20.8.1 */
1530         vmcs_write32(VM_ENTRY_CONTROLS, vmcs_config.vmentry_ctrl);
1531
1532         vmcs_write32(VM_ENTRY_INTR_INFO_FIELD, 0);  /* 22.2.1 */
1533
1534 #ifdef CONFIG_X86_64
1535         vmcs_writel(VIRTUAL_APIC_PAGE_ADDR, 0);
1536         vmcs_writel(TPR_THRESHOLD, 0);
1537 #endif
1538
1539         vmcs_writel(CR0_GUEST_HOST_MASK, ~0UL);
1540         vmcs_writel(CR4_GUEST_HOST_MASK, KVM_GUEST_CR4_MASK);
1541
1542         vmx->vcpu.cr0 = 0x60000010;
1543         vmx_set_cr0(&vmx->vcpu, vmx->vcpu.cr0); // enter rmode
1544         vmx_set_cr4(&vmx->vcpu, 0);
1545 #ifdef CONFIG_X86_64
1546         vmx_set_efer(&vmx->vcpu, 0);
1547 #endif
1548         vmx_fpu_activate(&vmx->vcpu);
1549         update_exception_bitmap(&vmx->vcpu);
1550
1551         return 0;
1552
1553 out:
1554         return ret;
1555 }
1556
1557 static void inject_rmode_irq(struct kvm_vcpu *vcpu, int irq)
1558 {
1559         u16 ent[2];
1560         u16 cs;
1561         u16 ip;
1562         unsigned long flags;
1563         unsigned long ss_base = vmcs_readl(GUEST_SS_BASE);
1564         u16 sp =  vmcs_readl(GUEST_RSP);
1565         u32 ss_limit = vmcs_read32(GUEST_SS_LIMIT);
1566
1567         if (sp > ss_limit || sp < 6 ) {
1568                 vcpu_printf(vcpu, "%s: #SS, rsp 0x%lx ss 0x%lx limit 0x%x\n",
1569                             __FUNCTION__,
1570                             vmcs_readl(GUEST_RSP),
1571                             vmcs_readl(GUEST_SS_BASE),
1572                             vmcs_read32(GUEST_SS_LIMIT));
1573                 return;
1574         }
1575
1576         if (emulator_read_std(irq * sizeof(ent), &ent, sizeof(ent), vcpu) !=
1577                                                         X86EMUL_CONTINUE) {
1578                 vcpu_printf(vcpu, "%s: read guest err\n", __FUNCTION__);
1579                 return;
1580         }
1581
1582         flags =  vmcs_readl(GUEST_RFLAGS);
1583         cs =  vmcs_readl(GUEST_CS_BASE) >> 4;
1584         ip =  vmcs_readl(GUEST_RIP);
1585
1586
1587         if (emulator_write_emulated(ss_base + sp - 2, &flags, 2, vcpu) != X86EMUL_CONTINUE ||
1588             emulator_write_emulated(ss_base + sp - 4, &cs, 2, vcpu) != X86EMUL_CONTINUE ||
1589             emulator_write_emulated(ss_base + sp - 6, &ip, 2, vcpu) != X86EMUL_CONTINUE) {
1590                 vcpu_printf(vcpu, "%s: write guest err\n", __FUNCTION__);
1591                 return;
1592         }
1593
1594         vmcs_writel(GUEST_RFLAGS, flags &
1595                     ~( X86_EFLAGS_IF | X86_EFLAGS_AC | X86_EFLAGS_TF));
1596         vmcs_write16(GUEST_CS_SELECTOR, ent[1]) ;
1597         vmcs_writel(GUEST_CS_BASE, ent[1] << 4);
1598         vmcs_writel(GUEST_RIP, ent[0]);
1599         vmcs_writel(GUEST_RSP, (vmcs_readl(GUEST_RSP) & ~0xffff) | (sp - 6));
1600 }
1601
1602 static void vmx_inject_irq(struct kvm_vcpu *vcpu, int irq)
1603 {
1604         if (vcpu->rmode.active) {
1605                 inject_rmode_irq(vcpu, irq);
1606                 return;
1607         }
1608         vmcs_write32(VM_ENTRY_INTR_INFO_FIELD,
1609                         irq | INTR_TYPE_EXT_INTR | INTR_INFO_VALID_MASK);
1610 }
1611
1612 static void kvm_do_inject_irq(struct kvm_vcpu *vcpu)
1613 {
1614         int word_index = __ffs(vcpu->irq_summary);
1615         int bit_index = __ffs(vcpu->irq_pending[word_index]);
1616         int irq = word_index * BITS_PER_LONG + bit_index;
1617
1618         clear_bit(bit_index, &vcpu->irq_pending[word_index]);
1619         if (!vcpu->irq_pending[word_index])
1620                 clear_bit(word_index, &vcpu->irq_summary);
1621         vmx_inject_irq(vcpu, irq);
1622 }
1623
1624
1625 static void do_interrupt_requests(struct kvm_vcpu *vcpu,
1626                                        struct kvm_run *kvm_run)
1627 {
1628         u32 cpu_based_vm_exec_control;
1629
1630         vcpu->interrupt_window_open =
1631                 ((vmcs_readl(GUEST_RFLAGS) & X86_EFLAGS_IF) &&
1632                  (vmcs_read32(GUEST_INTERRUPTIBILITY_INFO) & 3) == 0);
1633
1634         if (vcpu->interrupt_window_open &&
1635             vcpu->irq_summary &&
1636             !(vmcs_read32(VM_ENTRY_INTR_INFO_FIELD) & INTR_INFO_VALID_MASK))
1637                 /*
1638                  * If interrupts enabled, and not blocked by sti or mov ss. Good.
1639                  */
1640                 kvm_do_inject_irq(vcpu);
1641
1642         cpu_based_vm_exec_control = vmcs_read32(CPU_BASED_VM_EXEC_CONTROL);
1643         if (!vcpu->interrupt_window_open &&
1644             (vcpu->irq_summary || kvm_run->request_interrupt_window))
1645                 /*
1646                  * Interrupts blocked.  Wait for unblock.
1647                  */
1648                 cpu_based_vm_exec_control |= CPU_BASED_VIRTUAL_INTR_PENDING;
1649         else
1650                 cpu_based_vm_exec_control &= ~CPU_BASED_VIRTUAL_INTR_PENDING;
1651         vmcs_write32(CPU_BASED_VM_EXEC_CONTROL, cpu_based_vm_exec_control);
1652 }
1653
1654 static void kvm_guest_debug_pre(struct kvm_vcpu *vcpu)
1655 {
1656         struct kvm_guest_debug *dbg = &vcpu->guest_debug;
1657
1658         set_debugreg(dbg->bp[0], 0);
1659         set_debugreg(dbg->bp[1], 1);
1660         set_debugreg(dbg->bp[2], 2);
1661         set_debugreg(dbg->bp[3], 3);
1662
1663         if (dbg->singlestep) {
1664                 unsigned long flags;
1665
1666                 flags = vmcs_readl(GUEST_RFLAGS);
1667                 flags |= X86_EFLAGS_TF | X86_EFLAGS_RF;
1668                 vmcs_writel(GUEST_RFLAGS, flags);
1669         }
1670 }
1671
1672 static int handle_rmode_exception(struct kvm_vcpu *vcpu,
1673                                   int vec, u32 err_code)
1674 {
1675         if (!vcpu->rmode.active)
1676                 return 0;
1677
1678         /*
1679          * Instruction with address size override prefix opcode 0x67
1680          * Cause the #SS fault with 0 error code in VM86 mode.
1681          */
1682         if (((vec == GP_VECTOR) || (vec == SS_VECTOR)) && err_code == 0)
1683                 if (emulate_instruction(vcpu, NULL, 0, 0) == EMULATE_DONE)
1684                         return 1;
1685         return 0;
1686 }
1687
1688 static int handle_exception(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1689 {
1690         u32 intr_info, error_code;
1691         unsigned long cr2, rip;
1692         u32 vect_info;
1693         enum emulation_result er;
1694         int r;
1695
1696         vect_info = vmcs_read32(IDT_VECTORING_INFO_FIELD);
1697         intr_info = vmcs_read32(VM_EXIT_INTR_INFO);
1698
1699         if ((vect_info & VECTORING_INFO_VALID_MASK) &&
1700                                                 !is_page_fault(intr_info)) {
1701                 printk(KERN_ERR "%s: unexpected, vectoring info 0x%x "
1702                        "intr info 0x%x\n", __FUNCTION__, vect_info, intr_info);
1703         }
1704
1705         if (!irqchip_in_kernel(vcpu->kvm) && is_external_interrupt(vect_info)) {
1706                 int irq = vect_info & VECTORING_INFO_VECTOR_MASK;
1707                 set_bit(irq, vcpu->irq_pending);
1708                 set_bit(irq / BITS_PER_LONG, &vcpu->irq_summary);
1709         }
1710
1711         if ((intr_info & INTR_INFO_INTR_TYPE_MASK) == 0x200) { /* nmi */
1712                 asm ("int $2");
1713                 return 1;
1714         }
1715
1716         if (is_no_device(intr_info)) {
1717                 vmx_fpu_activate(vcpu);
1718                 return 1;
1719         }
1720
1721         error_code = 0;
1722         rip = vmcs_readl(GUEST_RIP);
1723         if (intr_info & INTR_INFO_DELIEVER_CODE_MASK)
1724                 error_code = vmcs_read32(VM_EXIT_INTR_ERROR_CODE);
1725         if (is_page_fault(intr_info)) {
1726                 cr2 = vmcs_readl(EXIT_QUALIFICATION);
1727
1728                 mutex_lock(&vcpu->kvm->lock);
1729                 r = kvm_mmu_page_fault(vcpu, cr2, error_code);
1730                 if (r < 0) {
1731                         mutex_unlock(&vcpu->kvm->lock);
1732                         return r;
1733                 }
1734                 if (!r) {
1735                         mutex_unlock(&vcpu->kvm->lock);
1736                         return 1;
1737                 }
1738
1739                 er = emulate_instruction(vcpu, kvm_run, cr2, error_code);
1740                 mutex_unlock(&vcpu->kvm->lock);
1741
1742                 switch (er) {
1743                 case EMULATE_DONE:
1744                         return 1;
1745                 case EMULATE_DO_MMIO:
1746                         ++vcpu->stat.mmio_exits;
1747                         return 0;
1748                  case EMULATE_FAIL:
1749                         vcpu_printf(vcpu, "%s: emulate fail\n", __FUNCTION__);
1750                         break;
1751                 default:
1752                         BUG();
1753                 }
1754         }
1755
1756         if (vcpu->rmode.active &&
1757             handle_rmode_exception(vcpu, intr_info & INTR_INFO_VECTOR_MASK,
1758                                                                 error_code)) {
1759                 if (vcpu->halt_request) {
1760                         vcpu->halt_request = 0;
1761                         return kvm_emulate_halt(vcpu);
1762                 }
1763                 return 1;
1764         }
1765
1766         if ((intr_info & (INTR_INFO_INTR_TYPE_MASK | INTR_INFO_VECTOR_MASK)) == (INTR_TYPE_EXCEPTION | 1)) {
1767                 kvm_run->exit_reason = KVM_EXIT_DEBUG;
1768                 return 0;
1769         }
1770         kvm_run->exit_reason = KVM_EXIT_EXCEPTION;
1771         kvm_run->ex.exception = intr_info & INTR_INFO_VECTOR_MASK;
1772         kvm_run->ex.error_code = error_code;
1773         return 0;
1774 }
1775
1776 static int handle_external_interrupt(struct kvm_vcpu *vcpu,
1777                                      struct kvm_run *kvm_run)
1778 {
1779         ++vcpu->stat.irq_exits;
1780         return 1;
1781 }
1782
1783 static int handle_triple_fault(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1784 {
1785         kvm_run->exit_reason = KVM_EXIT_SHUTDOWN;
1786         return 0;
1787 }
1788
1789 static int handle_io(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1790 {
1791         u64 exit_qualification;
1792         int size, down, in, string, rep;
1793         unsigned port;
1794
1795         ++vcpu->stat.io_exits;
1796         exit_qualification = vmcs_read64(EXIT_QUALIFICATION);
1797         string = (exit_qualification & 16) != 0;
1798
1799         if (string) {
1800                 if (emulate_instruction(vcpu, kvm_run, 0, 0) == EMULATE_DO_MMIO)
1801                         return 0;
1802                 return 1;
1803         }
1804
1805         size = (exit_qualification & 7) + 1;
1806         in = (exit_qualification & 8) != 0;
1807         down = (vmcs_readl(GUEST_RFLAGS) & X86_EFLAGS_DF) != 0;
1808         rep = (exit_qualification & 32) != 0;
1809         port = exit_qualification >> 16;
1810
1811         return kvm_emulate_pio(vcpu, kvm_run, in, size, port);
1812 }
1813
1814 static void
1815 vmx_patch_hypercall(struct kvm_vcpu *vcpu, unsigned char *hypercall)
1816 {
1817         /*
1818          * Patch in the VMCALL instruction:
1819          */
1820         hypercall[0] = 0x0f;
1821         hypercall[1] = 0x01;
1822         hypercall[2] = 0xc1;
1823         hypercall[3] = 0xc3;
1824 }
1825
1826 static int handle_cr(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1827 {
1828         u64 exit_qualification;
1829         int cr;
1830         int reg;
1831
1832         exit_qualification = vmcs_read64(EXIT_QUALIFICATION);
1833         cr = exit_qualification & 15;
1834         reg = (exit_qualification >> 8) & 15;
1835         switch ((exit_qualification >> 4) & 3) {
1836         case 0: /* mov to cr */
1837                 switch (cr) {
1838                 case 0:
1839                         vcpu_load_rsp_rip(vcpu);
1840                         set_cr0(vcpu, vcpu->regs[reg]);
1841                         skip_emulated_instruction(vcpu);
1842                         return 1;
1843                 case 3:
1844                         vcpu_load_rsp_rip(vcpu);
1845                         set_cr3(vcpu, vcpu->regs[reg]);
1846                         skip_emulated_instruction(vcpu);
1847                         return 1;
1848                 case 4:
1849                         vcpu_load_rsp_rip(vcpu);
1850                         set_cr4(vcpu, vcpu->regs[reg]);
1851                         skip_emulated_instruction(vcpu);
1852                         return 1;
1853                 case 8:
1854                         vcpu_load_rsp_rip(vcpu);
1855                         set_cr8(vcpu, vcpu->regs[reg]);
1856                         skip_emulated_instruction(vcpu);
1857                         kvm_run->exit_reason = KVM_EXIT_SET_TPR;
1858                         return 0;
1859                 };
1860                 break;
1861         case 2: /* clts */
1862                 vcpu_load_rsp_rip(vcpu);
1863                 vmx_fpu_deactivate(vcpu);
1864                 vcpu->cr0 &= ~X86_CR0_TS;
1865                 vmcs_writel(CR0_READ_SHADOW, vcpu->cr0);
1866                 vmx_fpu_activate(vcpu);
1867                 skip_emulated_instruction(vcpu);
1868                 return 1;
1869         case 1: /*mov from cr*/
1870                 switch (cr) {
1871                 case 3:
1872                         vcpu_load_rsp_rip(vcpu);
1873                         vcpu->regs[reg] = vcpu->cr3;
1874                         vcpu_put_rsp_rip(vcpu);
1875                         skip_emulated_instruction(vcpu);
1876                         return 1;
1877                 case 8:
1878                         vcpu_load_rsp_rip(vcpu);
1879                         vcpu->regs[reg] = get_cr8(vcpu);
1880                         vcpu_put_rsp_rip(vcpu);
1881                         skip_emulated_instruction(vcpu);
1882                         return 1;
1883                 }
1884                 break;
1885         case 3: /* lmsw */
1886                 lmsw(vcpu, (exit_qualification >> LMSW_SOURCE_DATA_SHIFT) & 0x0f);
1887
1888                 skip_emulated_instruction(vcpu);
1889                 return 1;
1890         default:
1891                 break;
1892         }
1893         kvm_run->exit_reason = 0;
1894         pr_unimpl(vcpu, "unhandled control register: op %d cr %d\n",
1895                (int)(exit_qualification >> 4) & 3, cr);
1896         return 0;
1897 }
1898
1899 static int handle_dr(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1900 {
1901         u64 exit_qualification;
1902         unsigned long val;
1903         int dr, reg;
1904
1905         /*
1906          * FIXME: this code assumes the host is debugging the guest.
1907          *        need to deal with guest debugging itself too.
1908          */
1909         exit_qualification = vmcs_read64(EXIT_QUALIFICATION);
1910         dr = exit_qualification & 7;
1911         reg = (exit_qualification >> 8) & 15;
1912         vcpu_load_rsp_rip(vcpu);
1913         if (exit_qualification & 16) {
1914                 /* mov from dr */
1915                 switch (dr) {
1916                 case 6:
1917                         val = 0xffff0ff0;
1918                         break;
1919                 case 7:
1920                         val = 0x400;
1921                         break;
1922                 default:
1923                         val = 0;
1924                 }
1925                 vcpu->regs[reg] = val;
1926         } else {
1927                 /* mov to dr */
1928         }
1929         vcpu_put_rsp_rip(vcpu);
1930         skip_emulated_instruction(vcpu);
1931         return 1;
1932 }
1933
1934 static int handle_cpuid(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1935 {
1936         kvm_emulate_cpuid(vcpu);
1937         return 1;
1938 }
1939
1940 static int handle_rdmsr(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1941 {
1942         u32 ecx = vcpu->regs[VCPU_REGS_RCX];
1943         u64 data;
1944
1945         if (vmx_get_msr(vcpu, ecx, &data)) {
1946                 vmx_inject_gp(vcpu, 0);
1947                 return 1;
1948         }
1949
1950         /* FIXME: handling of bits 32:63 of rax, rdx */
1951         vcpu->regs[VCPU_REGS_RAX] = data & -1u;
1952         vcpu->regs[VCPU_REGS_RDX] = (data >> 32) & -1u;
1953         skip_emulated_instruction(vcpu);
1954         return 1;
1955 }
1956
1957 static int handle_wrmsr(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1958 {
1959         u32 ecx = vcpu->regs[VCPU_REGS_RCX];
1960         u64 data = (vcpu->regs[VCPU_REGS_RAX] & -1u)
1961                 | ((u64)(vcpu->regs[VCPU_REGS_RDX] & -1u) << 32);
1962
1963         if (vmx_set_msr(vcpu, ecx, data) != 0) {
1964                 vmx_inject_gp(vcpu, 0);
1965                 return 1;
1966         }
1967
1968         skip_emulated_instruction(vcpu);
1969         return 1;
1970 }
1971
1972 static void post_kvm_run_save(struct kvm_vcpu *vcpu,
1973                               struct kvm_run *kvm_run)
1974 {
1975         kvm_run->if_flag = (vmcs_readl(GUEST_RFLAGS) & X86_EFLAGS_IF) != 0;
1976         kvm_run->cr8 = get_cr8(vcpu);
1977         kvm_run->apic_base = kvm_get_apic_base(vcpu);
1978         if (irqchip_in_kernel(vcpu->kvm))
1979                 kvm_run->ready_for_interrupt_injection = 1;
1980         else
1981                 kvm_run->ready_for_interrupt_injection =
1982                                         (vcpu->interrupt_window_open &&
1983                                          vcpu->irq_summary == 0);
1984 }
1985
1986 static int handle_interrupt_window(struct kvm_vcpu *vcpu,
1987                                    struct kvm_run *kvm_run)
1988 {
1989         u32 cpu_based_vm_exec_control;
1990
1991         /* clear pending irq */
1992         cpu_based_vm_exec_control = vmcs_read32(CPU_BASED_VM_EXEC_CONTROL);
1993         cpu_based_vm_exec_control &= ~CPU_BASED_VIRTUAL_INTR_PENDING;
1994         vmcs_write32(CPU_BASED_VM_EXEC_CONTROL, cpu_based_vm_exec_control);
1995         /*
1996          * If the user space waits to inject interrupts, exit as soon as
1997          * possible
1998          */
1999         if (kvm_run->request_interrupt_window &&
2000             !vcpu->irq_summary) {
2001                 kvm_run->exit_reason = KVM_EXIT_IRQ_WINDOW_OPEN;
2002                 ++vcpu->stat.irq_window_exits;
2003                 return 0;
2004         }
2005         return 1;
2006 }
2007
2008 static int handle_halt(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
2009 {
2010         skip_emulated_instruction(vcpu);
2011         return kvm_emulate_halt(vcpu);
2012 }
2013
2014 static int handle_vmcall(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
2015 {
2016         skip_emulated_instruction(vcpu);
2017         return kvm_hypercall(vcpu, kvm_run);
2018 }
2019
2020 /*
2021  * The exit handlers return 1 if the exit was handled fully and guest execution
2022  * may resume.  Otherwise they set the kvm_run parameter to indicate what needs
2023  * to be done to userspace and return 0.
2024  */
2025 static int (*kvm_vmx_exit_handlers[])(struct kvm_vcpu *vcpu,
2026                                       struct kvm_run *kvm_run) = {
2027         [EXIT_REASON_EXCEPTION_NMI]           = handle_exception,
2028         [EXIT_REASON_EXTERNAL_INTERRUPT]      = handle_external_interrupt,
2029         [EXIT_REASON_TRIPLE_FAULT]            = handle_triple_fault,
2030         [EXIT_REASON_IO_INSTRUCTION]          = handle_io,
2031         [EXIT_REASON_CR_ACCESS]               = handle_cr,
2032         [EXIT_REASON_DR_ACCESS]               = handle_dr,
2033         [EXIT_REASON_CPUID]                   = handle_cpuid,
2034         [EXIT_REASON_MSR_READ]                = handle_rdmsr,
2035         [EXIT_REASON_MSR_WRITE]               = handle_wrmsr,
2036         [EXIT_REASON_PENDING_INTERRUPT]       = handle_interrupt_window,
2037         [EXIT_REASON_HLT]                     = handle_halt,
2038         [EXIT_REASON_VMCALL]                  = handle_vmcall,
2039 };
2040
2041 static const int kvm_vmx_max_exit_handlers =
2042         ARRAY_SIZE(kvm_vmx_exit_handlers);
2043
2044 /*
2045  * The guest has exited.  See if we can fix it or if we need userspace
2046  * assistance.
2047  */
2048 static int kvm_handle_exit(struct kvm_run *kvm_run, struct kvm_vcpu *vcpu)
2049 {
2050         u32 vectoring_info = vmcs_read32(IDT_VECTORING_INFO_FIELD);
2051         u32 exit_reason = vmcs_read32(VM_EXIT_REASON);
2052
2053         if ( (vectoring_info & VECTORING_INFO_VALID_MASK) &&
2054                                 exit_reason != EXIT_REASON_EXCEPTION_NMI )
2055                 printk(KERN_WARNING "%s: unexpected, valid vectoring info and "
2056                        "exit reason is 0x%x\n", __FUNCTION__, exit_reason);
2057         if (exit_reason < kvm_vmx_max_exit_handlers
2058             && kvm_vmx_exit_handlers[exit_reason])
2059                 return kvm_vmx_exit_handlers[exit_reason](vcpu, kvm_run);
2060         else {
2061                 kvm_run->exit_reason = KVM_EXIT_UNKNOWN;
2062                 kvm_run->hw.hardware_exit_reason = exit_reason;
2063         }
2064         return 0;
2065 }
2066
2067 /*
2068  * Check if userspace requested an interrupt window, and that the
2069  * interrupt window is open.
2070  *
2071  * No need to exit to userspace if we already have an interrupt queued.
2072  */
2073 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu,
2074                                           struct kvm_run *kvm_run)
2075 {
2076         return (!vcpu->irq_summary &&
2077                 kvm_run->request_interrupt_window &&
2078                 vcpu->interrupt_window_open &&
2079                 (vmcs_readl(GUEST_RFLAGS) & X86_EFLAGS_IF));
2080 }
2081
2082 static void vmx_flush_tlb(struct kvm_vcpu *vcpu)
2083 {
2084 }
2085
2086 static void enable_irq_window(struct kvm_vcpu *vcpu)
2087 {
2088         u32 cpu_based_vm_exec_control;
2089
2090         cpu_based_vm_exec_control = vmcs_read32(CPU_BASED_VM_EXEC_CONTROL);
2091         cpu_based_vm_exec_control |= CPU_BASED_VIRTUAL_INTR_PENDING;
2092         vmcs_write32(CPU_BASED_VM_EXEC_CONTROL, cpu_based_vm_exec_control);
2093 }
2094
2095 static void vmx_intr_assist(struct kvm_vcpu *vcpu)
2096 {
2097         u32 idtv_info_field, intr_info_field;
2098         int has_ext_irq, interrupt_window_open;
2099
2100         has_ext_irq = kvm_cpu_has_interrupt(vcpu);
2101         intr_info_field = vmcs_read32(VM_ENTRY_INTR_INFO_FIELD);
2102         idtv_info_field = vmcs_read32(IDT_VECTORING_INFO_FIELD);
2103         if (intr_info_field & INTR_INFO_VALID_MASK) {
2104                 if (idtv_info_field & INTR_INFO_VALID_MASK) {
2105                         /* TODO: fault when IDT_Vectoring */
2106                         printk(KERN_ERR "Fault when IDT_Vectoring\n");
2107                 }
2108                 if (has_ext_irq)
2109                         enable_irq_window(vcpu);
2110                 return;
2111         }
2112         if (unlikely(idtv_info_field & INTR_INFO_VALID_MASK)) {
2113                 vmcs_write32(VM_ENTRY_INTR_INFO_FIELD, idtv_info_field);
2114                 vmcs_write32(VM_ENTRY_INSTRUCTION_LEN,
2115                                 vmcs_read32(VM_EXIT_INSTRUCTION_LEN));
2116
2117                 if (unlikely(idtv_info_field & INTR_INFO_DELIEVER_CODE_MASK))
2118                         vmcs_write32(VM_ENTRY_EXCEPTION_ERROR_CODE,
2119                                 vmcs_read32(IDT_VECTORING_ERROR_CODE));
2120                 if (unlikely(has_ext_irq))
2121                         enable_irq_window(vcpu);
2122                 return;
2123         }
2124         if (!has_ext_irq)
2125                 return;
2126         interrupt_window_open =
2127                 ((vmcs_readl(GUEST_RFLAGS) & X86_EFLAGS_IF) &&
2128                  (vmcs_read32(GUEST_INTERRUPTIBILITY_INFO) & 3) == 0);
2129         if (interrupt_window_open)
2130                 vmx_inject_irq(vcpu, kvm_cpu_get_interrupt(vcpu));
2131         else
2132                 enable_irq_window(vcpu);
2133 }
2134
2135 static int vmx_vcpu_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
2136 {
2137         struct vcpu_vmx *vmx = to_vmx(vcpu);
2138         u8 fail;
2139         int r;
2140
2141 preempted:
2142         if (vcpu->guest_debug.enabled)
2143                 kvm_guest_debug_pre(vcpu);
2144
2145 again:
2146         r = kvm_mmu_reload(vcpu);
2147         if (unlikely(r))
2148                 goto out;
2149
2150         preempt_disable();
2151
2152         vmx_save_host_state(vmx);
2153         kvm_load_guest_fpu(vcpu);
2154
2155         /*
2156          * Loading guest fpu may have cleared host cr0.ts
2157          */
2158         vmcs_writel(HOST_CR0, read_cr0());
2159
2160         local_irq_disable();
2161
2162         if (signal_pending(current)) {
2163                 local_irq_enable();
2164                 preempt_enable();
2165                 r = -EINTR;
2166                 kvm_run->exit_reason = KVM_EXIT_INTR;
2167                 ++vcpu->stat.signal_exits;
2168                 goto out;
2169         }
2170
2171         if (irqchip_in_kernel(vcpu->kvm))
2172                 vmx_intr_assist(vcpu);
2173         else if (!vcpu->mmio_read_completed)
2174                 do_interrupt_requests(vcpu, kvm_run);
2175
2176         vcpu->guest_mode = 1;
2177         if (vcpu->requests)
2178                 if (test_and_clear_bit(KVM_TLB_FLUSH, &vcpu->requests))
2179                     vmx_flush_tlb(vcpu);
2180
2181         asm (
2182                 /* Store host registers */
2183 #ifdef CONFIG_X86_64
2184                 "push %%rax; push %%rbx; push %%rdx;"
2185                 "push %%rsi; push %%rdi; push %%rbp;"
2186                 "push %%r8;  push %%r9;  push %%r10; push %%r11;"
2187                 "push %%r12; push %%r13; push %%r14; push %%r15;"
2188                 "push %%rcx \n\t"
2189                 ASM_VMX_VMWRITE_RSP_RDX "\n\t"
2190 #else
2191                 "pusha; push %%ecx \n\t"
2192                 ASM_VMX_VMWRITE_RSP_RDX "\n\t"
2193 #endif
2194                 /* Check if vmlaunch of vmresume is needed */
2195                 "cmp $0, %1 \n\t"
2196                 /* Load guest registers.  Don't clobber flags. */
2197 #ifdef CONFIG_X86_64
2198                 "mov %c[cr2](%3), %%rax \n\t"
2199                 "mov %%rax, %%cr2 \n\t"
2200                 "mov %c[rax](%3), %%rax \n\t"
2201                 "mov %c[rbx](%3), %%rbx \n\t"
2202                 "mov %c[rdx](%3), %%rdx \n\t"
2203                 "mov %c[rsi](%3), %%rsi \n\t"
2204                 "mov %c[rdi](%3), %%rdi \n\t"
2205                 "mov %c[rbp](%3), %%rbp \n\t"
2206                 "mov %c[r8](%3),  %%r8  \n\t"
2207                 "mov %c[r9](%3),  %%r9  \n\t"
2208                 "mov %c[r10](%3), %%r10 \n\t"
2209                 "mov %c[r11](%3), %%r11 \n\t"
2210                 "mov %c[r12](%3), %%r12 \n\t"
2211                 "mov %c[r13](%3), %%r13 \n\t"
2212                 "mov %c[r14](%3), %%r14 \n\t"
2213                 "mov %c[r15](%3), %%r15 \n\t"
2214                 "mov %c[rcx](%3), %%rcx \n\t" /* kills %3 (rcx) */
2215 #else
2216                 "mov %c[cr2](%3), %%eax \n\t"
2217                 "mov %%eax,   %%cr2 \n\t"
2218                 "mov %c[rax](%3), %%eax \n\t"
2219                 "mov %c[rbx](%3), %%ebx \n\t"
2220                 "mov %c[rdx](%3), %%edx \n\t"
2221                 "mov %c[rsi](%3), %%esi \n\t"
2222                 "mov %c[rdi](%3), %%edi \n\t"
2223                 "mov %c[rbp](%3), %%ebp \n\t"
2224                 "mov %c[rcx](%3), %%ecx \n\t" /* kills %3 (ecx) */
2225 #endif
2226                 /* Enter guest mode */
2227                 "jne .Llaunched \n\t"
2228                 ASM_VMX_VMLAUNCH "\n\t"
2229                 "jmp .Lkvm_vmx_return \n\t"
2230                 ".Llaunched: " ASM_VMX_VMRESUME "\n\t"
2231                 ".Lkvm_vmx_return: "
2232                 /* Save guest registers, load host registers, keep flags */
2233 #ifdef CONFIG_X86_64
2234                 "xchg %3,     (%%rsp) \n\t"
2235                 "mov %%rax, %c[rax](%3) \n\t"
2236                 "mov %%rbx, %c[rbx](%3) \n\t"
2237                 "pushq (%%rsp); popq %c[rcx](%3) \n\t"
2238                 "mov %%rdx, %c[rdx](%3) \n\t"
2239                 "mov %%rsi, %c[rsi](%3) \n\t"
2240                 "mov %%rdi, %c[rdi](%3) \n\t"
2241                 "mov %%rbp, %c[rbp](%3) \n\t"
2242                 "mov %%r8,  %c[r8](%3) \n\t"
2243                 "mov %%r9,  %c[r9](%3) \n\t"
2244                 "mov %%r10, %c[r10](%3) \n\t"
2245                 "mov %%r11, %c[r11](%3) \n\t"
2246                 "mov %%r12, %c[r12](%3) \n\t"
2247                 "mov %%r13, %c[r13](%3) \n\t"
2248                 "mov %%r14, %c[r14](%3) \n\t"
2249                 "mov %%r15, %c[r15](%3) \n\t"
2250                 "mov %%cr2, %%rax   \n\t"
2251                 "mov %%rax, %c[cr2](%3) \n\t"
2252                 "mov (%%rsp), %3 \n\t"
2253
2254                 "pop  %%rcx; pop  %%r15; pop  %%r14; pop  %%r13; pop  %%r12;"
2255                 "pop  %%r11; pop  %%r10; pop  %%r9;  pop  %%r8;"
2256                 "pop  %%rbp; pop  %%rdi; pop  %%rsi;"
2257                 "pop  %%rdx; pop  %%rbx; pop  %%rax \n\t"
2258 #else
2259                 "xchg %3, (%%esp) \n\t"
2260                 "mov %%eax, %c[rax](%3) \n\t"
2261                 "mov %%ebx, %c[rbx](%3) \n\t"
2262                 "pushl (%%esp); popl %c[rcx](%3) \n\t"
2263                 "mov %%edx, %c[rdx](%3) \n\t"
2264                 "mov %%esi, %c[rsi](%3) \n\t"
2265                 "mov %%edi, %c[rdi](%3) \n\t"
2266                 "mov %%ebp, %c[rbp](%3) \n\t"
2267                 "mov %%cr2, %%eax  \n\t"
2268                 "mov %%eax, %c[cr2](%3) \n\t"
2269                 "mov (%%esp), %3 \n\t"
2270
2271                 "pop %%ecx; popa \n\t"
2272 #endif
2273                 "setbe %0 \n\t"
2274               : "=q" (fail)
2275               : "r"(vmx->launched), "d"((unsigned long)HOST_RSP),
2276                 "c"(vcpu),
2277                 [rax]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RAX])),
2278                 [rbx]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RBX])),
2279                 [rcx]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RCX])),
2280                 [rdx]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RDX])),
2281                 [rsi]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RSI])),
2282                 [rdi]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RDI])),
2283                 [rbp]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RBP])),
2284 #ifdef CONFIG_X86_64
2285                 [r8 ]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R8 ])),
2286                 [r9 ]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R9 ])),
2287                 [r10]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R10])),
2288                 [r11]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R11])),
2289                 [r12]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R12])),
2290                 [r13]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R13])),
2291                 [r14]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R14])),
2292                 [r15]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R15])),
2293 #endif
2294                 [cr2]"i"(offsetof(struct kvm_vcpu, cr2))
2295               : "cc", "memory" );
2296
2297         vcpu->guest_mode = 0;
2298         local_irq_enable();
2299
2300         ++vcpu->stat.exits;
2301
2302         vcpu->interrupt_window_open = (vmcs_read32(GUEST_INTERRUPTIBILITY_INFO) & 3) == 0;
2303
2304         asm ("mov %0, %%ds; mov %0, %%es" : : "r"(__USER_DS));
2305         vmx->launched = 1;
2306
2307         preempt_enable();
2308
2309         if (unlikely(fail)) {
2310                 kvm_run->exit_reason = KVM_EXIT_FAIL_ENTRY;
2311                 kvm_run->fail_entry.hardware_entry_failure_reason
2312                         = vmcs_read32(VM_INSTRUCTION_ERROR);
2313                 r = 0;
2314                 goto out;
2315         }
2316         /*
2317          * Profile KVM exit RIPs:
2318          */
2319         if (unlikely(prof_on == KVM_PROFILING))
2320                 profile_hit(KVM_PROFILING, (void *)vmcs_readl(GUEST_RIP));
2321
2322         r = kvm_handle_exit(kvm_run, vcpu);
2323         if (r > 0) {
2324                 if (dm_request_for_irq_injection(vcpu, kvm_run)) {
2325                         r = -EINTR;
2326                         kvm_run->exit_reason = KVM_EXIT_INTR;
2327                         ++vcpu->stat.request_irq_exits;
2328                         goto out;
2329                 }
2330                 if (!need_resched()) {
2331                         ++vcpu->stat.light_exits;
2332                         goto again;
2333                 }
2334         }
2335
2336 out:
2337         if (r > 0) {
2338                 kvm_resched(vcpu);
2339                 goto preempted;
2340         }
2341
2342         post_kvm_run_save(vcpu, kvm_run);
2343         return r;
2344 }
2345
2346 static void vmx_inject_page_fault(struct kvm_vcpu *vcpu,
2347                                   unsigned long addr,
2348                                   u32 err_code)
2349 {
2350         u32 vect_info = vmcs_read32(IDT_VECTORING_INFO_FIELD);
2351
2352         ++vcpu->stat.pf_guest;
2353
2354         if (is_page_fault(vect_info)) {
2355                 printk(KERN_DEBUG "inject_page_fault: "
2356                        "double fault 0x%lx @ 0x%lx\n",
2357                        addr, vmcs_readl(GUEST_RIP));
2358                 vmcs_write32(VM_ENTRY_EXCEPTION_ERROR_CODE, 0);
2359                 vmcs_write32(VM_ENTRY_INTR_INFO_FIELD,
2360                              DF_VECTOR |
2361                              INTR_TYPE_EXCEPTION |
2362                              INTR_INFO_DELIEVER_CODE_MASK |
2363                              INTR_INFO_VALID_MASK);
2364                 return;
2365         }
2366         vcpu->cr2 = addr;
2367         vmcs_write32(VM_ENTRY_EXCEPTION_ERROR_CODE, err_code);
2368         vmcs_write32(VM_ENTRY_INTR_INFO_FIELD,
2369                      PF_VECTOR |
2370                      INTR_TYPE_EXCEPTION |
2371                      INTR_INFO_DELIEVER_CODE_MASK |
2372                      INTR_INFO_VALID_MASK);
2373
2374 }
2375
2376 static void vmx_free_vmcs(struct kvm_vcpu *vcpu)
2377 {
2378         struct vcpu_vmx *vmx = to_vmx(vcpu);
2379
2380         if (vmx->vmcs) {
2381                 on_each_cpu(__vcpu_clear, vmx, 0, 1);
2382                 free_vmcs(vmx->vmcs);
2383                 vmx->vmcs = NULL;
2384         }
2385 }
2386
2387 static void vmx_free_vcpu(struct kvm_vcpu *vcpu)
2388 {
2389         struct vcpu_vmx *vmx = to_vmx(vcpu);
2390
2391         vmx_free_vmcs(vcpu);
2392         kfree(vmx->host_msrs);
2393         kfree(vmx->guest_msrs);
2394         kvm_vcpu_uninit(vcpu);
2395         kmem_cache_free(kvm_vcpu_cache, vmx);
2396 }
2397
2398 static struct kvm_vcpu *vmx_create_vcpu(struct kvm *kvm, unsigned int id)
2399 {
2400         int err;
2401         struct vcpu_vmx *vmx = kmem_cache_zalloc(kvm_vcpu_cache, GFP_KERNEL);
2402         int cpu;
2403
2404         if (!vmx)
2405                 return ERR_PTR(-ENOMEM);
2406
2407         err = kvm_vcpu_init(&vmx->vcpu, kvm, id);
2408         if (err)
2409                 goto free_vcpu;
2410
2411         if (irqchip_in_kernel(kvm)) {
2412                 err = kvm_create_lapic(&vmx->vcpu);
2413                 if (err < 0)
2414                         goto free_vcpu;
2415         }
2416
2417         vmx->guest_msrs = kmalloc(PAGE_SIZE, GFP_KERNEL);
2418         if (!vmx->guest_msrs) {
2419                 err = -ENOMEM;
2420                 goto uninit_vcpu;
2421         }
2422
2423         vmx->host_msrs = kmalloc(PAGE_SIZE, GFP_KERNEL);
2424         if (!vmx->host_msrs)
2425                 goto free_guest_msrs;
2426
2427         vmx->vmcs = alloc_vmcs();
2428         if (!vmx->vmcs)
2429                 goto free_msrs;
2430
2431         vmcs_clear(vmx->vmcs);
2432
2433         cpu = get_cpu();
2434         vmx_vcpu_load(&vmx->vcpu, cpu);
2435         err = vmx_vcpu_setup(vmx);
2436         vmx_vcpu_put(&vmx->vcpu);
2437         put_cpu();
2438         if (err)
2439                 goto free_vmcs;
2440
2441         return &vmx->vcpu;
2442
2443 free_vmcs:
2444         free_vmcs(vmx->vmcs);
2445 free_msrs:
2446         kfree(vmx->host_msrs);
2447 free_guest_msrs:
2448         kfree(vmx->guest_msrs);
2449 uninit_vcpu:
2450         kvm_vcpu_uninit(&vmx->vcpu);
2451 free_vcpu:
2452         kmem_cache_free(kvm_vcpu_cache, vmx);
2453         return ERR_PTR(err);
2454 }
2455
2456 static void __init vmx_check_processor_compat(void *rtn)
2457 {
2458         struct vmcs_config vmcs_conf;
2459
2460         *(int *)rtn = 0;
2461         if (setup_vmcs_config(&vmcs_conf) < 0)
2462                 *(int *)rtn = -EIO;
2463         if (memcmp(&vmcs_config, &vmcs_conf, sizeof(struct vmcs_config)) != 0) {
2464                 printk(KERN_ERR "kvm: CPU %d feature inconsistency!\n",
2465                                 smp_processor_id());
2466                 *(int *)rtn = -EIO;
2467         }
2468 }
2469
2470 static struct kvm_arch_ops vmx_arch_ops = {
2471         .cpu_has_kvm_support = cpu_has_kvm_support,
2472         .disabled_by_bios = vmx_disabled_by_bios,
2473         .hardware_setup = hardware_setup,
2474         .hardware_unsetup = hardware_unsetup,
2475         .check_processor_compatibility = vmx_check_processor_compat,
2476         .hardware_enable = hardware_enable,
2477         .hardware_disable = hardware_disable,
2478
2479         .vcpu_create = vmx_create_vcpu,
2480         .vcpu_free = vmx_free_vcpu,
2481
2482         .vcpu_load = vmx_vcpu_load,
2483         .vcpu_put = vmx_vcpu_put,
2484         .vcpu_decache = vmx_vcpu_decache,
2485
2486         .set_guest_debug = set_guest_debug,
2487         .get_msr = vmx_get_msr,
2488         .set_msr = vmx_set_msr,
2489         .get_segment_base = vmx_get_segment_base,
2490         .get_segment = vmx_get_segment,
2491         .set_segment = vmx_set_segment,
2492         .get_cs_db_l_bits = vmx_get_cs_db_l_bits,
2493         .decache_cr4_guest_bits = vmx_decache_cr4_guest_bits,
2494         .set_cr0 = vmx_set_cr0,
2495         .set_cr3 = vmx_set_cr3,
2496         .set_cr4 = vmx_set_cr4,
2497 #ifdef CONFIG_X86_64
2498         .set_efer = vmx_set_efer,
2499 #endif
2500         .get_idt = vmx_get_idt,
2501         .set_idt = vmx_set_idt,
2502         .get_gdt = vmx_get_gdt,
2503         .set_gdt = vmx_set_gdt,
2504         .cache_regs = vcpu_load_rsp_rip,
2505         .decache_regs = vcpu_put_rsp_rip,
2506         .get_rflags = vmx_get_rflags,
2507         .set_rflags = vmx_set_rflags,
2508
2509         .tlb_flush = vmx_flush_tlb,
2510         .inject_page_fault = vmx_inject_page_fault,
2511
2512         .inject_gp = vmx_inject_gp,
2513
2514         .run = vmx_vcpu_run,
2515         .skip_emulated_instruction = skip_emulated_instruction,
2516         .patch_hypercall = vmx_patch_hypercall,
2517         .get_irq = vmx_get_irq,
2518         .set_irq = vmx_inject_irq,
2519 };
2520
2521 static int __init vmx_init(void)
2522 {
2523         void *iova;
2524         int r;
2525
2526         vmx_io_bitmap_a = alloc_page(GFP_KERNEL | __GFP_HIGHMEM);
2527         if (!vmx_io_bitmap_a)
2528                 return -ENOMEM;
2529
2530         vmx_io_bitmap_b = alloc_page(GFP_KERNEL | __GFP_HIGHMEM);
2531         if (!vmx_io_bitmap_b) {
2532                 r = -ENOMEM;
2533                 goto out;
2534         }
2535
2536         /*
2537          * Allow direct access to the PC debug port (it is often used for I/O
2538          * delays, but the vmexits simply slow things down).
2539          */
2540         iova = kmap(vmx_io_bitmap_a);
2541         memset(iova, 0xff, PAGE_SIZE);
2542         clear_bit(0x80, iova);
2543         kunmap(vmx_io_bitmap_a);
2544
2545         iova = kmap(vmx_io_bitmap_b);
2546         memset(iova, 0xff, PAGE_SIZE);
2547         kunmap(vmx_io_bitmap_b);
2548
2549         r = kvm_init_arch(&vmx_arch_ops, sizeof(struct vcpu_vmx), THIS_MODULE);
2550         if (r)
2551                 goto out1;
2552
2553         return 0;
2554
2555 out1:
2556         __free_page(vmx_io_bitmap_b);
2557 out:
2558         __free_page(vmx_io_bitmap_a);
2559         return r;
2560 }
2561
2562 static void __exit vmx_exit(void)
2563 {
2564         __free_page(vmx_io_bitmap_b);
2565         __free_page(vmx_io_bitmap_a);
2566
2567         kvm_exit_arch();
2568 }
2569
2570 module_init(vmx_init)
2571 module_exit(vmx_exit)