drivers/usb/typec/tcpm/tcpci.h

   1 /* SPDX-License-Identifier: GPL-2.0+ */
   2 /*
   3  * Copyright 2015-2017 Google, Inc
   4  *
   5  * USB Type-C Port Controller Interface.
   6  */
   7
   8 #ifndef __LINUX_USB_TCPCI_H
   9 #define __LINUX_USB_TCPCI_H
  10
  11 #include <linux/usb/typec.h>
  12
  13 #define TCPC_VENDOR_ID                  0x0
  14 #define TCPC_PRODUCT_ID                 0x2
  15 #define TCPC_BCD_DEV                    0x4
  16 #define TCPC_TC_REV                     0x6
  17 #define TCPC_PD_REV                     0x8
  18 #define TCPC_PD_INT_REV                 0xa
  19
  20 #define TCPC_ALERT                      0x10
  21 #define TCPC_ALERT_EXTND                BIT(14)
  22 #define TCPC_ALERT_EXTENDED_STATUS      BIT(13)
  23 #define TCPC_ALERT_VBUS_DISCNCT         BIT(11)
  24 #define TCPC_ALERT_RX_BUF_OVF           BIT(10)
  25 #define TCPC_ALERT_FAULT                BIT(9)
  26 #define TCPC_ALERT_V_ALARM_LO           BIT(8)
  27 #define TCPC_ALERT_V_ALARM_HI           BIT(7)
  28 #define TCPC_ALERT_TX_SUCCESS           BIT(6)
  29 #define TCPC_ALERT_TX_DISCARDED         BIT(5)
  30 #define TCPC_ALERT_TX_FAILED            BIT(4)
  31 #define TCPC_ALERT_RX_HARD_RST          BIT(3)
  32 #define TCPC_ALERT_RX_STATUS            BIT(2)
  33 #define TCPC_ALERT_POWER_STATUS         BIT(1)
  34 #define TCPC_ALERT_CC_STATUS            BIT(0)
  35
  36 #define TCPC_ALERT_MASK                 0x12
  37 #define TCPC_POWER_STATUS_MASK          0x14
  38 #define TCPC_FAULT_STATUS_MASK          0x15
  39
  40 #define TCPC_EXTENDED_STATUS_MASK               0x16
  41 #define TCPC_EXTENDED_STATUS_MASK_VSAFE0V       BIT(0)
  42
  43 #define TCPC_ALERT_EXTENDED_MASK        0x17
  44 #define TCPC_SINK_FAST_ROLE_SWAP        BIT(0)
  45
  46 #define TCPC_CONFIG_STD_OUTPUT          0x18
  47
  48 #define TCPC_TCPC_CTRL                  0x19
  49 #define TCPC_TCPC_CTRL_ORIENTATION      BIT(0)
  50 #define TCPC_TCPC_CTRL_BIST_TM          BIT(1)
  51
  52 #define TCPC_EXTENDED_STATUS            0x20
  53 #define TCPC_EXTENDED_STATUS_VSAFE0V    BIT(0)
  54
  55 #define TCPC_ROLE_CTRL                  0x1a
  56 #define TCPC_ROLE_CTRL_DRP              BIT(6)
  57 #define TCPC_ROLE_CTRL_RP_VAL_SHIFT     4
  58 #define TCPC_ROLE_CTRL_RP_VAL_MASK      0x3
  59 #define TCPC_ROLE_CTRL_RP_VAL_DEF       0x0
  60 #define TCPC_ROLE_CTRL_RP_VAL_1_5       0x1
  61 #define TCPC_ROLE_CTRL_RP_VAL_3_0       0x2
  62 #define TCPC_ROLE_CTRL_CC2_SHIFT        2
  63 #define TCPC_ROLE_CTRL_CC2_MASK         0x3
  64 #define TCPC_ROLE_CTRL_CC1_SHIFT        0
  65 #define TCPC_ROLE_CTRL_CC1_MASK         0x3
  66 #define TCPC_ROLE_CTRL_CC_RA            0x0
  67 #define TCPC_ROLE_CTRL_CC_RP            0x1
  68 #define TCPC_ROLE_CTRL_CC_RD            0x2
  69 #define TCPC_ROLE_CTRL_CC_OPEN          0x3
  70
  71 #define TCPC_FAULT_CTRL                 0x1b
  72
  73 #define TCPC_POWER_CTRL                 0x1c
  74 #define TCPC_POWER_CTRL_VCONN_ENABLE    BIT(0)
  75 #define TCPC_POWER_CTRL_BLEED_DISCHARGE BIT(3)
  76 #define TCPC_POWER_CTRL_AUTO_DISCHARGE  BIT(4)
  77 #define TCPC_FAST_ROLE_SWAP_EN          BIT(7)
  78
  79 #define TCPC_CC_STATUS                  0x1d
  80 #define TCPC_CC_STATUS_TOGGLING         BIT(5)
  81 #define TCPC_CC_STATUS_TERM             BIT(4)
  82 #define TCPC_CC_STATUS_CC2_SHIFT        2
  83 #define TCPC_CC_STATUS_CC2_MASK         0x3
  84 #define TCPC_CC_STATUS_CC1_SHIFT        0
  85 #define TCPC_CC_STATUS_CC1_MASK         0x3
  86
  87 #define TCPC_POWER_STATUS               0x1e
  88 #define TCPC_POWER_STATUS_UNINIT        BIT(6)
  89 #define TCPC_POWER_STATUS_SOURCING_VBUS BIT(4)
  90 #define TCPC_POWER_STATUS_VBUS_DET      BIT(3)
  91 #define TCPC_POWER_STATUS_VBUS_PRES     BIT(2)
  92
  93 #define TCPC_FAULT_STATUS               0x1f
  94
  95 #define TCPC_ALERT_EXTENDED             0x21
  96
  97 #define TCPC_COMMAND                    0x23
  98 #define TCPC_CMD_WAKE_I2C               0x11
  99 #define TCPC_CMD_DISABLE_VBUS_DETECT    0x22
 100 #define TCPC_CMD_ENABLE_VBUS_DETECT     0x33
 101 #define TCPC_CMD_DISABLE_SINK_VBUS      0x44
 102 #define TCPC_CMD_SINK_VBUS              0x55
 103 #define TCPC_CMD_DISABLE_SRC_VBUS       0x66
 104 #define TCPC_CMD_SRC_VBUS_DEFAULT       0x77
 105 #define TCPC_CMD_SRC_VBUS_HIGH          0x88
 106 #define TCPC_CMD_LOOK4CONNECTION        0x99
 107 #define TCPC_CMD_RXONEMORE              0xAA
 108 #define TCPC_CMD_I2C_IDLE               0xFF
 109
 110 #define TCPC_DEV_CAP_1                  0x24
 111 #define TCPC_DEV_CAP_2                  0x26
 112 #define TCPC_STD_INPUT_CAP              0x28
 113 #define TCPC_STD_OUTPUT_CAP             0x29
 114
 115 #define TCPC_MSG_HDR_INFO               0x2e
 116 #define TCPC_MSG_HDR_INFO_DATA_ROLE     BIT(3)
 117 #define TCPC_MSG_HDR_INFO_PWR_ROLE      BIT(0)
 118 #define TCPC_MSG_HDR_INFO_REV_SHIFT     1
 119 #define TCPC_MSG_HDR_INFO_REV_MASK      0x3
 120
 121 #define TCPC_RX_DETECT                  0x2f
 122 #define TCPC_RX_DETECT_HARD_RESET       BIT(5)
 123 #define TCPC_RX_DETECT_SOP              BIT(0)
 124
 125 #define TCPC_RX_BYTE_CNT                0x30
 126 #define TCPC_RX_BUF_FRAME_TYPE          0x31
 127 #define TCPC_RX_BUF_FRAME_TYPE_SOP      0
 128 #define TCPC_RX_HDR                     0x32
 129 #define TCPC_RX_DATA                    0x34 /* through 0x4f */
 130
 131 #define TCPC_TRANSMIT                   0x50
 132 #define TCPC_TRANSMIT_RETRY_SHIFT       4
 133 #define TCPC_TRANSMIT_RETRY_MASK        0x3
 134 #define TCPC_TRANSMIT_TYPE_SHIFT        0
 135 #define TCPC_TRANSMIT_TYPE_MASK         0x7
 136
 137 #define TCPC_TX_BYTE_CNT                0x51
 138 #define TCPC_TX_HDR                     0x52
 139 #define TCPC_TX_DATA                    0x54 /* through 0x6f */
 140
 141 #define TCPC_VBUS_VOLTAGE                       0x70
 142 #define TCPC_VBUS_SINK_DISCONNECT_THRESH        0x72
 143 #define TCPC_VBUS_SINK_DISCONNECT_THRESH_LSB_MV 25
 144 #define TCPC_VBUS_SINK_DISCONNECT_THRESH_MAX    0x3ff
 145 #define TCPC_VBUS_STOP_DISCHARGE_THRESH         0x74
 146 #define TCPC_VBUS_VOLTAGE_ALARM_HI_CFG          0x76
 147 #define TCPC_VBUS_VOLTAGE_ALARM_LO_CFG          0x78
 148
 149 /* I2C_WRITE_BYTE_COUNT + 1 when TX_BUF_BYTE_x is only accessible I2C_WRITE_BYTE_COUNT */
 150 #define TCPC_TRANSMIT_BUFFER_MAX_LEN            31
 151
 152 struct tcpci;
 153
 154 /*
 155  * @TX_BUF_BYTE_x_hidden:
 156  *              optional; Set when TX_BUF_BYTE_x can only be accessed through I2C_WRITE_BYTE_COUNT.
 157  * @frs_sourcing_vbus:
 158  *              Optional; Callback to perform chip specific operations when FRS
 159  *              is sourcing vbus.
 160  * @auto_discharge_disconnect:
 161  *              Optional; Enables TCPC to autonously discharge vbus on disconnect.
 162  * @vbus_vsafe0v:
 163  *              optional; Set when TCPC can detect whether vbus is at VSAFE0V.
 164  */
 165 struct tcpci_data {
 166         struct regmap *regmap;
 167         unsigned char TX_BUF_BYTE_x_hidden:1;
 168         unsigned char auto_discharge_disconnect:1;
 169         unsigned char vbus_vsafe0v:1;
 170
 171         int (*init)(struct tcpci *tcpci, struct tcpci_data *data);
 172         int (*set_vconn)(struct tcpci *tcpci, struct tcpci_data *data,
 173                          bool enable);
 174         int (*start_drp_toggling)(struct tcpci *tcpci, struct tcpci_data *data,
 175                                   enum typec_cc_status cc);
 176         int (*set_vbus)(struct tcpci *tcpci, struct tcpci_data *data, bool source, bool sink);
 177         void (*frs_sourcing_vbus)(struct tcpci *tcpci, struct tcpci_data *data);
 178 };
 179
 180 struct tcpci *tcpci_register_port(struct device *dev, struct tcpci_data *data);
 181 void tcpci_unregister_port(struct tcpci *tcpci);
 182 irqreturn_t tcpci_irq(struct tcpci *tcpci);
 183
 184 struct tcpm_port;
 185 struct tcpm_port *tcpci_get_tcpm_port(struct tcpci *tcpci);
 186 #endif /* __LINUX_USB_TCPCI_H */