1 /* arch/sparc64/mm/tlb.c
6 #include <linux/kernel.h>
7 #include <linux/init.h>
8 #include <linux/percpu.h>
10 #include <linux/swap.h>
11 #include <linux/preempt.h>
13 #include <asm/pgtable.h>
14 #include <asm/pgalloc.h>
15 #include <asm/tlbflush.h>
16 #include <asm/cacheflush.h>
17 #include <asm/mmu_context.h>
20 /* Heavily inspired by the ppc64 code. */
22 static DEFINE_PER_CPU(struct tlb_batch, tlb_batch);
24 void flush_tlb_pending(void)
26 struct tlb_batch *tb = &get_cpu_var(tlb_batch);
27 struct mm_struct *mm = tb->mm;
34 if (CTX_VALID(mm->context)) {
35 if (tb->tlb_nr == 1) {
36 global_flush_tlb_page(mm, tb->vaddrs[0]);
39 smp_flush_tlb_pending(tb->mm, tb->tlb_nr,
42 __flush_tlb_pending(CTX_HWBITS(tb->mm->context),
43 tb->tlb_nr, &tb->vaddrs[0]);
51 put_cpu_var(tlb_batch);
54 void arch_enter_lazy_mmu_mode(void)
56 struct tlb_batch *tb = &__get_cpu_var(tlb_batch);
61 void arch_leave_lazy_mmu_mode(void)
63 struct tlb_batch *tb = &__get_cpu_var(tlb_batch);
70 static void tlb_batch_add_one(struct mm_struct *mm, unsigned long vaddr,
73 struct tlb_batch *tb = &get_cpu_var(tlb_batch);
82 if (unlikely(nr != 0 && mm != tb->mm)) {
88 flush_tsb_user_page(mm, vaddr);
89 global_flush_tlb_page(mm, vaddr);
96 tb->vaddrs[nr] = vaddr;
98 if (nr >= TLB_BATCH_NR)
102 put_cpu_var(tlb_batch);
105 void tlb_batch_add(struct mm_struct *mm, unsigned long vaddr,
106 pte_t *ptep, pte_t orig, int fullmm)
108 if (tlb_type != hypervisor &&
110 unsigned long paddr, pfn = pte_pfn(orig);
111 struct address_space *mapping;
117 page = pfn_to_page(pfn);
118 if (PageReserved(page))
121 /* A real file page? */
122 mapping = page_mapping(page);
126 paddr = (unsigned long) page_address(page);
127 if ((paddr ^ vaddr) & (1 << 13))
128 flush_dcache_page_all(mm, page);
133 tlb_batch_add_one(mm, vaddr, pte_exec(orig));
136 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
137 static void tlb_batch_pmd_scan(struct mm_struct *mm, unsigned long vaddr,
138 pmd_t pmd, bool exec)
143 pte = pte_offset_map(&pmd, vaddr);
144 end = vaddr + HPAGE_SIZE;
145 while (vaddr < end) {
146 if (pte_val(*pte) & _PAGE_VALID)
147 tlb_batch_add_one(mm, vaddr, exec);
154 void set_pmd_at(struct mm_struct *mm, unsigned long addr,
155 pmd_t *pmdp, pmd_t pmd)
164 if ((pmd_val(pmd) ^ pmd_val(orig)) & PMD_ISHUGE) {
165 if (pmd_val(pmd) & PMD_ISHUGE)
166 mm->context.huge_pte_count++;
168 mm->context.huge_pte_count--;
170 /* Do not try to allocate the TSB hash table if we
171 * don't have one already. We have various locks held
172 * and thus we'll end up doing a GFP_KERNEL allocation
173 * in an atomic context.
175 * Instead, we let the first TLB miss on a hugepage
180 if (!pmd_none(orig)) {
181 bool exec = ((pmd_val(orig) & PMD_HUGE_EXEC) != 0);
184 if (pmd_val(orig) & PMD_ISHUGE)
185 tlb_batch_add_one(mm, addr, exec);
187 tlb_batch_pmd_scan(mm, addr, orig, exec);
191 void pgtable_trans_huge_deposit(struct mm_struct *mm, pmd_t *pmdp,
194 struct list_head *lh = (struct list_head *) pgtable;
196 assert_spin_locked(&mm->page_table_lock);
199 if (!mm->pmd_huge_pte)
202 list_add(lh, (struct list_head *) mm->pmd_huge_pte);
203 mm->pmd_huge_pte = pgtable;
206 pgtable_t pgtable_trans_huge_withdraw(struct mm_struct *mm, pmd_t *pmdp)
208 struct list_head *lh;
211 assert_spin_locked(&mm->page_table_lock);
214 pgtable = mm->pmd_huge_pte;
215 lh = (struct list_head *) pgtable;
217 mm->pmd_huge_pte = NULL;
219 mm->pmd_huge_pte = (pgtable_t) lh->next;
222 pte_val(pgtable[0]) = 0;
223 pte_val(pgtable[1]) = 0;
227 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */