drivers/gpu/drm/v3d/v3d_gem.c

   1 // SPDX-License-Identifier: GPL-2.0+
   2 /* Copyright (C) 2014-2018 Broadcom */
   3
   4 #include <linux/device.h>
   5 #include <linux/dma-mapping.h>
   6 #include <linux/io.h>
   7 #include <linux/module.h>
   8 #include <linux/platform_device.h>
   9 #include <linux/reset.h>
  10 #include <linux/sched/signal.h>
  11 #include <linux/uaccess.h>
  12
  13 #include <drm/drm_managed.h>
  14 #include <drm/drm_syncobj.h>
  15 #include <uapi/drm/v3d_drm.h>
  16
  17 #include "v3d_drv.h"
  18 #include "v3d_regs.h"
  19 #include "v3d_trace.h"
  20
  21 static void
  22 v3d_init_core(struct v3d_dev *v3d, int core)
  23 {
  24         /* Set OVRTMUOUT, which means that the texture sampler uniform
  25          * configuration's tmu output type field is used, instead of
  26          * using the hardware default behavior based on the texture
  27          * type.  If you want the default behavior, you can still put
  28          * "2" in the indirect texture state's output_type field.
  29          */
  30         if (v3d->ver < 40)
  31                 V3D_CORE_WRITE(core, V3D_CTL_MISCCFG, V3D_MISCCFG_OVRTMUOUT);
  32
  33         /* Whenever we flush the L2T cache, we always want to flush
  34          * the whole thing.
  35          */
  36         V3D_CORE_WRITE(core, V3D_CTL_L2TFLSTA, 0);
  37         V3D_CORE_WRITE(core, V3D_CTL_L2TFLEND, ~0);
  38 }
  39
  40 /* Sets invariant state for the HW. */
  41 static void
  42 v3d_init_hw_state(struct v3d_dev *v3d)
  43 {
  44         v3d_init_core(v3d, 0);
  45 }
  46
  47 static void
  48 v3d_idle_axi(struct v3d_dev *v3d, int core)
  49 {
  50         V3D_CORE_WRITE(core, V3D_GMP_CFG, V3D_GMP_CFG_STOP_REQ);
  51
  52         if (wait_for((V3D_CORE_READ(core, V3D_GMP_STATUS) &
  53                       (V3D_GMP_STATUS_RD_COUNT_MASK |
  54                        V3D_GMP_STATUS_WR_COUNT_MASK |
  55                        V3D_GMP_STATUS_CFG_BUSY)) == 0, 100)) {
  56                 DRM_ERROR("Failed to wait for safe GMP shutdown\n");
  57         }
  58 }
  59
  60 static void
  61 v3d_idle_gca(struct v3d_dev *v3d)
  62 {
  63         if (v3d->ver >= 41)
  64                 return;
  65
  66         V3D_GCA_WRITE(V3D_GCA_SAFE_SHUTDOWN, V3D_GCA_SAFE_SHUTDOWN_EN);
  67
  68         if (wait_for((V3D_GCA_READ(V3D_GCA_SAFE_SHUTDOWN_ACK) &
  69                       V3D_GCA_SAFE_SHUTDOWN_ACK_ACKED) ==
  70                      V3D_GCA_SAFE_SHUTDOWN_ACK_ACKED, 100)) {
  71                 DRM_ERROR("Failed to wait for safe GCA shutdown\n");
  72         }
  73 }
  74
  75 static void
  76 v3d_reset_by_bridge(struct v3d_dev *v3d)
  77 {
  78         int version = V3D_BRIDGE_READ(V3D_TOP_GR_BRIDGE_REVISION);
  79
  80         if (V3D_GET_FIELD(version, V3D_TOP_GR_BRIDGE_MAJOR) == 2) {
  81                 V3D_BRIDGE_WRITE(V3D_TOP_GR_BRIDGE_SW_INIT_0,
  82                                  V3D_TOP_GR_BRIDGE_SW_INIT_0_V3D_CLK_108_SW_INIT);
  83                 V3D_BRIDGE_WRITE(V3D_TOP_GR_BRIDGE_SW_INIT_0, 0);
  84
  85                 /* GFXH-1383: The SW_INIT may cause a stray write to address 0
  86                  * of the unit, so reset it to its power-on value here.
  87                  */
  88                 V3D_WRITE(V3D_HUB_AXICFG, V3D_HUB_AXICFG_MAX_LEN_MASK);
  89         } else {
  90                 WARN_ON_ONCE(V3D_GET_FIELD(version,
  91                                            V3D_TOP_GR_BRIDGE_MAJOR) != 7);
  92                 V3D_BRIDGE_WRITE(V3D_TOP_GR_BRIDGE_SW_INIT_1,
  93                                  V3D_TOP_GR_BRIDGE_SW_INIT_1_V3D_CLK_108_SW_INIT);
  94                 V3D_BRIDGE_WRITE(V3D_TOP_GR_BRIDGE_SW_INIT_1, 0);
  95         }
  96 }
  97
  98 static void
  99 v3d_reset_v3d(struct v3d_dev *v3d)
 100 {
 101         if (v3d->reset)
 102                 reset_control_reset(v3d->reset);
 103         else
 104                 v3d_reset_by_bridge(v3d);
 105
 106         v3d_init_hw_state(v3d);
 107 }
 108
 109 void
 110 v3d_reset(struct v3d_dev *v3d)
 111 {
 112         struct drm_device *dev = &v3d->drm;
 113
 114         DRM_DEV_ERROR(dev->dev, "Resetting GPU for hang.\n");
 115         DRM_DEV_ERROR(dev->dev, "V3D_ERR_STAT: 0x%08x\n",
 116                       V3D_CORE_READ(0, V3D_ERR_STAT));
 117         trace_v3d_reset_begin(dev);
 118
 119         /* XXX: only needed for safe powerdown, not reset. */
 120         if (false)
 121                 v3d_idle_axi(v3d, 0);
 122
 123         v3d_idle_gca(v3d);
 124         v3d_reset_v3d(v3d);
 125
 126         v3d_mmu_set_page_table(v3d);
 127         v3d_irq_reset(v3d);
 128
 129         v3d_perfmon_stop(v3d, v3d->active_perfmon, false);
 130
 131         trace_v3d_reset_end(dev);
 132 }
 133
 134 static void
 135 v3d_flush_l3(struct v3d_dev *v3d)
 136 {
 137         if (v3d->ver < 41) {
 138                 u32 gca_ctrl = V3D_GCA_READ(V3D_GCA_CACHE_CTRL);
 139
 140                 V3D_GCA_WRITE(V3D_GCA_CACHE_CTRL,
 141                               gca_ctrl | V3D_GCA_CACHE_CTRL_FLUSH);
 142
 143                 if (v3d->ver < 33) {
 144                         V3D_GCA_WRITE(V3D_GCA_CACHE_CTRL,
 145                                       gca_ctrl & ~V3D_GCA_CACHE_CTRL_FLUSH);
 146                 }
 147         }
 148 }
 149
 150 /* Invalidates the (read-only) L2C cache.  This was the L2 cache for
 151  * uniforms and instructions on V3D 3.2.
 152  */
 153 static void
 154 v3d_invalidate_l2c(struct v3d_dev *v3d, int core)
 155 {
 156         if (v3d->ver > 32)
 157                 return;
 158
 159         V3D_CORE_WRITE(core, V3D_CTL_L2CACTL,
 160                        V3D_L2CACTL_L2CCLR |
 161                        V3D_L2CACTL_L2CENA);
 162 }
 163
 164 /* Invalidates texture L2 cachelines */
 165 static void
 166 v3d_flush_l2t(struct v3d_dev *v3d, int core)
 167 {
 168         /* While there is a busy bit (V3D_L2TCACTL_L2TFLS), we don't
 169          * need to wait for completion before dispatching the job --
 170          * L2T accesses will be stalled until the flush has completed.
 171          * However, we do need to make sure we don't try to trigger a
 172          * new flush while the L2_CLEAN queue is trying to
 173          * synchronously clean after a job.
 174          */
 175         mutex_lock(&v3d->cache_clean_lock);
 176         V3D_CORE_WRITE(core, V3D_CTL_L2TCACTL,
 177                        V3D_L2TCACTL_L2TFLS |
 178                        V3D_SET_FIELD(V3D_L2TCACTL_FLM_FLUSH, V3D_L2TCACTL_FLM));
 179         mutex_unlock(&v3d->cache_clean_lock);
 180 }
 181
 182 /* Cleans texture L1 and L2 cachelines (writing back dirty data).
 183  *
 184  * For cleaning, which happens from the CACHE_CLEAN queue after CSD has
 185  * executed, we need to make sure that the clean is done before
 186  * signaling job completion.  So, we synchronously wait before
 187  * returning, and we make sure that L2 invalidates don't happen in the
 188  * meantime to confuse our are-we-done checks.
 189  */
 190 void
 191 v3d_clean_caches(struct v3d_dev *v3d)
 192 {
 193         struct drm_device *dev = &v3d->drm;
 194         int core = 0;
 195
 196         trace_v3d_cache_clean_begin(dev);
 197
 198         V3D_CORE_WRITE(core, V3D_CTL_L2TCACTL, V3D_L2TCACTL_TMUWCF);
 199         if (wait_for(!(V3D_CORE_READ(core, V3D_CTL_L2TCACTL) &
 200                        V3D_L2TCACTL_TMUWCF), 100)) {
 201                 DRM_ERROR("Timeout waiting for TMU write combiner flush\n");
 202         }
 203
 204         mutex_lock(&v3d->cache_clean_lock);
 205         V3D_CORE_WRITE(core, V3D_CTL_L2TCACTL,
 206                        V3D_L2TCACTL_L2TFLS |
 207                        V3D_SET_FIELD(V3D_L2TCACTL_FLM_CLEAN, V3D_L2TCACTL_FLM));
 208
 209         if (wait_for(!(V3D_CORE_READ(core, V3D_CTL_L2TCACTL) &
 210                        V3D_L2TCACTL_L2TFLS), 100)) {
 211                 DRM_ERROR("Timeout waiting for L2T clean\n");
 212         }
 213
 214         mutex_unlock(&v3d->cache_clean_lock);
 215
 216         trace_v3d_cache_clean_end(dev);
 217 }
 218
 219 /* Invalidates the slice caches.  These are read-only caches. */
 220 static void
 221 v3d_invalidate_slices(struct v3d_dev *v3d, int core)
 222 {
 223         V3D_CORE_WRITE(core, V3D_CTL_SLCACTL,
 224                        V3D_SET_FIELD(0xf, V3D_SLCACTL_TVCCS) |
 225                        V3D_SET_FIELD(0xf, V3D_SLCACTL_TDCCS) |
 226                        V3D_SET_FIELD(0xf, V3D_SLCACTL_UCC) |
 227                        V3D_SET_FIELD(0xf, V3D_SLCACTL_ICC));
 228 }
 229
 230 void
 231 v3d_invalidate_caches(struct v3d_dev *v3d)
 232 {
 233         /* Invalidate the caches from the outside in.  That way if
 234          * another CL's concurrent use of nearby memory were to pull
 235          * an invalidated cacheline back in, we wouldn't leave stale
 236          * data in the inner cache.
 237          */
 238         v3d_flush_l3(v3d);
 239         v3d_invalidate_l2c(v3d, 0);
 240         v3d_flush_l2t(v3d, 0);
 241         v3d_invalidate_slices(v3d, 0);
 242 }
 243
 244 /* Takes the reservation lock on all the BOs being referenced, so that
 245  * at queue submit time we can update the reservations.
 246  *
 247  * We don't lock the RCL the tile alloc/state BOs, or overflow memory
 248  * (all of which are on exec->unref_list).  They're entirely private
 249  * to v3d, so we don't attach dma-buf fences to them.
 250  */
 251 static int
 252 v3d_lock_bo_reservations(struct v3d_job *job,
 253                          struct ww_acquire_ctx *acquire_ctx)
 254 {
 255         int i, ret;
 256
 257         ret = drm_gem_lock_reservations(job->bo, job->bo_count, acquire_ctx);
 258         if (ret)
 259                 return ret;
 260
 261         for (i = 0; i < job->bo_count; i++) {
 262                 ret = dma_resv_reserve_fences(job->bo[i]->resv, 1);
 263                 if (ret)
 264                         goto fail;
 265
 266                 ret = drm_sched_job_add_implicit_dependencies(&job->base,
 267                                                               job->bo[i], true);
 268                 if (ret)
 269                         goto fail;
 270         }
 271
 272         return 0;
 273
 274 fail:
 275         drm_gem_unlock_reservations(job->bo, job->bo_count, acquire_ctx);
 276         return ret;
 277 }
 278
 279 /**
 280  * v3d_lookup_bos() - Sets up job->bo[] with the GEM objects
 281  * referenced by the job.
 282  * @dev: DRM device
 283  * @file_priv: DRM file for this fd
 284  * @job: V3D job being set up
 285  * @bo_handles: GEM handles
 286  * @bo_count: Number of GEM handles passed in
 287  *
 288  * The command validator needs to reference BOs by their index within
 289  * the submitted job's BO list.  This does the validation of the job's
 290  * BO list and reference counting for the lifetime of the job.
 291  *
 292  * Note that this function doesn't need to unreference the BOs on
 293  * failure, because that will happen at v3d_exec_cleanup() time.
 294  */
 295 static int
 296 v3d_lookup_bos(struct drm_device *dev,
 297                struct drm_file *file_priv,
 298                struct v3d_job *job,
 299                u64 bo_handles,
 300                u32 bo_count)
 301 {
 302         job->bo_count = bo_count;
 303
 304         if (!job->bo_count) {
 305                 /* See comment on bo_index for why we have to check
 306                  * this.
 307                  */
 308                 DRM_DEBUG("Rendering requires BOs\n");
 309                 return -EINVAL;
 310         }
 311
 312         return drm_gem_objects_lookup(file_priv,
 313                                       (void __user *)(uintptr_t)bo_handles,
 314                                       job->bo_count, &job->bo);
 315 }
 316
 317 static void
 318 v3d_job_free(struct kref *ref)
 319 {
 320         struct v3d_job *job = container_of(ref, struct v3d_job, refcount);
 321         int i;
 322
 323         if (job->bo) {
 324                 for (i = 0; i < job->bo_count; i++)
 325                         drm_gem_object_put(job->bo[i]);
 326                 kvfree(job->bo);
 327         }
 328
 329         dma_fence_put(job->irq_fence);
 330         dma_fence_put(job->done_fence);
 331
 332         if (job->perfmon)
 333                 v3d_perfmon_put(job->perfmon);
 334
 335         kfree(job);
 336 }
 337
 338 static void
 339 v3d_render_job_free(struct kref *ref)
 340 {
 341         struct v3d_render_job *job = container_of(ref, struct v3d_render_job,
 342                                                   base.refcount);
 343         struct v3d_bo *bo, *save;
 344
 345         list_for_each_entry_safe(bo, save, &job->unref_list, unref_head) {
 346                 drm_gem_object_put(&bo->base.base);
 347         }
 348
 349         v3d_job_free(ref);
 350 }
 351
 352 void v3d_job_cleanup(struct v3d_job *job)
 353 {
 354         if (!job)
 355                 return;
 356
 357         drm_sched_job_cleanup(&job->base);
 358         v3d_job_put(job);
 359 }
 360
 361 void v3d_job_put(struct v3d_job *job)
 362 {
 363         kref_put(&job->refcount, job->free);
 364 }
 365
 366 int
 367 v3d_wait_bo_ioctl(struct drm_device *dev, void *data,
 368                   struct drm_file *file_priv)
 369 {
 370         int ret;
 371         struct drm_v3d_wait_bo *args = data;
 372         ktime_t start = ktime_get();
 373         u64 delta_ns;
 374         unsigned long timeout_jiffies =
 375                 nsecs_to_jiffies_timeout(args->timeout_ns);
 376
 377         if (args->pad != 0)
 378                 return -EINVAL;
 379
 380         ret = drm_gem_dma_resv_wait(file_priv, args->handle,
 381                                     true, timeout_jiffies);
 382
 383         /* Decrement the user's timeout, in case we got interrupted
 384          * such that the ioctl will be restarted.
 385          */
 386         delta_ns = ktime_to_ns(ktime_sub(ktime_get(), start));
 387         if (delta_ns < args->timeout_ns)
 388                 args->timeout_ns -= delta_ns;
 389         else
 390                 args->timeout_ns = 0;
 391
 392         /* Asked to wait beyond the jiffie/scheduler precision? */
 393         if (ret == -ETIME && args->timeout_ns)
 394                 ret = -EAGAIN;
 395
 396         return ret;
 397 }
 398
 399 static int
 400 v3d_job_add_deps(struct drm_file *file_priv, struct v3d_job *job,
 401                  u32 in_sync, u32 point)
 402 {
 403         struct dma_fence *in_fence = NULL;
 404         int ret;
 405
 406         ret = drm_syncobj_find_fence(file_priv, in_sync, point, 0, &in_fence);
 407         if (ret == -EINVAL)
 408                 return ret;
 409
 410         return drm_sched_job_add_dependency(&job->base, in_fence);
 411 }
 412
 413 static int
 414 v3d_job_init(struct v3d_dev *v3d, struct drm_file *file_priv,
 415              void **container, size_t size, void (*free)(struct kref *ref),
 416              u32 in_sync, struct v3d_submit_ext *se, enum v3d_queue queue)
 417 {
 418         struct v3d_file_priv *v3d_priv = file_priv->driver_priv;
 419         struct v3d_job *job;
 420         bool has_multisync = se && (se->flags & DRM_V3D_EXT_ID_MULTI_SYNC);
 421         int ret, i;
 422
 423         *container = kcalloc(1, size, GFP_KERNEL);
 424         if (!*container) {
 425                 DRM_ERROR("Cannot allocate memory for v3d job.");
 426                 return -ENOMEM;
 427         }
 428
 429         job = *container;
 430         job->v3d = v3d;
 431         job->free = free;
 432
 433         ret = drm_sched_job_init(&job->base, &v3d_priv->sched_entity[queue],
 434                                  v3d_priv);
 435         if (ret)
 436                 goto fail;
 437
 438         if (has_multisync) {
 439                 if (se->in_sync_count && se->wait_stage == queue) {
 440                         struct drm_v3d_sem __user *handle = u64_to_user_ptr(se->in_syncs);
 441
 442                         for (i = 0; i < se->in_sync_count; i++) {
 443                                 struct drm_v3d_sem in;
 444
 445                                 if (copy_from_user(&in, handle++, sizeof(in))) {
 446                                         ret = -EFAULT;
 447                                         DRM_DEBUG("Failed to copy wait dep handle.\n");
 448                                         goto fail_deps;
 449                                 }
 450                                 ret = v3d_job_add_deps(file_priv, job, in.handle, 0);
 451                                 if (ret)
 452                                         goto fail_deps;
 453                         }
 454                 }
 455         } else {
 456                 ret = v3d_job_add_deps(file_priv, job, in_sync, 0);
 457                 if (ret)
 458                         goto fail_deps;
 459         }
 460
 461         kref_init(&job->refcount);
 462
 463         return 0;
 464
 465 fail_deps:
 466         drm_sched_job_cleanup(&job->base);
 467 fail:
 468         kfree(*container);
 469         *container = NULL;
 470
 471         return ret;
 472 }
 473
 474 static void
 475 v3d_push_job(struct v3d_job *job)
 476 {
 477         drm_sched_job_arm(&job->base);
 478
 479         job->done_fence = dma_fence_get(&job->base.s_fence->finished);
 480
 481         /* put by scheduler job completion */
 482         kref_get(&job->refcount);
 483
 484         drm_sched_entity_push_job(&job->base);
 485 }
 486
 487 static void
 488 v3d_attach_fences_and_unlock_reservation(struct drm_file *file_priv,
 489                                          struct v3d_job *job,
 490                                          struct ww_acquire_ctx *acquire_ctx,
 491                                          u32 out_sync,
 492                                          struct v3d_submit_ext *se,
 493                                          struct dma_fence *done_fence)
 494 {
 495         struct drm_syncobj *sync_out;
 496         bool has_multisync = se && (se->flags & DRM_V3D_EXT_ID_MULTI_SYNC);
 497         int i;
 498
 499         for (i = 0; i < job->bo_count; i++) {
 500                 /* XXX: Use shared fences for read-only objects. */
 501                 dma_resv_add_fence(job->bo[i]->resv, job->done_fence,
 502                                    DMA_RESV_USAGE_WRITE);
 503         }
 504
 505         drm_gem_unlock_reservations(job->bo, job->bo_count, acquire_ctx);
 506
 507         /* Update the return sync object for the job */
 508         /* If it only supports a single signal semaphore*/
 509         if (!has_multisync) {
 510                 sync_out = drm_syncobj_find(file_priv, out_sync);
 511                 if (sync_out) {
 512                         drm_syncobj_replace_fence(sync_out, done_fence);
 513                         drm_syncobj_put(sync_out);
 514                 }
 515                 return;
 516         }
 517
 518         /* If multiple semaphores extension is supported */
 519         if (se->out_sync_count) {
 520                 for (i = 0; i < se->out_sync_count; i++) {
 521                         drm_syncobj_replace_fence(se->out_syncs[i].syncobj,
 522                                                   done_fence);
 523                         drm_syncobj_put(se->out_syncs[i].syncobj);
 524                 }
 525                 kvfree(se->out_syncs);
 526         }
 527 }
 528
 529 static void
 530 v3d_put_multisync_post_deps(struct v3d_submit_ext *se)
 531 {
 532         unsigned int i;
 533
 534         if (!(se && se->out_sync_count))
 535                 return;
 536
 537         for (i = 0; i < se->out_sync_count; i++)
 538                 drm_syncobj_put(se->out_syncs[i].syncobj);
 539         kvfree(se->out_syncs);
 540 }
 541
 542 static int
 543 v3d_get_multisync_post_deps(struct drm_file *file_priv,
 544                             struct v3d_submit_ext *se,
 545                             u32 count, u64 handles)
 546 {
 547         struct drm_v3d_sem __user *post_deps;
 548         int i, ret;
 549
 550         if (!count)
 551                 return 0;
 552
 553         se->out_syncs = (struct v3d_submit_outsync *)
 554                         kvmalloc_array(count,
 555                                        sizeof(struct v3d_submit_outsync),
 556                                        GFP_KERNEL);
 557         if (!se->out_syncs)
 558                 return -ENOMEM;
 559
 560         post_deps = u64_to_user_ptr(handles);
 561
 562         for (i = 0; i < count; i++) {
 563                 struct drm_v3d_sem out;
 564
 565                 if (copy_from_user(&out, post_deps++, sizeof(out))) {
 566                         ret = -EFAULT;
 567                         DRM_DEBUG("Failed to copy post dep handles\n");
 568                         goto fail;
 569                 }
 570
 571                 se->out_syncs[i].syncobj = drm_syncobj_find(file_priv,
 572                                                             out.handle);
 573                 if (!se->out_syncs[i].syncobj) {
 574                         ret = -EINVAL;
 575                         goto fail;
 576                 }
 577         }
 578         se->out_sync_count = count;
 579
 580         return 0;
 581
 582 fail:
 583         for (i--; i >= 0; i--)
 584                 drm_syncobj_put(se->out_syncs[i].syncobj);
 585         kvfree(se->out_syncs);
 586
 587         return ret;
 588 }
 589
 590 /* Get data for multiple binary semaphores synchronization. Parse syncobj
 591  * to be signaled when job completes (out_sync).
 592  */
 593 static int
 594 v3d_get_multisync_submit_deps(struct drm_file *file_priv,
 595                               struct drm_v3d_extension __user *ext,
 596                               void *data)
 597 {
 598         struct drm_v3d_multi_sync multisync;
 599         struct v3d_submit_ext *se = data;
 600         int ret;
 601
 602         if (copy_from_user(&multisync, ext, sizeof(multisync)))
 603                 return -EFAULT;
 604
 605         if (multisync.pad)
 606                 return -EINVAL;
 607
 608         ret = v3d_get_multisync_post_deps(file_priv, data, multisync.out_sync_count,
 609                                           multisync.out_syncs);
 610         if (ret)
 611                 return ret;
 612
 613         se->in_sync_count = multisync.in_sync_count;
 614         se->in_syncs = multisync.in_syncs;
 615         se->flags |= DRM_V3D_EXT_ID_MULTI_SYNC;
 616         se->wait_stage = multisync.wait_stage;
 617
 618         return 0;
 619 }
 620
 621 /* Whenever userspace sets ioctl extensions, v3d_get_extensions parses data
 622  * according to the extension id (name).
 623  */
 624 static int
 625 v3d_get_extensions(struct drm_file *file_priv,
 626                    u64 ext_handles,
 627                    void *data)
 628 {
 629         struct drm_v3d_extension __user *user_ext;
 630         int ret;
 631
 632         user_ext = u64_to_user_ptr(ext_handles);
 633         while (user_ext) {
 634                 struct drm_v3d_extension ext;
 635
 636                 if (copy_from_user(&ext, user_ext, sizeof(ext))) {
 637                         DRM_DEBUG("Failed to copy submit extension\n");
 638                         return -EFAULT;
 639                 }
 640
 641                 switch (ext.id) {
 642                 case DRM_V3D_EXT_ID_MULTI_SYNC:
 643                         ret = v3d_get_multisync_submit_deps(file_priv, user_ext, data);
 644                         if (ret)
 645                                 return ret;
 646                         break;
 647                 default:
 648                         DRM_DEBUG_DRIVER("Unknown extension id: %d\n", ext.id);
 649                         return -EINVAL;
 650                 }
 651
 652                 user_ext = u64_to_user_ptr(ext.next);
 653         }
 654
 655         return 0;
 656 }
 657
 658 /**
 659  * v3d_submit_cl_ioctl() - Submits a job (frame) to the V3D.
 660  * @dev: DRM device
 661  * @data: ioctl argument
 662  * @file_priv: DRM file for this fd
 663  *
 664  * This is the main entrypoint for userspace to submit a 3D frame to
 665  * the GPU.  Userspace provides the binner command list (if
 666  * applicable), and the kernel sets up the render command list to draw
 667  * to the framebuffer described in the ioctl, using the command lists
 668  * that the 3D engine's binner will produce.
 669  */
 670 int
 671 v3d_submit_cl_ioctl(struct drm_device *dev, void *data,
 672                     struct drm_file *file_priv)
 673 {
 674         struct v3d_dev *v3d = to_v3d_dev(dev);
 675         struct v3d_file_priv *v3d_priv = file_priv->driver_priv;
 676         struct drm_v3d_submit_cl *args = data;
 677         struct v3d_submit_ext se = {0};
 678         struct v3d_bin_job *bin = NULL;
 679         struct v3d_render_job *render = NULL;
 680         struct v3d_job *clean_job = NULL;
 681         struct v3d_job *last_job;
 682         struct ww_acquire_ctx acquire_ctx;
 683         int ret = 0;
 684
 685         trace_v3d_submit_cl_ioctl(&v3d->drm, args->rcl_start, args->rcl_end);
 686
 687         if (args->pad)
 688                 return -EINVAL;
 689
 690         if (args->flags &&
 691             args->flags & ~(DRM_V3D_SUBMIT_CL_FLUSH_CACHE |
 692                             DRM_V3D_SUBMIT_EXTENSION)) {
 693                 DRM_INFO("invalid flags: %d\n", args->flags);
 694                 return -EINVAL;
 695         }
 696
 697         if (args->flags & DRM_V3D_SUBMIT_EXTENSION) {
 698                 ret = v3d_get_extensions(file_priv, args->extensions, &se);
 699                 if (ret) {
 700                         DRM_DEBUG("Failed to get extensions.\n");
 701                         return ret;
 702                 }
 703         }
 704
 705         ret = v3d_job_init(v3d, file_priv, (void *)&render, sizeof(*render),
 706                            v3d_render_job_free, args->in_sync_rcl, &se, V3D_RENDER);
 707         if (ret)
 708                 goto fail;
 709
 710         render->start = args->rcl_start;
 711         render->end = args->rcl_end;
 712         INIT_LIST_HEAD(&render->unref_list);
 713
 714         if (args->bcl_start != args->bcl_end) {
 715                 ret = v3d_job_init(v3d, file_priv, (void *)&bin, sizeof(*bin),
 716                                    v3d_job_free, args->in_sync_bcl, &se, V3D_BIN);
 717                 if (ret)
 718                         goto fail;
 719
 720                 bin->start = args->bcl_start;
 721                 bin->end = args->bcl_end;
 722                 bin->qma = args->qma;
 723                 bin->qms = args->qms;
 724                 bin->qts = args->qts;
 725                 bin->render = render;
 726         }
 727
 728         if (args->flags & DRM_V3D_SUBMIT_CL_FLUSH_CACHE) {
 729                 ret = v3d_job_init(v3d, file_priv, (void *)&clean_job, sizeof(*clean_job),
 730                                    v3d_job_free, 0, NULL, V3D_CACHE_CLEAN);
 731                 if (ret)
 732                         goto fail;
 733
 734                 last_job = clean_job;
 735         } else {
 736                 last_job = &render->base;
 737         }
 738
 739         ret = v3d_lookup_bos(dev, file_priv, last_job,
 740                              args->bo_handles, args->bo_handle_count);
 741         if (ret)
 742                 goto fail;
 743
 744         ret = v3d_lock_bo_reservations(last_job, &acquire_ctx);
 745         if (ret)
 746                 goto fail;
 747
 748         if (args->perfmon_id) {
 749                 render->base.perfmon = v3d_perfmon_find(v3d_priv,
 750                                                         args->perfmon_id);
 751
 752                 if (!render->base.perfmon) {
 753                         ret = -ENOENT;
 754                         goto fail_perfmon;
 755                 }
 756         }
 757
 758         mutex_lock(&v3d->sched_lock);
 759         if (bin) {
 760                 bin->base.perfmon = render->base.perfmon;
 761                 v3d_perfmon_get(bin->base.perfmon);
 762                 v3d_push_job(&bin->base);
 763
 764                 ret = drm_sched_job_add_dependency(&render->base.base,
 765                                                    dma_fence_get(bin->base.done_fence));
 766                 if (ret)
 767                         goto fail_unreserve;
 768         }
 769
 770         v3d_push_job(&render->base);
 771
 772         if (clean_job) {
 773                 struct dma_fence *render_fence =
 774                         dma_fence_get(render->base.done_fence);
 775                 ret = drm_sched_job_add_dependency(&clean_job->base,
 776                                                    render_fence);
 777                 if (ret)
 778                         goto fail_unreserve;
 779                 clean_job->perfmon = render->base.perfmon;
 780                 v3d_perfmon_get(clean_job->perfmon);
 781                 v3d_push_job(clean_job);
 782         }
 783
 784         mutex_unlock(&v3d->sched_lock);
 785
 786         v3d_attach_fences_and_unlock_reservation(file_priv,
 787                                                  last_job,
 788                                                  &acquire_ctx,
 789                                                  args->out_sync,
 790                                                  &se,
 791                                                  last_job->done_fence);
 792
 793         if (bin)
 794                 v3d_job_put(&bin->base);
 795         v3d_job_put(&render->base);
 796         if (clean_job)
 797                 v3d_job_put(clean_job);
 798
 799         return 0;
 800
 801 fail_unreserve:
 802         mutex_unlock(&v3d->sched_lock);
 803 fail_perfmon:
 804         drm_gem_unlock_reservations(last_job->bo,
 805                                     last_job->bo_count, &acquire_ctx);
 806 fail:
 807         v3d_job_cleanup((void *)bin);
 808         v3d_job_cleanup((void *)render);
 809         v3d_job_cleanup(clean_job);
 810         v3d_put_multisync_post_deps(&se);
 811
 812         return ret;
 813 }
 814
 815 /**
 816  * v3d_submit_tfu_ioctl() - Submits a TFU (texture formatting) job to the V3D.
 817  * @dev: DRM device
 818  * @data: ioctl argument
 819  * @file_priv: DRM file for this fd
 820  *
 821  * Userspace provides the register setup for the TFU, which we don't
 822  * need to validate since the TFU is behind the MMU.
 823  */
 824 int
 825 v3d_submit_tfu_ioctl(struct drm_device *dev, void *data,
 826                      struct drm_file *file_priv)
 827 {
 828         struct v3d_dev *v3d = to_v3d_dev(dev);
 829         struct drm_v3d_submit_tfu *args = data;
 830         struct v3d_submit_ext se = {0};
 831         struct v3d_tfu_job *job = NULL;
 832         struct ww_acquire_ctx acquire_ctx;
 833         int ret = 0;
 834
 835         trace_v3d_submit_tfu_ioctl(&v3d->drm, args->iia);
 836
 837         if (args->flags && !(args->flags & DRM_V3D_SUBMIT_EXTENSION)) {
 838                 DRM_DEBUG("invalid flags: %d\n", args->flags);
 839                 return -EINVAL;
 840         }
 841
 842         if (args->flags & DRM_V3D_SUBMIT_EXTENSION) {
 843                 ret = v3d_get_extensions(file_priv, args->extensions, &se);
 844                 if (ret) {
 845                         DRM_DEBUG("Failed to get extensions.\n");
 846                         return ret;
 847                 }
 848         }
 849
 850         ret = v3d_job_init(v3d, file_priv, (void *)&job, sizeof(*job),
 851                            v3d_job_free, args->in_sync, &se, V3D_TFU);
 852         if (ret)
 853                 goto fail;
 854
 855         job->base.bo = kcalloc(ARRAY_SIZE(args->bo_handles),
 856                                sizeof(*job->base.bo), GFP_KERNEL);
 857         if (!job->base.bo) {
 858                 ret = -ENOMEM;
 859                 goto fail;
 860         }
 861
 862         job->args = *args;
 863
 864         for (job->base.bo_count = 0;
 865              job->base.bo_count < ARRAY_SIZE(args->bo_handles);
 866              job->base.bo_count++) {
 867                 struct drm_gem_object *bo;
 868
 869                 if (!args->bo_handles[job->base.bo_count])
 870                         break;
 871
 872                 bo = drm_gem_object_lookup(file_priv, args->bo_handles[job->base.bo_count]);
 873                 if (!bo) {
 874                         DRM_DEBUG("Failed to look up GEM BO %d: %d\n",
 875                                   job->base.bo_count,
 876                                   args->bo_handles[job->base.bo_count]);
 877                         ret = -ENOENT;
 878                         goto fail;
 879                 }
 880                 job->base.bo[job->base.bo_count] = bo;
 881         }
 882
 883         ret = v3d_lock_bo_reservations(&job->base, &acquire_ctx);
 884         if (ret)
 885                 goto fail;
 886
 887         mutex_lock(&v3d->sched_lock);
 888         v3d_push_job(&job->base);
 889         mutex_unlock(&v3d->sched_lock);
 890
 891         v3d_attach_fences_and_unlock_reservation(file_priv,
 892                                                  &job->base, &acquire_ctx,
 893                                                  args->out_sync,
 894                                                  &se,
 895                                                  job->base.done_fence);
 896
 897         v3d_job_put(&job->base);
 898
 899         return 0;
 900
 901 fail:
 902         v3d_job_cleanup((void *)job);
 903         v3d_put_multisync_post_deps(&se);
 904
 905         return ret;
 906 }
 907
 908 /**
 909  * v3d_submit_csd_ioctl() - Submits a CSD (texture formatting) job to the V3D.
 910  * @dev: DRM device
 911  * @data: ioctl argument
 912  * @file_priv: DRM file for this fd
 913  *
 914  * Userspace provides the register setup for the CSD, which we don't
 915  * need to validate since the CSD is behind the MMU.
 916  */
 917 int
 918 v3d_submit_csd_ioctl(struct drm_device *dev, void *data,
 919                      struct drm_file *file_priv)
 920 {
 921         struct v3d_dev *v3d = to_v3d_dev(dev);
 922         struct v3d_file_priv *v3d_priv = file_priv->driver_priv;
 923         struct drm_v3d_submit_csd *args = data;
 924         struct v3d_submit_ext se = {0};
 925         struct v3d_csd_job *job = NULL;
 926         struct v3d_job *clean_job = NULL;
 927         struct ww_acquire_ctx acquire_ctx;
 928         int ret;
 929
 930         trace_v3d_submit_csd_ioctl(&v3d->drm, args->cfg[5], args->cfg[6]);
 931
 932         if (args->pad)
 933                 return -EINVAL;
 934
 935         if (!v3d_has_csd(v3d)) {
 936                 DRM_DEBUG("Attempting CSD submit on non-CSD hardware\n");
 937                 return -EINVAL;
 938         }
 939
 940         if (args->flags && !(args->flags & DRM_V3D_SUBMIT_EXTENSION)) {
 941                 DRM_INFO("invalid flags: %d\n", args->flags);
 942                 return -EINVAL;
 943         }
 944
 945         if (args->flags & DRM_V3D_SUBMIT_EXTENSION) {
 946                 ret = v3d_get_extensions(file_priv, args->extensions, &se);
 947                 if (ret) {
 948                         DRM_DEBUG("Failed to get extensions.\n");
 949                         return ret;
 950                 }
 951         }
 952
 953         ret = v3d_job_init(v3d, file_priv, (void *)&job, sizeof(*job),
 954                            v3d_job_free, args->in_sync, &se, V3D_CSD);
 955         if (ret)
 956                 goto fail;
 957
 958         ret = v3d_job_init(v3d, file_priv, (void *)&clean_job, sizeof(*clean_job),
 959                            v3d_job_free, 0, NULL, V3D_CACHE_CLEAN);
 960         if (ret)
 961                 goto fail;
 962
 963         job->args = *args;
 964
 965         ret = v3d_lookup_bos(dev, file_priv, clean_job,
 966                              args->bo_handles, args->bo_handle_count);
 967         if (ret)
 968                 goto fail;
 969
 970         ret = v3d_lock_bo_reservations(clean_job, &acquire_ctx);
 971         if (ret)
 972                 goto fail;
 973
 974         if (args->perfmon_id) {
 975                 job->base.perfmon = v3d_perfmon_find(v3d_priv,
 976                                                      args->perfmon_id);
 977                 if (!job->base.perfmon) {
 978                         ret = -ENOENT;
 979                         goto fail_perfmon;
 980                 }
 981         }
 982
 983         mutex_lock(&v3d->sched_lock);
 984         v3d_push_job(&job->base);
 985
 986         ret = drm_sched_job_add_dependency(&clean_job->base,
 987                                            dma_fence_get(job->base.done_fence));
 988         if (ret)
 989                 goto fail_unreserve;
 990
 991         v3d_push_job(clean_job);
 992         mutex_unlock(&v3d->sched_lock);
 993
 994         v3d_attach_fences_and_unlock_reservation(file_priv,
 995                                                  clean_job,
 996                                                  &acquire_ctx,
 997                                                  args->out_sync,
 998                                                  &se,
 999                                                  clean_job->done_fence);
1000
1001         v3d_job_put(&job->base);
1002         v3d_job_put(clean_job);
1003
1004         return 0;
1005
1006 fail_unreserve:
1007         mutex_unlock(&v3d->sched_lock);
1008 fail_perfmon:
1009         drm_gem_unlock_reservations(clean_job->bo, clean_job->bo_count,
1010                                     &acquire_ctx);
1011 fail:
1012         v3d_job_cleanup((void *)job);
1013         v3d_job_cleanup(clean_job);
1014         v3d_put_multisync_post_deps(&se);
1015
1016         return ret;
1017 }
1018
1019 int
1020 v3d_gem_init(struct drm_device *dev)
1021 {
1022         struct v3d_dev *v3d = to_v3d_dev(dev);
1023         u32 pt_size = 4096 * 1024;
1024         int ret, i;
1025
1026         for (i = 0; i < V3D_MAX_QUEUES; i++)
1027                 v3d->queue[i].fence_context = dma_fence_context_alloc(1);
1028
1029         spin_lock_init(&v3d->mm_lock);
1030         spin_lock_init(&v3d->job_lock);
1031         ret = drmm_mutex_init(dev, &v3d->bo_lock);
1032         if (ret)
1033                 return ret;
1034         ret = drmm_mutex_init(dev, &v3d->reset_lock);
1035         if (ret)
1036                 return ret;
1037         ret = drmm_mutex_init(dev, &v3d->sched_lock);
1038         if (ret)
1039                 return ret;
1040         ret = drmm_mutex_init(dev, &v3d->cache_clean_lock);
1041         if (ret)
1042                 return ret;
1043
1044         /* Note: We don't allocate address 0.  Various bits of HW
1045          * treat 0 as special, such as the occlusion query counters
1046          * where 0 means "disabled".
1047          */
1048         drm_mm_init(&v3d->mm, 1, pt_size / sizeof(u32) - 1);
1049
1050         v3d->pt = dma_alloc_wc(v3d->drm.dev, pt_size,
1051                                &v3d->pt_paddr,
1052                                GFP_KERNEL | __GFP_NOWARN | __GFP_ZERO);
1053         if (!v3d->pt) {
1054                 drm_mm_takedown(&v3d->mm);
1055                 dev_err(v3d->drm.dev,
1056                         "Failed to allocate page tables. Please ensure you have DMA enabled.\n");
1057                 return -ENOMEM;
1058         }
1059
1060         v3d_init_hw_state(v3d);
1061         v3d_mmu_set_page_table(v3d);
1062
1063         ret = v3d_sched_init(v3d);
1064         if (ret) {
1065                 drm_mm_takedown(&v3d->mm);
1066                 dma_free_coherent(v3d->drm.dev, 4096 * 1024, (void *)v3d->pt,
1067                                   v3d->pt_paddr);
1068         }
1069
1070         return 0;
1071 }
1072
1073 void
1074 v3d_gem_destroy(struct drm_device *dev)
1075 {
1076         struct v3d_dev *v3d = to_v3d_dev(dev);
1077
1078         v3d_sched_fini(v3d);
1079
1080         /* Waiting for jobs to finish would need to be done before
1081          * unregistering V3D.
1082          */
1083         WARN_ON(v3d->bin_job);
1084         WARN_ON(v3d->render_job);
1085
1086         drm_mm_takedown(&v3d->mm);
1087
1088         dma_free_coherent(v3d->drm.dev, 4096 * 1024, (void *)v3d->pt,
1089                           v3d->pt_paddr);
1090 }