2 * SuperH On-Chip RTC Support
4 * Copyright (C) 2006 - 2009 Paul Mundt
5 * Copyright (C) 2006 Jamie Lenehan
6 * Copyright (C) 2008 Angelo Castello
8 * Based on the old arch/sh/kernel/cpu/rtc.c by:
11 * Copyright (C) 1999 Tetsuya Okada & Niibe Yutaka
13 * This file is subject to the terms and conditions of the GNU General Public
14 * License. See the file "COPYING" in the main directory of this archive
17 #include <linux/module.h>
18 #include <linux/kernel.h>
19 #include <linux/bcd.h>
20 #include <linux/rtc.h>
21 #include <linux/init.h>
22 #include <linux/platform_device.h>
23 #include <linux/seq_file.h>
24 #include <linux/interrupt.h>
25 #include <linux/spinlock.h>
27 #include <linux/log2.h>
28 #include <linux/clk.h>
29 #include <linux/slab.h>
32 #define DRV_NAME "sh-rtc"
34 #define RTC_REG(r) ((r) * rtc_reg_size)
36 #define R64CNT RTC_REG(0)
38 #define RSECCNT RTC_REG(1) /* RTC sec */
39 #define RMINCNT RTC_REG(2) /* RTC min */
40 #define RHRCNT RTC_REG(3) /* RTC hour */
41 #define RWKCNT RTC_REG(4) /* RTC week */
42 #define RDAYCNT RTC_REG(5) /* RTC day */
43 #define RMONCNT RTC_REG(6) /* RTC month */
44 #define RYRCNT RTC_REG(7) /* RTC year */
45 #define RSECAR RTC_REG(8) /* ALARM sec */
46 #define RMINAR RTC_REG(9) /* ALARM min */
47 #define RHRAR RTC_REG(10) /* ALARM hour */
48 #define RWKAR RTC_REG(11) /* ALARM week */
49 #define RDAYAR RTC_REG(12) /* ALARM day */
50 #define RMONAR RTC_REG(13) /* ALARM month */
51 #define RCR1 RTC_REG(14) /* Control */
52 #define RCR2 RTC_REG(15) /* Control */
55 * Note on RYRAR and RCR3: Up until this point most of the register
56 * definitions are consistent across all of the available parts. However,
57 * the placement of the optional RYRAR and RCR3 (the RYRAR control
58 * register used to control RYRCNT/RYRAR compare) varies considerably
59 * across various parts, occasionally being mapped in to a completely
60 * unrelated address space. For proper RYRAR support a separate resource
61 * would have to be handed off, but as this is purely optional in
62 * practice, we simply opt not to support it, thereby keeping the code
63 * quite a bit more simplified.
66 /* ALARM Bits - or with BCD encoded value */
67 #define AR_ENB 0x80 /* Enable for alarm cmp */
70 #define PF_HP 0x100 /* Enable Half Period to support 8,32,128Hz */
71 #define PF_COUNT 0x200 /* Half periodic counter */
72 #define PF_OXS 0x400 /* Periodic One x Second */
73 #define PF_KOU 0x800 /* Kernel or User periodic request 1=kernel */
77 #define RCR1_CF 0x80 /* Carry Flag */
78 #define RCR1_CIE 0x10 /* Carry Interrupt Enable */
79 #define RCR1_AIE 0x08 /* Alarm Interrupt Enable */
80 #define RCR1_AF 0x01 /* Alarm Flag */
83 #define RCR2_PEF 0x80 /* PEriodic interrupt Flag */
84 #define RCR2_PESMASK 0x70 /* Periodic interrupt Set */
85 #define RCR2_RTCEN 0x08 /* ENable RTC */
86 #define RCR2_ADJ 0x04 /* ADJustment (30-second) */
87 #define RCR2_RESET 0x02 /* Reset bit */
88 #define RCR2_START 0x01 /* Start bit */
91 void __iomem *regbase;
92 unsigned long regsize;
98 struct rtc_device *rtc_dev;
100 unsigned long capabilities; /* See asm/rtc.h for cap bits */
101 unsigned short periodic_freq;
104 static int __sh_rtc_interrupt(struct sh_rtc *rtc)
106 unsigned int tmp, pending;
108 tmp = readb(rtc->regbase + RCR1);
109 pending = tmp & RCR1_CF;
111 writeb(tmp, rtc->regbase + RCR1);
113 /* Users have requested One x Second IRQ */
114 if (pending && rtc->periodic_freq & PF_OXS)
115 rtc_update_irq(rtc->rtc_dev, 1, RTC_UF | RTC_IRQF);
120 static int __sh_rtc_alarm(struct sh_rtc *rtc)
122 unsigned int tmp, pending;
124 tmp = readb(rtc->regbase + RCR1);
125 pending = tmp & RCR1_AF;
126 tmp &= ~(RCR1_AF | RCR1_AIE);
127 writeb(tmp, rtc->regbase + RCR1);
130 rtc_update_irq(rtc->rtc_dev, 1, RTC_AF | RTC_IRQF);
135 static int __sh_rtc_periodic(struct sh_rtc *rtc)
137 struct rtc_device *rtc_dev = rtc->rtc_dev;
138 struct rtc_task *irq_task;
139 unsigned int tmp, pending;
141 tmp = readb(rtc->regbase + RCR2);
142 pending = tmp & RCR2_PEF;
144 writeb(tmp, rtc->regbase + RCR2);
149 /* Half period enabled than one skipped and the next notified */
150 if ((rtc->periodic_freq & PF_HP) && (rtc->periodic_freq & PF_COUNT))
151 rtc->periodic_freq &= ~PF_COUNT;
153 if (rtc->periodic_freq & PF_HP)
154 rtc->periodic_freq |= PF_COUNT;
155 if (rtc->periodic_freq & PF_KOU) {
156 spin_lock(&rtc_dev->irq_task_lock);
157 irq_task = rtc_dev->irq_task;
159 irq_task->func(irq_task->private_data);
160 spin_unlock(&rtc_dev->irq_task_lock);
162 rtc_update_irq(rtc->rtc_dev, 1, RTC_PF | RTC_IRQF);
168 static irqreturn_t sh_rtc_interrupt(int irq, void *dev_id)
170 struct sh_rtc *rtc = dev_id;
173 spin_lock(&rtc->lock);
174 ret = __sh_rtc_interrupt(rtc);
175 spin_unlock(&rtc->lock);
177 return IRQ_RETVAL(ret);
180 static irqreturn_t sh_rtc_alarm(int irq, void *dev_id)
182 struct sh_rtc *rtc = dev_id;
185 spin_lock(&rtc->lock);
186 ret = __sh_rtc_alarm(rtc);
187 spin_unlock(&rtc->lock);
189 return IRQ_RETVAL(ret);
192 static irqreturn_t sh_rtc_periodic(int irq, void *dev_id)
194 struct sh_rtc *rtc = dev_id;
197 spin_lock(&rtc->lock);
198 ret = __sh_rtc_periodic(rtc);
199 spin_unlock(&rtc->lock);
201 return IRQ_RETVAL(ret);
204 static irqreturn_t sh_rtc_shared(int irq, void *dev_id)
206 struct sh_rtc *rtc = dev_id;
209 spin_lock(&rtc->lock);
210 ret = __sh_rtc_interrupt(rtc);
211 ret |= __sh_rtc_alarm(rtc);
212 ret |= __sh_rtc_periodic(rtc);
213 spin_unlock(&rtc->lock);
215 return IRQ_RETVAL(ret);
218 static int sh_rtc_irq_set_state(struct device *dev, int enable)
220 struct sh_rtc *rtc = dev_get_drvdata(dev);
223 spin_lock_irq(&rtc->lock);
225 tmp = readb(rtc->regbase + RCR2);
228 rtc->periodic_freq |= PF_KOU;
229 tmp &= ~RCR2_PEF; /* Clear PES bit */
230 tmp |= (rtc->periodic_freq & ~PF_HP); /* Set PES2-0 */
232 rtc->periodic_freq &= ~PF_KOU;
233 tmp &= ~(RCR2_PESMASK | RCR2_PEF);
236 writeb(tmp, rtc->regbase + RCR2);
238 spin_unlock_irq(&rtc->lock);
243 static int sh_rtc_irq_set_freq(struct device *dev, int freq)
245 struct sh_rtc *rtc = dev_get_drvdata(dev);
248 spin_lock_irq(&rtc->lock);
249 tmp = rtc->periodic_freq & PF_MASK;
253 rtc->periodic_freq = 0x00;
256 rtc->periodic_freq = 0x60;
259 rtc->periodic_freq = 0x50;
262 rtc->periodic_freq = 0x40;
265 rtc->periodic_freq = 0x30 | PF_HP;
268 rtc->periodic_freq = 0x30;
271 rtc->periodic_freq = 0x20 | PF_HP;
274 rtc->periodic_freq = 0x20;
277 rtc->periodic_freq = 0x10 | PF_HP;
280 rtc->periodic_freq = 0x10;
287 rtc->periodic_freq |= tmp;
289 spin_unlock_irq(&rtc->lock);
293 static inline void sh_rtc_setaie(struct device *dev, unsigned int enable)
295 struct sh_rtc *rtc = dev_get_drvdata(dev);
298 spin_lock_irq(&rtc->lock);
300 tmp = readb(rtc->regbase + RCR1);
307 writeb(tmp, rtc->regbase + RCR1);
309 spin_unlock_irq(&rtc->lock);
312 static int sh_rtc_proc(struct device *dev, struct seq_file *seq)
314 struct sh_rtc *rtc = dev_get_drvdata(dev);
317 tmp = readb(rtc->regbase + RCR1);
318 seq_printf(seq, "carry_IRQ\t: %s\n", (tmp & RCR1_CIE) ? "yes" : "no");
320 tmp = readb(rtc->regbase + RCR2);
321 seq_printf(seq, "periodic_IRQ\t: %s\n",
322 (tmp & RCR2_PESMASK) ? "yes" : "no");
327 static inline void sh_rtc_setcie(struct device *dev, unsigned int enable)
329 struct sh_rtc *rtc = dev_get_drvdata(dev);
332 spin_lock_irq(&rtc->lock);
334 tmp = readb(rtc->regbase + RCR1);
341 writeb(tmp, rtc->regbase + RCR1);
343 spin_unlock_irq(&rtc->lock);
346 static int sh_rtc_alarm_irq_enable(struct device *dev, unsigned int enabled)
348 sh_rtc_setaie(dev, enabled);
352 static int sh_rtc_read_time(struct device *dev, struct rtc_time *tm)
354 struct platform_device *pdev = to_platform_device(dev);
355 struct sh_rtc *rtc = platform_get_drvdata(pdev);
356 unsigned int sec128, sec2, yr, yr100, cf_bit;
361 spin_lock_irq(&rtc->lock);
363 tmp = readb(rtc->regbase + RCR1);
364 tmp &= ~RCR1_CF; /* Clear CF-bit */
366 writeb(tmp, rtc->regbase + RCR1);
368 sec128 = readb(rtc->regbase + R64CNT);
370 tm->tm_sec = bcd2bin(readb(rtc->regbase + RSECCNT));
371 tm->tm_min = bcd2bin(readb(rtc->regbase + RMINCNT));
372 tm->tm_hour = bcd2bin(readb(rtc->regbase + RHRCNT));
373 tm->tm_wday = bcd2bin(readb(rtc->regbase + RWKCNT));
374 tm->tm_mday = bcd2bin(readb(rtc->regbase + RDAYCNT));
375 tm->tm_mon = bcd2bin(readb(rtc->regbase + RMONCNT)) - 1;
377 if (rtc->capabilities & RTC_CAP_4_DIGIT_YEAR) {
378 yr = readw(rtc->regbase + RYRCNT);
379 yr100 = bcd2bin(yr >> 8);
382 yr = readb(rtc->regbase + RYRCNT);
383 yr100 = bcd2bin((yr == 0x99) ? 0x19 : 0x20);
386 tm->tm_year = (yr100 * 100 + bcd2bin(yr)) - 1900;
388 sec2 = readb(rtc->regbase + R64CNT);
389 cf_bit = readb(rtc->regbase + RCR1) & RCR1_CF;
391 spin_unlock_irq(&rtc->lock);
392 } while (cf_bit != 0 || ((sec128 ^ sec2) & RTC_BIT_INVERTED) != 0);
394 #if RTC_BIT_INVERTED != 0
395 if ((sec128 & RTC_BIT_INVERTED))
399 /* only keep the carry interrupt enabled if UIE is on */
400 if (!(rtc->periodic_freq & PF_OXS))
401 sh_rtc_setcie(dev, 0);
403 dev_dbg(dev, "%s: tm is secs=%d, mins=%d, hours=%d, "
404 "mday=%d, mon=%d, year=%d, wday=%d\n",
406 tm->tm_sec, tm->tm_min, tm->tm_hour,
407 tm->tm_mday, tm->tm_mon + 1, tm->tm_year, tm->tm_wday);
409 return rtc_valid_tm(tm);
412 static int sh_rtc_set_time(struct device *dev, struct rtc_time *tm)
414 struct platform_device *pdev = to_platform_device(dev);
415 struct sh_rtc *rtc = platform_get_drvdata(pdev);
419 spin_lock_irq(&rtc->lock);
421 /* Reset pre-scaler & stop RTC */
422 tmp = readb(rtc->regbase + RCR2);
425 writeb(tmp, rtc->regbase + RCR2);
427 writeb(bin2bcd(tm->tm_sec), rtc->regbase + RSECCNT);
428 writeb(bin2bcd(tm->tm_min), rtc->regbase + RMINCNT);
429 writeb(bin2bcd(tm->tm_hour), rtc->regbase + RHRCNT);
430 writeb(bin2bcd(tm->tm_wday), rtc->regbase + RWKCNT);
431 writeb(bin2bcd(tm->tm_mday), rtc->regbase + RDAYCNT);
432 writeb(bin2bcd(tm->tm_mon + 1), rtc->regbase + RMONCNT);
434 if (rtc->capabilities & RTC_CAP_4_DIGIT_YEAR) {
435 year = (bin2bcd((tm->tm_year + 1900) / 100) << 8) |
436 bin2bcd(tm->tm_year % 100);
437 writew(year, rtc->regbase + RYRCNT);
439 year = tm->tm_year % 100;
440 writeb(bin2bcd(year), rtc->regbase + RYRCNT);
444 tmp = readb(rtc->regbase + RCR2);
446 tmp |= RCR2_RTCEN | RCR2_START;
447 writeb(tmp, rtc->regbase + RCR2);
449 spin_unlock_irq(&rtc->lock);
454 static inline int sh_rtc_read_alarm_value(struct sh_rtc *rtc, int reg_off)
457 int value = 0xff; /* return 0xff for ignored values */
459 byte = readb(rtc->regbase + reg_off);
461 byte &= ~AR_ENB; /* strip the enable bit */
462 value = bcd2bin(byte);
468 static int sh_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *wkalrm)
470 struct platform_device *pdev = to_platform_device(dev);
471 struct sh_rtc *rtc = platform_get_drvdata(pdev);
472 struct rtc_time *tm = &wkalrm->time;
474 spin_lock_irq(&rtc->lock);
476 tm->tm_sec = sh_rtc_read_alarm_value(rtc, RSECAR);
477 tm->tm_min = sh_rtc_read_alarm_value(rtc, RMINAR);
478 tm->tm_hour = sh_rtc_read_alarm_value(rtc, RHRAR);
479 tm->tm_wday = sh_rtc_read_alarm_value(rtc, RWKAR);
480 tm->tm_mday = sh_rtc_read_alarm_value(rtc, RDAYAR);
481 tm->tm_mon = sh_rtc_read_alarm_value(rtc, RMONAR);
483 tm->tm_mon -= 1; /* RTC is 1-12, tm_mon is 0-11 */
484 tm->tm_year = 0xffff;
486 wkalrm->enabled = (readb(rtc->regbase + RCR1) & RCR1_AIE) ? 1 : 0;
488 spin_unlock_irq(&rtc->lock);
493 static inline void sh_rtc_write_alarm_value(struct sh_rtc *rtc,
494 int value, int reg_off)
496 /* < 0 for a value that is ignored */
498 writeb(0, rtc->regbase + reg_off);
500 writeb(bin2bcd(value) | AR_ENB, rtc->regbase + reg_off);
503 static int sh_rtc_check_alarm(struct rtc_time *tm)
506 * The original rtc says anything > 0xc0 is "don't care" or "match
507 * all" - most users use 0xff but rtc-dev uses -1 for the same thing.
508 * The original rtc doesn't support years - some things use -1 and
509 * some 0xffff. We use -1 to make out tests easier.
511 if (tm->tm_year == 0xffff)
513 if (tm->tm_mon >= 0xff)
515 if (tm->tm_mday >= 0xff)
517 if (tm->tm_wday >= 0xff)
519 if (tm->tm_hour >= 0xff)
521 if (tm->tm_min >= 0xff)
523 if (tm->tm_sec >= 0xff)
526 if (tm->tm_year > 9999 ||
528 tm->tm_mday == 0 || tm->tm_mday >= 32 ||
538 static int sh_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *wkalrm)
540 struct platform_device *pdev = to_platform_device(dev);
541 struct sh_rtc *rtc = platform_get_drvdata(pdev);
543 struct rtc_time *tm = &wkalrm->time;
546 err = sh_rtc_check_alarm(tm);
547 if (unlikely(err < 0))
550 spin_lock_irq(&rtc->lock);
552 /* disable alarm interrupt and clear the alarm flag */
553 rcr1 = readb(rtc->regbase + RCR1);
554 rcr1 &= ~(RCR1_AF | RCR1_AIE);
555 writeb(rcr1, rtc->regbase + RCR1);
558 sh_rtc_write_alarm_value(rtc, tm->tm_sec, RSECAR);
559 sh_rtc_write_alarm_value(rtc, tm->tm_min, RMINAR);
560 sh_rtc_write_alarm_value(rtc, tm->tm_hour, RHRAR);
561 sh_rtc_write_alarm_value(rtc, tm->tm_wday, RWKAR);
562 sh_rtc_write_alarm_value(rtc, tm->tm_mday, RDAYAR);
566 sh_rtc_write_alarm_value(rtc, mon, RMONAR);
568 if (wkalrm->enabled) {
570 writeb(rcr1, rtc->regbase + RCR1);
573 spin_unlock_irq(&rtc->lock);
578 static struct rtc_class_ops sh_rtc_ops = {
579 .read_time = sh_rtc_read_time,
580 .set_time = sh_rtc_set_time,
581 .read_alarm = sh_rtc_read_alarm,
582 .set_alarm = sh_rtc_set_alarm,
584 .alarm_irq_enable = sh_rtc_alarm_irq_enable,
587 static int __init sh_rtc_probe(struct platform_device *pdev)
590 struct resource *res;
595 rtc = devm_kzalloc(&pdev->dev, sizeof(*rtc), GFP_KERNEL);
599 spin_lock_init(&rtc->lock);
601 /* get periodic/carry/alarm irqs */
602 ret = platform_get_irq(pdev, 0);
603 if (unlikely(ret <= 0)) {
604 dev_err(&pdev->dev, "No IRQ resource\n");
608 rtc->periodic_irq = ret;
609 rtc->carry_irq = platform_get_irq(pdev, 1);
610 rtc->alarm_irq = platform_get_irq(pdev, 2);
612 res = platform_get_resource(pdev, IORESOURCE_IO, 0);
613 if (unlikely(res == NULL)) {
614 dev_err(&pdev->dev, "No IO resource\n");
618 rtc->regsize = resource_size(res);
620 rtc->res = devm_request_mem_region(&pdev->dev, res->start,
621 rtc->regsize, pdev->name);
622 if (unlikely(!rtc->res))
625 rtc->regbase = devm_ioremap_nocache(&pdev->dev, rtc->res->start,
627 if (unlikely(!rtc->regbase))
631 /* With a single device, the clock id is still "rtc0" */
635 snprintf(clk_name, sizeof(clk_name), "rtc%d", clk_id);
637 rtc->clk = devm_clk_get(&pdev->dev, clk_name);
638 if (IS_ERR(rtc->clk)) {
640 * No error handling for rtc->clk intentionally, not all
641 * platforms will have a unique clock for the RTC, and
642 * the clk API can handle the struct clk pointer being
648 clk_enable(rtc->clk);
650 rtc->capabilities = RTC_DEF_CAPABILITIES;
651 if (dev_get_platdata(&pdev->dev)) {
652 struct sh_rtc_platform_info *pinfo =
653 dev_get_platdata(&pdev->dev);
656 * Some CPUs have special capabilities in addition to the
657 * default set. Add those in here.
659 rtc->capabilities |= pinfo->capabilities;
662 if (rtc->carry_irq <= 0) {
663 /* register shared periodic/carry/alarm irq */
664 ret = devm_request_irq(&pdev->dev, rtc->periodic_irq,
665 sh_rtc_shared, 0, "sh-rtc", rtc);
668 "request IRQ failed with %d, IRQ %d\n", ret,
673 /* register periodic/carry/alarm irqs */
674 ret = devm_request_irq(&pdev->dev, rtc->periodic_irq,
675 sh_rtc_periodic, 0, "sh-rtc period", rtc);
678 "request period IRQ failed with %d, IRQ %d\n",
679 ret, rtc->periodic_irq);
683 ret = devm_request_irq(&pdev->dev, rtc->carry_irq,
684 sh_rtc_interrupt, 0, "sh-rtc carry", rtc);
687 "request carry IRQ failed with %d, IRQ %d\n",
688 ret, rtc->carry_irq);
692 ret = devm_request_irq(&pdev->dev, rtc->alarm_irq,
693 sh_rtc_alarm, 0, "sh-rtc alarm", rtc);
696 "request alarm IRQ failed with %d, IRQ %d\n",
697 ret, rtc->alarm_irq);
702 platform_set_drvdata(pdev, rtc);
704 /* everything disabled by default */
705 sh_rtc_irq_set_freq(&pdev->dev, 0);
706 sh_rtc_irq_set_state(&pdev->dev, 0);
707 sh_rtc_setaie(&pdev->dev, 0);
708 sh_rtc_setcie(&pdev->dev, 0);
710 rtc->rtc_dev = devm_rtc_device_register(&pdev->dev, "sh",
711 &sh_rtc_ops, THIS_MODULE);
712 if (IS_ERR(rtc->rtc_dev)) {
713 ret = PTR_ERR(rtc->rtc_dev);
717 rtc->rtc_dev->max_user_freq = 256;
719 /* reset rtc to epoch 0 if time is invalid */
720 if (rtc_read_time(rtc->rtc_dev, &r) < 0) {
721 rtc_time_to_tm(0, &r);
722 rtc_set_time(rtc->rtc_dev, &r);
725 device_init_wakeup(&pdev->dev, 1);
729 clk_disable(rtc->clk);
734 static int __exit sh_rtc_remove(struct platform_device *pdev)
736 struct sh_rtc *rtc = platform_get_drvdata(pdev);
738 sh_rtc_irq_set_state(&pdev->dev, 0);
740 sh_rtc_setaie(&pdev->dev, 0);
741 sh_rtc_setcie(&pdev->dev, 0);
743 clk_disable(rtc->clk);
748 static void sh_rtc_set_irq_wake(struct device *dev, int enabled)
750 struct platform_device *pdev = to_platform_device(dev);
751 struct sh_rtc *rtc = platform_get_drvdata(pdev);
753 irq_set_irq_wake(rtc->periodic_irq, enabled);
755 if (rtc->carry_irq > 0) {
756 irq_set_irq_wake(rtc->carry_irq, enabled);
757 irq_set_irq_wake(rtc->alarm_irq, enabled);
761 #ifdef CONFIG_PM_SLEEP
762 static int sh_rtc_suspend(struct device *dev)
764 if (device_may_wakeup(dev))
765 sh_rtc_set_irq_wake(dev, 1);
770 static int sh_rtc_resume(struct device *dev)
772 if (device_may_wakeup(dev))
773 sh_rtc_set_irq_wake(dev, 0);
779 static SIMPLE_DEV_PM_OPS(sh_rtc_pm_ops, sh_rtc_suspend, sh_rtc_resume);
781 static struct platform_driver sh_rtc_platform_driver = {
784 .pm = &sh_rtc_pm_ops,
786 .remove = __exit_p(sh_rtc_remove),
789 module_platform_driver_probe(sh_rtc_platform_driver, sh_rtc_probe);
791 MODULE_DESCRIPTION("SuperH on-chip RTC driver");
795 MODULE_LICENSE("GPL");
796 MODULE_ALIAS("platform:" DRV_NAME);