drivers/scsi/pm8001/pm8001_sas.h

   1 /*
   2  * PMC-Sierra PM8001/8081/8088/8089 SAS/SATA based host adapters driver
   3  *
   4  * Copyright (c) 2008-2009 USI Co., Ltd.
   5  * All rights reserved.
   6  *
   7  * Redistribution and use in source and binary forms, with or without
   8  * modification, are permitted provided that the following conditions
   9  * are met:
  10  * 1. Redistributions of source code must retain the above copyright
  11  *    notice, this list of conditions, and the following disclaimer,
  12  *    without modification.
  13  * 2. Redistributions in binary form must reproduce at minimum a disclaimer
  14  *    substantially similar to the "NO WARRANTY" disclaimer below
  15  *    ("Disclaimer") and any redistribution must be conditioned upon
  16  *    including a substantially similar Disclaimer requirement for further
  17  *    binary redistribution.
  18  * 3. Neither the names of the above-listed copyright holders nor the names
  19  *    of any contributors may be used to endorse or promote products derived
  20  *    from this software without specific prior written permission.
  21  *
  22  * Alternatively, this software may be distributed under the terms of the
  23  * GNU General Public License ("GPL") version 2 as published by the Free
  24  * Software Foundation.
  25  *
  26  * NO WARRANTY
  27  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  28  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  29  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR
  30  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  31  * HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  32  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  33  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  34  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
  35  * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
  36  * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  37  * POSSIBILITY OF SUCH DAMAGES.
  38  *
  39  */
  40
  41 #ifndef _PM8001_SAS_H_
  42 #define _PM8001_SAS_H_
  43
  44 #include <linux/kernel.h>
  45 #include <linux/module.h>
  46 #include <linux/spinlock.h>
  47 #include <linux/delay.h>
  48 #include <linux/types.h>
  49 #include <linux/ctype.h>
  50 #include <linux/dma-mapping.h>
  51 #include <linux/pci.h>
  52 #include <linux/interrupt.h>
  53 #include <linux/workqueue.h>
  54 #include <scsi/libsas.h>
  55 #include <scsi/scsi_tcq.h>
  56 #include <scsi/sas_ata.h>
  57 #include <linux/atomic.h>
  58 #include <linux/blk-mq.h>
  59 #include <linux/blk-mq-pci.h>
  60 #include "pm8001_defs.h"
  61
  62 #define DRV_NAME                "pm80xx"
  63 #define DRV_VERSION             "0.1.40"
  64 #define PM8001_FAIL_LOGGING     0x01 /* Error message logging */
  65 #define PM8001_INIT_LOGGING     0x02 /* driver init logging */
  66 #define PM8001_DISC_LOGGING     0x04 /* discovery layer logging */
  67 #define PM8001_IO_LOGGING       0x08 /* I/O path logging */
  68 #define PM8001_EH_LOGGING       0x10 /* libsas EH function logging*/
  69 #define PM8001_IOCTL_LOGGING    0x20 /* IOCTL message logging */
  70 #define PM8001_MSG_LOGGING      0x40 /* misc message logging */
  71 #define PM8001_DEV_LOGGING      0x80 /* development message logging */
  72 #define PM8001_DEVIO_LOGGING    0x100 /* development io message logging */
  73 #define PM8001_IOERR_LOGGING    0x200 /* development io err message logging */
  74 #define PM8001_EVENT_LOGGING    0x400 /* HW event logging */
  75
  76 #define pm8001_info(HBA, fmt, ...)                                      \
  77         pr_info("%s:: %s %d: " fmt,                                     \
  78                 (HBA)->name, __func__, __LINE__, ##__VA_ARGS__)
  79
  80 #define pm8001_dbg(HBA, level, fmt, ...)                                \
  81 do {                                                                    \
  82         if (unlikely((HBA)->logging_level & PM8001_##level##_LOGGING))  \
  83                 pm8001_info(HBA, fmt, ##__VA_ARGS__);                   \
  84 } while (0)
  85
  86 #define PM8001_USE_TASKLET
  87 #define PM8001_USE_MSIX
  88 #define PM8001_READ_VPD
  89
  90
  91 #define IS_SPCV_12G(dev)        ((dev->device == 0X8074)                \
  92                                 || (dev->device == 0X8076)              \
  93                                 || (dev->device == 0X8077)              \
  94                                 || (dev->device == 0X8070)              \
  95                                 || (dev->device == 0X8072))
  96
  97 #define PM8001_NAME_LENGTH              32/* generic length of strings */
  98 extern struct list_head hba_list;
  99 extern const struct pm8001_dispatch pm8001_8001_dispatch;
 100 extern const struct pm8001_dispatch pm8001_80xx_dispatch;
 101
 102 struct pm8001_hba_info;
 103 struct pm8001_ccb_info;
 104 struct pm8001_device;
 105
 106 struct pm8001_ioctl_payload {
 107         u32     signature;
 108         u16     major_function;
 109         u16     minor_function;
 110         u16     status;
 111         u16     offset;
 112         u16     id;
 113         u32     wr_length;
 114         u32     rd_length;
 115         u8      *func_specific;
 116 };
 117
 118 #define MPI_FATAL_ERROR_TABLE_OFFSET_MASK 0xFFFFFF
 119 #define MPI_FATAL_ERROR_TABLE_SIZE(value) ((0xFF000000 & value) >> SHIFT24)
 120 #define MPI_FATAL_EDUMP_TABLE_LO_OFFSET            0x00     /* HNFBUFL */
 121 #define MPI_FATAL_EDUMP_TABLE_HI_OFFSET            0x04     /* HNFBUFH */
 122 #define MPI_FATAL_EDUMP_TABLE_LENGTH               0x08     /* HNFBLEN */
 123 #define MPI_FATAL_EDUMP_TABLE_HANDSHAKE            0x0C     /* FDDHSHK */
 124 #define MPI_FATAL_EDUMP_TABLE_STATUS               0x10     /* FDDTSTAT */
 125 #define MPI_FATAL_EDUMP_TABLE_ACCUM_LEN            0x14     /* ACCDDLEN */
 126 #define MPI_FATAL_EDUMP_TABLE_TOTAL_LEN            0x18     /* TOTALLEN */
 127 #define MPI_FATAL_EDUMP_TABLE_SIGNATURE            0x1C     /* SIGNITURE */
 128 #define MPI_FATAL_EDUMP_HANDSHAKE_RDY              0x1
 129 #define MPI_FATAL_EDUMP_HANDSHAKE_BUSY             0x0
 130 #define MPI_FATAL_EDUMP_TABLE_STAT_RSVD                 0x0
 131 #define MPI_FATAL_EDUMP_TABLE_STAT_DMA_FAILED           0x1
 132 #define MPI_FATAL_EDUMP_TABLE_STAT_NF_SUCCESS_MORE_DATA 0x2
 133 #define MPI_FATAL_EDUMP_TABLE_STAT_NF_SUCCESS_DONE      0x3
 134 #define TYPE_GSM_SPACE        1
 135 #define TYPE_QUEUE            2
 136 #define TYPE_FATAL            3
 137 #define TYPE_NON_FATAL        4
 138 #define TYPE_INBOUND          1
 139 #define TYPE_OUTBOUND         2
 140 struct forensic_data {
 141         u32  data_type;
 142         union {
 143                 struct {
 144                         u32  direct_len;
 145                         u32  direct_offset;
 146                         void  *direct_data;
 147                 } gsm_buf;
 148                 struct {
 149                         u16  queue_type;
 150                         u16  queue_index;
 151                         u32  direct_len;
 152                         void  *direct_data;
 153                 } queue_buf;
 154                 struct {
 155                         u32  direct_len;
 156                         u32  direct_offset;
 157                         u32  read_len;
 158                         void  *direct_data;
 159                 } data_buf;
 160         };
 161 };
 162
 163 /* bit31-26 - mask bar */
 164 #define SCRATCH_PAD0_BAR_MASK                    0xFC000000
 165 /* bit25-0  - offset mask */
 166 #define SCRATCH_PAD0_OFFSET_MASK                 0x03FFFFFF
 167 /* if AAP error state */
 168 #define SCRATCH_PAD0_AAPERR_MASK                 0xFFFFFFFF
 169 /* Inbound doorbell bit7 */
 170 #define SPCv_MSGU_CFG_TABLE_NONFATAL_DUMP        0x80
 171 /* Inbound doorbell bit7 SPCV */
 172 #define SPCV_MSGU_CFG_TABLE_TRANSFER_DEBUG_INFO  0x80
 173 #define MAIN_MERRDCTO_MERRDCES                   0xA0/* DWORD 0x28) */
 174
 175 struct pm8001_dispatch {
 176         char *name;
 177         int (*chip_init)(struct pm8001_hba_info *pm8001_ha);
 178         void (*chip_post_init)(struct pm8001_hba_info *pm8001_ha);
 179         int (*chip_soft_rst)(struct pm8001_hba_info *pm8001_ha);
 180         void (*chip_rst)(struct pm8001_hba_info *pm8001_ha);
 181         int (*chip_ioremap)(struct pm8001_hba_info *pm8001_ha);
 182         void (*chip_iounmap)(struct pm8001_hba_info *pm8001_ha);
 183         irqreturn_t (*isr)(struct pm8001_hba_info *pm8001_ha, u8 vec);
 184         u32 (*is_our_interrupt)(struct pm8001_hba_info *pm8001_ha);
 185         int (*isr_process_oq)(struct pm8001_hba_info *pm8001_ha, u8 vec);
 186         void (*interrupt_enable)(struct pm8001_hba_info *pm8001_ha, u8 vec);
 187         void (*interrupt_disable)(struct pm8001_hba_info *pm8001_ha, u8 vec);
 188         void (*make_prd)(struct scatterlist *scatter, int nr, void *prd);
 189         int (*smp_req)(struct pm8001_hba_info *pm8001_ha,
 190                 struct pm8001_ccb_info *ccb);
 191         int (*ssp_io_req)(struct pm8001_hba_info *pm8001_ha,
 192                 struct pm8001_ccb_info *ccb);
 193         int (*sata_req)(struct pm8001_hba_info *pm8001_ha,
 194                 struct pm8001_ccb_info *ccb);
 195         int (*phy_start_req)(struct pm8001_hba_info *pm8001_ha, u8 phy_id);
 196         int (*phy_stop_req)(struct pm8001_hba_info *pm8001_ha, u8 phy_id);
 197         int (*reg_dev_req)(struct pm8001_hba_info *pm8001_ha,
 198                 struct pm8001_device *pm8001_dev, u32 flag);
 199         int (*dereg_dev_req)(struct pm8001_hba_info *pm8001_ha, u32 device_id);
 200         int (*phy_ctl_req)(struct pm8001_hba_info *pm8001_ha,
 201                 u32 phy_id, u32 phy_op);
 202         int (*task_abort)(struct pm8001_hba_info *pm8001_ha,
 203                 struct pm8001_ccb_info *ccb);
 204         int (*ssp_tm_req)(struct pm8001_hba_info *pm8001_ha,
 205                 struct pm8001_ccb_info *ccb, struct sas_tmf_task *tmf);
 206         int (*get_nvmd_req)(struct pm8001_hba_info *pm8001_ha, void *payload);
 207         int (*set_nvmd_req)(struct pm8001_hba_info *pm8001_ha, void *payload);
 208         int (*fw_flash_update_req)(struct pm8001_hba_info *pm8001_ha,
 209                 void *payload);
 210         int (*set_dev_state_req)(struct pm8001_hba_info *pm8001_ha,
 211                 struct pm8001_device *pm8001_dev, u32 state);
 212         int (*sas_diag_start_end_req)(struct pm8001_hba_info *pm8001_ha,
 213                 u32 state);
 214         int (*sas_diag_execute_req)(struct pm8001_hba_info *pm8001_ha,
 215                 u32 state);
 216         int (*sas_re_init_req)(struct pm8001_hba_info *pm8001_ha);
 217         int (*fatal_errors)(struct pm8001_hba_info *pm8001_ha);
 218         void (*hw_event_ack_req)(struct pm8001_hba_info *pm8001_ha,
 219                 u32 Qnum, u32 SEA, u32 port_id, u32 phyId, u32 param0,
 220                 u32 param1);
 221 };
 222
 223 struct pm8001_chip_info {
 224         u32     encrypt;
 225         u32     n_phy;
 226         const struct pm8001_dispatch    *dispatch;
 227 };
 228 #define PM8001_CHIP_DISP        (pm8001_ha->chip->dispatch)
 229
 230 struct pm8001_port {
 231         struct asd_sas_port     sas_port;
 232         u8                      port_attached;
 233         u16                     wide_port_phymap;
 234         u8                      port_state;
 235         u8                      port_id;
 236         struct list_head        list;
 237 };
 238
 239 struct pm8001_phy {
 240         struct pm8001_hba_info  *pm8001_ha;
 241         struct pm8001_port      *port;
 242         struct asd_sas_phy      sas_phy;
 243         struct sas_identify     identify;
 244         struct scsi_device      *sdev;
 245         u64                     dev_sas_addr;
 246         u32                     phy_type;
 247         struct completion       *enable_completion;
 248         u32                     frame_rcvd_size;
 249         u8                      frame_rcvd[32];
 250         u8                      phy_attached;
 251         u8                      phy_state;
 252         enum sas_linkrate       minimum_linkrate;
 253         enum sas_linkrate       maximum_linkrate;
 254         struct completion       *reset_completion;
 255         bool                    port_reset_status;
 256         bool                    reset_success;
 257 };
 258
 259 /* port reset status */
 260 #define PORT_RESET_SUCCESS      0x00
 261 #define PORT_RESET_TMO          0x01
 262
 263 struct pm8001_device {
 264         enum sas_device_type    dev_type;
 265         struct domain_device    *sas_device;
 266         u32                     attached_phy;
 267         u32                     id;
 268         struct completion       *dcompletion;
 269         struct completion       *setds_completion;
 270         u32                     device_id;
 271         atomic_t                running_req;
 272 };
 273
 274 struct pm8001_prd_imt {
 275         __le32                  len;
 276         __le32                  e;
 277 };
 278
 279 struct pm8001_prd {
 280         __le64                  addr;           /* 64-bit buffer address */
 281         struct pm8001_prd_imt   im_len;         /* 64-bit length */
 282 } __attribute__ ((packed));
 283 /*
 284  * CCB(Command Control Block)
 285  */
 286 struct pm8001_ccb_info {
 287         struct sas_task         *task;
 288         u32                     n_elem;
 289         u32                     ccb_tag;
 290         dma_addr_t              ccb_dma_handle;
 291         struct pm8001_device    *device;
 292         struct pm8001_prd       *buf_prd;
 293         struct fw_control_ex    *fw_control_context;
 294         u8                      open_retry;
 295 };
 296
 297 struct mpi_mem {
 298         void                    *virt_ptr;
 299         dma_addr_t              phys_addr;
 300         u32                     phys_addr_hi;
 301         u32                     phys_addr_lo;
 302         u32                     total_len;
 303         u32                     num_elements;
 304         u32                     element_size;
 305         u32                     alignment;
 306 };
 307
 308 struct mpi_mem_req {
 309         /* The number of element in the  mpiMemory array */
 310         u32                     count;
 311         /* The array of structures that define memroy regions*/
 312         struct mpi_mem          region[USI_MAX_MEMCNT];
 313 };
 314
 315 struct encrypt {
 316         u32     cipher_mode;
 317         u32     sec_mode;
 318         u32     status;
 319         u32     flag;
 320 };
 321
 322 struct sas_phy_attribute_table {
 323         u32     phystart1_16[16];
 324         u32     outbound_hw_event_pid1_16[16];
 325 };
 326
 327 union main_cfg_table {
 328         struct {
 329         u32                     signature;
 330         u32                     interface_rev;
 331         u32                     firmware_rev;
 332         u32                     max_out_io;
 333         u32                     max_sgl;
 334         u32                     ctrl_cap_flag;
 335         u32                     gst_offset;
 336         u32                     inbound_queue_offset;
 337         u32                     outbound_queue_offset;
 338         u32                     inbound_q_nppd_hppd;
 339         u32                     outbound_hw_event_pid0_3;
 340         u32                     outbound_hw_event_pid4_7;
 341         u32                     outbound_ncq_event_pid0_3;
 342         u32                     outbound_ncq_event_pid4_7;
 343         u32                     outbound_tgt_ITNexus_event_pid0_3;
 344         u32                     outbound_tgt_ITNexus_event_pid4_7;
 345         u32                     outbound_tgt_ssp_event_pid0_3;
 346         u32                     outbound_tgt_ssp_event_pid4_7;
 347         u32                     outbound_tgt_smp_event_pid0_3;
 348         u32                     outbound_tgt_smp_event_pid4_7;
 349         u32                     upper_event_log_addr;
 350         u32                     lower_event_log_addr;
 351         u32                     event_log_size;
 352         u32                     event_log_option;
 353         u32                     upper_iop_event_log_addr;
 354         u32                     lower_iop_event_log_addr;
 355         u32                     iop_event_log_size;
 356         u32                     iop_event_log_option;
 357         u32                     fatal_err_interrupt;
 358         u32                     fatal_err_dump_offset0;
 359         u32                     fatal_err_dump_length0;
 360         u32                     fatal_err_dump_offset1;
 361         u32                     fatal_err_dump_length1;
 362         u32                     hda_mode_flag;
 363         u32                     anolog_setup_table_offset;
 364         u32                     rsvd[4];
 365         } pm8001_tbl;
 366
 367         struct {
 368         u32                     signature;
 369         u32                     interface_rev;
 370         u32                     firmware_rev;
 371         u32                     max_out_io;
 372         u32                     max_sgl;
 373         u32                     ctrl_cap_flag;
 374         u32                     gst_offset;
 375         u32                     inbound_queue_offset;
 376         u32                     outbound_queue_offset;
 377         u32                     inbound_q_nppd_hppd;
 378         u32                     rsvd[8];
 379         u32                     crc_core_dump;
 380         u32                     rsvd1;
 381         u32                     upper_event_log_addr;
 382         u32                     lower_event_log_addr;
 383         u32                     event_log_size;
 384         u32                     event_log_severity;
 385         u32                     upper_pcs_event_log_addr;
 386         u32                     lower_pcs_event_log_addr;
 387         u32                     pcs_event_log_size;
 388         u32                     pcs_event_log_severity;
 389         u32                     fatal_err_interrupt;
 390         u32                     fatal_err_dump_offset0;
 391         u32                     fatal_err_dump_length0;
 392         u32                     fatal_err_dump_offset1;
 393         u32                     fatal_err_dump_length1;
 394         u32                     gpio_led_mapping;
 395         u32                     analog_setup_table_offset;
 396         u32                     int_vec_table_offset;
 397         u32                     phy_attr_table_offset;
 398         u32                     port_recovery_timer;
 399         u32                     interrupt_reassertion_delay;
 400         u32                     fatal_n_non_fatal_dump;         /* 0x28 */
 401         u32                     ila_version;
 402         u32                     inc_fw_version;
 403         } pm80xx_tbl;
 404 };
 405
 406 union general_status_table {
 407         struct {
 408         u32                     gst_len_mpistate;
 409         u32                     iq_freeze_state0;
 410         u32                     iq_freeze_state1;
 411         u32                     msgu_tcnt;
 412         u32                     iop_tcnt;
 413         u32                     rsvd;
 414         u32                     phy_state[8];
 415         u32                     gpio_input_val;
 416         u32                     rsvd1[2];
 417         u32                     recover_err_info[8];
 418         } pm8001_tbl;
 419         struct {
 420         u32                     gst_len_mpistate;
 421         u32                     iq_freeze_state0;
 422         u32                     iq_freeze_state1;
 423         u32                     msgu_tcnt;
 424         u32                     iop_tcnt;
 425         u32                     rsvd[9];
 426         u32                     gpio_input_val;
 427         u32                     rsvd1[2];
 428         u32                     recover_err_info[8];
 429         } pm80xx_tbl;
 430 };
 431 struct inbound_queue_table {
 432         u32                     element_pri_size_cnt;
 433         u32                     upper_base_addr;
 434         u32                     lower_base_addr;
 435         u32                     ci_upper_base_addr;
 436         u32                     ci_lower_base_addr;
 437         u32                     pi_pci_bar;
 438         u32                     pi_offset;
 439         u32                     total_length;
 440         void                    *base_virt;
 441         void                    *ci_virt;
 442         u32                     reserved;
 443         __le32                  consumer_index;
 444         u32                     producer_idx;
 445         spinlock_t              iq_lock;
 446 };
 447 struct outbound_queue_table {
 448         u32                     element_size_cnt;
 449         u32                     upper_base_addr;
 450         u32                     lower_base_addr;
 451         void                    *base_virt;
 452         u32                     pi_upper_base_addr;
 453         u32                     pi_lower_base_addr;
 454         u32                     ci_pci_bar;
 455         u32                     ci_offset;
 456         u32                     total_length;
 457         void                    *pi_virt;
 458         u32                     interrup_vec_cnt_delay;
 459         u32                     dinterrup_to_pci_offset;
 460         __le32                  producer_index;
 461         u32                     consumer_idx;
 462         spinlock_t              oq_lock;
 463         unsigned long           lock_flags;
 464 };
 465 struct pm8001_hba_memspace {
 466         void __iomem            *memvirtaddr;
 467         u64                     membase;
 468         u32                     memsize;
 469 };
 470 struct isr_param {
 471         struct pm8001_hba_info *drv_inst;
 472         u32 irq_id;
 473 };
 474 struct pm8001_hba_info {
 475         char                    name[PM8001_NAME_LENGTH];
 476         struct list_head        list;
 477         unsigned long           flags;
 478         spinlock_t              lock;/* host-wide lock */
 479         spinlock_t              bitmap_lock;
 480         struct pci_dev          *pdev;/* our device */
 481         struct device           *dev;
 482         struct pm8001_hba_memspace io_mem[6];
 483         struct mpi_mem_req      memoryMap;
 484         struct encrypt          encrypt_info; /* support encryption */
 485         struct forensic_data    forensic_info;
 486         u32                     fatal_bar_loc;
 487         u32                     forensic_last_offset;
 488         u32                     fatal_forensic_shift_offset;
 489         u32                     forensic_fatal_step;
 490         u32                     forensic_preserved_accumulated_transfer;
 491         u32                     evtlog_ib_offset;
 492         u32                     evtlog_ob_offset;
 493         void __iomem    *msg_unit_tbl_addr;/*Message Unit Table Addr*/
 494         void __iomem    *main_cfg_tbl_addr;/*Main Config Table Addr*/
 495         void __iomem    *general_stat_tbl_addr;/*General Status Table Addr*/
 496         void __iomem    *inbnd_q_tbl_addr;/*Inbound Queue Config Table Addr*/
 497         void __iomem    *outbnd_q_tbl_addr;/*Outbound Queue Config Table Addr*/
 498         void __iomem    *pspa_q_tbl_addr;
 499                         /*MPI SAS PHY attributes Queue Config Table Addr*/
 500         void __iomem    *ivt_tbl_addr; /*MPI IVT Table Addr */
 501         void __iomem    *fatal_tbl_addr; /*MPI IVT Table Addr */
 502         union main_cfg_table    main_cfg_tbl;
 503         union general_status_table      gs_tbl;
 504         struct inbound_queue_table      inbnd_q_tbl[PM8001_MAX_INB_NUM];
 505         struct outbound_queue_table     outbnd_q_tbl[PM8001_MAX_OUTB_NUM];
 506         struct sas_phy_attribute_table  phy_attr_table;
 507                                         /* MPI SAS PHY attributes */
 508         u8                      sas_addr[SAS_ADDR_SIZE];
 509         struct sas_ha_struct    *sas;/* SCSI/SAS glue */
 510         struct Scsi_Host        *shost;
 511         u32                     chip_id;
 512         const struct pm8001_chip_info   *chip;
 513         struct completion       *nvmd_completion;
 514         unsigned long           *rsvd_tags;
 515         struct pm8001_phy       phy[PM8001_MAX_PHYS];
 516         struct pm8001_port      port[PM8001_MAX_PHYS];
 517         u32                     id;
 518         u32                     irq;
 519         u32                     iomb_size; /* SPC and SPCV IOMB size */
 520         struct pm8001_device    *devices;
 521         struct pm8001_ccb_info  *ccb_info;
 522         u32                     ccb_count;
 523 #ifdef PM8001_USE_MSIX
 524         int                     number_of_intr;/*will be used in remove()*/
 525         char                    intr_drvname[PM8001_MAX_MSIX_VEC]
 526                                 [PM8001_NAME_LENGTH+1+3+1];
 527 #endif
 528 #ifdef PM8001_USE_TASKLET
 529         struct tasklet_struct   tasklet[PM8001_MAX_MSIX_VEC];
 530 #endif
 531         u32                     logging_level;
 532         u32                     link_rate;
 533         u32                     fw_status;
 534         u32                     smp_exp_mode;
 535         bool                    controller_fatal_error;
 536         const struct firmware   *fw_image;
 537         struct isr_param irq_vector[PM8001_MAX_MSIX_VEC];
 538         u32                     non_fatal_count;
 539         u32                     non_fatal_read_length;
 540         u32 max_q_num;
 541         u32 ib_offset;
 542         u32 ob_offset;
 543         u32 ci_offset;
 544         u32 pi_offset;
 545         u32 max_memcnt;
 546 };
 547
 548 struct pm8001_work {
 549         struct work_struct work;
 550         struct pm8001_hba_info *pm8001_ha;
 551         void *data;
 552         int handler;
 553 };
 554
 555 struct pm8001_fw_image_header {
 556         u8 vender_id[8];
 557         u8 product_id;
 558         u8 hardware_rev;
 559         u8 dest_partition;
 560         u8 reserved;
 561         u8 fw_rev[4];
 562         __be32  image_length;
 563         __be32 image_crc;
 564         __be32 startup_entry;
 565 } __attribute__((packed, aligned(4)));
 566
 567
 568 /**
 569  * FW Flash Update status values
 570  */
 571 #define FLASH_UPDATE_COMPLETE_PENDING_REBOOT    0x00
 572 #define FLASH_UPDATE_IN_PROGRESS                0x01
 573 #define FLASH_UPDATE_HDR_ERR                    0x02
 574 #define FLASH_UPDATE_OFFSET_ERR                 0x03
 575 #define FLASH_UPDATE_CRC_ERR                    0x04
 576 #define FLASH_UPDATE_LENGTH_ERR                 0x05
 577 #define FLASH_UPDATE_HW_ERR                     0x06
 578 #define FLASH_UPDATE_DNLD_NOT_SUPPORTED         0x10
 579 #define FLASH_UPDATE_DISABLED                   0x11
 580
 581 /* Device states */
 582 #define DS_OPERATIONAL                          0x01
 583 #define DS_PORT_IN_RESET                        0x02
 584 #define DS_IN_RECOVERY                          0x03
 585 #define DS_IN_ERROR                             0x04
 586 #define DS_NON_OPERATIONAL                      0x07
 587
 588 /**
 589  * brief param structure for firmware flash update.
 590  */
 591 struct fw_flash_updata_info {
 592         u32                     cur_image_offset;
 593         u32                     cur_image_len;
 594         u32                     total_image_len;
 595         struct pm8001_prd       sgl;
 596 };
 597
 598 struct fw_control_info {
 599         u32                     retcode;/*ret code (status)*/
 600         u32                     phase;/*ret code phase*/
 601         u32                     phaseCmplt;/*percent complete for the current
 602         update phase */
 603         u32                     version;/*Hex encoded firmware version number*/
 604         u32                     offset;/*Used for downloading firmware  */
 605         u32                     len; /*len of buffer*/
 606         u32                     size;/* Used in OS VPD and Trace get size
 607         operations.*/
 608         u32                     reserved;/* padding required for 64 bit
 609         alignment */
 610         u8                      buffer[];/* Start of buffer */
 611 };
 612 struct fw_control_ex {
 613         struct fw_control_info *fw_control;
 614         void                    *buffer;/* keep buffer pointer to be
 615         freed when the response comes*/
 616         void                    *virtAddr;/* keep virtual address of the data */
 617         void                    *usrAddr;/* keep virtual address of the
 618         user data */
 619         dma_addr_t              phys_addr;
 620         u32                     len; /* len of buffer  */
 621         void                    *payload; /* pointer to IOCTL Payload */
 622         u8                      inProgress;/*if 1 - the IOCTL request is in
 623         progress */
 624         void                    *param1;
 625         void                    *param2;
 626         void                    *param3;
 627 };
 628
 629 /* pm8001 workqueue */
 630 extern struct workqueue_struct *pm8001_wq;
 631
 632 /******************** function prototype *********************/
 633 int pm8001_tag_alloc(struct pm8001_hba_info *pm8001_ha, u32 *tag_out);
 634 u32 pm8001_get_ncq_tag(struct sas_task *task, u32 *tag);
 635 void pm8001_ccb_task_free(struct pm8001_hba_info *pm8001_ha,
 636                           struct pm8001_ccb_info *ccb);
 637 int pm8001_phy_control(struct asd_sas_phy *sas_phy, enum phy_func func,
 638         void *funcdata);
 639 void pm8001_scan_start(struct Scsi_Host *shost);
 640 int pm8001_scan_finished(struct Scsi_Host *shost, unsigned long time);
 641 int pm8001_queue_command(struct sas_task *task, gfp_t gfp_flags);
 642 int pm8001_abort_task(struct sas_task *task);
 643 int pm8001_clear_task_set(struct domain_device *dev, u8 *lun);
 644 int pm8001_dev_found(struct domain_device *dev);
 645 void pm8001_dev_gone(struct domain_device *dev);
 646 int pm8001_lu_reset(struct domain_device *dev, u8 *lun);
 647 int pm8001_I_T_nexus_reset(struct domain_device *dev);
 648 int pm8001_I_T_nexus_event_handler(struct domain_device *dev);
 649 int pm8001_query_task(struct sas_task *task);
 650 void pm8001_port_formed(struct asd_sas_phy *sas_phy);
 651 void pm8001_open_reject_retry(
 652         struct pm8001_hba_info *pm8001_ha,
 653         struct sas_task *task_to_close,
 654         struct pm8001_device *device_to_close);
 655 int pm8001_mem_alloc(struct pci_dev *pdev, void **virt_addr,
 656         dma_addr_t *pphys_addr, u32 *pphys_addr_hi, u32 *pphys_addr_lo,
 657         u32 mem_size, u32 align);
 658
 659 void pm8001_chip_iounmap(struct pm8001_hba_info *pm8001_ha);
 660 int pm8001_mpi_build_cmd(struct pm8001_hba_info *pm8001_ha,
 661                         u32 q_index, u32 opCode, void *payload, size_t nb,
 662                         u32 responseQueue);
 663 int pm8001_mpi_msg_free_get(struct inbound_queue_table *circularQ,
 664                                 u16 messageSize, void **messagePtr);
 665 u32 pm8001_mpi_msg_free_set(struct pm8001_hba_info *pm8001_ha, void *pMsg,
 666                         struct outbound_queue_table *circularQ, u8 bc);
 667 u32 pm8001_mpi_msg_consume(struct pm8001_hba_info *pm8001_ha,
 668                         struct outbound_queue_table *circularQ,
 669                         void **messagePtr1, u8 *pBC);
 670 int pm8001_chip_set_dev_state_req(struct pm8001_hba_info *pm8001_ha,
 671                         struct pm8001_device *pm8001_dev, u32 state);
 672 int pm8001_chip_fw_flash_update_req(struct pm8001_hba_info *pm8001_ha,
 673                                         void *payload);
 674 int pm8001_chip_fw_flash_update_build(struct pm8001_hba_info *pm8001_ha,
 675                                         void *fw_flash_updata_info, u32 tag);
 676 int pm8001_chip_set_nvmd_req(struct pm8001_hba_info *pm8001_ha, void *payload);
 677 int pm8001_chip_get_nvmd_req(struct pm8001_hba_info *pm8001_ha, void *payload);
 678 int pm8001_chip_ssp_tm_req(struct pm8001_hba_info *pm8001_ha,
 679                                 struct pm8001_ccb_info *ccb,
 680                                 struct sas_tmf_task *tmf);
 681 int pm8001_chip_abort_task(struct pm8001_hba_info *pm8001_ha,
 682                                 struct pm8001_ccb_info *ccb);
 683 int pm8001_chip_dereg_dev_req(struct pm8001_hba_info *pm8001_ha, u32 device_id);
 684 void pm8001_chip_make_sg(struct scatterlist *scatter, int nr, void *prd);
 685 void pm8001_work_fn(struct work_struct *work);
 686 int pm8001_handle_event(struct pm8001_hba_info *pm8001_ha,
 687                                         void *data, int handler);
 688 void pm8001_mpi_set_dev_state_resp(struct pm8001_hba_info *pm8001_ha,
 689                                                         void *piomb);
 690 void pm8001_mpi_set_nvmd_resp(struct pm8001_hba_info *pm8001_ha,
 691                                                         void *piomb);
 692 void pm8001_mpi_get_nvmd_resp(struct pm8001_hba_info *pm8001_ha,
 693                                                         void *piomb);
 694 int pm8001_mpi_local_phy_ctl(struct pm8001_hba_info *pm8001_ha,
 695                                                         void *piomb);
 696 void pm8001_get_lrate_mode(struct pm8001_phy *phy, u8 link_rate);
 697 void pm8001_get_attached_sas_addr(struct pm8001_phy *phy, u8 *sas_addr);
 698 void pm8001_bytes_dmaed(struct pm8001_hba_info *pm8001_ha, int i);
 699 int pm8001_mpi_reg_resp(struct pm8001_hba_info *pm8001_ha, void *piomb);
 700 int pm8001_mpi_dereg_resp(struct pm8001_hba_info *pm8001_ha, void *piomb);
 701 int pm8001_mpi_fw_flash_update_resp(struct pm8001_hba_info *pm8001_ha,
 702                                                         void *piomb);
 703 int pm8001_mpi_general_event(struct pm8001_hba_info *pm8001_ha, void *piomb);
 704 int pm8001_mpi_task_abort_resp(struct pm8001_hba_info *pm8001_ha, void *piomb);
 705 struct sas_task *pm8001_alloc_task(void);
 706 void pm8001_free_task(struct sas_task *task);
 707 void pm8001_tag_free(struct pm8001_hba_info *pm8001_ha, u32 tag);
 708 struct pm8001_device *pm8001_find_dev(struct pm8001_hba_info *pm8001_ha,
 709                                         u32 device_id);
 710 int pm80xx_set_thermal_config(struct pm8001_hba_info *pm8001_ha);
 711
 712 int pm8001_bar4_shift(struct pm8001_hba_info *pm8001_ha, u32 shiftValue);
 713 void pm8001_set_phy_profile(struct pm8001_hba_info *pm8001_ha,
 714         u32 length, u8 *buf);
 715 void pm8001_set_phy_profile_single(struct pm8001_hba_info *pm8001_ha,
 716                 u32 phy, u32 length, u32 *buf);
 717 int pm80xx_bar4_shift(struct pm8001_hba_info *pm8001_ha, u32 shiftValue);
 718 ssize_t pm80xx_get_fatal_dump(struct device *cdev,
 719                 struct device_attribute *attr, char *buf);
 720 ssize_t pm80xx_get_non_fatal_dump(struct device *cdev,
 721                 struct device_attribute *attr, char *buf);
 722 ssize_t pm8001_get_gsm_dump(struct device *cdev, u32, char *buf);
 723 int pm80xx_fatal_errors(struct pm8001_hba_info *pm8001_ha);
 724 void pm8001_free_dev(struct pm8001_device *pm8001_dev);
 725 /* ctl shared API */
 726 extern const struct attribute_group *pm8001_host_groups[];
 727
 728 #define PM8001_INVALID_TAG      ((u32)-1)
 729
 730 /*
 731  * Allocate a new tag and return the corresponding ccb after initializing it.
 732  */
 733 static inline struct pm8001_ccb_info *
 734 pm8001_ccb_alloc(struct pm8001_hba_info *pm8001_ha,
 735                  struct pm8001_device *dev, struct sas_task *task)
 736 {
 737         struct pm8001_ccb_info *ccb;
 738         struct request *rq = NULL;
 739         u32 tag;
 740
 741         if (task)
 742                 rq = sas_task_find_rq(task);
 743
 744         if (rq) {
 745                 tag = rq->tag + PM8001_RESERVE_SLOT;
 746         } else if (pm8001_tag_alloc(pm8001_ha, &tag)) {
 747                 pm8001_dbg(pm8001_ha, FAIL, "Failed to allocate a tag\n");
 748                 return NULL;
 749         }
 750
 751         ccb = &pm8001_ha->ccb_info[tag];
 752         ccb->task = task;
 753         ccb->n_elem = 0;
 754         ccb->ccb_tag = tag;
 755         ccb->device = dev;
 756         ccb->fw_control_context = NULL;
 757         ccb->open_retry = 0;
 758
 759         return ccb;
 760 }
 761
 762 /*
 763  * Free the tag of an initialized ccb.
 764  */
 765 static inline void pm8001_ccb_free(struct pm8001_hba_info *pm8001_ha,
 766                                    struct pm8001_ccb_info *ccb)
 767 {
 768         u32 tag = ccb->ccb_tag;
 769
 770         /*
 771          * Cleanup the ccb to make sure that a manual scan of the adapter
 772          * ccb_info array can detect ccb's that are in use.
 773          * C.f. pm8001_open_reject_retry()
 774          */
 775         ccb->task = NULL;
 776         ccb->ccb_tag = PM8001_INVALID_TAG;
 777         ccb->device = NULL;
 778         ccb->fw_control_context = NULL;
 779
 780         pm8001_tag_free(pm8001_ha, tag);
 781 }
 782
 783 static inline void pm8001_ccb_task_free_done(struct pm8001_hba_info *pm8001_ha,
 784                                              struct pm8001_ccb_info *ccb)
 785 {
 786         struct sas_task *task = ccb->task;
 787
 788         pm8001_ccb_task_free(pm8001_ha, ccb);
 789         smp_mb(); /*in order to force CPU ordering*/
 790         task->task_done(task);
 791 }
 792 void pm8001_setds_completion(struct domain_device *dev);
 793 void pm8001_tmf_aborted(struct sas_task *task);
 794
 795 #endif
 796